drm/rockchip: dw_hdmi: discard modes with unachievable pixelclocks
authorSascha Hauer <s.hauer@pengutronix.de>
Thu, 16 Feb 2023 10:24:47 +0000 (11:24 +0100)
committerHeiko Stuebner <heiko@sntech.de>
Thu, 9 Mar 2023 00:14:27 +0000 (01:14 +0100)
commitd13b10ec6696b0c523fa21b65c7ff6f246a49560
treebd0c4cda3a9cdc5dbc77f2a213abdcb8c9bee4d0
parent83b61f817f43ed67572d1e241c9f552e0a8bfff4
drm/rockchip: dw_hdmi: discard modes with unachievable pixelclocks

The Rockchip PLL drivers are currently table based and support only
the most common pixelclocks. Discard all modes we cannot achieve
at all. Normally the desired pixelclocks have an exact match in the
PLL driver, nevertheless allow for a 0.1% error just in case.

Tested-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20230118132213.2911418-4-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20230216102447.582905-5-s.hauer@pengutronix.de
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c