PM / arch: x86: MSR_IA32_ENERGY_PERF_BIAS sysfs interface
authorRafael J. Wysocki <rafael.j.wysocki@intel.com>
Thu, 21 Mar 2019 22:20:17 +0000 (23:20 +0100)
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>
Sun, 7 Apr 2019 20:33:42 +0000 (22:33 +0200)
commitb9c273babce791cf228fc466577f55056a699f9c
treeea9f1103024da00c2ee7804984cac36366cd43bc
parent5861381d486601430cccf64849bd0a226154bc0d
PM / arch: x86: MSR_IA32_ENERGY_PERF_BIAS sysfs interface

The Performance and Energy Bias Hint (EPB) is expected to be set by
user space through the generic MSR interface, but that interface is
not particularly nice and there are security concerns regarding it,
so it is not always available.

For this reason, add a sysfs interface for reading and updating the
EPB, in the form of a new attribute, energy_perf_bias, located
under /sys/devices/system/cpu/cpu#/power/ for online CPUs that
support the EPB feature.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Acked-by: Borislav Petkov <bp@suse.de>
Documentation/ABI/testing/sysfs-devices-system-cpu
Documentation/admin-guide/pm/intel_epb.rst
arch/x86/kernel/cpu/intel_epb.c