cxgb4: rework TC filter rule insertion across regions
authorRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Wed, 18 Mar 2020 10:54:51 +0000 (16:24 +0530)
committerDavid S. Miller <davem@davemloft.net>
Wed, 18 Mar 2020 23:39:03 +0000 (16:39 -0700)
commit8d174351f285a27139abf72515eaf86fa6394e34
tree0f69e63b8fd8a2426743bf3b1f0420d31cbcf9d6
parent357b6cc5834eabc1be7c28a9faae7da061df097d
cxgb4: rework TC filter rule insertion across regions

Chelsio NICs have 3 filter regions, in following order of priority:
1. High Priority (HPFILTER) region (Highest Priority).
2. HASH region.
3. Normal FILTER region (Lowest Priority).

Currently, there's a 1-to-1 mapping between the prio value passed
by TC and the filter region index. However, it's possible to have
multiple TC rules with the same prio value. In this case, if a region
is exhausted, no attempt is made to try inserting the rule in the
next available region.

So, rework and remove the 1-to-1 mapping. Instead, dynamically select
the region to insert the filter rule, as long as the new rule's prio
value doesn't conflict with existing rules across all the 3 regions.

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c
drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.h
drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c
drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_matchall.c
drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.c
drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h