RISC-V: Remove CLINT related code from timer and arch
authorAnup Patel <anup.patel@wdc.com>
Mon, 17 Aug 2020 12:42:50 +0000 (18:12 +0530)
committerPalmer Dabbelt <palmerdabbelt@google.com>
Thu, 20 Aug 2020 17:58:13 +0000 (10:58 -0700)
commit2bc3fc877aa9c4c8b80cc49f66dfcb7e4857a128
tree0bee46a80c0d3d86a344e45c5fe1ef670e2f08b6
parent2ac6795fcc085e8d03649f1bbd0d70aaff612cad
RISC-V: Remove CLINT related code from timer and arch

Right now the RISC-V timer driver is convoluted to support:
1. Linux RISC-V S-mode (with MMU) where it will use TIME CSR for
   clocksource and SBI timer calls for clockevent device.
2. Linux RISC-V M-mode (without MMU) where it will use CLINT MMIO
   counter register for clocksource and CLINT MMIO compare register
   for clockevent device.

We now have a separate CLINT timer driver which also provide CLINT
based IPI operations so let's remove CLINT MMIO related code from
arch/riscv directory and RISC-V timer driver.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Emil Renner Berhing <kernel@esmil.dk>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
12 files changed:
arch/riscv/Kconfig
arch/riscv/Kconfig.socs
arch/riscv/configs/nommu_virt_defconfig
arch/riscv/include/asm/clint.h [deleted file]
arch/riscv/include/asm/timex.h
arch/riscv/kernel/Makefile
arch/riscv/kernel/clint.c [deleted file]
arch/riscv/kernel/setup.c
arch/riscv/kernel/smp.c
arch/riscv/kernel/smpboot.c
drivers/clocksource/Kconfig
drivers/clocksource/timer-riscv.c