KVM: arm64: PMU: Implement PMUv3p5 long counter support
authorMarc Zyngier <maz@kernel.org>
Sun, 13 Nov 2022 16:38:29 +0000 (16:38 +0000)
committerMarc Zyngier <maz@kernel.org>
Sat, 19 Nov 2022 12:56:39 +0000 (12:56 +0000)
commit11af4c37165e36a6090172ded5d06acdf15206da
tree163f233bfeb741f0661e30810cadbcf27f467767
parentd82e0dfdfda73f91e7282e1083a2cd7cd366ea87
KVM: arm64: PMU: Implement PMUv3p5 long counter support

PMUv3p5 (which is mandatory with ARMv8.5) comes with some extra
features:

- All counters are 64bit

- The overflow point is controlled by the PMCR_EL0.LP bit

Add the required checks in the helpers that control counter
width and overflow, as well as the sysreg handling for the LP
bit. A new kvm_pmu_is_3p5() helper makes it easy to spot the
PMUv3p5 specific handling.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221113163832.3154370-14-maz@kernel.org
arch/arm64/kvm/pmu-emul.c
arch/arm64/kvm/sys_regs.c
include/kvm/arm_pmu.h