MMC: CSD and CID timeout values
authorMatthew Fleming <matthew.fleming@imgtec.com>
Thu, 2 Oct 2008 11:24:05 +0000 (12:24 +0100)
committerPierre Ossman <drzeus@drzeus.cx>
Sun, 12 Oct 2008 09:04:37 +0000 (11:04 +0200)
commit0d3e0460f307e84904968aad6cff97bd688583d8
treeea939e4e6b8a5b24b294932974fbe42ca7d427be
parent7244b85bd17313d7d300ee93ec7bfbca1f4ccf3d
MMC: CSD and CID timeout values

The MMC spec states that the timeout for accessing the CSD and CID
registers is 64 clock cycles.

Signed-off-by: Matthew Fleming <matthew.fleming@imgtec.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
drivers/mmc/core/mmc_ops.c