drm/i915/mtl: Re-use ADL-P's "DC off" power well
authorMatt Roper <matthew.d.roper@intel.com>
Tue, 18 Apr 2023 22:04:44 +0000 (15:04 -0700)
committerRadhakrishna Sripada <radhakrishna.sripada@intel.com>
Wed, 19 Apr 2023 22:14:20 +0000 (15:14 -0700)
commit0c8d9870177a2d7c9e88a2e79dc20950ec84328f
treea3c23f4149865d27aa3139e41f727dfd1cea6d51
parent88c487938414c519fdb1c7e55211d8778d3367d0
drm/i915/mtl: Re-use ADL-P's "DC off" power well

As with ADL-P, MTL's "DC off" power well should be a dependency of the
PGC and PGD power wells, not the entire PG2 well.  In fact, the DC5/DC6
requirements between the two platforms are the same, so the Xe_LPD "DC
off" well definition can just be re-used for Xe_LPD+.

Bspec: 49193
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230418220446.2205509-3-radhakrishna.sripada@intel.com
drivers/gpu/drm/i915/display/intel_display_power_map.c