Merge tag 'sound-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai...

[sfrench/cifs-2.6.git] / sound / soc / sof / mediatek / mt8195 / mt8195-loader.c

diff --git a/sound/soc/sof/mediatek/mt8195/mt8195-loader.c b/sound/soc/sof/mediatek/mt8195/mt8195-loader.c
index ed18d6379e922c2a1f747f593b97daac89ec6111..4be99ff4ebd33ec4a9a7b7166045c3e551e8b522 100644 (file)
--- a/sound/soc/sof/mediatek/mt8195/mt8195-loader.c
+++ b/sound/soc/sof/mediatek/mt8195/mt8195-loader.c
@@ -21,7 +21,7 @@ void sof_hifixdsp_boot_sequence(struct snd_sof_dev *sdev, u32 boot_addr)
 
        /* pull high StatVectorSel to use AltResetVec (set bit4 to 1) */
        snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
-                               DSP_RESET_SW, DSP_RESET_SW);
+                               STATVECTOR_SEL, STATVECTOR_SEL);
 
        /* toggle  DReset & BReset */
        /* pull high DReset & BReset */
@@ -29,6 +29,9 @@ void sof_hifixdsp_boot_sequence(struct snd_sof_dev *sdev, u32 boot_addr)
                                ADSP_BRESET_SW | ADSP_DRESET_SW,
                                ADSP_BRESET_SW | ADSP_DRESET_SW);
 
+       /* delay 10 DSP cycles at 26M about 1us by IP vendor's suggestion */
+       udelay(1);
+
        /* pull low DReset & BReset */
        snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
                                ADSP_BRESET_SW | ADSP_DRESET_SW,
@@ -46,11 +49,13 @@ void sof_hifixdsp_boot_sequence(struct snd_sof_dev *sdev, u32 boot_addr)
 
 void sof_hifixdsp_shutdown(struct snd_sof_dev *sdev)
 {
-       /* Clear to 0 firstly */
-       snd_sof_dsp_write(sdev, DSP_REG_BAR, DSP_RESET_SW, 0x0);
-
        /* RUN_STALL pull high again to reset */
        snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
                                ADSP_RUNSTALL, ADSP_RUNSTALL);
+
+       /* pull high DReset & BReset */
+       snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
+                               ADSP_BRESET_SW | ADSP_DRESET_SW,
+                               ADSP_BRESET_SW | ADSP_DRESET_SW);
 }