usb: gadget: s3c-hsotg: get phy bus width from phy subsystem

[sfrench/cifs-2.6.git] / drivers / usb / gadget / s3c-hsotg.c

diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c
index f39daf7a7dce8997a31d34574e08b8e9b27e7957..c0ff1cb91f20691c7887f89a3a648e752ebca4e3 100644 (file)
--- a/drivers/usb/gadget/s3c-hsotg.c
+++ b/drivers/usb/gadget/s3c-hsotg.c
@@ -146,6 +146,7 @@ struct s3c_hsotg_ep {
  * @regs: The memory area mapped for accessing registers.
  * @irq: The IRQ number we are using
  * @supplies: Definition of USB power supplies
+ * @phyif: PHY interface width
  * @dedicated_fifos: Set if the hardware has dedicated IN-EP fifos.
  * @num_of_eps: Number of available EPs (excluding EP0)
  * @debug_root: root directrory for debugfs.
@@ -174,6 +175,7 @@ struct s3c_hsotg {
 
        struct regulator_bulk_data supplies[ARRAY_SIZE(s3c_hsotg_supply_names)];
 
+       u32                     phyif;
        unsigned int            dedicated_fifos:1;
        unsigned char           num_of_eps;
 
@@ -2288,7 +2290,7 @@ static void s3c_hsotg_core_init(struct s3c_hsotg *hsotg)
         */
 
        /* set the PLL on, remove the HNP/SRP and set the PHY */
-       writel(GUSBCFG_PHYIf16 | GUSBCFG_TOutCal(7) |
+       writel(hsotg->phyif | GUSBCFG_TOutCal(7) |
               (0x5 << 10), hsotg->regs + GUSBCFG);
 
        s3c_hsotg_init_fifo(hsotg);
@@ -3646,6 +3648,16 @@ static int s3c_hsotg_probe(struct platform_device *pdev)
                goto err_supplies;
        }
 
+       /* Set default UTMI width */
+       hsotg->phyif = GUSBCFG_PHYIf16;
+
+       /*
+        * If using the generic PHY framework, check if the PHY bus
+        * width is 8-bit and set the phyif appropriately.
+        */
+       if (hsotg->phy && (phy_get_bus_width(phy) == 8))
+               hsotg->phyif = GUSBCFG_PHYIf8;
+
        if (hsotg->phy)
                phy_init(hsotg->phy);