irqchip: gic: Simplify gic_configure_irq by using IRQCHIP_SET_TYPE_MASKED

[sfrench/cifs-2.6.git] / drivers / irqchip / irq-gic-common.c

diff --git a/drivers/irqchip/irq-gic-common.c b/drivers/irqchip/irq-gic-common.c
index ad96ebb0c7abd882075f67162ff605b8969a792b..9448e391cb710363d18df4c3079ae0504b0cbd44 100644 (file)
--- a/drivers/irqchip/irq-gic-common.c
+++ b/drivers/irqchip/irq-gic-common.c
@@ -24,11 +24,8 @@
 int gic_configure_irq(unsigned int irq, unsigned int type,
                       void __iomem *base, void (*sync_access)(void))
 {
-       u32 enablemask = 1 << (irq % 32);
-       u32 enableoff = (irq / 32) * 4;
        u32 confmask = 0x2 << ((irq % 16) * 2);
        u32 confoff = (irq / 16) * 4;
-       bool enabled = false;
        u32 val, oldval;
        int ret = 0;
 
@@ -42,17 +39,6 @@ int gic_configure_irq(unsigned int irq, unsigned int type,
        else if (type & IRQ_TYPE_EDGE_BOTH)
                val |= confmask;
 
-       /*
-        * As recommended by the spec, disable the interrupt before changing
-        * the configuration
-        */
-       if (readl_relaxed(base + GIC_DIST_ENABLE_SET + enableoff) & enablemask) {
-               writel_relaxed(enablemask, base + GIC_DIST_ENABLE_CLEAR + enableoff);
-               if (sync_access)
-                       sync_access();
-               enabled = true;
-       }
-
        /*
         * Write back the new configuration, and possibly re-enable
         * the interrupt. If we tried to write a new configuration and failed,
@@ -62,9 +48,6 @@ int gic_configure_irq(unsigned int irq, unsigned int type,
        if (readl_relaxed(base + GIC_DIST_CONFIG + confoff) != val && val != oldval)
                ret = -EINVAL;
 
-       if (enabled)
-               writel_relaxed(enablemask, base + GIC_DIST_ENABLE_SET + enableoff);
-
        if (sync_access)
                sync_access();