drm/msm/dpu: drop dpu_encoder_phys_ops.atomic_mode_set

[sfrench/cifs-2.6.git] / drivers / gpu / drm / msm / disp / dpu1 / dpu_encoder_phys_wb.c

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
index 60201372548487bd2341d9009cf62fe976764ff5..a0a28230fc31e299e6980a6490777cdc9768ac92 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
@@ -539,15 +539,6 @@ static void dpu_encoder_phys_wb_irq_disable(struct dpu_encoder_phys *phys)
                dpu_core_irq_unregister_callback(phys->dpu_kms, phys->irq[INTR_IDX_WB_DONE]);
 }
 
-static void dpu_encoder_phys_wb_atomic_mode_set(
-               struct dpu_encoder_phys *phys_enc,
-               struct drm_crtc_state *crtc_state,
-               struct drm_connector_state *conn_state)
-{
-
-       phys_enc->irq[INTR_IDX_WB_DONE] = phys_enc->hw_wb->caps->intr_wb_done;
-}
-
 static void _dpu_encoder_phys_wb_handle_wbdone_timeout(
                struct dpu_encoder_phys *phys_enc)
 {
@@ -784,7 +775,6 @@ static bool dpu_encoder_phys_wb_is_valid_for_commit(struct dpu_encoder_phys *phy
 static void dpu_encoder_phys_wb_init_ops(struct dpu_encoder_phys_ops *ops)
 {
        ops->is_master = dpu_encoder_phys_wb_is_master;
-       ops->atomic_mode_set = dpu_encoder_phys_wb_atomic_mode_set;
        ops->enable = dpu_encoder_phys_wb_enable;
        ops->disable = dpu_encoder_phys_wb_disable;
        ops->atomic_check = dpu_encoder_phys_wb_atomic_check;
@@ -831,6 +821,7 @@ struct dpu_encoder_phys *dpu_encoder_phys_wb_init(struct drm_device *dev,
 
        dpu_encoder_phys_wb_init_ops(&phys_enc->ops);
        phys_enc->intf_mode = INTF_MODE_WB_LINE;
+       phys_enc->irq[INTR_IDX_WB_DONE] = phys_enc->hw_wb->caps->intr_wb_done;
 
        atomic_set(&wb_enc->wbirq_refcount, 0);