Merge drm/drm-next into drm-intel-next
[sfrench/cifs-2.6.git] / drivers / gpu / drm / i915 / i915_gpu_error.c
index d10f4eb0e2722675ba7f6d987bfcc422381367e3..b5fbc2252784ac74981ed4a200f49310c82d16e2 100644 (file)
@@ -670,6 +670,18 @@ static void err_print_pciid(struct drm_i915_error_state_buf *m,
                   pdev->subsystem_device);
 }
 
+static void err_print_guc_ctb(struct drm_i915_error_state_buf *m,
+                             const char *name,
+                             const struct intel_ctb_coredump *ctb)
+{
+       if (!ctb->size)
+               return;
+
+       err_printf(m, "GuC %s CTB: raw: 0x%08X, 0x%08X/%08X, cached: 0x%08X/%08X, desc = 0x%08X, buf = 0x%08X x 0x%08X\n",
+                  name, ctb->raw_status, ctb->raw_head, ctb->raw_tail,
+                  ctb->head, ctb->tail, ctb->desc_offset, ctb->cmds_offset, ctb->size);
+}
+
 static void err_print_uc(struct drm_i915_error_state_buf *m,
                         const struct intel_uc_coredump *error_uc)
 {
@@ -677,7 +689,12 @@ static void err_print_uc(struct drm_i915_error_state_buf *m,
 
        intel_uc_fw_dump(&error_uc->guc_fw, &p);
        intel_uc_fw_dump(&error_uc->huc_fw, &p);
-       intel_gpu_error_print_vma(m, NULL, error_uc->guc_log);
+       err_printf(m, "GuC timestamp: 0x%08x\n", error_uc->guc.timestamp);
+       intel_gpu_error_print_vma(m, NULL, error_uc->guc.vma_log);
+       err_printf(m, "GuC CTB fence: %d\n", error_uc->guc.last_fence);
+       err_print_guc_ctb(m, "Send", error_uc->guc.ctb + 0);
+       err_print_guc_ctb(m, "Recv", error_uc->guc.ctb + 1);
+       intel_gpu_error_print_vma(m, NULL, error_uc->guc.vma_ctb);
 }
 
 static void err_free_sgl(struct scatterlist *sgl)
@@ -719,6 +736,8 @@ static void err_print_gt_global_nonguc(struct drm_i915_error_state_buf *m,
        int i;
 
        err_printf(m, "GT awake: %s\n", str_yes_no(gt->awake));
+       err_printf(m, "CS timestamp frequency: %u Hz, %d ns\n",
+                  gt->clock_frequency, gt->clock_period_ns);
        err_printf(m, "EIR: 0x%08x\n", gt->eir);
        err_printf(m, "PGTBL_ER: 0x%08x\n", gt->pgtbl_er);
 
@@ -850,7 +869,7 @@ static void __err_print_to_sgl(struct drm_i915_error_state_buf *m,
        if (error->gt) {
                bool print_guc_capture = false;
 
-               if (error->gt->uc && error->gt->uc->is_guc_capture)
+               if (error->gt->uc && error->gt->uc->guc.is_guc_capture)
                        print_guc_capture = true;
 
                err_print_gt_display(m, error->gt);
@@ -1005,7 +1024,8 @@ static void cleanup_uc(struct intel_uc_coredump *uc)
 {
        kfree(uc->guc_fw.path);
        kfree(uc->huc_fw.path);
-       i915_vma_coredump_free(uc->guc_log);
+       i915_vma_coredump_free(uc->guc.vma_log);
+       i915_vma_coredump_free(uc->guc.vma_ctb);
 
        kfree(uc);
 }
@@ -1654,6 +1674,23 @@ gt_record_engines(struct intel_gt_coredump *gt,
        }
 }
 
+static void gt_record_guc_ctb(struct intel_ctb_coredump *saved,
+                             const struct intel_guc_ct_buffer *ctb,
+                             const void *blob_ptr, struct intel_guc *guc)
+{
+       if (!ctb || !ctb->desc)
+               return;
+
+       saved->raw_status = ctb->desc->status;
+       saved->raw_head = ctb->desc->head;
+       saved->raw_tail = ctb->desc->tail;
+       saved->head = ctb->head;
+       saved->tail = ctb->tail;
+       saved->size = ctb->size;
+       saved->desc_offset = ((void *)ctb->desc) - blob_ptr;
+       saved->cmds_offset = ((void *)ctb->cmds) - blob_ptr;
+}
+
 static struct intel_uc_coredump *
 gt_record_uc(struct intel_gt_coredump *gt,
             struct i915_vma_compress *compress)
@@ -1674,8 +1711,22 @@ gt_record_uc(struct intel_gt_coredump *gt,
         */
        error_uc->guc_fw.path = kstrdup(uc->guc.fw.path, ALLOW_FAIL);
        error_uc->huc_fw.path = kstrdup(uc->huc.fw.path, ALLOW_FAIL);
-       error_uc->guc_log = create_vma_coredump(gt->_gt, uc->guc.log.vma,
-                                               "GuC log buffer", compress);
+
+       /*
+        * Save the GuC log and include a timestamp reference for converting the
+        * log times to system times (in conjunction with the error->boottime and
+        * gt->clock_frequency fields saved elsewhere).
+        */
+       error_uc->guc.timestamp = intel_uncore_read(gt->_gt->uncore, GUCPMTIMESTAMP);
+       error_uc->guc.vma_log = create_vma_coredump(gt->_gt, uc->guc.log.vma,
+                                                   "GuC log buffer", compress);
+       error_uc->guc.vma_ctb = create_vma_coredump(gt->_gt, uc->guc.ct.vma,
+                                                   "GuC CT buffer", compress);
+       error_uc->guc.last_fence = uc->guc.ct.requests.last_fence;
+       gt_record_guc_ctb(error_uc->guc.ctb + 0, &uc->guc.ct.ctbs.send,
+                         uc->guc.ct.ctbs.send.desc, (struct intel_guc *)&uc->guc);
+       gt_record_guc_ctb(error_uc->guc.ctb + 1, &uc->guc.ct.ctbs.recv,
+                         uc->guc.ct.ctbs.send.desc, (struct intel_guc *)&uc->guc);
 
        return error_uc;
 }
@@ -1832,6 +1883,8 @@ static void gt_record_global_regs(struct intel_gt_coredump *gt)
 static void gt_record_info(struct intel_gt_coredump *gt)
 {
        memcpy(&gt->info, &gt->_gt->info, sizeof(struct intel_gt_info));
+       gt->clock_frequency = gt->_gt->clock_frequency;
+       gt->clock_period_ns = gt->_gt->clock_period_ns;
 }
 
 /*
@@ -2026,9 +2079,9 @@ __i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 du
                        error->gt->uc = gt_record_uc(error->gt, compress);
                        if (error->gt->uc) {
                                if (dump_flags & CORE_DUMP_FLAG_IS_GUC_CAPTURE)
-                                       error->gt->uc->is_guc_capture = true;
+                                       error->gt->uc->guc.is_guc_capture = true;
                                else
-                                       GEM_BUG_ON(error->gt->uc->is_guc_capture);
+                                       GEM_BUG_ON(error->gt->uc->guc.is_guc_capture);
                        }
                }