drm/i915/mso: add splitter state readout for platforms that support it
[sfrench/cifs-2.6.git] / drivers / gpu / drm / i915 / display / intel_ddi.c
index eeae78097a20bb994e1d2c849f57a039dfe62c9e..d4cfe7e85538f2ffd8dead983318698ea53543e4 100644 (file)
@@ -2136,6 +2136,45 @@ static void intel_ddi_power_up_lanes(struct intel_encoder *encoder,
        }
 }
 
+static void intel_ddi_mso_get_config(struct intel_encoder *encoder,
+                                    struct intel_crtc_state *pipe_config)
+{
+       struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
+       struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+       enum pipe pipe = crtc->pipe;
+       u32 dss1;
+
+       if (!HAS_MSO(i915))
+               return;
+
+       dss1 = intel_de_read(i915, ICL_PIPE_DSS_CTL1(pipe));
+
+       pipe_config->splitter.enable = dss1 & SPLITTER_ENABLE;
+       if (!pipe_config->splitter.enable)
+               return;
+
+       /* Splitter enable is supported for pipe A only. */
+       if (drm_WARN_ON(&i915->drm, pipe != PIPE_A)) {
+               pipe_config->splitter.enable = false;
+               return;
+       }
+
+       switch (dss1 & SPLITTER_CONFIGURATION_MASK) {
+       default:
+               drm_WARN(&i915->drm, true,
+                        "Invalid splitter configuration, dss1=0x%08x\n", dss1);
+               fallthrough;
+       case SPLITTER_CONFIGURATION_2_SEGMENT:
+               pipe_config->splitter.link_count = 2;
+               break;
+       case SPLITTER_CONFIGURATION_4_SEGMENT:
+               pipe_config->splitter.link_count = 4;
+               break;
+       }
+
+       pipe_config->splitter.pixel_overlap = REG_FIELD_GET(OVERLAP_PIXELS_MASK, dss1);
+}
+
 static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
                                  struct intel_encoder *encoder,
                                  const struct intel_crtc_state *crtc_state,
@@ -3316,6 +3355,8 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
                intel_ddi_read_func_ctl(encoder, pipe_config);
        }
 
+       intel_ddi_mso_get_config(encoder, pipe_config);
+
        pipe_config->has_audio =
                intel_ddi_is_audio_enabled(dev_priv, cpu_transcoder);