Merge tag 'drm-next-2023-05-05' of git://anongit.freedesktop.org/drm/drm
[sfrench/cifs-2.6.git] / drivers / gpu / drm / amd / display / dc / dcn314 / dcn314_resource.c
index 54ed3de869d3b001d98d8f8c0ab972fe7d819065..abeeede38fb3912f904a864ec08320e7cadba93e 100644 (file)
@@ -855,8 +855,6 @@ static const struct resource_caps res_cap_dcn314 = {
 
 static const struct dc_plane_cap plane_cap = {
        .type = DC_PLANE_TYPE_DCN_UNIVERSAL,
-       .blends_with_above = true,
-       .blends_with_below = true,
        .per_pixel_alpha = true,
 
        .pixel_format_support = {
@@ -887,6 +885,7 @@ static const struct dc_plane_cap plane_cap = {
 static const struct dc_debug_options debug_defaults_drv = {
        .disable_z10 = false,
        .enable_z9_disable_interface = true,
+       .minimum_z8_residency_time = 2000,
        .psr_skip_crtc_disable = true,
        .disable_dmcu = true,
        .force_abm_enable = false,
@@ -1697,6 +1696,23 @@ static void dcn314_get_panel_config_defaults(struct dc_panel_config *panel_confi
        *panel_config = panel_config_defaults;
 }
 
+static bool filter_modes_for_single_channel_workaround(struct dc *dc,
+               struct dc_state *context)
+{
+       // Filter 2K@240Hz+8K@24fps above combination timing if memory only has single dimm LPDDR
+       if (dc->clk_mgr->bw_params->vram_type == 34 && dc->clk_mgr->bw_params->num_channels < 2) {
+               int total_phy_pix_clk = 0;
+
+               for (int i = 0; i < context->stream_count; i++)
+                       if (context->res_ctx.pipe_ctx[i].stream)
+                               total_phy_pix_clk += context->res_ctx.pipe_ctx[i].stream->phy_pix_clk;
+
+               if (total_phy_pix_clk >= (1148928+826260)) //2K@240Hz+8K@24fps
+                       return true;
+       }
+       return false;
+}
+
 bool dcn314_validate_bandwidth(struct dc *dc,
                struct dc_state *context,
                bool fast_validate)
@@ -1712,6 +1728,9 @@ bool dcn314_validate_bandwidth(struct dc *dc,
 
        BW_VAL_TRACE_COUNT();
 
+       if (filter_modes_for_single_channel_workaround(dc, context))
+               goto validate_fail;
+
        DC_FP_START();
        // do not support self refresh only
        out = dcn30_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, fast_validate, false);