clk: rockchip: add watchdog pclk on rk3328
[sfrench/cifs-2.6.git] / drivers / clk / rockchip / clk-rk3328.c
index 9b03c1abf19cf1b764a039458d7a7012ad91efba..cc88532662a618c7348ff2aaaa9cd7c0c05a1bdf 100644 (file)
@@ -800,6 +800,9 @@ static struct rockchip_clk_branch rk3328_clk_branches[] __initdata = {
        GATE(PCLK_SARADC, "pclk_saradc", "pclk_bus", 0, RK3328_CLKGATE_CON(17), 15, GFLAGS),
        GATE(0, "pclk_pmu", "pclk_bus", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(28), 3, GFLAGS),
 
+       /* Watchdog pclk is controlled from the secure GRF */
+       SGRF_GATE(PCLK_WDT, "pclk_wdt", "pclk_bus"),
+
        GATE(PCLK_USB3PHY_OTG, "pclk_usb3phy_otg", "pclk_phy_pre", 0, RK3328_CLKGATE_CON(28), 1, GFLAGS),
        GATE(PCLK_USB3PHY_PIPE, "pclk_usb3phy_pipe", "pclk_phy_pre", 0, RK3328_CLKGATE_CON(28), 2, GFLAGS),
        GATE(PCLK_USB3_GRF, "pclk_usb3_grf", "pclk_phy_pre", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(17), 2, GFLAGS),