Merge branches 'clk-bindings', 'clk-renesas', 'clk-amlogic', 'clk-allwinner' and...

[sfrench/cifs-2.6.git] / drivers / clk / meson / clk-pll.c

diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c
index 4b96e159022461e12022e2b0a40281db37e79d9b..afefeba6e458bc78ac3bbd432ad8c750db327405 100644 (file)
--- a/drivers/clk/meson/clk-pll.c
+++ b/drivers/clk/meson/clk-pll.c
@@ -276,15 +276,15 @@ static int meson_clk_pll_wait_lock(struct clk_hw *hw)
 {
        struct clk_regmap *clk = to_clk_regmap(hw);
        struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);
-       int delay = 24000000;
+       int delay = 5000;
 
        do {
-               /* Is the clock locked now ? */
+               /* Is the clock locked now ? Time out after 100ms. */
                if (meson_parm_read(clk->map, &pll->l))
                        return 0;
 
-               delay--;
-       } while (delay > 0);
+               udelay(20);
+       } while (--delay);
 
        return -ETIMEDOUT;
 }
@@ -319,12 +319,16 @@ static int meson_clk_pll_is_enabled(struct clk_hw *hw)
 
 static int meson_clk_pcie_pll_enable(struct clk_hw *hw)
 {
-       meson_clk_pll_init(hw);
+       int retries = 10;
 
-       if (meson_clk_pll_wait_lock(hw))
-               return -EIO;
+       do {
+               meson_clk_pll_init(hw);
+               if (!meson_clk_pll_wait_lock(hw))
+                       return 0;
+               pr_info("Retry enabling PCIe PLL clock\n");
+       } while (--retries);
 
-       return 0;
+       return -EIO;
 }
 
 static int meson_clk_pll_enable(struct clk_hw *hw)