Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

[sfrench/cifs-2.6.git] / arch / x86 / kvm / cpuid.c

diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index c92c49a0b35b048f6874ee6115bfcc2ddba48563..b14653b61470c2720267006f7e7166ebac159613 100644 (file)
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -62,10 +62,16 @@ u32 xstate_required_size(u64 xstate_bv, bool compacted)
  * This one is tied to SSB in the user API, and not
  * visible in /proc/cpuinfo.
  */
-#define KVM_X86_FEATURE_PSFD           (13*32+28) /* Predictive Store Forwarding Disable */
+#define KVM_X86_FEATURE_AMD_PSFD       (13*32+28) /* Predictive Store Forwarding Disable */
 
 #define F feature_bit
-#define SF(name) (boot_cpu_has(X86_FEATURE_##name) ? F(name) : 0)
+
+/* Scattered Flag - For features that are scattered by cpufeatures.h. */
+#define SF(name)                                               \
+({                                                             \
+       BUILD_BUG_ON(X86_FEATURE_##name >= MAX_CPU_FEATURES);   \
+       (boot_cpu_has(X86_FEATURE_##name) ? F(name) : 0);       \
+})
 
 /*
  * Magic value used by KVM when querying userspace-provided CPUID entries and
@@ -543,9 +549,9 @@ static __always_inline void __kvm_cpu_cap_mask(unsigned int leaf)
 }
 
 static __always_inline
-void kvm_cpu_cap_init_scattered(enum kvm_only_cpuid_leafs leaf, u32 mask)
+void kvm_cpu_cap_init_kvm_defined(enum kvm_only_cpuid_leafs leaf, u32 mask)
 {
-       /* Use kvm_cpu_cap_mask for non-scattered leafs. */
+       /* Use kvm_cpu_cap_mask for leafs that aren't KVM-only. */
        BUILD_BUG_ON(leaf < NCAPINTS);
 
        kvm_cpu_caps[leaf] = mask;
@@ -555,7 +561,7 @@ void kvm_cpu_cap_init_scattered(enum kvm_only_cpuid_leafs leaf, u32 mask)
 
 static __always_inline void kvm_cpu_cap_mask(enum cpuid_leafs leaf, u32 mask)
 {
-       /* Use kvm_cpu_cap_init_scattered for scattered leafs. */
+       /* Use kvm_cpu_cap_init_kvm_defined for KVM-only leafs. */
        BUILD_BUG_ON(leaf >= NCAPINTS);
 
        kvm_cpu_caps[leaf] &= mask;
@@ -657,14 +663,19 @@ void kvm_set_cpu_caps(void)
                kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL_SSBD);
 
        kvm_cpu_cap_mask(CPUID_7_1_EAX,
-               F(AVX_VNNI) | F(AVX512_BF16)
+               F(AVX_VNNI) | F(AVX512_BF16) | F(CMPCCXADD) | F(AMX_FP16) |
+               F(AVX_IFMA)
+       );
+
+       kvm_cpu_cap_init_kvm_defined(CPUID_7_1_EDX,
+               F(AVX_VNNI_INT8) | F(AVX_NE_CONVERT) | F(PREFETCHITI)
        );
 
        kvm_cpu_cap_mask(CPUID_D_1_EAX,
                F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | F(XSAVES) | f_xfd
        );
 
-       kvm_cpu_cap_init_scattered(CPUID_12_EAX,
+       kvm_cpu_cap_init_kvm_defined(CPUID_12_EAX,
                SF(SGX1) | SF(SGX2) | SF(SGX_EDECCSSA)
        );
 
@@ -694,7 +705,7 @@ void kvm_set_cpu_caps(void)
                F(CLZERO) | F(XSAVEERPTR) |
                F(WBNOINVD) | F(AMD_IBPB) | F(AMD_IBRS) | F(AMD_SSBD) | F(VIRT_SSBD) |
                F(AMD_SSB_NO) | F(AMD_STIBP) | F(AMD_STIBP_ALWAYS_ON) |
-               __feature_bit(KVM_X86_FEATURE_PSFD)
+               __feature_bit(KVM_X86_FEATURE_AMD_PSFD)
        );
 
        /*
@@ -913,9 +924,9 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
                                goto out;
 
                        cpuid_entry_override(entry, CPUID_7_1_EAX);
+                       cpuid_entry_override(entry, CPUID_7_1_EDX);
                        entry->ebx = 0;
                        entry->ecx = 0;
-                       entry->edx = 0;
                }
                break;
        case 0xa: { /* Architectural Performance Monitoring */
@@ -1220,8 +1231,12 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
                 * Other defined bits are for MSRs that KVM does not expose:
                 *   EAX      3      SPCL, SMM page configuration lock
                 *   EAX      13     PCMSR, Prefetch control MSR
+                *
+                * KVM doesn't support SMM_CTL.
+                *   EAX       9     SMM_CTL MSR is not supported
                 */
                entry->eax &= BIT(0) | BIT(2) | BIT(6);
+               entry->eax |= BIT(9);
                if (static_cpu_has(X86_FEATURE_LFENCE_RDTSC))
                        entry->eax |= BIT(2);
                if (!static_cpu_has_bug(X86_BUG_NULL_SEG))