Merge tag 'riscv-for-linus-6.1-mw2' of git://git.kernel.org/pub/scm/linux/kernel...

[sfrench/cifs-2.6.git] / arch / riscv / kernel / cpufeature.c

diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index 3b5583db9d80ee4a175a5290ccb77ceea33c97c4..694267d1fe8149a6a29aab095e441aafaa07b0ec 100644 (file)
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -204,6 +204,7 @@ void __init riscv_fill_hwcap(void)
                                SET_ISA_EXT_MAP("zicbom", RISCV_ISA_EXT_ZICBOM);
                                SET_ISA_EXT_MAP("zihintpause", RISCV_ISA_EXT_ZIHINTPAUSE);
                                SET_ISA_EXT_MAP("sstc", RISCV_ISA_EXT_SSTC);
+                               SET_ISA_EXT_MAP("svinval", RISCV_ISA_EXT_SVINVAL);
                        }
 #undef SET_ISA_EXT_MAP
                }
@@ -253,35 +254,28 @@ void __init riscv_fill_hwcap(void)
 #ifdef CONFIG_RISCV_ALTERNATIVE
 static bool __init_or_module cpufeature_probe_svpbmt(unsigned int stage)
 {
-#ifdef CONFIG_RISCV_ISA_SVPBMT
-       switch (stage) {
-       case RISCV_ALTERNATIVES_EARLY_BOOT:
+       if (!IS_ENABLED(CONFIG_RISCV_ISA_SVPBMT))
+               return false;
+
+       if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
                return false;
-       default:
-               return riscv_isa_extension_available(NULL, SVPBMT);
-       }
-#endif
 
-       return false;
+       return riscv_isa_extension_available(NULL, SVPBMT);
 }
 
 static bool __init_or_module cpufeature_probe_zicbom(unsigned int stage)
 {
-#ifdef CONFIG_RISCV_ISA_ZICBOM
-       switch (stage) {
-       case RISCV_ALTERNATIVES_EARLY_BOOT:
+       if (!IS_ENABLED(CONFIG_RISCV_ISA_ZICBOM))
+               return false;
+
+       if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
+               return false;
+
+       if (!riscv_isa_extension_available(NULL, ZICBOM))
                return false;
-       default:
-               if (riscv_isa_extension_available(NULL, ZICBOM)) {
-                       riscv_noncoherent_supported();
-                       return true;
-               } else {
-                       return false;
-               }
-       }
-#endif
 
-       return false;
+       riscv_noncoherent_supported();
+       return true;
 }
 
 /*
@@ -296,10 +290,10 @@ static u32 __init_or_module cpufeature_probe(unsigned int stage)
        u32 cpu_req_feature = 0;
 
        if (cpufeature_probe_svpbmt(stage))
-               cpu_req_feature |= (1U << CPUFEATURE_SVPBMT);
+               cpu_req_feature |= BIT(CPUFEATURE_SVPBMT);
 
        if (cpufeature_probe_zicbom(stage))
-               cpu_req_feature |= (1U << CPUFEATURE_ZICBOM);
+               cpu_req_feature |= BIT(CPUFEATURE_ZICBOM);
 
        return cpu_req_feature;
 }