powerpc: Improve (in|out)_[bl]eXX() asm code

[sfrench/cifs-2.6.git] / arch / ppc / kernel / head_8xx.S

diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S
index 7a2f20583be406beb0f42cb16f64e3a514fd1a04..321bda2de2cb8a40ab0600bb75da4676556edda3 100644 (file)
--- a/arch/ppc/kernel/head_8xx.S
+++ b/arch/ppc/kernel/head_8xx.S
@@ -19,7 +19,6 @@
  *
  */
 
-#include <linux/config.h>
 #include <asm/processor.h>
 #include <asm/page.h>
 #include <asm/mmu.h>
@@ -330,8 +329,18 @@ InstructionTLBMiss:
        mfspr   r11, SPRN_MD_TWC        /* ....and get the pte address */
        lwz     r10, 0(r11)     /* Get the pte */
 
+#ifdef CONFIG_SWAP
+       /* do not set the _PAGE_ACCESSED bit of a non-present page */
+       andi.   r11, r10, _PAGE_PRESENT
+       beq     4f
+       ori     r10, r10, _PAGE_ACCESSED
+       mfspr   r11, SPRN_MD_TWC        /* get the pte address again */
+       stw     r10, 0(r11)
+4:
+#else
        ori     r10, r10, _PAGE_ACCESSED
        stw     r10, 0(r11)
+#endif
 
        /* The Linux PTE won't go exactly into the MMU TLB.
         * Software indicator bits 21, 22 and 28 must be clear.
@@ -396,8 +405,17 @@ DataStoreTLBMiss:
        DO_8xx_CPU6(0x3b80, r3)
        mtspr   SPRN_MD_TWC, r11
 
-       mfspr   r11, SPRN_MD_TWC        /* get the pte address again */
+#ifdef CONFIG_SWAP
+       /* do not set the _PAGE_ACCESSED bit of a non-present page */
+       andi.   r11, r10, _PAGE_PRESENT
+       beq     4f
+       ori     r10, r10, _PAGE_ACCESSED
+4:
+       /* and update pte in table */
+#else
        ori     r10, r10, _PAGE_ACCESSED
+#endif
+       mfspr   r11, SPRN_MD_TWC        /* get the pte address again */
        stw     r10, 0(r11)
 
        /* The Linux PTE won't go exactly into the MMU TLB.
@@ -496,9 +514,7 @@ LoadLargeDTLB:
        lwz     r11, 4(r0)
 
        lwz     r12, 16(r0)
-#ifdef CONFIG_8xx_CPU6
        lwz     r3, 8(r0)
-#endif
        rfi
 
 /* This is the data TLB error on the MPC8xx.  This could be due to
@@ -578,7 +594,16 @@ DataTLBError:
 
        /* Update 'changed', among others.
        */
+#ifdef CONFIG_SWAP
+       ori     r10, r10, _PAGE_DIRTY|_PAGE_HWWRITE
+       /* do not set the _PAGE_ACCESSED bit of a non-present page */
+       andi.   r11, r10, _PAGE_PRESENT
+       beq     4f
+       ori     r10, r10, _PAGE_ACCESSED
+4:
+#else
        ori     r10, r10, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE
+#endif
        mfspr   r11, SPRN_MD_TWC                /* Get pte address again */
        stw     r10, 0(r11)             /* and update pte in table */