powerpc: Don't clobber f0/vs0 during fp|altivec register save

[sfrench/cifs-2.6.git] / arch / powerpc / kernel / vector.S

diff --git a/arch/powerpc/kernel/vector.S b/arch/powerpc/kernel/vector.S
index 4094e4c4c77a77169999ce055bc24bcc90333486..80b3f6e476b66bd57791153e61dfdefa6c04957a 100644 (file)
--- a/arch/powerpc/kernel/vector.S
+++ b/arch/powerpc/kernel/vector.S
@@ -33,6 +33,7 @@ _GLOBAL(store_vr_state)
        mfvscr  v0
        li      r4, VRSTATE_VSCR
        stvx    v0, r4, r3
+       lvx     v0, 0, r3
        blr
 EXPORT_SYMBOL(store_vr_state)
 
@@ -109,6 +110,7 @@ _GLOBAL(save_altivec)
        mfvscr  v0
        li      r4,VRSTATE_VSCR
        stvx    v0,r4,r7
+       lvx     v0,0,r7
        blr
 
 #ifdef CONFIG_VSX