powerpc/4xx: Add L2 cache node to AMCC Canyonlands dts file

[sfrench/cifs-2.6.git] / arch / powerpc / boot / dts / canyonlands.dts

diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts
index 0c6d3184dadaceccd8426ab6c15ee8946791b845..8b5ba8261a36ad54d80863881da214d3bc273d71 100644 (file)
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -40,6 +40,7 @@
                        d-cache-size = <32768>;
                        dcr-controller;
                        dcr-access-method = "native";
+                       next-level-cache = <&L2C0>;
                };
        };
 
@@ -104,6 +105,16 @@
                dcr-reg = <0x00c 0x002>;
        };
 
+       L2C0: l2c {
+               compatible = "ibm,l2-cache-460ex", "ibm,l2-cache";
+               dcr-reg = <0x020 0x008          /* Internal SRAM DCR's */
+                          0x030 0x008>;        /* L2 cache DCR's */
+               cache-line-size = <32>;         /* 32 bytes */
+               cache-size = <262144>;          /* L2, 256K */
+               interrupt-parent = <&UIC1>;
+               interrupts = <11 1>;
+       };
+
        plb {
                compatible = "ibm,plb-460ex", "ibm,plb4";
                #address-cells = <2>;