Merge branch 'soc/sched_clock' into next/soc

[sfrench/cifs-2.6.git] / arch / arm / mach-ixp4xx / common.c

diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 124631e6679760e7a949e496b61efc842031722d..bc9d8ec2918efded94977dfeda9993c644421486 100644 (file)
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -81,6 +81,44 @@ void __init ixp4xx_map_io(void)
        iotable_init(ixp4xx_io_desc, ARRAY_SIZE(ixp4xx_io_desc));
 }
 
+/*
+ * GPIO-functions
+ */
+/*
+ * The following converted to the real HW bits the gpio_line_config
+ */
+/* GPIO pin types */
+#define IXP4XX_GPIO_OUT                0x1
+#define IXP4XX_GPIO_IN                 0x2
+
+/* GPIO signal types */
+#define IXP4XX_GPIO_LOW                        0
+#define IXP4XX_GPIO_HIGH               1
+
+/* GPIO Clocks */
+#define IXP4XX_GPIO_CLK_0              14
+#define IXP4XX_GPIO_CLK_1              15
+
+static void gpio_line_config(u8 line, u32 direction)
+{
+       if (direction == IXP4XX_GPIO_IN)
+               *IXP4XX_GPIO_GPOER |= (1 << line);
+       else
+               *IXP4XX_GPIO_GPOER &= ~(1 << line);
+}
+
+static void gpio_line_get(u8 line, int *value)
+{
+       *value = (*IXP4XX_GPIO_GPINR >> line) & 0x1;
+}
+
+static void gpio_line_set(u8 line, int value)
+{
+       if (value == IXP4XX_GPIO_HIGH)
+           *IXP4XX_GPIO_GPOUTR |= (1 << line);
+       else if (value == IXP4XX_GPIO_LOW)
+           *IXP4XX_GPIO_GPOUTR &= ~(1 << line);
+}
 
 /*************************************************************************
  * IXP4xx chipset IRQ handling
@@ -117,17 +155,6 @@ static int ixp4xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
        return -EINVAL;
 }
 
-int irq_to_gpio(unsigned int irq)
-{
-       int gpio = (irq < 32) ? irq2gpio[irq] : -EINVAL;
-
-       if (gpio == -1)
-               return -EINVAL;
-
-       return gpio;
-}
-EXPORT_SYMBOL(irq_to_gpio);
-
 static int ixp4xx_set_irq_type(struct irq_data *d, unsigned int type)
 {
        int line = irq2gpio[d->irq];