ARM: EXYNOS: Add apb_pclk clkdev entry for mdma1

[sfrench/cifs-2.6.git] / arch / arm / mach-exynos / clock-exynos4.c

diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c
index db5d1cce3d25613c33fa576440dc1c8efa6897b0..1bc0b751520e4cb77f658f906a4adb2ebf5b1e4d 100644 (file)
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -1338,6 +1338,7 @@ static struct clk_lookup exynos4_clk_lookup[] = {
        CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &exynos4_clk_sclk_mmc3.clk),
        CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos4_clk_pdma0),
        CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos4_clk_pdma1),
+       CLKDEV_INIT("dma-pl330.2", "apb_pclk", &exynos4_clk_mdma1),
        CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk0", &exynos4_clk_sclk_spi0.clk),
        CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk0", &exynos4_clk_sclk_spi1.clk),
        CLKDEV_INIT("s3c64xx-spi.2", "spi_busclk0", &exynos4_clk_sclk_spi2.clk),