ARM: dts: imx53: make pinctrl nodes board specific

[sfrench/cifs-2.6.git] / arch / arm / boot / dts / imx53-smd.dts

diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts
index a9b6e10de0a5f52ebadb707e1f99179e6e19ae88..5ec1590ff7bcc328540b0c92609c26a75cccc52b 100644 (file)
--- a/arch/arm/boot/dts/imx53-smd.dts
+++ b/arch/arm/boot/dts/imx53-smd.dts
@@ -40,7 +40,7 @@
 
 &esdhc1 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_esdhc1_1>;
+       pinctrl-0 = <&pinctrl_esdhc1>;
        cd-gpios = <&gpio3 13 0>;
        wp-gpios = <&gpio4 11 0>;
        status = "okay";
@@ -48,21 +48,21 @@
 
 &esdhc2 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_esdhc2_1>;
+       pinctrl-0 = <&pinctrl_esdhc2>;
        non-removable;
        status = "okay";
 };
 
 &uart3 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart3_1>;
+       pinctrl-0 = <&pinctrl_uart3>;
        fsl,uart-has-rtscts;
        status = "okay";
 };
 
 &ecspi1 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_ecspi1_1>;
+       pinctrl-0 = <&pinctrl_ecspi1>;
        fsl,spi-num-chipselects = <2>;
        cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
        status = "okay";
@@ -95,7 +95,7 @@
 
 &esdhc3 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_esdhc3_1>;
+       pinctrl-0 = <&pinctrl_esdhc3>;
        non-removable;
        status = "okay";
 };
@@ -104,7 +104,7 @@
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_hog>;
 
-       hog {
+       imx53-smd {
                pinctrl_hog: hoggrp {
                        fsl,pins = <
                                MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000
@@ -116,24 +116,121 @@
                                MX53_PAD_PATA_DA_0__GPIO7_6    0x80000000
                        >;
                };
+
+               pinctrl_ecspi1: ecspi1grp {
+                       fsl,pins = <
+                               MX53_PAD_EIM_D16__ECSPI1_SCLK           0x80000000
+                               MX53_PAD_EIM_D17__ECSPI1_MISO           0x80000000
+                               MX53_PAD_EIM_D18__ECSPI1_MOSI           0x80000000
+                       >;
+               };
+
+               pinctrl_esdhc1: esdhc1grp {
+                       fsl,pins = <
+                               MX53_PAD_SD1_DATA0__ESDHC1_DAT0         0x1d5
+                               MX53_PAD_SD1_DATA1__ESDHC1_DAT1         0x1d5
+                               MX53_PAD_SD1_DATA2__ESDHC1_DAT2         0x1d5
+                               MX53_PAD_SD1_DATA3__ESDHC1_DAT3         0x1d5
+                               MX53_PAD_SD1_CMD__ESDHC1_CMD            0x1d5
+                               MX53_PAD_SD1_CLK__ESDHC1_CLK            0x1d5
+                       >;
+               };
+
+               pinctrl_esdhc2: esdhc2grp {
+                       fsl,pins = <
+                               MX53_PAD_SD2_CMD__ESDHC2_CMD            0x1d5
+                               MX53_PAD_SD2_CLK__ESDHC2_CLK            0x1d5
+                               MX53_PAD_SD2_DATA0__ESDHC2_DAT0         0x1d5
+                               MX53_PAD_SD2_DATA1__ESDHC2_DAT1         0x1d5
+                               MX53_PAD_SD2_DATA2__ESDHC2_DAT2         0x1d5
+                               MX53_PAD_SD2_DATA3__ESDHC2_DAT3         0x1d5
+                       >;
+               };
+
+               pinctrl_esdhc3: esdhc3grp {
+                       fsl,pins = <
+                               MX53_PAD_PATA_DATA8__ESDHC3_DAT0        0x1d5
+                               MX53_PAD_PATA_DATA9__ESDHC3_DAT1        0x1d5
+                               MX53_PAD_PATA_DATA10__ESDHC3_DAT2       0x1d5
+                               MX53_PAD_PATA_DATA11__ESDHC3_DAT3       0x1d5
+                               MX53_PAD_PATA_DATA0__ESDHC3_DAT4        0x1d5
+                               MX53_PAD_PATA_DATA1__ESDHC3_DAT5        0x1d5
+                               MX53_PAD_PATA_DATA2__ESDHC3_DAT6        0x1d5
+                               MX53_PAD_PATA_DATA3__ESDHC3_DAT7        0x1d5
+                               MX53_PAD_PATA_RESET_B__ESDHC3_CMD       0x1d5
+                               MX53_PAD_PATA_IORDY__ESDHC3_CLK         0x1d5
+                       >;
+               };
+
+               pinctrl_fec: fecgrp {
+                       fsl,pins = <
+                               MX53_PAD_FEC_MDC__FEC_MDC               0x80000000
+                               MX53_PAD_FEC_MDIO__FEC_MDIO             0x80000000
+                               MX53_PAD_FEC_REF_CLK__FEC_TX_CLK        0x80000000
+                               MX53_PAD_FEC_RX_ER__FEC_RX_ER           0x80000000
+                               MX53_PAD_FEC_CRS_DV__FEC_RX_DV          0x80000000
+                               MX53_PAD_FEC_RXD1__FEC_RDATA_1          0x80000000
+                               MX53_PAD_FEC_RXD0__FEC_RDATA_0          0x80000000
+                               MX53_PAD_FEC_TX_EN__FEC_TX_EN           0x80000000
+                               MX53_PAD_FEC_TXD1__FEC_TDATA_1          0x80000000
+                               MX53_PAD_FEC_TXD0__FEC_TDATA_0          0x80000000
+                       >;
+               };
+
+               pinctrl_i2c1: i2c1grp {
+                       fsl,pins = <
+                               MX53_PAD_CSI0_DAT8__I2C1_SDA            0xc0000000
+                               MX53_PAD_CSI0_DAT9__I2C1_SCL            0xc0000000
+                       >;
+               };
+
+               pinctrl_i2c2: i2c2grp {
+                       fsl,pins = <
+                               MX53_PAD_KEY_ROW3__I2C2_SDA             0xc0000000
+                               MX53_PAD_KEY_COL3__I2C2_SCL             0xc0000000
+                       >;
+               };
+
+               pinctrl_uart1: uart1grp {
+                       fsl,pins = <
+                               MX53_PAD_CSI0_DAT10__UART1_TXD_MUX      0x1e4
+                               MX53_PAD_CSI0_DAT11__UART1_RXD_MUX      0x1e4
+                       >;
+               };
+
+               pinctrl_uart2: uart2grp {
+                       fsl,pins = <
+                               MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX  0x1e4
+                               MX53_PAD_PATA_DMARQ__UART2_TXD_MUX      0x1e4
+                       >;
+               };
+
+               pinctrl_uart3: uart3grp {
+                       fsl,pins = <
+                               MX53_PAD_PATA_CS_0__UART3_TXD_MUX       0x1e4
+                               MX53_PAD_PATA_CS_1__UART3_RXD_MUX       0x1e4
+                               MX53_PAD_PATA_DA_1__UART3_CTS           0x1e4
+                               MX53_PAD_PATA_DA_2__UART3_RTS           0x1e4
+                       >;
+               };
        };
 };
 
 &uart1 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart1_1>;
+       pinctrl-0 = <&pinctrl_uart1>;
        status = "okay";
 };
 
 &uart2 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart2_1>;
+       pinctrl-0 = <&pinctrl_uart2>;
        status = "okay";
 };
 
 &i2c2 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_i2c2_1>;
+       pinctrl-0 = <&pinctrl_i2c2>;
        status = "okay";
 
        codec: sgtl5000@0a {
@@ -154,7 +251,7 @@
 
 &i2c1 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_i2c1_1>;
+       pinctrl-0 = <&pinctrl_i2c1>;
        status = "okay";
 
        accelerometer: mma8450@1c {
@@ -175,7 +272,7 @@
 
 &fec {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_fec_1>;
+       pinctrl-0 = <&pinctrl_fec>;
        phy-mode = "rmii";
        phy-reset-gpios = <&gpio7 6 0>;
        status = "okay";