tools/perf/pmu-events/arch/x86/haswellx/floating-point.json

   1 [
   2     {
   3         "BriefDescription": "Approximate counts of AVX & AVX2 256-bit instructions, including non-arithmetic instructions, loads, and stores.  May count non-AVX instructions that employ 256-bit operations, including (but not necessarily limited to) rep string instructions that use 256-bit loads and stores for optimized performance, XSAVE* and XRSTOR*, and operations that transition the x87 FPU data registers between x87 and MMX.",
   4         "Counter": "0,1,2,3",
   5         "CounterHTOff": "0,1,2,3,4,5,6,7",
   6         "EventCode": "0xC6",
   7         "EventName": "AVX_INSTS.ALL",
   8         "PublicDescription": "Note that a whole rep string only counts AVX_INST.ALL once.",
   9         "SampleAfterValue": "2000003",
  10         "UMask": "0x7"
  11     },
  12     {
  13         "BriefDescription": "Cycles with any input/output SSE or FP assist",
  14         "Counter": "0,1,2,3",
  15         "CounterHTOff": "0,1,2,3",
  16         "CounterMask": "1",
  17         "EventCode": "0xCA",
  18         "EventName": "FP_ASSIST.ANY",
  19         "PublicDescription": "Cycles with any input/output SSE* or FP assists.",
  20         "SampleAfterValue": "100003",
  21         "UMask": "0x1e"
  22     },
  23     {
  24         "BriefDescription": "Number of SIMD FP assists due to input values",
  25         "Counter": "0,1,2,3",
  26         "CounterHTOff": "0,1,2,3,4,5,6,7",
  27         "EventCode": "0xCA",
  28         "EventName": "FP_ASSIST.SIMD_INPUT",
  29         "PublicDescription": "Number of SIMD FP assists due to input values.",
  30         "SampleAfterValue": "100003",
  31         "UMask": "0x10"
  32     },
  33     {
  34         "BriefDescription": "Number of SIMD FP assists due to Output values",
  35         "Counter": "0,1,2,3",
  36         "CounterHTOff": "0,1,2,3,4,5,6,7",
  37         "EventCode": "0xCA",
  38         "EventName": "FP_ASSIST.SIMD_OUTPUT",
  39         "PublicDescription": "Number of SIMD FP assists due to output values.",
  40         "SampleAfterValue": "100003",
  41         "UMask": "0x8"
  42     },
  43     {
  44         "BriefDescription": "Number of X87 assists due to input value.",
  45         "Counter": "0,1,2,3",
  46         "CounterHTOff": "0,1,2,3,4,5,6,7",
  47         "EventCode": "0xCA",
  48         "EventName": "FP_ASSIST.X87_INPUT",
  49         "PublicDescription": "Number of X87 FP assists due to input values.",
  50         "SampleAfterValue": "100003",
  51         "UMask": "0x4"
  52     },
  53     {
  54         "BriefDescription": "Number of X87 assists due to output value.",
  55         "Counter": "0,1,2,3",
  56         "CounterHTOff": "0,1,2,3,4,5,6,7",
  57         "EventCode": "0xCA",
  58         "EventName": "FP_ASSIST.X87_OUTPUT",
  59         "PublicDescription": "Number of X87 FP assists due to output values.",
  60         "SampleAfterValue": "100003",
  61         "UMask": "0x2"
  62     },
  63     {
  64         "BriefDescription": "Number of SIMD Move Elimination candidate uops that were eliminated.",
  65         "Counter": "0,1,2,3",
  66         "CounterHTOff": "0,1,2,3,4,5,6,7",
  67         "EventCode": "0x58",
  68         "EventName": "MOVE_ELIMINATION.SIMD_ELIMINATED",
  69         "PublicDescription": "Number of SIMD move elimination candidate uops that were eliminated.",
  70         "SampleAfterValue": "1000003",
  71         "UMask": "0x2"
  72     },
  73     {
  74         "BriefDescription": "Number of SIMD Move Elimination candidate uops that were not eliminated.",
  75         "Counter": "0,1,2,3",
  76         "CounterHTOff": "0,1,2,3,4,5,6,7",
  77         "EventCode": "0x58",
  78         "EventName": "MOVE_ELIMINATION.SIMD_NOT_ELIMINATED",
  79         "PublicDescription": "Number of SIMD move elimination candidate uops that were not eliminated.",
  80         "SampleAfterValue": "1000003",
  81         "UMask": "0x8"
  82     },
  83     {
  84         "BriefDescription": "Number of transitions from AVX-256 to legacy SSE when penalty applicable.",
  85         "Counter": "0,1,2,3",
  86         "CounterHTOff": "0,1,2,3,4,5,6,7",
  87         "Errata": "HSD56, HSM57",
  88         "EventCode": "0xC1",
  89         "EventName": "OTHER_ASSISTS.AVX_TO_SSE",
  90         "SampleAfterValue": "100003",
  91         "UMask": "0x8"
  92     },
  93     {
  94         "BriefDescription": "Number of transitions from SSE to AVX-256 when penalty applicable.",
  95         "Counter": "0,1,2,3",
  96         "CounterHTOff": "0,1,2,3,4,5,6,7",
  97         "Errata": "HSD56, HSM57",
  98         "EventCode": "0xC1",
  99         "EventName": "OTHER_ASSISTS.SSE_TO_AVX",
 100         "SampleAfterValue": "100003",
 101         "UMask": "0x10"
 102     }
 103 ]