1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 // Copyright (c) 2021 Mediatek Corporation. All rights reserved.
5 // Author: YC Hung <yc.hung@mediatek.com>
7 // Hardware interface for mt8195 DSP code loader
11 #include "../../ops.h"
13 void sof_hifixdsp_boot_sequence(struct snd_sof_dev *sdev, u32 boot_addr)
15 /* ADSP bootup base */
16 snd_sof_dsp_write(sdev, DSP_REG_BAR, DSP_ALTRESETVEC, boot_addr);
18 /* pull high RunStall (set bit3 to 1) */
19 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
20 ADSP_RUNSTALL, ADSP_RUNSTALL);
22 /* pull high StatVectorSel to use AltResetVec (set bit4 to 1) */
23 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
24 DSP_RESET_SW, DSP_RESET_SW);
26 /* toggle DReset & BReset */
27 /* pull high DReset & BReset */
28 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
29 ADSP_BRESET_SW | ADSP_DRESET_SW,
30 ADSP_BRESET_SW | ADSP_DRESET_SW);
32 /* pull low DReset & BReset */
33 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
34 ADSP_BRESET_SW | ADSP_DRESET_SW,
38 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_PDEBUGBUS0,
42 /* release RunStall (set bit3 to 0) */
43 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
47 void sof_hifixdsp_shutdown(struct snd_sof_dev *sdev)
49 /* Clear to 0 firstly */
50 snd_sof_dsp_write(sdev, DSP_REG_BAR, DSP_RESET_SW, 0x0);
52 /* RUN_STALL pull high again to reset */
53 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
54 ADSP_RUNSTALL, ADSP_RUNSTALL);