2 * rt5651.c -- RT5651 ALSA SoC audio codec driver
4 * Copyright 2014 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
16 #include <linux/i2c.h>
17 #include <linux/regmap.h>
18 #include <linux/platform_device.h>
19 #include <linux/spi/spi.h>
20 #include <linux/acpi.h>
21 #include <sound/core.h>
22 #include <sound/pcm.h>
23 #include <sound/pcm_params.h>
24 #include <sound/soc.h>
25 #include <sound/soc-dapm.h>
26 #include <sound/initval.h>
27 #include <sound/tlv.h>
28 #include <sound/jack.h>
33 #define RT5651_DEVICE_ID_VALUE 0x6281
35 #define RT5651_PR_RANGE_BASE (0xff + 1)
36 #define RT5651_PR_SPACING 0x100
38 #define RT5651_PR_BASE (RT5651_PR_RANGE_BASE + (0 * RT5651_PR_SPACING))
40 static const struct regmap_range_cfg rt5651_ranges[] = {
41 { .name = "PR", .range_min = RT5651_PR_BASE,
42 .range_max = RT5651_PR_BASE + 0xb4,
43 .selector_reg = RT5651_PRIV_INDEX,
44 .selector_mask = 0xff,
45 .selector_shift = 0x0,
46 .window_start = RT5651_PRIV_DATA,
50 static const struct reg_sequence init_list[] = {
51 {RT5651_PR_BASE + 0x3d, 0x3e00},
54 static const struct reg_default rt5651_reg[] = {
137 static bool rt5651_volatile_register(struct device *dev, unsigned int reg)
141 for (i = 0; i < ARRAY_SIZE(rt5651_ranges); i++) {
142 if ((reg >= rt5651_ranges[i].window_start &&
143 reg <= rt5651_ranges[i].window_start +
144 rt5651_ranges[i].window_len) ||
145 (reg >= rt5651_ranges[i].range_min &&
146 reg <= rt5651_ranges[i].range_max)) {
153 case RT5651_PRIV_DATA:
154 case RT5651_EQ_CTRL1:
156 case RT5651_IRQ_CTRL2:
157 case RT5651_INT_IRQ_ST:
158 case RT5651_PGM_REG_ARR1:
159 case RT5651_PGM_REG_ARR3:
160 case RT5651_VENDOR_ID:
161 case RT5651_DEVICE_ID:
168 static bool rt5651_readable_register(struct device *dev, unsigned int reg)
172 for (i = 0; i < ARRAY_SIZE(rt5651_ranges); i++) {
173 if ((reg >= rt5651_ranges[i].window_start &&
174 reg <= rt5651_ranges[i].window_start +
175 rt5651_ranges[i].window_len) ||
176 (reg >= rt5651_ranges[i].range_min &&
177 reg <= rt5651_ranges[i].range_max)) {
184 case RT5651_VERSION_ID:
185 case RT5651_VENDOR_ID:
186 case RT5651_DEVICE_ID:
188 case RT5651_LOUT_CTRL1:
189 case RT5651_LOUT_CTRL2:
192 case RT5651_INL1_INR1_VOL:
193 case RT5651_INL2_INR2_VOL:
194 case RT5651_DAC1_DIG_VOL:
195 case RT5651_DAC2_DIG_VOL:
196 case RT5651_DAC2_CTRL:
197 case RT5651_ADC_DIG_VOL:
198 case RT5651_ADC_DATA:
199 case RT5651_ADC_BST_VOL:
200 case RT5651_STO1_ADC_MIXER:
201 case RT5651_STO2_ADC_MIXER:
202 case RT5651_AD_DA_MIXER:
203 case RT5651_STO_DAC_MIXER:
204 case RT5651_DD_MIXER:
205 case RT5651_DIG_INF_DATA:
207 case RT5651_REC_L1_MIXER:
208 case RT5651_REC_L2_MIXER:
209 case RT5651_REC_R1_MIXER:
210 case RT5651_REC_R2_MIXER:
211 case RT5651_HPO_MIXER:
212 case RT5651_OUT_L1_MIXER:
213 case RT5651_OUT_L2_MIXER:
214 case RT5651_OUT_L3_MIXER:
215 case RT5651_OUT_R1_MIXER:
216 case RT5651_OUT_R2_MIXER:
217 case RT5651_OUT_R3_MIXER:
218 case RT5651_LOUT_MIXER:
219 case RT5651_PWR_DIG1:
220 case RT5651_PWR_DIG2:
221 case RT5651_PWR_ANLG1:
222 case RT5651_PWR_ANLG2:
223 case RT5651_PWR_MIXER:
225 case RT5651_PRIV_INDEX:
226 case RT5651_PRIV_DATA:
227 case RT5651_I2S1_SDP:
228 case RT5651_I2S2_SDP:
229 case RT5651_ADDA_CLK1:
230 case RT5651_ADDA_CLK2:
232 case RT5651_TDM_CTL_1:
233 case RT5651_TDM_CTL_2:
234 case RT5651_TDM_CTL_3:
236 case RT5651_PLL_CTRL1:
237 case RT5651_PLL_CTRL2:
238 case RT5651_PLL_MODE_1:
239 case RT5651_PLL_MODE_2:
240 case RT5651_PLL_MODE_3:
241 case RT5651_PLL_MODE_4:
242 case RT5651_PLL_MODE_5:
243 case RT5651_PLL_MODE_6:
244 case RT5651_PLL_MODE_7:
245 case RT5651_DEPOP_M1:
246 case RT5651_DEPOP_M2:
247 case RT5651_DEPOP_M3:
248 case RT5651_CHARGE_PUMP:
250 case RT5651_A_JD_CTL1:
251 case RT5651_EQ_CTRL1:
252 case RT5651_EQ_CTRL2:
256 case RT5651_JD_CTRL1:
257 case RT5651_JD_CTRL2:
258 case RT5651_IRQ_CTRL1:
259 case RT5651_IRQ_CTRL2:
260 case RT5651_INT_IRQ_ST:
261 case RT5651_GPIO_CTRL1:
262 case RT5651_GPIO_CTRL2:
263 case RT5651_GPIO_CTRL3:
264 case RT5651_PGM_REG_ARR1:
265 case RT5651_PGM_REG_ARR2:
266 case RT5651_PGM_REG_ARR3:
267 case RT5651_PGM_REG_ARR4:
268 case RT5651_PGM_REG_ARR5:
269 case RT5651_SCB_FUNC:
270 case RT5651_SCB_CTRL:
271 case RT5651_BASE_BACK:
272 case RT5651_MP3_PLUS1:
273 case RT5651_MP3_PLUS2:
274 case RT5651_ADJ_HPF_CTRL1:
275 case RT5651_ADJ_HPF_CTRL2:
276 case RT5651_HP_CALIB_AMP_DET:
277 case RT5651_HP_CALIB2:
289 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
290 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
291 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
292 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
293 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
295 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
296 static const DECLARE_TLV_DB_RANGE(bst_tlv,
297 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
298 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
299 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
300 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
301 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
302 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
303 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
306 /* Interface data select */
307 static const char * const rt5651_data_select[] = {
308 "Normal", "Swap", "left copy to right", "right copy to left"};
310 static SOC_ENUM_SINGLE_DECL(rt5651_if2_dac_enum, RT5651_DIG_INF_DATA,
311 RT5651_IF2_DAC_SEL_SFT, rt5651_data_select);
313 static SOC_ENUM_SINGLE_DECL(rt5651_if2_adc_enum, RT5651_DIG_INF_DATA,
314 RT5651_IF2_ADC_SEL_SFT, rt5651_data_select);
316 static const struct snd_kcontrol_new rt5651_snd_controls[] = {
317 /* Headphone Output Volume */
318 SOC_DOUBLE_TLV("HP Playback Volume", RT5651_HP_VOL,
319 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 39, 1, out_vol_tlv),
321 SOC_DOUBLE_TLV("OUT Playback Volume", RT5651_LOUT_CTRL1,
322 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 39, 1, out_vol_tlv),
324 /* DAC Digital Volume */
325 SOC_DOUBLE("DAC2 Playback Switch", RT5651_DAC2_CTRL,
326 RT5651_M_DAC_L2_VOL_SFT, RT5651_M_DAC_R2_VOL_SFT, 1, 1),
327 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5651_DAC1_DIG_VOL,
328 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT,
329 175, 0, dac_vol_tlv),
330 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5651_DAC2_DIG_VOL,
331 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT,
332 175, 0, dac_vol_tlv),
333 /* IN1/IN2/IN3 Control */
334 SOC_SINGLE_TLV("IN1 Boost", RT5651_IN1_IN2,
335 RT5651_BST_SFT1, 8, 0, bst_tlv),
336 SOC_SINGLE_TLV("IN2 Boost", RT5651_IN1_IN2,
337 RT5651_BST_SFT2, 8, 0, bst_tlv),
338 SOC_SINGLE_TLV("IN3 Boost", RT5651_IN3,
339 RT5651_BST_SFT1, 8, 0, bst_tlv),
340 /* INL/INR Volume Control */
341 SOC_DOUBLE_TLV("IN Capture Volume", RT5651_INL1_INR1_VOL,
342 RT5651_INL_VOL_SFT, RT5651_INR_VOL_SFT,
344 /* ADC Digital Volume Control */
345 SOC_DOUBLE("ADC Capture Switch", RT5651_ADC_DIG_VOL,
346 RT5651_L_MUTE_SFT, RT5651_R_MUTE_SFT, 1, 1),
347 SOC_DOUBLE_TLV("ADC Capture Volume", RT5651_ADC_DIG_VOL,
348 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT,
349 127, 0, adc_vol_tlv),
350 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5651_ADC_DATA,
351 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT,
352 127, 0, adc_vol_tlv),
353 /* ADC Boost Volume Control */
354 SOC_DOUBLE_TLV("ADC Boost Gain", RT5651_ADC_BST_VOL,
355 RT5651_ADC_L_BST_SFT, RT5651_ADC_R_BST_SFT,
359 SOC_SINGLE("IF1 ASRC Switch", RT5651_PLL_MODE_1,
360 RT5651_STO1_T_SFT, 1, 0),
361 SOC_SINGLE("IF2 ASRC Switch", RT5651_PLL_MODE_1,
362 RT5651_STO2_T_SFT, 1, 0),
363 SOC_SINGLE("DMIC ASRC Switch", RT5651_PLL_MODE_1,
364 RT5651_DMIC_1_M_SFT, 1, 0),
366 SOC_ENUM("ADC IF2 Data Switch", rt5651_if2_adc_enum),
367 SOC_ENUM("DAC IF2 Data Switch", rt5651_if2_dac_enum),
371 * set_dmic_clk - Set parameter of dmic.
374 * @kcontrol: The kcontrol of this widget.
378 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
379 struct snd_kcontrol *kcontrol, int event)
381 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
382 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
385 rate = rt5651->sysclk / rl6231_get_pre_div(rt5651->regmap,
386 RT5651_ADDA_CLK1, RT5651_I2S_PD1_SFT);
387 idx = rl6231_calc_dmic_clk(rate);
389 dev_err(component->dev, "Failed to set DMIC clock\n");
391 snd_soc_component_update_bits(component, RT5651_DMIC, RT5651_DMIC_CLK_MASK,
392 idx << RT5651_DMIC_CLK_SFT);
398 static const struct snd_kcontrol_new rt5651_sto1_adc_l_mix[] = {
399 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO1_ADC_MIXER,
400 RT5651_M_STO1_ADC_L1_SFT, 1, 1),
401 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO1_ADC_MIXER,
402 RT5651_M_STO1_ADC_L2_SFT, 1, 1),
405 static const struct snd_kcontrol_new rt5651_sto1_adc_r_mix[] = {
406 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO1_ADC_MIXER,
407 RT5651_M_STO1_ADC_R1_SFT, 1, 1),
408 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO1_ADC_MIXER,
409 RT5651_M_STO1_ADC_R2_SFT, 1, 1),
412 static const struct snd_kcontrol_new rt5651_sto2_adc_l_mix[] = {
413 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO2_ADC_MIXER,
414 RT5651_M_STO2_ADC_L1_SFT, 1, 1),
415 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO2_ADC_MIXER,
416 RT5651_M_STO2_ADC_L2_SFT, 1, 1),
419 static const struct snd_kcontrol_new rt5651_sto2_adc_r_mix[] = {
420 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO2_ADC_MIXER,
421 RT5651_M_STO2_ADC_R1_SFT, 1, 1),
422 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO2_ADC_MIXER,
423 RT5651_M_STO2_ADC_R2_SFT, 1, 1),
426 static const struct snd_kcontrol_new rt5651_dac_l_mix[] = {
427 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5651_AD_DA_MIXER,
428 RT5651_M_ADCMIX_L_SFT, 1, 1),
429 SOC_DAPM_SINGLE("INF1 Switch", RT5651_AD_DA_MIXER,
430 RT5651_M_IF1_DAC_L_SFT, 1, 1),
433 static const struct snd_kcontrol_new rt5651_dac_r_mix[] = {
434 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5651_AD_DA_MIXER,
435 RT5651_M_ADCMIX_R_SFT, 1, 1),
436 SOC_DAPM_SINGLE("INF1 Switch", RT5651_AD_DA_MIXER,
437 RT5651_M_IF1_DAC_R_SFT, 1, 1),
440 static const struct snd_kcontrol_new rt5651_sto_dac_l_mix[] = {
441 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_STO_DAC_MIXER,
442 RT5651_M_DAC_L1_MIXL_SFT, 1, 1),
443 SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_STO_DAC_MIXER,
444 RT5651_M_DAC_L2_MIXL_SFT, 1, 1),
445 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_STO_DAC_MIXER,
446 RT5651_M_DAC_R1_MIXL_SFT, 1, 1),
449 static const struct snd_kcontrol_new rt5651_sto_dac_r_mix[] = {
450 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_STO_DAC_MIXER,
451 RT5651_M_DAC_R1_MIXR_SFT, 1, 1),
452 SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_STO_DAC_MIXER,
453 RT5651_M_DAC_R2_MIXR_SFT, 1, 1),
454 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_STO_DAC_MIXER,
455 RT5651_M_DAC_L1_MIXR_SFT, 1, 1),
458 static const struct snd_kcontrol_new rt5651_dd_dac_l_mix[] = {
459 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_DD_MIXER,
460 RT5651_M_STO_DD_L1_SFT, 1, 1),
461 SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_DD_MIXER,
462 RT5651_M_STO_DD_L2_SFT, 1, 1),
463 SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_DD_MIXER,
464 RT5651_M_STO_DD_R2_L_SFT, 1, 1),
467 static const struct snd_kcontrol_new rt5651_dd_dac_r_mix[] = {
468 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_DD_MIXER,
469 RT5651_M_STO_DD_R1_SFT, 1, 1),
470 SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_DD_MIXER,
471 RT5651_M_STO_DD_R2_SFT, 1, 1),
472 SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_DD_MIXER,
473 RT5651_M_STO_DD_L2_R_SFT, 1, 1),
476 /* Analog Input Mixer */
477 static const struct snd_kcontrol_new rt5651_rec_l_mix[] = {
478 SOC_DAPM_SINGLE("INL1 Switch", RT5651_REC_L2_MIXER,
479 RT5651_M_IN1_L_RM_L_SFT, 1, 1),
480 SOC_DAPM_SINGLE("BST3 Switch", RT5651_REC_L2_MIXER,
481 RT5651_M_BST3_RM_L_SFT, 1, 1),
482 SOC_DAPM_SINGLE("BST2 Switch", RT5651_REC_L2_MIXER,
483 RT5651_M_BST2_RM_L_SFT, 1, 1),
484 SOC_DAPM_SINGLE("BST1 Switch", RT5651_REC_L2_MIXER,
485 RT5651_M_BST1_RM_L_SFT, 1, 1),
488 static const struct snd_kcontrol_new rt5651_rec_r_mix[] = {
489 SOC_DAPM_SINGLE("INR1 Switch", RT5651_REC_R2_MIXER,
490 RT5651_M_IN1_R_RM_R_SFT, 1, 1),
491 SOC_DAPM_SINGLE("BST3 Switch", RT5651_REC_R2_MIXER,
492 RT5651_M_BST3_RM_R_SFT, 1, 1),
493 SOC_DAPM_SINGLE("BST2 Switch", RT5651_REC_R2_MIXER,
494 RT5651_M_BST2_RM_R_SFT, 1, 1),
495 SOC_DAPM_SINGLE("BST1 Switch", RT5651_REC_R2_MIXER,
496 RT5651_M_BST1_RM_R_SFT, 1, 1),
499 /* Analog Output Mixer */
501 static const struct snd_kcontrol_new rt5651_out_l_mix[] = {
502 SOC_DAPM_SINGLE("BST1 Switch", RT5651_OUT_L3_MIXER,
503 RT5651_M_BST1_OM_L_SFT, 1, 1),
504 SOC_DAPM_SINGLE("BST2 Switch", RT5651_OUT_L3_MIXER,
505 RT5651_M_BST2_OM_L_SFT, 1, 1),
506 SOC_DAPM_SINGLE("INL1 Switch", RT5651_OUT_L3_MIXER,
507 RT5651_M_IN1_L_OM_L_SFT, 1, 1),
508 SOC_DAPM_SINGLE("REC MIXL Switch", RT5651_OUT_L3_MIXER,
509 RT5651_M_RM_L_OM_L_SFT, 1, 1),
510 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_OUT_L3_MIXER,
511 RT5651_M_DAC_L1_OM_L_SFT, 1, 1),
514 static const struct snd_kcontrol_new rt5651_out_r_mix[] = {
515 SOC_DAPM_SINGLE("BST2 Switch", RT5651_OUT_R3_MIXER,
516 RT5651_M_BST2_OM_R_SFT, 1, 1),
517 SOC_DAPM_SINGLE("BST1 Switch", RT5651_OUT_R3_MIXER,
518 RT5651_M_BST1_OM_R_SFT, 1, 1),
519 SOC_DAPM_SINGLE("INR1 Switch", RT5651_OUT_R3_MIXER,
520 RT5651_M_IN1_R_OM_R_SFT, 1, 1),
521 SOC_DAPM_SINGLE("REC MIXR Switch", RT5651_OUT_R3_MIXER,
522 RT5651_M_RM_R_OM_R_SFT, 1, 1),
523 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_OUT_R3_MIXER,
524 RT5651_M_DAC_R1_OM_R_SFT, 1, 1),
527 static const struct snd_kcontrol_new rt5651_hpo_mix[] = {
528 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5651_HPO_MIXER,
529 RT5651_M_DAC1_HM_SFT, 1, 1),
530 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5651_HPO_MIXER,
531 RT5651_M_HPVOL_HM_SFT, 1, 1),
534 static const struct snd_kcontrol_new rt5651_lout_mix[] = {
535 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_LOUT_MIXER,
536 RT5651_M_DAC_L1_LM_SFT, 1, 1),
537 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_LOUT_MIXER,
538 RT5651_M_DAC_R1_LM_SFT, 1, 1),
539 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5651_LOUT_MIXER,
540 RT5651_M_OV_L_LM_SFT, 1, 1),
541 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5651_LOUT_MIXER,
542 RT5651_M_OV_R_LM_SFT, 1, 1),
545 static const struct snd_kcontrol_new outvol_l_control =
546 SOC_DAPM_SINGLE("Switch", RT5651_LOUT_CTRL1,
547 RT5651_VOL_L_SFT, 1, 1);
549 static const struct snd_kcontrol_new outvol_r_control =
550 SOC_DAPM_SINGLE("Switch", RT5651_LOUT_CTRL1,
551 RT5651_VOL_R_SFT, 1, 1);
553 static const struct snd_kcontrol_new lout_l_mute_control =
554 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_LOUT_CTRL1,
555 RT5651_L_MUTE_SFT, 1, 1);
557 static const struct snd_kcontrol_new lout_r_mute_control =
558 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_LOUT_CTRL1,
559 RT5651_R_MUTE_SFT, 1, 1);
561 static const struct snd_kcontrol_new hpovol_l_control =
562 SOC_DAPM_SINGLE("Switch", RT5651_HP_VOL,
563 RT5651_VOL_L_SFT, 1, 1);
565 static const struct snd_kcontrol_new hpovol_r_control =
566 SOC_DAPM_SINGLE("Switch", RT5651_HP_VOL,
567 RT5651_VOL_R_SFT, 1, 1);
569 static const struct snd_kcontrol_new hpo_l_mute_control =
570 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_HP_VOL,
571 RT5651_L_MUTE_SFT, 1, 1);
573 static const struct snd_kcontrol_new hpo_r_mute_control =
574 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_HP_VOL,
575 RT5651_R_MUTE_SFT, 1, 1);
577 /* Stereo ADC source */
578 static const char * const rt5651_stereo1_adc1_src[] = {"DD MIX", "ADC"};
580 static SOC_ENUM_SINGLE_DECL(
581 rt5651_stereo1_adc1_enum, RT5651_STO1_ADC_MIXER,
582 RT5651_STO1_ADC_1_SRC_SFT, rt5651_stereo1_adc1_src);
584 static const struct snd_kcontrol_new rt5651_sto1_adc_l1_mux =
585 SOC_DAPM_ENUM("Stereo1 ADC L1 source", rt5651_stereo1_adc1_enum);
587 static const struct snd_kcontrol_new rt5651_sto1_adc_r1_mux =
588 SOC_DAPM_ENUM("Stereo1 ADC R1 source", rt5651_stereo1_adc1_enum);
590 static const char * const rt5651_stereo1_adc2_src[] = {"DMIC", "DD MIX"};
592 static SOC_ENUM_SINGLE_DECL(
593 rt5651_stereo1_adc2_enum, RT5651_STO1_ADC_MIXER,
594 RT5651_STO1_ADC_2_SRC_SFT, rt5651_stereo1_adc2_src);
596 static const struct snd_kcontrol_new rt5651_sto1_adc_l2_mux =
597 SOC_DAPM_ENUM("Stereo1 ADC L2 source", rt5651_stereo1_adc2_enum);
599 static const struct snd_kcontrol_new rt5651_sto1_adc_r2_mux =
600 SOC_DAPM_ENUM("Stereo1 ADC R2 source", rt5651_stereo1_adc2_enum);
602 /* Mono ADC source */
603 static const char * const rt5651_sto2_adc_l1_src[] = {"DD MIXL", "ADCL"};
605 static SOC_ENUM_SINGLE_DECL(
606 rt5651_sto2_adc_l1_enum, RT5651_STO1_ADC_MIXER,
607 RT5651_STO2_ADC_L1_SRC_SFT, rt5651_sto2_adc_l1_src);
609 static const struct snd_kcontrol_new rt5651_sto2_adc_l1_mux =
610 SOC_DAPM_ENUM("Stereo2 ADC1 left source", rt5651_sto2_adc_l1_enum);
612 static const char * const rt5651_sto2_adc_l2_src[] = {"DMIC L", "DD MIXL"};
614 static SOC_ENUM_SINGLE_DECL(
615 rt5651_sto2_adc_l2_enum, RT5651_STO1_ADC_MIXER,
616 RT5651_STO2_ADC_L2_SRC_SFT, rt5651_sto2_adc_l2_src);
618 static const struct snd_kcontrol_new rt5651_sto2_adc_l2_mux =
619 SOC_DAPM_ENUM("Stereo2 ADC2 left source", rt5651_sto2_adc_l2_enum);
621 static const char * const rt5651_sto2_adc_r1_src[] = {"DD MIXR", "ADCR"};
623 static SOC_ENUM_SINGLE_DECL(
624 rt5651_sto2_adc_r1_enum, RT5651_STO1_ADC_MIXER,
625 RT5651_STO2_ADC_R1_SRC_SFT, rt5651_sto2_adc_r1_src);
627 static const struct snd_kcontrol_new rt5651_sto2_adc_r1_mux =
628 SOC_DAPM_ENUM("Stereo2 ADC1 right source", rt5651_sto2_adc_r1_enum);
630 static const char * const rt5651_sto2_adc_r2_src[] = {"DMIC R", "DD MIXR"};
632 static SOC_ENUM_SINGLE_DECL(
633 rt5651_sto2_adc_r2_enum, RT5651_STO1_ADC_MIXER,
634 RT5651_STO2_ADC_R2_SRC_SFT, rt5651_sto2_adc_r2_src);
636 static const struct snd_kcontrol_new rt5651_sto2_adc_r2_mux =
637 SOC_DAPM_ENUM("Stereo2 ADC2 right source", rt5651_sto2_adc_r2_enum);
639 /* DAC2 channel source */
641 static const char * const rt5651_dac_src[] = {"IF1", "IF2"};
643 static SOC_ENUM_SINGLE_DECL(rt5651_dac_l2_enum, RT5651_DAC2_CTRL,
644 RT5651_SEL_DAC_L2_SFT, rt5651_dac_src);
646 static const struct snd_kcontrol_new rt5651_dac_l2_mux =
647 SOC_DAPM_ENUM("DAC2 left channel source", rt5651_dac_l2_enum);
649 static SOC_ENUM_SINGLE_DECL(
650 rt5651_dac_r2_enum, RT5651_DAC2_CTRL,
651 RT5651_SEL_DAC_R2_SFT, rt5651_dac_src);
653 static const struct snd_kcontrol_new rt5651_dac_r2_mux =
654 SOC_DAPM_ENUM("DAC2 right channel source", rt5651_dac_r2_enum);
656 /* IF2_ADC channel source */
658 static const char * const rt5651_adc_src[] = {"IF1 ADC1", "IF1 ADC2"};
660 static SOC_ENUM_SINGLE_DECL(rt5651_if2_adc_src_enum, RT5651_DIG_INF_DATA,
661 RT5651_IF2_ADC_SRC_SFT, rt5651_adc_src);
663 static const struct snd_kcontrol_new rt5651_if2_adc_src_mux =
664 SOC_DAPM_ENUM("IF2 ADC channel source", rt5651_if2_adc_src_enum);
667 static const char * const rt5651_pdm_sel[] = {"DD MIX", "Stereo DAC MIX"};
669 static SOC_ENUM_SINGLE_DECL(
670 rt5651_pdm_l_sel_enum, RT5651_PDM_CTL,
671 RT5651_PDM_L_SEL_SFT, rt5651_pdm_sel);
673 static SOC_ENUM_SINGLE_DECL(
674 rt5651_pdm_r_sel_enum, RT5651_PDM_CTL,
675 RT5651_PDM_R_SEL_SFT, rt5651_pdm_sel);
677 static const struct snd_kcontrol_new rt5651_pdm_l_mux =
678 SOC_DAPM_ENUM("PDM L select", rt5651_pdm_l_sel_enum);
680 static const struct snd_kcontrol_new rt5651_pdm_r_mux =
681 SOC_DAPM_ENUM("PDM R select", rt5651_pdm_r_sel_enum);
683 static int rt5651_amp_power_event(struct snd_soc_dapm_widget *w,
684 struct snd_kcontrol *kcontrol, int event)
686 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
687 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
690 case SND_SOC_DAPM_POST_PMU:
691 /* depop parameters */
692 regmap_update_bits(rt5651->regmap, RT5651_PR_BASE +
693 RT5651_CHPUMP_INT_REG1, 0x0700, 0x0200);
694 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M2,
695 RT5651_DEPOP_MASK, RT5651_DEPOP_MAN);
696 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M1,
697 RT5651_HP_CP_MASK | RT5651_HP_SG_MASK |
698 RT5651_HP_CB_MASK, RT5651_HP_CP_PU |
699 RT5651_HP_SG_DIS | RT5651_HP_CB_PU);
700 regmap_write(rt5651->regmap, RT5651_PR_BASE +
701 RT5651_HP_DCC_INT1, 0x9f00);
702 /* headphone amp power on */
703 regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1,
704 RT5651_PWR_FV1 | RT5651_PWR_FV2, 0);
705 regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1,
708 usleep_range(10000, 15000);
709 regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1,
710 RT5651_PWR_FV1 | RT5651_PWR_FV2 ,
711 RT5651_PWR_FV1 | RT5651_PWR_FV2);
721 static int rt5651_hp_event(struct snd_soc_dapm_widget *w,
722 struct snd_kcontrol *kcontrol, int event)
724 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
725 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
728 case SND_SOC_DAPM_POST_PMU:
729 /* headphone unmute sequence */
730 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M2,
731 RT5651_DEPOP_MASK | RT5651_DIG_DP_MASK,
732 RT5651_DEPOP_AUTO | RT5651_DIG_DP_EN);
733 regmap_update_bits(rt5651->regmap, RT5651_CHARGE_PUMP,
734 RT5651_PM_HP_MASK, RT5651_PM_HP_HV);
736 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M3,
737 RT5651_CP_FQ1_MASK | RT5651_CP_FQ2_MASK |
739 (RT5651_CP_FQ_192_KHZ << RT5651_CP_FQ1_SFT) |
740 (RT5651_CP_FQ_12_KHZ << RT5651_CP_FQ2_SFT) |
741 (RT5651_CP_FQ_192_KHZ << RT5651_CP_FQ3_SFT));
743 regmap_write(rt5651->regmap, RT5651_PR_BASE +
744 RT5651_MAMP_INT_REG2, 0x1c00);
745 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M1,
746 RT5651_HP_CP_MASK | RT5651_HP_SG_MASK,
747 RT5651_HP_CP_PD | RT5651_HP_SG_EN);
748 regmap_update_bits(rt5651->regmap, RT5651_PR_BASE +
749 RT5651_CHPUMP_INT_REG1, 0x0700, 0x0400);
753 case SND_SOC_DAPM_PRE_PMD:
755 usleep_range(70000, 75000);
765 static int rt5651_hp_post_event(struct snd_soc_dapm_widget *w,
766 struct snd_kcontrol *kcontrol, int event)
769 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
770 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
773 case SND_SOC_DAPM_POST_PMU:
774 if (!rt5651->hp_mute)
775 usleep_range(80000, 85000);
786 static int rt5651_bst1_event(struct snd_soc_dapm_widget *w,
787 struct snd_kcontrol *kcontrol, int event)
789 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
792 case SND_SOC_DAPM_POST_PMU:
793 snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
794 RT5651_PWR_BST1_OP2, RT5651_PWR_BST1_OP2);
797 case SND_SOC_DAPM_PRE_PMD:
798 snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
799 RT5651_PWR_BST1_OP2, 0);
809 static int rt5651_bst2_event(struct snd_soc_dapm_widget *w,
810 struct snd_kcontrol *kcontrol, int event)
812 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
815 case SND_SOC_DAPM_POST_PMU:
816 snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
817 RT5651_PWR_BST2_OP2, RT5651_PWR_BST2_OP2);
820 case SND_SOC_DAPM_PRE_PMD:
821 snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
822 RT5651_PWR_BST2_OP2, 0);
832 static int rt5651_bst3_event(struct snd_soc_dapm_widget *w,
833 struct snd_kcontrol *kcontrol, int event)
835 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
838 case SND_SOC_DAPM_POST_PMU:
839 snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
840 RT5651_PWR_BST3_OP2, RT5651_PWR_BST3_OP2);
843 case SND_SOC_DAPM_PRE_PMD:
844 snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
845 RT5651_PWR_BST3_OP2, 0);
855 static const struct snd_soc_dapm_widget rt5651_dapm_widgets[] = {
857 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5651_PLL_MODE_2,
859 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5651_PLL_MODE_2,
861 SND_SOC_DAPM_SUPPLY_S("STO1 DAC ASRC", 1, RT5651_PLL_MODE_2,
863 SND_SOC_DAPM_SUPPLY_S("STO2 DAC ASRC", 1, RT5651_PLL_MODE_2,
865 SND_SOC_DAPM_SUPPLY_S("ADC ASRC", 1, RT5651_PLL_MODE_2,
869 SND_SOC_DAPM_SUPPLY("LDO", RT5651_PWR_ANLG1,
870 RT5651_PWR_LDO_BIT, 0, NULL, 0),
871 SND_SOC_DAPM_SUPPLY("micbias1", RT5651_PWR_ANLG2,
872 RT5651_PWR_MB1_BIT, 0, NULL, 0),
874 SND_SOC_DAPM_INPUT("MIC1"),
875 SND_SOC_DAPM_INPUT("MIC2"),
876 SND_SOC_DAPM_INPUT("MIC3"),
878 SND_SOC_DAPM_INPUT("IN1P"),
879 SND_SOC_DAPM_INPUT("IN2P"),
880 SND_SOC_DAPM_INPUT("IN2N"),
881 SND_SOC_DAPM_INPUT("IN3P"),
882 SND_SOC_DAPM_INPUT("DMIC L1"),
883 SND_SOC_DAPM_INPUT("DMIC R1"),
884 SND_SOC_DAPM_SUPPLY("DMIC CLK", RT5651_DMIC, RT5651_DMIC_1_EN_SFT,
885 0, set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
887 SND_SOC_DAPM_PGA_E("BST1", RT5651_PWR_ANLG2,
888 RT5651_PWR_BST1_BIT, 0, NULL, 0, rt5651_bst1_event,
889 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
890 SND_SOC_DAPM_PGA_E("BST2", RT5651_PWR_ANLG2,
891 RT5651_PWR_BST2_BIT, 0, NULL, 0, rt5651_bst2_event,
892 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
893 SND_SOC_DAPM_PGA_E("BST3", RT5651_PWR_ANLG2,
894 RT5651_PWR_BST3_BIT, 0, NULL, 0, rt5651_bst3_event,
895 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
897 SND_SOC_DAPM_PGA("INL1 VOL", RT5651_PWR_VOL,
898 RT5651_PWR_IN1_L_BIT, 0, NULL, 0),
899 SND_SOC_DAPM_PGA("INR1 VOL", RT5651_PWR_VOL,
900 RT5651_PWR_IN1_R_BIT, 0, NULL, 0),
901 SND_SOC_DAPM_PGA("INL2 VOL", RT5651_PWR_VOL,
902 RT5651_PWR_IN2_L_BIT, 0, NULL, 0),
903 SND_SOC_DAPM_PGA("INR2 VOL", RT5651_PWR_VOL,
904 RT5651_PWR_IN2_R_BIT, 0, NULL, 0),
907 SND_SOC_DAPM_MIXER("RECMIXL", RT5651_PWR_MIXER, RT5651_PWR_RM_L_BIT, 0,
908 rt5651_rec_l_mix, ARRAY_SIZE(rt5651_rec_l_mix)),
909 SND_SOC_DAPM_MIXER("RECMIXR", RT5651_PWR_MIXER, RT5651_PWR_RM_R_BIT, 0,
910 rt5651_rec_r_mix, ARRAY_SIZE(rt5651_rec_r_mix)),
912 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
913 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
914 SND_SOC_DAPM_SUPPLY("ADC L Power", RT5651_PWR_DIG1,
915 RT5651_PWR_ADC_L_BIT, 0, NULL, 0),
916 SND_SOC_DAPM_SUPPLY("ADC R Power", RT5651_PWR_DIG1,
917 RT5651_PWR_ADC_R_BIT, 0, NULL, 0),
919 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
920 &rt5651_sto1_adc_l2_mux),
921 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
922 &rt5651_sto1_adc_r2_mux),
923 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
924 &rt5651_sto1_adc_l1_mux),
925 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
926 &rt5651_sto1_adc_r1_mux),
927 SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
928 &rt5651_sto2_adc_l2_mux),
929 SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
930 &rt5651_sto2_adc_l1_mux),
931 SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
932 &rt5651_sto2_adc_r1_mux),
933 SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
934 &rt5651_sto2_adc_r2_mux),
936 SND_SOC_DAPM_SUPPLY("Stereo1 Filter", RT5651_PWR_DIG2,
937 RT5651_PWR_ADC_STO1_F_BIT, 0, NULL, 0),
938 SND_SOC_DAPM_SUPPLY("Stereo2 Filter", RT5651_PWR_DIG2,
939 RT5651_PWR_ADC_STO2_F_BIT, 0, NULL, 0),
940 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0,
941 rt5651_sto1_adc_l_mix,
942 ARRAY_SIZE(rt5651_sto1_adc_l_mix)),
943 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0,
944 rt5651_sto1_adc_r_mix,
945 ARRAY_SIZE(rt5651_sto1_adc_r_mix)),
946 SND_SOC_DAPM_MIXER("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0,
947 rt5651_sto2_adc_l_mix,
948 ARRAY_SIZE(rt5651_sto2_adc_l_mix)),
949 SND_SOC_DAPM_MIXER("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0,
950 rt5651_sto2_adc_r_mix,
951 ARRAY_SIZE(rt5651_sto2_adc_r_mix)),
953 /* Digital Interface */
954 SND_SOC_DAPM_SUPPLY("I2S1", RT5651_PWR_DIG1,
955 RT5651_PWR_I2S1_BIT, 0, NULL, 0),
956 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
957 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
958 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
959 SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
960 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
961 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
962 SND_SOC_DAPM_PGA("IF1 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
963 SND_SOC_DAPM_SUPPLY("I2S2", RT5651_PWR_DIG1,
964 RT5651_PWR_I2S2_BIT, 0, NULL, 0),
965 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
966 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
967 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
968 SND_SOC_DAPM_MUX("IF2 ADC", SND_SOC_NOPM, 0, 0,
969 &rt5651_if2_adc_src_mux),
971 /* Digital Interface Select */
973 SND_SOC_DAPM_MUX("PDM L Mux", RT5651_PDM_CTL,
974 RT5651_M_PDM_L_SFT, 1, &rt5651_pdm_l_mux),
975 SND_SOC_DAPM_MUX("PDM R Mux", RT5651_PDM_CTL,
976 RT5651_M_PDM_R_SFT, 1, &rt5651_pdm_r_mux),
977 /* Audio Interface */
978 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
979 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
980 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
981 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
984 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
987 /* DAC mixer before sound effect */
988 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
989 rt5651_dac_l_mix, ARRAY_SIZE(rt5651_dac_l_mix)),
990 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
991 rt5651_dac_r_mix, ARRAY_SIZE(rt5651_dac_r_mix)),
993 /* DAC2 channel Mux */
994 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_dac_l2_mux),
995 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_dac_r2_mux),
996 SND_SOC_DAPM_PGA("DAC L2 Volume", SND_SOC_NOPM, 0, 0, NULL, 0),
997 SND_SOC_DAPM_PGA("DAC R2 Volume", SND_SOC_NOPM, 0, 0, NULL, 0),
999 SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5651_PWR_DIG2,
1000 RT5651_PWR_DAC_STO1_F_BIT, 0, NULL, 0),
1001 SND_SOC_DAPM_SUPPLY("Stero2 DAC Power", RT5651_PWR_DIG2,
1002 RT5651_PWR_DAC_STO2_F_BIT, 0, NULL, 0),
1004 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1005 rt5651_sto_dac_l_mix,
1006 ARRAY_SIZE(rt5651_sto_dac_l_mix)),
1007 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1008 rt5651_sto_dac_r_mix,
1009 ARRAY_SIZE(rt5651_sto_dac_r_mix)),
1010 SND_SOC_DAPM_MIXER("DD MIXL", SND_SOC_NOPM, 0, 0,
1011 rt5651_dd_dac_l_mix,
1012 ARRAY_SIZE(rt5651_dd_dac_l_mix)),
1013 SND_SOC_DAPM_MIXER("DD MIXR", SND_SOC_NOPM, 0, 0,
1014 rt5651_dd_dac_r_mix,
1015 ARRAY_SIZE(rt5651_dd_dac_r_mix)),
1018 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
1019 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
1020 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5651_PWR_DIG1,
1021 RT5651_PWR_DAC_L1_BIT, 0, NULL, 0),
1022 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5651_PWR_DIG1,
1023 RT5651_PWR_DAC_R1_BIT, 0, NULL, 0),
1025 SND_SOC_DAPM_MIXER("OUT MIXL", RT5651_PWR_MIXER, RT5651_PWR_OM_L_BIT,
1026 0, rt5651_out_l_mix, ARRAY_SIZE(rt5651_out_l_mix)),
1027 SND_SOC_DAPM_MIXER("OUT MIXR", RT5651_PWR_MIXER, RT5651_PWR_OM_R_BIT,
1028 0, rt5651_out_r_mix, ARRAY_SIZE(rt5651_out_r_mix)),
1030 SND_SOC_DAPM_SWITCH("OUTVOL L", RT5651_PWR_VOL,
1031 RT5651_PWR_OV_L_BIT, 0, &outvol_l_control),
1032 SND_SOC_DAPM_SWITCH("OUTVOL R", RT5651_PWR_VOL,
1033 RT5651_PWR_OV_R_BIT, 0, &outvol_r_control),
1034 SND_SOC_DAPM_SWITCH("HPOVOL L", RT5651_PWR_VOL,
1035 RT5651_PWR_HV_L_BIT, 0, &hpovol_l_control),
1036 SND_SOC_DAPM_SWITCH("HPOVOL R", RT5651_PWR_VOL,
1037 RT5651_PWR_HV_R_BIT, 0, &hpovol_r_control),
1038 SND_SOC_DAPM_PGA("INL1", RT5651_PWR_VOL,
1039 RT5651_PWR_IN1_L_BIT, 0, NULL, 0),
1040 SND_SOC_DAPM_PGA("INR1", RT5651_PWR_VOL,
1041 RT5651_PWR_IN1_R_BIT, 0, NULL, 0),
1042 SND_SOC_DAPM_PGA("INL2", RT5651_PWR_VOL,
1043 RT5651_PWR_IN2_L_BIT, 0, NULL, 0),
1044 SND_SOC_DAPM_PGA("INR2", RT5651_PWR_VOL,
1045 RT5651_PWR_IN2_R_BIT, 0, NULL, 0),
1046 /* HPO/LOUT/Mono Mixer */
1047 SND_SOC_DAPM_MIXER("HPOL MIX", SND_SOC_NOPM, 0, 0,
1048 rt5651_hpo_mix, ARRAY_SIZE(rt5651_hpo_mix)),
1049 SND_SOC_DAPM_MIXER("HPOR MIX", SND_SOC_NOPM, 0, 0,
1050 rt5651_hpo_mix, ARRAY_SIZE(rt5651_hpo_mix)),
1051 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5651_PWR_ANLG1,
1052 RT5651_PWR_HP_L_BIT, 0, NULL, 0),
1053 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5651_PWR_ANLG1,
1054 RT5651_PWR_HP_R_BIT, 0, NULL, 0),
1055 SND_SOC_DAPM_MIXER("LOUT MIX", RT5651_PWR_ANLG1, RT5651_PWR_LM_BIT, 0,
1056 rt5651_lout_mix, ARRAY_SIZE(rt5651_lout_mix)),
1058 SND_SOC_DAPM_SUPPLY("Amp Power", RT5651_PWR_ANLG1,
1059 RT5651_PWR_HA_BIT, 0, rt5651_amp_power_event,
1060 SND_SOC_DAPM_POST_PMU),
1061 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, rt5651_hp_event,
1062 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1063 SND_SOC_DAPM_SWITCH("HPO L Playback", SND_SOC_NOPM, 0, 0,
1064 &hpo_l_mute_control),
1065 SND_SOC_DAPM_SWITCH("HPO R Playback", SND_SOC_NOPM, 0, 0,
1066 &hpo_r_mute_control),
1067 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
1068 &lout_l_mute_control),
1069 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
1070 &lout_r_mute_control),
1071 SND_SOC_DAPM_POST("HP Post", rt5651_hp_post_event),
1074 SND_SOC_DAPM_OUTPUT("HPOL"),
1075 SND_SOC_DAPM_OUTPUT("HPOR"),
1076 SND_SOC_DAPM_OUTPUT("LOUTL"),
1077 SND_SOC_DAPM_OUTPUT("LOUTR"),
1078 SND_SOC_DAPM_OUTPUT("PDML"),
1079 SND_SOC_DAPM_OUTPUT("PDMR"),
1082 static const struct snd_soc_dapm_route rt5651_dapm_routes[] = {
1083 {"Stero1 DAC Power", NULL, "STO1 DAC ASRC"},
1084 {"Stero2 DAC Power", NULL, "STO2 DAC ASRC"},
1085 {"I2S1", NULL, "I2S1 ASRC"},
1086 {"I2S2", NULL, "I2S2 ASRC"},
1088 {"IN1P", NULL, "LDO"},
1089 {"IN2P", NULL, "LDO"},
1090 {"IN3P", NULL, "LDO"},
1092 {"IN1P", NULL, "MIC1"},
1093 {"IN2P", NULL, "MIC2"},
1094 {"IN2N", NULL, "MIC2"},
1095 {"IN3P", NULL, "MIC3"},
1097 {"BST1", NULL, "IN1P"},
1098 {"BST2", NULL, "IN2P"},
1099 {"BST2", NULL, "IN2N"},
1100 {"BST3", NULL, "IN3P"},
1102 {"INL1 VOL", NULL, "IN2P"},
1103 {"INR1 VOL", NULL, "IN2N"},
1105 {"RECMIXL", "INL1 Switch", "INL1 VOL"},
1106 {"RECMIXL", "BST3 Switch", "BST3"},
1107 {"RECMIXL", "BST2 Switch", "BST2"},
1108 {"RECMIXL", "BST1 Switch", "BST1"},
1110 {"RECMIXR", "INR1 Switch", "INR1 VOL"},
1111 {"RECMIXR", "BST3 Switch", "BST3"},
1112 {"RECMIXR", "BST2 Switch", "BST2"},
1113 {"RECMIXR", "BST1 Switch", "BST1"},
1115 {"ADC L", NULL, "RECMIXL"},
1116 {"ADC L", NULL, "ADC L Power"},
1117 {"ADC R", NULL, "RECMIXR"},
1118 {"ADC R", NULL, "ADC R Power"},
1120 {"DMIC L1", NULL, "DMIC CLK"},
1121 {"DMIC R1", NULL, "DMIC CLK"},
1123 {"Stereo1 ADC L2 Mux", "DMIC", "DMIC L1"},
1124 {"Stereo1 ADC L2 Mux", "DD MIX", "DD MIXL"},
1125 {"Stereo1 ADC L1 Mux", "ADC", "ADC L"},
1126 {"Stereo1 ADC L1 Mux", "DD MIX", "DD MIXL"},
1128 {"Stereo1 ADC R1 Mux", "ADC", "ADC R"},
1129 {"Stereo1 ADC R1 Mux", "DD MIX", "DD MIXR"},
1130 {"Stereo1 ADC R2 Mux", "DMIC", "DMIC R1"},
1131 {"Stereo1 ADC R2 Mux", "DD MIX", "DD MIXR"},
1133 {"Stereo2 ADC L2 Mux", "DMIC L", "DMIC L1"},
1134 {"Stereo2 ADC L2 Mux", "DD MIXL", "DD MIXL"},
1135 {"Stereo2 ADC L1 Mux", "DD MIXL", "DD MIXL"},
1136 {"Stereo2 ADC L1 Mux", "ADCL", "ADC L"},
1138 {"Stereo2 ADC R1 Mux", "DD MIXR", "DD MIXR"},
1139 {"Stereo2 ADC R1 Mux", "ADCR", "ADC R"},
1140 {"Stereo2 ADC R2 Mux", "DMIC R", "DMIC R1"},
1141 {"Stereo2 ADC R2 Mux", "DD MIXR", "DD MIXR"},
1143 {"Stereo1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux"},
1144 {"Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux"},
1145 {"Stereo1 ADC MIXL", NULL, "Stereo1 Filter"},
1146 {"Stereo1 Filter", NULL, "ADC ASRC"},
1148 {"Stereo1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux"},
1149 {"Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux"},
1150 {"Stereo1 ADC MIXR", NULL, "Stereo1 Filter"},
1152 {"Stereo2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux"},
1153 {"Stereo2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux"},
1154 {"Stereo2 ADC MIXL", NULL, "Stereo2 Filter"},
1155 {"Stereo2 Filter", NULL, "ADC ASRC"},
1157 {"Stereo2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux"},
1158 {"Stereo2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux"},
1159 {"Stereo2 ADC MIXR", NULL, "Stereo2 Filter"},
1161 {"IF1 ADC2", NULL, "Stereo2 ADC MIXL"},
1162 {"IF1 ADC2", NULL, "Stereo2 ADC MIXR"},
1163 {"IF1 ADC1", NULL, "Stereo1 ADC MIXL"},
1164 {"IF1 ADC1", NULL, "Stereo1 ADC MIXR"},
1166 {"IF1 ADC1", NULL, "I2S1"},
1168 {"IF2 ADC", "IF1 ADC1", "IF1 ADC1"},
1169 {"IF2 ADC", "IF1 ADC2", "IF1 ADC2"},
1170 {"IF2 ADC", NULL, "I2S2"},
1172 {"AIF1TX", NULL, "IF1 ADC1"},
1173 {"AIF1TX", NULL, "IF1 ADC2"},
1174 {"AIF2TX", NULL, "IF2 ADC"},
1176 {"IF1 DAC", NULL, "AIF1RX"},
1177 {"IF1 DAC", NULL, "I2S1"},
1178 {"IF2 DAC", NULL, "AIF2RX"},
1179 {"IF2 DAC", NULL, "I2S2"},
1181 {"IF1 DAC1 L", NULL, "IF1 DAC"},
1182 {"IF1 DAC1 R", NULL, "IF1 DAC"},
1183 {"IF1 DAC2 L", NULL, "IF1 DAC"},
1184 {"IF1 DAC2 R", NULL, "IF1 DAC"},
1185 {"IF2 DAC L", NULL, "IF2 DAC"},
1186 {"IF2 DAC R", NULL, "IF2 DAC"},
1188 {"DAC MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"},
1189 {"DAC MIXL", "INF1 Switch", "IF1 DAC1 L"},
1190 {"DAC MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"},
1191 {"DAC MIXR", "INF1 Switch", "IF1 DAC1 R"},
1193 {"Audio DSP", NULL, "DAC MIXL"},
1194 {"Audio DSP", NULL, "DAC MIXR"},
1196 {"DAC L2 Mux", "IF1", "IF1 DAC2 L"},
1197 {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1198 {"DAC L2 Volume", NULL, "DAC L2 Mux"},
1200 {"DAC R2 Mux", "IF1", "IF1 DAC2 R"},
1201 {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1202 {"DAC R2 Volume", NULL, "DAC R2 Mux"},
1204 {"Stereo DAC MIXL", "DAC L1 Switch", "Audio DSP"},
1205 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume"},
1206 {"Stereo DAC MIXL", "DAC R1 Switch", "DAC MIXR"},
1207 {"Stereo DAC MIXL", NULL, "Stero1 DAC Power"},
1208 {"Stereo DAC MIXL", NULL, "Stero2 DAC Power"},
1209 {"Stereo DAC MIXR", "DAC R1 Switch", "Audio DSP"},
1210 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume"},
1211 {"Stereo DAC MIXR", "DAC L1 Switch", "DAC MIXL"},
1212 {"Stereo DAC MIXR", NULL, "Stero1 DAC Power"},
1213 {"Stereo DAC MIXR", NULL, "Stero2 DAC Power"},
1215 {"PDM L Mux", "Stereo DAC MIX", "Stereo DAC MIXL"},
1216 {"PDM L Mux", "DD MIX", "DAC MIXL"},
1217 {"PDM R Mux", "Stereo DAC MIX", "Stereo DAC MIXR"},
1218 {"PDM R Mux", "DD MIX", "DAC MIXR"},
1220 {"DAC L1", NULL, "Stereo DAC MIXL"},
1221 {"DAC L1", NULL, "DAC L1 Power"},
1222 {"DAC R1", NULL, "Stereo DAC MIXR"},
1223 {"DAC R1", NULL, "DAC R1 Power"},
1225 {"DD MIXL", "DAC L1 Switch", "DAC MIXL"},
1226 {"DD MIXL", "DAC L2 Switch", "DAC L2 Volume"},
1227 {"DD MIXL", "DAC R2 Switch", "DAC R2 Volume"},
1228 {"DD MIXL", NULL, "Stero2 DAC Power"},
1230 {"DD MIXR", "DAC R1 Switch", "DAC MIXR"},
1231 {"DD MIXR", "DAC R2 Switch", "DAC R2 Volume"},
1232 {"DD MIXR", "DAC L2 Switch", "DAC L2 Volume"},
1233 {"DD MIXR", NULL, "Stero2 DAC Power"},
1235 {"OUT MIXL", "BST1 Switch", "BST1"},
1236 {"OUT MIXL", "BST2 Switch", "BST2"},
1237 {"OUT MIXL", "INL1 Switch", "INL1 VOL"},
1238 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1239 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1241 {"OUT MIXR", "BST2 Switch", "BST2"},
1242 {"OUT MIXR", "BST1 Switch", "BST1"},
1243 {"OUT MIXR", "INR1 Switch", "INR1 VOL"},
1244 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1245 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1247 {"HPOVOL L", "Switch", "OUT MIXL"},
1248 {"HPOVOL R", "Switch", "OUT MIXR"},
1249 {"OUTVOL L", "Switch", "OUT MIXL"},
1250 {"OUTVOL R", "Switch", "OUT MIXR"},
1252 {"HPOL MIX", "HPO MIX DAC1 Switch", "DAC L1"},
1253 {"HPOL MIX", "HPO MIX HPVOL Switch", "HPOVOL L"},
1254 {"HPOL MIX", NULL, "HP L Amp"},
1255 {"HPOR MIX", "HPO MIX DAC1 Switch", "DAC R1"},
1256 {"HPOR MIX", "HPO MIX HPVOL Switch", "HPOVOL R"},
1257 {"HPOR MIX", NULL, "HP R Amp"},
1259 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1260 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1261 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1262 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1264 {"HP Amp", NULL, "HPOL MIX"},
1265 {"HP Amp", NULL, "HPOR MIX"},
1266 {"HP Amp", NULL, "Amp Power"},
1267 {"HPO L Playback", "Switch", "HP Amp"},
1268 {"HPO R Playback", "Switch", "HP Amp"},
1269 {"HPOL", NULL, "HPO L Playback"},
1270 {"HPOR", NULL, "HPO R Playback"},
1272 {"LOUT L Playback", "Switch", "LOUT MIX"},
1273 {"LOUT R Playback", "Switch", "LOUT MIX"},
1274 {"LOUTL", NULL, "LOUT L Playback"},
1275 {"LOUTL", NULL, "Amp Power"},
1276 {"LOUTR", NULL, "LOUT R Playback"},
1277 {"LOUTR", NULL, "Amp Power"},
1279 {"PDML", NULL, "PDM L Mux"},
1280 {"PDMR", NULL, "PDM R Mux"},
1283 static int rt5651_hw_params(struct snd_pcm_substream *substream,
1284 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1286 struct snd_soc_component *component = dai->component;
1287 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1288 unsigned int val_len = 0, val_clk, mask_clk;
1289 int pre_div, bclk_ms, frame_size;
1291 rt5651->lrck[dai->id] = params_rate(params);
1292 pre_div = rl6231_get_clk_info(rt5651->sysclk, rt5651->lrck[dai->id]);
1295 dev_err(component->dev, "Unsupported clock setting\n");
1298 frame_size = snd_soc_params_to_frame_size(params);
1299 if (frame_size < 0) {
1300 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
1303 bclk_ms = frame_size > 32 ? 1 : 0;
1304 rt5651->bclk[dai->id] = rt5651->lrck[dai->id] * (32 << bclk_ms);
1306 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1307 rt5651->bclk[dai->id], rt5651->lrck[dai->id]);
1308 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1309 bclk_ms, pre_div, dai->id);
1311 switch (params_width(params)) {
1315 val_len |= RT5651_I2S_DL_20;
1318 val_len |= RT5651_I2S_DL_24;
1321 val_len |= RT5651_I2S_DL_8;
1329 mask_clk = RT5651_I2S_PD1_MASK;
1330 val_clk = pre_div << RT5651_I2S_PD1_SFT;
1331 snd_soc_component_update_bits(component, RT5651_I2S1_SDP,
1332 RT5651_I2S_DL_MASK, val_len);
1333 snd_soc_component_update_bits(component, RT5651_ADDA_CLK1, mask_clk, val_clk);
1336 mask_clk = RT5651_I2S_BCLK_MS2_MASK | RT5651_I2S_PD2_MASK;
1337 val_clk = pre_div << RT5651_I2S_PD2_SFT;
1338 snd_soc_component_update_bits(component, RT5651_I2S2_SDP,
1339 RT5651_I2S_DL_MASK, val_len);
1340 snd_soc_component_update_bits(component, RT5651_ADDA_CLK1, mask_clk, val_clk);
1343 dev_err(component->dev, "Wrong dai->id: %d\n", dai->id);
1350 static int rt5651_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1352 struct snd_soc_component *component = dai->component;
1353 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1354 unsigned int reg_val = 0;
1356 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1357 case SND_SOC_DAIFMT_CBM_CFM:
1358 rt5651->master[dai->id] = 1;
1360 case SND_SOC_DAIFMT_CBS_CFS:
1361 reg_val |= RT5651_I2S_MS_S;
1362 rt5651->master[dai->id] = 0;
1368 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1369 case SND_SOC_DAIFMT_NB_NF:
1371 case SND_SOC_DAIFMT_IB_NF:
1372 reg_val |= RT5651_I2S_BP_INV;
1378 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1379 case SND_SOC_DAIFMT_I2S:
1381 case SND_SOC_DAIFMT_LEFT_J:
1382 reg_val |= RT5651_I2S_DF_LEFT;
1384 case SND_SOC_DAIFMT_DSP_A:
1385 reg_val |= RT5651_I2S_DF_PCM_A;
1387 case SND_SOC_DAIFMT_DSP_B:
1388 reg_val |= RT5651_I2S_DF_PCM_B;
1396 snd_soc_component_update_bits(component, RT5651_I2S1_SDP,
1397 RT5651_I2S_MS_MASK | RT5651_I2S_BP_MASK |
1398 RT5651_I2S_DF_MASK, reg_val);
1401 snd_soc_component_update_bits(component, RT5651_I2S2_SDP,
1402 RT5651_I2S_MS_MASK | RT5651_I2S_BP_MASK |
1403 RT5651_I2S_DF_MASK, reg_val);
1406 dev_err(component->dev, "Wrong dai->id: %d\n", dai->id);
1412 static int rt5651_set_dai_sysclk(struct snd_soc_dai *dai,
1413 int clk_id, unsigned int freq, int dir)
1415 struct snd_soc_component *component = dai->component;
1416 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1417 unsigned int reg_val = 0;
1418 unsigned int pll_bit = 0;
1420 if (freq == rt5651->sysclk && clk_id == rt5651->sysclk_src)
1424 case RT5651_SCLK_S_MCLK:
1425 reg_val |= RT5651_SCLK_SRC_MCLK;
1427 case RT5651_SCLK_S_PLL1:
1428 reg_val |= RT5651_SCLK_SRC_PLL1;
1429 pll_bit |= RT5651_PWR_PLL;
1431 case RT5651_SCLK_S_RCCLK:
1432 reg_val |= RT5651_SCLK_SRC_RCCLK;
1435 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
1438 snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
1439 RT5651_PWR_PLL, pll_bit);
1440 snd_soc_component_update_bits(component, RT5651_GLB_CLK,
1441 RT5651_SCLK_SRC_MASK, reg_val);
1442 rt5651->sysclk = freq;
1443 rt5651->sysclk_src = clk_id;
1445 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1450 static int rt5651_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1451 unsigned int freq_in, unsigned int freq_out)
1453 struct snd_soc_component *component = dai->component;
1454 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1455 struct rl6231_pll_code pll_code;
1458 if (source == rt5651->pll_src && freq_in == rt5651->pll_in &&
1459 freq_out == rt5651->pll_out)
1462 if (!freq_in || !freq_out) {
1463 dev_dbg(component->dev, "PLL disabled\n");
1466 rt5651->pll_out = 0;
1467 snd_soc_component_update_bits(component, RT5651_GLB_CLK,
1468 RT5651_SCLK_SRC_MASK, RT5651_SCLK_SRC_MCLK);
1473 case RT5651_PLL1_S_MCLK:
1474 snd_soc_component_update_bits(component, RT5651_GLB_CLK,
1475 RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_MCLK);
1477 case RT5651_PLL1_S_BCLK1:
1478 snd_soc_component_update_bits(component, RT5651_GLB_CLK,
1479 RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_BCLK1);
1481 case RT5651_PLL1_S_BCLK2:
1482 snd_soc_component_update_bits(component, RT5651_GLB_CLK,
1483 RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_BCLK2);
1486 dev_err(component->dev, "Unknown PLL source %d\n", source);
1490 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
1492 dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
1496 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
1497 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
1498 pll_code.n_code, pll_code.k_code);
1500 snd_soc_component_write(component, RT5651_PLL_CTRL1,
1501 pll_code.n_code << RT5651_PLL_N_SFT | pll_code.k_code);
1502 snd_soc_component_write(component, RT5651_PLL_CTRL2,
1503 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5651_PLL_M_SFT |
1504 pll_code.m_bp << RT5651_PLL_M_BP_SFT);
1506 rt5651->pll_in = freq_in;
1507 rt5651->pll_out = freq_out;
1508 rt5651->pll_src = source;
1513 static int rt5651_set_bias_level(struct snd_soc_component *component,
1514 enum snd_soc_bias_level level)
1517 case SND_SOC_BIAS_PREPARE:
1518 if (SND_SOC_BIAS_STANDBY == snd_soc_component_get_bias_level(component)) {
1519 if (snd_soc_component_read32(component, RT5651_PLL_MODE_1) & 0x9200)
1520 snd_soc_component_update_bits(component, RT5651_D_MISC,
1524 case SND_SOC_BIAS_STANDBY:
1525 if (SND_SOC_BIAS_OFF == snd_soc_component_get_bias_level(component)) {
1526 snd_soc_component_update_bits(component, RT5651_PWR_ANLG1,
1527 RT5651_PWR_VREF1 | RT5651_PWR_MB |
1528 RT5651_PWR_BG | RT5651_PWR_VREF2,
1529 RT5651_PWR_VREF1 | RT5651_PWR_MB |
1530 RT5651_PWR_BG | RT5651_PWR_VREF2);
1531 usleep_range(10000, 15000);
1532 snd_soc_component_update_bits(component, RT5651_PWR_ANLG1,
1533 RT5651_PWR_FV1 | RT5651_PWR_FV2,
1534 RT5651_PWR_FV1 | RT5651_PWR_FV2);
1535 snd_soc_component_update_bits(component, RT5651_D_MISC, 0x1, 0x1);
1539 case SND_SOC_BIAS_OFF:
1540 snd_soc_component_write(component, RT5651_D_MISC, 0x0010);
1541 snd_soc_component_write(component, RT5651_PWR_DIG1, 0x0000);
1542 snd_soc_component_write(component, RT5651_PWR_DIG2, 0x0000);
1543 snd_soc_component_write(component, RT5651_PWR_VOL, 0x0000);
1544 snd_soc_component_write(component, RT5651_PWR_MIXER, 0x0000);
1545 /* Do not touch the LDO voltage select bits on bias-off */
1546 snd_soc_component_update_bits(component, RT5651_PWR_ANLG1,
1547 ~RT5651_PWR_LDO_DVO_MASK, 0);
1548 /* Leave PLL1 and jack-detect power as is, all others off */
1549 snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
1550 ~(RT5651_PWR_PLL | RT5651_PWR_JD_M), 0);
1560 static void rt5651_enable_micbias1_for_ovcd(struct snd_soc_component *component)
1562 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
1564 snd_soc_dapm_mutex_lock(dapm);
1565 snd_soc_dapm_force_enable_pin_unlocked(dapm, "LDO");
1566 snd_soc_dapm_force_enable_pin_unlocked(dapm, "micbias1");
1567 /* OVCD is unreliable when used with RCCLK as sysclk-source */
1568 snd_soc_dapm_force_enable_pin_unlocked(dapm, "Platform Clock");
1569 snd_soc_dapm_sync_unlocked(dapm);
1570 snd_soc_dapm_mutex_unlock(dapm);
1573 static void rt5651_disable_micbias1_for_ovcd(struct snd_soc_component *component)
1575 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
1577 snd_soc_dapm_mutex_lock(dapm);
1578 snd_soc_dapm_disable_pin_unlocked(dapm, "Platform Clock");
1579 snd_soc_dapm_disable_pin_unlocked(dapm, "micbias1");
1580 snd_soc_dapm_disable_pin_unlocked(dapm, "LDO");
1581 snd_soc_dapm_sync_unlocked(dapm);
1582 snd_soc_dapm_mutex_unlock(dapm);
1585 static void rt5651_enable_micbias1_ovcd_irq(struct snd_soc_component *component)
1587 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1589 snd_soc_component_update_bits(component, RT5651_IRQ_CTRL2,
1590 RT5651_IRQ_MB1_OC_MASK, RT5651_IRQ_MB1_OC_NOR);
1591 rt5651->ovcd_irq_enabled = true;
1594 static void rt5651_disable_micbias1_ovcd_irq(struct snd_soc_component *component)
1596 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1598 snd_soc_component_update_bits(component, RT5651_IRQ_CTRL2,
1599 RT5651_IRQ_MB1_OC_MASK, RT5651_IRQ_MB1_OC_BP);
1600 rt5651->ovcd_irq_enabled = false;
1603 static void rt5651_clear_micbias1_ovcd(struct snd_soc_component *component)
1605 snd_soc_component_update_bits(component, RT5651_IRQ_CTRL2,
1606 RT5651_MB1_OC_CLR, 0);
1609 static bool rt5651_micbias1_ovcd(struct snd_soc_component *component)
1613 val = snd_soc_component_read32(component, RT5651_IRQ_CTRL2);
1614 dev_dbg(component->dev, "irq ctrl2 %#04x\n", val);
1616 return (val & RT5651_MB1_OC_CLR);
1619 static bool rt5651_jack_inserted(struct snd_soc_component *component)
1621 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1624 val = snd_soc_component_read32(component, RT5651_INT_IRQ_ST);
1625 dev_dbg(component->dev, "irq status %#04x\n", val);
1627 switch (rt5651->jd_src) {
1644 /* Jack detect and button-press timings */
1645 #define JACK_SETTLE_TIME 100 /* milli seconds */
1646 #define JACK_DETECT_COUNT 5
1647 #define JACK_DETECT_MAXCOUNT 20 /* Aprox. 2 seconds worth of tries */
1648 #define JACK_UNPLUG_TIME 80 /* milli seconds */
1649 #define BP_POLL_TIME 10 /* milli seconds */
1650 #define BP_POLL_MAXCOUNT 200 /* assume something is wrong after this */
1651 #define BP_THRESHOLD 3
1653 static void rt5651_start_button_press_work(struct snd_soc_component *component)
1655 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1657 rt5651->poll_count = 0;
1658 rt5651->press_count = 0;
1659 rt5651->release_count = 0;
1660 rt5651->pressed = false;
1661 rt5651->press_reported = false;
1662 rt5651_clear_micbias1_ovcd(component);
1663 schedule_delayed_work(&rt5651->bp_work, msecs_to_jiffies(BP_POLL_TIME));
1666 static void rt5651_button_press_work(struct work_struct *work)
1668 struct rt5651_priv *rt5651 =
1669 container_of(work, struct rt5651_priv, bp_work.work);
1670 struct snd_soc_component *component = rt5651->component;
1672 /* Check the jack was not removed underneath us */
1673 if (!rt5651_jack_inserted(component))
1676 if (rt5651_micbias1_ovcd(component)) {
1677 rt5651->release_count = 0;
1678 rt5651->press_count++;
1679 /* Remember till after JACK_UNPLUG_TIME wait */
1680 if (rt5651->press_count >= BP_THRESHOLD)
1681 rt5651->pressed = true;
1682 rt5651_clear_micbias1_ovcd(component);
1684 rt5651->press_count = 0;
1685 rt5651->release_count++;
1689 * The pins get temporarily shorted on jack unplug, so we poll for
1690 * at least JACK_UNPLUG_TIME milli-seconds before reporting a press.
1692 rt5651->poll_count++;
1693 if (rt5651->poll_count < (JACK_UNPLUG_TIME / BP_POLL_TIME)) {
1694 schedule_delayed_work(&rt5651->bp_work,
1695 msecs_to_jiffies(BP_POLL_TIME));
1699 if (rt5651->pressed && !rt5651->press_reported) {
1700 dev_dbg(component->dev, "headset button press\n");
1701 snd_soc_jack_report(rt5651->hp_jack, SND_JACK_BTN_0,
1703 rt5651->press_reported = true;
1706 if (rt5651->release_count >= BP_THRESHOLD) {
1707 if (rt5651->press_reported) {
1708 dev_dbg(component->dev, "headset button release\n");
1709 snd_soc_jack_report(rt5651->hp_jack, 0, SND_JACK_BTN_0);
1711 /* Re-enable OVCD IRQ to detect next press */
1712 rt5651_enable_micbias1_ovcd_irq(component);
1713 return; /* Stop polling */
1716 schedule_delayed_work(&rt5651->bp_work, msecs_to_jiffies(BP_POLL_TIME));
1719 static int rt5651_detect_headset(struct snd_soc_component *component)
1721 int i, headset_count = 0, headphone_count = 0;
1724 * We get the insertion event before the jack is fully inserted at which
1725 * point the second ring on a TRRS connector may short the 2nd ring and
1726 * sleeve contacts, also the overcurrent detection is not entirely
1727 * reliable. So we try several times with a wait in between until we
1728 * detect the same type JACK_DETECT_COUNT times in a row.
1730 for (i = 0; i < JACK_DETECT_MAXCOUNT; i++) {
1731 /* Clear any previous over-current status flag */
1732 rt5651_clear_micbias1_ovcd(component);
1734 msleep(JACK_SETTLE_TIME);
1736 /* Check the jack is still connected before checking ovcd */
1737 if (!rt5651_jack_inserted(component))
1740 if (rt5651_micbias1_ovcd(component)) {
1742 * Over current detected, there is a short between the
1743 * 2nd ring contact and the ground, so a TRS connector
1744 * without a mic contact and thus plain headphones.
1746 dev_dbg(component->dev, "mic-gnd shorted\n");
1749 if (headphone_count == JACK_DETECT_COUNT)
1750 return SND_JACK_HEADPHONE;
1752 dev_dbg(component->dev, "mic-gnd open\n");
1753 headphone_count = 0;
1755 if (headset_count == JACK_DETECT_COUNT)
1756 return SND_JACK_HEADSET;
1760 dev_err(component->dev, "Error detecting headset vs headphones, bad contact?, assuming headphones\n");
1761 return SND_JACK_HEADPHONE;
1764 static void rt5651_jack_detect_work(struct work_struct *work)
1766 struct rt5651_priv *rt5651 =
1767 container_of(work, struct rt5651_priv, jack_detect_work);
1768 struct snd_soc_component *component = rt5651->component;
1771 if (!rt5651_jack_inserted(component)) {
1772 /* Jack removed, or spurious IRQ? */
1773 if (rt5651->hp_jack->status & SND_JACK_HEADPHONE) {
1774 if (rt5651->hp_jack->status & SND_JACK_MICROPHONE) {
1775 cancel_delayed_work_sync(&rt5651->bp_work);
1776 rt5651_disable_micbias1_ovcd_irq(component);
1777 rt5651_disable_micbias1_for_ovcd(component);
1779 snd_soc_jack_report(rt5651->hp_jack, 0,
1780 SND_JACK_HEADSET | SND_JACK_BTN_0);
1781 dev_dbg(component->dev, "jack unplugged\n");
1783 } else if (!(rt5651->hp_jack->status & SND_JACK_HEADPHONE)) {
1785 WARN_ON(rt5651->ovcd_irq_enabled);
1786 rt5651_enable_micbias1_for_ovcd(component);
1787 report = rt5651_detect_headset(component);
1788 if (report == SND_JACK_HEADSET) {
1789 /* Enable ovcd IRQ for button press detect. */
1790 rt5651_enable_micbias1_ovcd_irq(component);
1792 /* No more need for overcurrent detect. */
1793 rt5651_disable_micbias1_for_ovcd(component);
1795 dev_dbg(component->dev, "detect report %#02x\n", report);
1796 snd_soc_jack_report(rt5651->hp_jack, report, SND_JACK_HEADSET);
1797 } else if (rt5651->ovcd_irq_enabled && rt5651_micbias1_ovcd(component)) {
1798 dev_dbg(component->dev, "OVCD IRQ\n");
1801 * The ovcd IRQ keeps firing while the button is pressed, so
1802 * we disable it and start polling the button until released.
1804 * The disable will make the IRQ pin 0 again and since we get
1805 * IRQs on both edges (so as to detect both jack plugin and
1806 * unplug) this means we will immediately get another IRQ.
1807 * The ovcd_irq_enabled check above makes the 2ND IRQ a NOP.
1809 rt5651_disable_micbias1_ovcd_irq(component);
1810 rt5651_start_button_press_work(component);
1813 * If the jack-detect IRQ flag goes high (unplug) after our
1814 * above rt5651_jack_inserted() check and before we have
1815 * disabled the OVCD IRQ, the IRQ pin will stay high and as
1816 * we react to edges, we miss the unplug event -> recheck.
1818 queue_work(system_long_wq, &rt5651->jack_detect_work);
1822 static irqreturn_t rt5651_irq(int irq, void *data)
1824 struct rt5651_priv *rt5651 = data;
1826 queue_work(system_power_efficient_wq, &rt5651->jack_detect_work);
1831 static void rt5651_cancel_work(void *data)
1833 struct rt5651_priv *rt5651 = data;
1835 cancel_work_sync(&rt5651->jack_detect_work);
1836 cancel_delayed_work_sync(&rt5651->bp_work);
1839 static void rt5651_enable_jack_detect(struct snd_soc_component *component,
1840 struct snd_soc_jack *hp_jack)
1842 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1844 /* IRQ output on GPIO1 */
1845 snd_soc_component_update_bits(component, RT5651_GPIO_CTRL1,
1846 RT5651_GP1_PIN_MASK, RT5651_GP1_PIN_IRQ);
1848 /* Select jack detect source */
1849 switch (rt5651->jd_src) {
1851 snd_soc_component_update_bits(component, RT5651_JD_CTRL2,
1852 RT5651_JD_TRG_SEL_MASK, RT5651_JD_TRG_SEL_JD1_1);
1853 snd_soc_component_update_bits(component, RT5651_IRQ_CTRL1,
1854 RT5651_JD1_1_IRQ_EN, RT5651_JD1_1_IRQ_EN);
1857 snd_soc_component_update_bits(component, RT5651_JD_CTRL2,
1858 RT5651_JD_TRG_SEL_MASK, RT5651_JD_TRG_SEL_JD1_2);
1859 snd_soc_component_update_bits(component, RT5651_IRQ_CTRL1,
1860 RT5651_JD1_2_IRQ_EN, RT5651_JD1_2_IRQ_EN);
1863 snd_soc_component_update_bits(component, RT5651_JD_CTRL2,
1864 RT5651_JD_TRG_SEL_MASK, RT5651_JD_TRG_SEL_JD2);
1865 snd_soc_component_update_bits(component, RT5651_IRQ_CTRL1,
1866 RT5651_JD2_IRQ_EN, RT5651_JD2_IRQ_EN);
1868 case RT5651_JD_NULL:
1871 dev_err(component->dev, "Currently only JD1_1 / JD1_2 / JD2 are supported\n");
1875 /* Enable jack detect power */
1876 snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
1877 RT5651_PWR_JD_M, RT5651_PWR_JD_M);
1879 /* Set OVCD threshold current and scale-factor */
1880 snd_soc_component_write(component, RT5651_PR_BASE + RT5651_BIAS_CUR4,
1881 0xa800 | rt5651->ovcd_sf);
1883 snd_soc_component_update_bits(component, RT5651_MICBIAS,
1884 RT5651_MIC1_OVCD_MASK |
1885 RT5651_MIC1_OVTH_MASK |
1886 RT5651_PWR_CLK12M_MASK |
1888 RT5651_MIC1_OVCD_EN |
1891 RT5651_PWR_CLK12M_PU);
1894 * The over-current-detect is only reliable in detecting the absence
1895 * of over-current, when the mic-contact in the jack is short-circuited,
1896 * the hardware periodically retries if it can apply the bias-current
1897 * leading to the ovcd status flip-flopping 1-0-1 with it being 0 about
1898 * 10% of the time, as we poll the ovcd status bit we might hit that
1899 * 10%, so we enable sticky mode and when checking OVCD we clear the
1900 * status, msleep() a bit and then check to get a reliable reading.
1902 snd_soc_component_update_bits(component, RT5651_IRQ_CTRL2,
1903 RT5651_MB1_OC_STKY_MASK, RT5651_MB1_OC_STKY_EN);
1905 rt5651->hp_jack = hp_jack;
1906 if (rt5651->hp_jack->status & SND_JACK_MICROPHONE) {
1907 rt5651_enable_micbias1_for_ovcd(component);
1908 rt5651_enable_micbias1_ovcd_irq(component);
1911 enable_irq(rt5651->irq);
1912 /* sync initial jack state */
1913 queue_work(system_power_efficient_wq, &rt5651->jack_detect_work);
1916 static void rt5651_disable_jack_detect(struct snd_soc_component *component)
1918 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1920 disable_irq(rt5651->irq);
1921 rt5651_cancel_work(rt5651);
1923 if (rt5651->hp_jack->status & SND_JACK_MICROPHONE) {
1924 rt5651_disable_micbias1_ovcd_irq(component);
1925 rt5651_disable_micbias1_for_ovcd(component);
1926 snd_soc_jack_report(rt5651->hp_jack, 0, SND_JACK_BTN_0);
1929 rt5651->hp_jack = NULL;
1932 static int rt5651_set_jack(struct snd_soc_component *component,
1933 struct snd_soc_jack *jack, void *data)
1936 rt5651_enable_jack_detect(component, jack);
1938 rt5651_disable_jack_detect(component);
1944 * Note on some platforms the platform code may need to add device-properties,
1945 * rather then relying only on properties set by the firmware. Therefor the
1946 * property parsing MUST be done from the component driver's probe function,
1947 * rather then from the i2c driver's probe function, so that the platform-code
1948 * can attach extra properties before calling snd_soc_register_card().
1950 static void rt5651_apply_properties(struct snd_soc_component *component)
1952 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1955 if (device_property_read_bool(component->dev, "realtek,in2-differential"))
1956 snd_soc_component_update_bits(component, RT5651_IN1_IN2,
1957 RT5651_IN_DF2, RT5651_IN_DF2);
1959 if (device_property_read_bool(component->dev, "realtek,dmic-en"))
1960 snd_soc_component_update_bits(component, RT5651_GPIO_CTRL1,
1961 RT5651_GP2_PIN_MASK, RT5651_GP2_PIN_DMIC1_SCL);
1963 if (device_property_read_u32(component->dev,
1964 "realtek,jack-detect-source", &val) == 0)
1965 rt5651->jd_src = val;
1968 * Testing on various boards has shown that good defaults for the OVCD
1969 * threshold and scale-factor are 2000µA and 0.75. For an effective
1970 * limit of 1500µA, this seems to be more reliable then 1500µA and 1.0.
1972 rt5651->ovcd_th = RT5651_MIC1_OVTH_2000UA;
1973 rt5651->ovcd_sf = RT5651_MIC_OVCD_SF_0P75;
1975 if (device_property_read_u32(component->dev,
1976 "realtek,over-current-threshold-microamp", &val) == 0) {
1979 rt5651->ovcd_th = RT5651_MIC1_OVTH_600UA;
1982 rt5651->ovcd_th = RT5651_MIC1_OVTH_1500UA;
1985 rt5651->ovcd_th = RT5651_MIC1_OVTH_2000UA;
1988 dev_warn(component->dev, "Warning: Invalid over-current-threshold-microamp value: %d, defaulting to 2000uA\n",
1993 if (device_property_read_u32(component->dev,
1994 "realtek,over-current-scale-factor", &val) == 0) {
1995 if (val <= RT5651_OVCD_SF_1P5)
1996 rt5651->ovcd_sf = val << RT5651_MIC_OVCD_SF_SFT;
1998 dev_warn(component->dev, "Warning: Invalid over-current-scale-factor value: %d, defaulting to 0.75\n",
2003 static int rt5651_probe(struct snd_soc_component *component)
2005 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
2007 rt5651->component = component;
2009 snd_soc_component_update_bits(component, RT5651_PWR_ANLG1,
2010 RT5651_PWR_LDO_DVO_MASK, RT5651_PWR_LDO_DVO_1_2V);
2012 snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
2014 rt5651_apply_properties(component);
2020 static int rt5651_suspend(struct snd_soc_component *component)
2022 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
2024 regcache_cache_only(rt5651->regmap, true);
2025 regcache_mark_dirty(rt5651->regmap);
2029 static int rt5651_resume(struct snd_soc_component *component)
2031 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
2033 regcache_cache_only(rt5651->regmap, false);
2034 snd_soc_component_cache_sync(component);
2039 #define rt5651_suspend NULL
2040 #define rt5651_resume NULL
2043 #define RT5651_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2044 #define RT5651_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2045 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2047 static const struct snd_soc_dai_ops rt5651_aif_dai_ops = {
2048 .hw_params = rt5651_hw_params,
2049 .set_fmt = rt5651_set_dai_fmt,
2050 .set_sysclk = rt5651_set_dai_sysclk,
2051 .set_pll = rt5651_set_dai_pll,
2054 static struct snd_soc_dai_driver rt5651_dai[] = {
2056 .name = "rt5651-aif1",
2059 .stream_name = "AIF1 Playback",
2062 .rates = RT5651_STEREO_RATES,
2063 .formats = RT5651_FORMATS,
2066 .stream_name = "AIF1 Capture",
2069 .rates = RT5651_STEREO_RATES,
2070 .formats = RT5651_FORMATS,
2072 .ops = &rt5651_aif_dai_ops,
2075 .name = "rt5651-aif2",
2078 .stream_name = "AIF2 Playback",
2081 .rates = RT5651_STEREO_RATES,
2082 .formats = RT5651_FORMATS,
2085 .stream_name = "AIF2 Capture",
2088 .rates = RT5651_STEREO_RATES,
2089 .formats = RT5651_FORMATS,
2091 .ops = &rt5651_aif_dai_ops,
2095 static const struct snd_soc_component_driver soc_component_dev_rt5651 = {
2096 .probe = rt5651_probe,
2097 .suspend = rt5651_suspend,
2098 .resume = rt5651_resume,
2099 .set_bias_level = rt5651_set_bias_level,
2100 .set_jack = rt5651_set_jack,
2101 .controls = rt5651_snd_controls,
2102 .num_controls = ARRAY_SIZE(rt5651_snd_controls),
2103 .dapm_widgets = rt5651_dapm_widgets,
2104 .num_dapm_widgets = ARRAY_SIZE(rt5651_dapm_widgets),
2105 .dapm_routes = rt5651_dapm_routes,
2106 .num_dapm_routes = ARRAY_SIZE(rt5651_dapm_routes),
2107 .use_pmdown_time = 1,
2109 .non_legacy_dai_naming = 1,
2112 static const struct regmap_config rt5651_regmap = {
2116 .max_register = RT5651_DEVICE_ID + 1 + (ARRAY_SIZE(rt5651_ranges) *
2118 .volatile_reg = rt5651_volatile_register,
2119 .readable_reg = rt5651_readable_register,
2121 .cache_type = REGCACHE_RBTREE,
2122 .reg_defaults = rt5651_reg,
2123 .num_reg_defaults = ARRAY_SIZE(rt5651_reg),
2124 .ranges = rt5651_ranges,
2125 .num_ranges = ARRAY_SIZE(rt5651_ranges),
2126 .use_single_read = true,
2127 .use_single_write = true,
2130 #if defined(CONFIG_OF)
2131 static const struct of_device_id rt5651_of_match[] = {
2132 { .compatible = "realtek,rt5651", },
2135 MODULE_DEVICE_TABLE(of, rt5651_of_match);
2139 static const struct acpi_device_id rt5651_acpi_match[] = {
2143 MODULE_DEVICE_TABLE(acpi, rt5651_acpi_match);
2146 static const struct i2c_device_id rt5651_i2c_id[] = {
2150 MODULE_DEVICE_TABLE(i2c, rt5651_i2c_id);
2153 * Note this function MUST not look at device-properties, see the comment
2154 * above rt5651_apply_properties().
2156 static int rt5651_i2c_probe(struct i2c_client *i2c,
2157 const struct i2c_device_id *id)
2159 struct rt5651_priv *rt5651;
2162 rt5651 = devm_kzalloc(&i2c->dev, sizeof(*rt5651),
2167 i2c_set_clientdata(i2c, rt5651);
2169 rt5651->regmap = devm_regmap_init_i2c(i2c, &rt5651_regmap);
2170 if (IS_ERR(rt5651->regmap)) {
2171 ret = PTR_ERR(rt5651->regmap);
2172 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2177 regmap_read(rt5651->regmap, RT5651_DEVICE_ID, &ret);
2178 if (ret != RT5651_DEVICE_ID_VALUE) {
2180 "Device with ID register %#x is not rt5651\n", ret);
2184 regmap_write(rt5651->regmap, RT5651_RESET, 0);
2186 ret = regmap_register_patch(rt5651->regmap, init_list,
2187 ARRAY_SIZE(init_list));
2189 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2191 rt5651->irq = i2c->irq;
2192 rt5651->hp_mute = 1;
2194 INIT_DELAYED_WORK(&rt5651->bp_work, rt5651_button_press_work);
2195 INIT_WORK(&rt5651->jack_detect_work, rt5651_jack_detect_work);
2197 /* Make sure work is stopped on probe-error / remove */
2198 ret = devm_add_action_or_reset(&i2c->dev, rt5651_cancel_work, rt5651);
2202 ret = devm_request_irq(&i2c->dev, rt5651->irq, rt5651_irq,
2203 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
2204 | IRQF_ONESHOT, "rt5651", rt5651);
2206 /* Gets re-enabled by rt5651_set_jack() */
2207 disable_irq(rt5651->irq);
2209 dev_warn(&i2c->dev, "Failed to reguest IRQ %d: %d\n",
2211 rt5651->irq = -ENXIO;
2214 ret = devm_snd_soc_register_component(&i2c->dev,
2215 &soc_component_dev_rt5651,
2216 rt5651_dai, ARRAY_SIZE(rt5651_dai));
2221 static struct i2c_driver rt5651_i2c_driver = {
2224 .acpi_match_table = ACPI_PTR(rt5651_acpi_match),
2225 .of_match_table = of_match_ptr(rt5651_of_match),
2227 .probe = rt5651_i2c_probe,
2228 .id_table = rt5651_i2c_id,
2230 module_i2c_driver(rt5651_i2c_driver);
2232 MODULE_DESCRIPTION("ASoC RT5651 driver");
2233 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
2234 MODULE_LICENSE("GPL v2");