sound/soc/codecs/rt298.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * rt298.c  --  RT298 ALSA SoC audio codec driver
   4  *
   5  * Copyright 2015 Realtek Semiconductor Corp.
   6  * Author: Bard Liao <bardliao@realtek.com>
   7  */
   8
   9 #include <linux/module.h>
  10 #include <linux/moduleparam.h>
  11 #include <linux/init.h>
  12 #include <linux/delay.h>
  13 #include <linux/pm.h>
  14 #include <linux/i2c.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/spi/spi.h>
  17 #include <linux/dmi.h>
  18 #include <linux/acpi.h>
  19 #include <sound/core.h>
  20 #include <sound/pcm.h>
  21 #include <sound/pcm_params.h>
  22 #include <sound/soc.h>
  23 #include <sound/soc-dapm.h>
  24 #include <sound/initval.h>
  25 #include <sound/tlv.h>
  26 #include <sound/jack.h>
  27 #include <linux/workqueue.h>
  28 #include <sound/rt298.h>
  29
  30 #include "rl6347a.h"
  31 #include "rt298.h"
  32
  33 #define RT298_VENDOR_ID 0x10ec0298
  34
  35 struct rt298_priv {
  36         struct reg_default *index_cache;
  37         int index_cache_size;
  38         struct regmap *regmap;
  39         struct snd_soc_component *component;
  40         struct rt298_platform_data pdata;
  41         struct i2c_client *i2c;
  42         struct snd_soc_jack *jack;
  43         struct delayed_work jack_detect_work;
  44         int sys_clk;
  45         int clk_id;
  46         int is_hp_in;
  47 };
  48
  49 static const struct reg_default rt298_index_def[] = {
  50         { 0x01, 0xa5a8 },
  51         { 0x02, 0x8e95 },
  52         { 0x03, 0x0002 },
  53         { 0x04, 0xaf67 },
  54         { 0x08, 0x200f },
  55         { 0x09, 0xd010 },
  56         { 0x0a, 0x0100 },
  57         { 0x0b, 0x0000 },
  58         { 0x0d, 0x2800 },
  59         { 0x0f, 0x0022 },
  60         { 0x19, 0x0217 },
  61         { 0x20, 0x0020 },
  62         { 0x33, 0x0208 },
  63         { 0x46, 0x0300 },
  64         { 0x49, 0x4004 },
  65         { 0x4f, 0x50c9 },
  66         { 0x50, 0x3000 },
  67         { 0x63, 0x1b02 },
  68         { 0x67, 0x1111 },
  69         { 0x68, 0x1016 },
  70         { 0x69, 0x273f },
  71 };
  72 #define INDEX_CACHE_SIZE ARRAY_SIZE(rt298_index_def)
  73
  74 static const struct reg_default rt298_reg[] = {
  75         { 0x00170500, 0x00000400 },
  76         { 0x00220000, 0x00000031 },
  77         { 0x00239000, 0x0000007f },
  78         { 0x0023a000, 0x0000007f },
  79         { 0x00270500, 0x00000400 },
  80         { 0x00370500, 0x00000400 },
  81         { 0x00870500, 0x00000400 },
  82         { 0x00920000, 0x00000031 },
  83         { 0x00935000, 0x000000c3 },
  84         { 0x00936000, 0x000000c3 },
  85         { 0x00970500, 0x00000400 },
  86         { 0x00b37000, 0x00000097 },
  87         { 0x00b37200, 0x00000097 },
  88         { 0x00b37300, 0x00000097 },
  89         { 0x00c37000, 0x00000000 },
  90         { 0x00c37100, 0x00000080 },
  91         { 0x01270500, 0x00000400 },
  92         { 0x01370500, 0x00000400 },
  93         { 0x01371f00, 0x411111f0 },
  94         { 0x01439000, 0x00000080 },
  95         { 0x0143a000, 0x00000080 },
  96         { 0x01470700, 0x00000000 },
  97         { 0x01470500, 0x00000400 },
  98         { 0x01470c00, 0x00000000 },
  99         { 0x01470100, 0x00000000 },
 100         { 0x01837000, 0x00000000 },
 101         { 0x01870500, 0x00000400 },
 102         { 0x02050000, 0x00000000 },
 103         { 0x02139000, 0x00000080 },
 104         { 0x0213a000, 0x00000080 },
 105         { 0x02170100, 0x00000000 },
 106         { 0x02170500, 0x00000400 },
 107         { 0x02170700, 0x00000000 },
 108         { 0x02270100, 0x00000000 },
 109         { 0x02370100, 0x00000000 },
 110         { 0x01870700, 0x00000020 },
 111         { 0x00830000, 0x000000c3 },
 112         { 0x00930000, 0x000000c3 },
 113         { 0x01270700, 0x00000000 },
 114 };
 115
 116 static bool rt298_volatile_register(struct device *dev, unsigned int reg)
 117 {
 118         switch (reg) {
 119         case 0 ... 0xff:
 120         case RT298_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
 121         case RT298_GET_HP_SENSE:
 122         case RT298_GET_MIC1_SENSE:
 123         case RT298_PROC_COEF:
 124         case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_MIC1, 0):
 125         case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_SPK_OUT, 0):
 126         case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_HP_OUT, 0):
 127                 return true;
 128         default:
 129                 return false;
 130         }
 131
 132
 133 }
 134
 135 static bool rt298_readable_register(struct device *dev, unsigned int reg)
 136 {
 137         switch (reg) {
 138         case 0 ... 0xff:
 139         case RT298_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
 140         case RT298_GET_HP_SENSE:
 141         case RT298_GET_MIC1_SENSE:
 142         case RT298_SET_AUDIO_POWER:
 143         case RT298_SET_HPO_POWER:
 144         case RT298_SET_SPK_POWER:
 145         case RT298_SET_DMIC1_POWER:
 146         case RT298_SPK_MUX:
 147         case RT298_HPO_MUX:
 148         case RT298_ADC0_MUX:
 149         case RT298_ADC1_MUX:
 150         case RT298_SET_MIC1:
 151         case RT298_SET_PIN_HPO:
 152         case RT298_SET_PIN_SPK:
 153         case RT298_SET_PIN_DMIC1:
 154         case RT298_SPK_EAPD:
 155         case RT298_SET_AMP_GAIN_HPO:
 156         case RT298_SET_DMIC2_DEFAULT:
 157         case RT298_DACL_GAIN:
 158         case RT298_DACR_GAIN:
 159         case RT298_ADCL_GAIN:
 160         case RT298_ADCR_GAIN:
 161         case RT298_MIC_GAIN:
 162         case RT298_SPOL_GAIN:
 163         case RT298_SPOR_GAIN:
 164         case RT298_HPOL_GAIN:
 165         case RT298_HPOR_GAIN:
 166         case RT298_F_DAC_SWITCH:
 167         case RT298_F_RECMIX_SWITCH:
 168         case RT298_REC_MIC_SWITCH:
 169         case RT298_REC_I2S_SWITCH:
 170         case RT298_REC_LINE_SWITCH:
 171         case RT298_REC_BEEP_SWITCH:
 172         case RT298_DAC_FORMAT:
 173         case RT298_ADC_FORMAT:
 174         case RT298_COEF_INDEX:
 175         case RT298_PROC_COEF:
 176         case RT298_SET_AMP_GAIN_ADC_IN1:
 177         case RT298_SET_AMP_GAIN_ADC_IN2:
 178         case RT298_SET_POWER(RT298_DAC_OUT1):
 179         case RT298_SET_POWER(RT298_DAC_OUT2):
 180         case RT298_SET_POWER(RT298_ADC_IN1):
 181         case RT298_SET_POWER(RT298_ADC_IN2):
 182         case RT298_SET_POWER(RT298_DMIC2):
 183         case RT298_SET_POWER(RT298_MIC1):
 184         case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_MIC1, 0):
 185         case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_SPK_OUT, 0):
 186         case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_HP_OUT, 0):
 187                 return true;
 188         default:
 189                 return false;
 190         }
 191 }
 192
 193 #ifdef CONFIG_PM
 194 static void rt298_index_sync(struct snd_soc_component *component)
 195 {
 196         struct rt298_priv *rt298 = snd_soc_component_get_drvdata(component);
 197         int i;
 198
 199         for (i = 0; i < INDEX_CACHE_SIZE; i++) {
 200                 snd_soc_component_write(component, rt298->index_cache[i].reg,
 201                                   rt298->index_cache[i].def);
 202         }
 203 }
 204 #endif
 205
 206 static int rt298_support_power_controls[] = {
 207         RT298_DAC_OUT1,
 208         RT298_DAC_OUT2,
 209         RT298_ADC_IN1,
 210         RT298_ADC_IN2,
 211         RT298_MIC1,
 212         RT298_DMIC1,
 213         RT298_DMIC2,
 214         RT298_SPK_OUT,
 215         RT298_HP_OUT,
 216 };
 217 #define RT298_POWER_REG_LEN ARRAY_SIZE(rt298_support_power_controls)
 218
 219 static int rt298_jack_detect(struct rt298_priv *rt298, bool *hp, bool *mic)
 220 {
 221         struct snd_soc_dapm_context *dapm;
 222         unsigned int val, buf;
 223
 224         *hp = false;
 225         *mic = false;
 226
 227         if (!rt298->component)
 228                 return -EINVAL;
 229
 230         dapm = snd_soc_component_get_dapm(rt298->component);
 231
 232         if (rt298->pdata.cbj_en) {
 233                 regmap_read(rt298->regmap, RT298_GET_HP_SENSE, &buf);
 234                 *hp = buf & 0x80000000;
 235                 if (*hp == rt298->is_hp_in)
 236                         return -1;
 237                 rt298->is_hp_in = *hp;
 238                 if (*hp) {
 239                         /* power on HV,VERF */
 240                         regmap_update_bits(rt298->regmap,
 241                                 RT298_DC_GAIN, 0x200, 0x200);
 242
 243                         snd_soc_dapm_force_enable_pin(dapm, "HV");
 244                         snd_soc_dapm_force_enable_pin(dapm, "VREF");
 245                         /* power LDO1 */
 246                         snd_soc_dapm_force_enable_pin(dapm, "LDO1");
 247                         snd_soc_dapm_sync(dapm);
 248
 249                         regmap_update_bits(rt298->regmap,
 250                                 RT298_POWER_CTRL1, 0x1001, 0);
 251                         regmap_update_bits(rt298->regmap,
 252                                 RT298_POWER_CTRL2, 0x4, 0x4);
 253
 254                         regmap_write(rt298->regmap, RT298_SET_MIC1, 0x24);
 255                         msleep(50);
 256
 257                         regmap_update_bits(rt298->regmap,
 258                                 RT298_CBJ_CTRL1, 0xfcc0, 0xd400);
 259                         msleep(300);
 260                         regmap_read(rt298->regmap, RT298_CBJ_CTRL2, &val);
 261
 262                         if (0x0070 == (val & 0x0070)) {
 263                                 *mic = true;
 264                         } else {
 265                                 regmap_update_bits(rt298->regmap,
 266                                         RT298_CBJ_CTRL1, 0xfcc0, 0xe400);
 267                                 msleep(300);
 268                                 regmap_read(rt298->regmap,
 269                                         RT298_CBJ_CTRL2, &val);
 270                                 if (0x0070 == (val & 0x0070)) {
 271                                         *mic = true;
 272                                 } else {
 273                                         *mic = false;
 274                                         regmap_update_bits(rt298->regmap,
 275                                                 RT298_CBJ_CTRL1,
 276                                                 0xfcc0, 0xc400);
 277                                 }
 278                         }
 279
 280                         regmap_update_bits(rt298->regmap,
 281                                 RT298_DC_GAIN, 0x200, 0x0);
 282
 283                 } else {
 284                         *mic = false;
 285                         regmap_write(rt298->regmap, RT298_SET_MIC1, 0x20);
 286                         regmap_update_bits(rt298->regmap,
 287                                 RT298_CBJ_CTRL1, 0x0400, 0x0000);
 288                 }
 289         } else {
 290                 regmap_read(rt298->regmap, RT298_GET_HP_SENSE, &buf);
 291                 *hp = buf & 0x80000000;
 292                 regmap_read(rt298->regmap, RT298_GET_MIC1_SENSE, &buf);
 293                 *mic = buf & 0x80000000;
 294         }
 295         if (!*mic) {
 296                 snd_soc_dapm_disable_pin(dapm, "HV");
 297                 snd_soc_dapm_disable_pin(dapm, "VREF");
 298         }
 299         if (!*hp)
 300                 snd_soc_dapm_disable_pin(dapm, "LDO1");
 301         snd_soc_dapm_sync(dapm);
 302
 303         pr_debug("*hp = %d *mic = %d\n", *hp, *mic);
 304
 305         return 0;
 306 }
 307
 308 static void rt298_jack_detect_work(struct work_struct *work)
 309 {
 310         struct rt298_priv *rt298 =
 311                 container_of(work, struct rt298_priv, jack_detect_work.work);
 312         int status = 0;
 313         bool hp = false;
 314         bool mic = false;
 315
 316         if (rt298_jack_detect(rt298, &hp, &mic) < 0)
 317                 return;
 318
 319         if (hp)
 320                 status |= SND_JACK_HEADPHONE;
 321
 322         if (mic)
 323                 status |= SND_JACK_MICROPHONE;
 324
 325         snd_soc_jack_report(rt298->jack, status,
 326                 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
 327 }
 328
 329 int rt298_mic_detect(struct snd_soc_component *component, struct snd_soc_jack *jack)
 330 {
 331         struct rt298_priv *rt298 = snd_soc_component_get_drvdata(component);
 332         struct snd_soc_dapm_context *dapm;
 333         bool hp = false;
 334         bool mic = false;
 335         int status = 0;
 336
 337         /* If jack in NULL, disable HS jack */
 338         if (!jack) {
 339                 regmap_update_bits(rt298->regmap, RT298_IRQ_CTRL, 0x2, 0x0);
 340                 dapm = snd_soc_component_get_dapm(component);
 341                 snd_soc_dapm_disable_pin(dapm, "LDO1");
 342                 snd_soc_dapm_sync(dapm);
 343                 return 0;
 344         }
 345
 346         rt298->jack = jack;
 347         regmap_update_bits(rt298->regmap, RT298_IRQ_CTRL, 0x2, 0x2);
 348
 349         rt298_jack_detect(rt298, &hp, &mic);
 350         if (hp)
 351                 status |= SND_JACK_HEADPHONE;
 352
 353         if (mic)
 354                 status |= SND_JACK_MICROPHONE;
 355
 356         snd_soc_jack_report(rt298->jack, status,
 357                 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
 358
 359         return 0;
 360 }
 361 EXPORT_SYMBOL_GPL(rt298_mic_detect);
 362
 363 static int is_mclk_mode(struct snd_soc_dapm_widget *source,
 364                          struct snd_soc_dapm_widget *sink)
 365 {
 366         struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
 367         struct rt298_priv *rt298 = snd_soc_component_get_drvdata(component);
 368
 369         if (rt298->clk_id == RT298_SCLK_S_MCLK)
 370                 return 1;
 371         else
 372                 return 0;
 373 }
 374
 375 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6350, 50, 0);
 376 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
 377
 378 static const struct snd_kcontrol_new rt298_snd_controls[] = {
 379         SOC_DOUBLE_R_TLV("DAC0 Playback Volume", RT298_DACL_GAIN,
 380                             RT298_DACR_GAIN, 0, 0x7f, 0, out_vol_tlv),
 381         SOC_DOUBLE_R_TLV("ADC0 Capture Volume", RT298_ADCL_GAIN,
 382                             RT298_ADCR_GAIN, 0, 0x7f, 0, out_vol_tlv),
 383         SOC_SINGLE_TLV("AMIC Volume", RT298_MIC_GAIN,
 384                             0, 0x3, 0, mic_vol_tlv),
 385         SOC_DOUBLE_R("Speaker Playback Switch", RT298_SPOL_GAIN,
 386                             RT298_SPOR_GAIN, RT298_MUTE_SFT, 1, 1),
 387 };
 388
 389 /* Digital Mixer */
 390 static const struct snd_kcontrol_new rt298_front_mix[] = {
 391         SOC_DAPM_SINGLE("DAC Switch",  RT298_F_DAC_SWITCH,
 392                         RT298_MUTE_SFT, 1, 1),
 393         SOC_DAPM_SINGLE("RECMIX Switch", RT298_F_RECMIX_SWITCH,
 394                         RT298_MUTE_SFT, 1, 1),
 395 };
 396
 397 /* Analog Input Mixer */
 398 static const struct snd_kcontrol_new rt298_rec_mix[] = {
 399         SOC_DAPM_SINGLE("Mic1 Switch", RT298_REC_MIC_SWITCH,
 400                         RT298_MUTE_SFT, 1, 1),
 401         SOC_DAPM_SINGLE("I2S Switch", RT298_REC_I2S_SWITCH,
 402                         RT298_MUTE_SFT, 1, 1),
 403         SOC_DAPM_SINGLE("Line1 Switch", RT298_REC_LINE_SWITCH,
 404                         RT298_MUTE_SFT, 1, 1),
 405         SOC_DAPM_SINGLE("Beep Switch", RT298_REC_BEEP_SWITCH,
 406                         RT298_MUTE_SFT, 1, 1),
 407 };
 408
 409 static const struct snd_kcontrol_new spo_enable_control =
 410         SOC_DAPM_SINGLE("Switch", RT298_SET_PIN_SPK,
 411                         RT298_SET_PIN_SFT, 1, 0);
 412
 413 static const struct snd_kcontrol_new hpol_enable_control =
 414         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT298_HPOL_GAIN,
 415                         RT298_MUTE_SFT, 1, 1);
 416
 417 static const struct snd_kcontrol_new hpor_enable_control =
 418         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT298_HPOR_GAIN,
 419                         RT298_MUTE_SFT, 1, 1);
 420
 421 /* ADC0 source */
 422 static const char * const rt298_adc_src[] = {
 423         "Mic", "RECMIX", "Dmic"
 424 };
 425
 426 static const int rt298_adc_values[] = {
 427         0, 4, 5,
 428 };
 429
 430 static SOC_VALUE_ENUM_SINGLE_DECL(
 431         rt298_adc0_enum, RT298_ADC0_MUX, RT298_ADC_SEL_SFT,
 432         RT298_ADC_SEL_MASK, rt298_adc_src, rt298_adc_values);
 433
 434 static const struct snd_kcontrol_new rt298_adc0_mux =
 435         SOC_DAPM_ENUM("ADC 0 source", rt298_adc0_enum);
 436
 437 static SOC_VALUE_ENUM_SINGLE_DECL(
 438         rt298_adc1_enum, RT298_ADC1_MUX, RT298_ADC_SEL_SFT,
 439         RT298_ADC_SEL_MASK, rt298_adc_src, rt298_adc_values);
 440
 441 static const struct snd_kcontrol_new rt298_adc1_mux =
 442         SOC_DAPM_ENUM("ADC 1 source", rt298_adc1_enum);
 443
 444 static const char * const rt298_dac_src[] = {
 445         "Front", "Surround"
 446 };
 447 /* HP-OUT source */
 448 static SOC_ENUM_SINGLE_DECL(rt298_hpo_enum, RT298_HPO_MUX,
 449                                 0, rt298_dac_src);
 450
 451 static const struct snd_kcontrol_new rt298_hpo_mux =
 452 SOC_DAPM_ENUM("HPO source", rt298_hpo_enum);
 453
 454 /* SPK-OUT source */
 455 static SOC_ENUM_SINGLE_DECL(rt298_spo_enum, RT298_SPK_MUX,
 456                                 0, rt298_dac_src);
 457
 458 static const struct snd_kcontrol_new rt298_spo_mux =
 459 SOC_DAPM_ENUM("SPO source", rt298_spo_enum);
 460
 461 static int rt298_spk_event(struct snd_soc_dapm_widget *w,
 462                             struct snd_kcontrol *kcontrol, int event)
 463 {
 464         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 465
 466         switch (event) {
 467         case SND_SOC_DAPM_POST_PMU:
 468                 snd_soc_component_write(component,
 469                         RT298_SPK_EAPD, RT298_SET_EAPD_HIGH);
 470                 break;
 471         case SND_SOC_DAPM_PRE_PMD:
 472                 snd_soc_component_write(component,
 473                         RT298_SPK_EAPD, RT298_SET_EAPD_LOW);
 474                 break;
 475
 476         default:
 477                 return 0;
 478         }
 479
 480         return 0;
 481 }
 482
 483 static int rt298_set_dmic1_event(struct snd_soc_dapm_widget *w,
 484                                   struct snd_kcontrol *kcontrol, int event)
 485 {
 486         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 487
 488         switch (event) {
 489         case SND_SOC_DAPM_POST_PMU:
 490                 snd_soc_component_write(component, RT298_SET_PIN_DMIC1, 0x20);
 491                 break;
 492         case SND_SOC_DAPM_PRE_PMD:
 493                 snd_soc_component_write(component, RT298_SET_PIN_DMIC1, 0);
 494                 break;
 495         default:
 496                 return 0;
 497         }
 498
 499         return 0;
 500 }
 501
 502 static int rt298_adc_event(struct snd_soc_dapm_widget *w,
 503                              struct snd_kcontrol *kcontrol, int event)
 504 {
 505         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 506         unsigned int nid;
 507
 508         nid = (w->reg >> 20) & 0xff;
 509
 510         switch (event) {
 511         case SND_SOC_DAPM_POST_PMU:
 512                 snd_soc_component_update_bits(component,
 513                         VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, nid, 0),
 514                         0x7080, 0x7000);
 515                  /* If MCLK doesn't exist, reset AD filter */
 516                 if (!(snd_soc_component_read(component, RT298_VAD_CTRL) & 0x200)) {
 517                         pr_info("NO MCLK\n");
 518                         switch (nid) {
 519                         case RT298_ADC_IN1:
 520                                 snd_soc_component_update_bits(component,
 521                                         RT298_D_FILTER_CTRL, 0x2, 0x2);
 522                                 mdelay(10);
 523                                 snd_soc_component_update_bits(component,
 524                                         RT298_D_FILTER_CTRL, 0x2, 0x0);
 525                                 break;
 526                         case RT298_ADC_IN2:
 527                                 snd_soc_component_update_bits(component,
 528                                         RT298_D_FILTER_CTRL, 0x4, 0x4);
 529                                 mdelay(10);
 530                                 snd_soc_component_update_bits(component,
 531                                         RT298_D_FILTER_CTRL, 0x4, 0x0);
 532                                 break;
 533                         }
 534                 }
 535                 break;
 536         case SND_SOC_DAPM_PRE_PMD:
 537                 snd_soc_component_update_bits(component,
 538                         VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, nid, 0),
 539                         0x7080, 0x7080);
 540                 break;
 541         default:
 542                 return 0;
 543         }
 544
 545         return 0;
 546 }
 547
 548 static int rt298_mic1_event(struct snd_soc_dapm_widget *w,
 549                              struct snd_kcontrol *kcontrol, int event)
 550 {
 551         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 552
 553         switch (event) {
 554         case SND_SOC_DAPM_PRE_PMU:
 555                 snd_soc_component_update_bits(component,
 556                         RT298_A_BIAS_CTRL3, 0xc000, 0x8000);
 557                 snd_soc_component_update_bits(component,
 558                         RT298_A_BIAS_CTRL2, 0xc000, 0x8000);
 559                 break;
 560         case SND_SOC_DAPM_POST_PMD:
 561                 snd_soc_component_update_bits(component,
 562                         RT298_A_BIAS_CTRL3, 0xc000, 0x0000);
 563                 snd_soc_component_update_bits(component,
 564                         RT298_A_BIAS_CTRL2, 0xc000, 0x0000);
 565                 break;
 566         default:
 567                 return 0;
 568         }
 569
 570         return 0;
 571 }
 572
 573 static const struct snd_soc_dapm_widget rt298_dapm_widgets[] = {
 574
 575         SND_SOC_DAPM_SUPPLY_S("HV", 1, RT298_POWER_CTRL1,
 576                 12, 1, NULL, 0),
 577         SND_SOC_DAPM_SUPPLY("VREF", RT298_POWER_CTRL1,
 578                 0, 1, NULL, 0),
 579         SND_SOC_DAPM_SUPPLY_S("BG_MBIAS", 1, RT298_POWER_CTRL2,
 580                 1, 0, NULL, 0),
 581         SND_SOC_DAPM_SUPPLY_S("LDO1", 1, RT298_POWER_CTRL2,
 582                 2, 0, NULL, 0),
 583         SND_SOC_DAPM_SUPPLY_S("LDO2", 1, RT298_POWER_CTRL2,
 584                 3, 0, NULL, 0),
 585         SND_SOC_DAPM_SUPPLY_S("VREF1", 1, RT298_POWER_CTRL2,
 586                 4, 1, NULL, 0),
 587         SND_SOC_DAPM_SUPPLY_S("LV", 2, RT298_POWER_CTRL1,
 588                 13, 1, NULL, 0),
 589
 590
 591         SND_SOC_DAPM_SUPPLY("MCLK MODE", RT298_PLL_CTRL1,
 592                 5, 0, NULL, 0),
 593         SND_SOC_DAPM_SUPPLY("MIC1 Input Buffer", SND_SOC_NOPM,
 594                 0, 0, rt298_mic1_event, SND_SOC_DAPM_PRE_PMU |
 595                 SND_SOC_DAPM_POST_PMD),
 596
 597         /* Input Lines */
 598         SND_SOC_DAPM_INPUT("DMIC1 Pin"),
 599         SND_SOC_DAPM_INPUT("DMIC2 Pin"),
 600         SND_SOC_DAPM_INPUT("MIC1"),
 601         SND_SOC_DAPM_INPUT("LINE1"),
 602         SND_SOC_DAPM_INPUT("Beep"),
 603
 604         /* DMIC */
 605         SND_SOC_DAPM_PGA_E("DMIC1", RT298_SET_POWER(RT298_DMIC1), 0, 1,
 606                 NULL, 0, rt298_set_dmic1_event,
 607                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
 608         SND_SOC_DAPM_PGA("DMIC2", RT298_SET_POWER(RT298_DMIC2), 0, 1,
 609                 NULL, 0),
 610         SND_SOC_DAPM_SUPPLY("DMIC Receiver", SND_SOC_NOPM,
 611                 0, 0, NULL, 0),
 612
 613         /* REC Mixer */
 614         SND_SOC_DAPM_MIXER("RECMIX", SND_SOC_NOPM, 0, 0,
 615                 rt298_rec_mix, ARRAY_SIZE(rt298_rec_mix)),
 616
 617         /* ADCs */
 618         SND_SOC_DAPM_ADC("ADC 0", NULL, SND_SOC_NOPM, 0, 0),
 619         SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
 620
 621         /* ADC Mux */
 622         SND_SOC_DAPM_MUX_E("ADC 0 Mux", RT298_SET_POWER(RT298_ADC_IN1), 0, 1,
 623                 &rt298_adc0_mux, rt298_adc_event, SND_SOC_DAPM_PRE_PMD |
 624                 SND_SOC_DAPM_POST_PMU),
 625         SND_SOC_DAPM_MUX_E("ADC 1 Mux", RT298_SET_POWER(RT298_ADC_IN2), 0, 1,
 626                 &rt298_adc1_mux, rt298_adc_event, SND_SOC_DAPM_PRE_PMD |
 627                 SND_SOC_DAPM_POST_PMU),
 628
 629         /* Audio Interface */
 630         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
 631         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
 632         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
 633         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
 634
 635         /* Output Side */
 636         /* DACs */
 637         SND_SOC_DAPM_DAC("DAC 0", NULL, SND_SOC_NOPM, 0, 0),
 638         SND_SOC_DAPM_DAC("DAC 1", NULL, SND_SOC_NOPM, 0, 0),
 639
 640         /* Output Mux */
 641         SND_SOC_DAPM_MUX("SPK Mux", SND_SOC_NOPM, 0, 0, &rt298_spo_mux),
 642         SND_SOC_DAPM_MUX("HPO Mux", SND_SOC_NOPM, 0, 0, &rt298_hpo_mux),
 643
 644         SND_SOC_DAPM_SUPPLY("HP Power", RT298_SET_PIN_HPO,
 645                 RT298_SET_PIN_SFT, 0, NULL, 0),
 646
 647         /* Output Mixer */
 648         SND_SOC_DAPM_MIXER("Front", RT298_SET_POWER(RT298_DAC_OUT1), 0, 1,
 649                         rt298_front_mix, ARRAY_SIZE(rt298_front_mix)),
 650         SND_SOC_DAPM_PGA("Surround", RT298_SET_POWER(RT298_DAC_OUT2), 0, 1,
 651                         NULL, 0),
 652
 653         /* Output Pga */
 654         SND_SOC_DAPM_SWITCH_E("SPO", SND_SOC_NOPM, 0, 0,
 655                 &spo_enable_control, rt298_spk_event,
 656                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
 657         SND_SOC_DAPM_SWITCH("HPO L", SND_SOC_NOPM, 0, 0,
 658                 &hpol_enable_control),
 659         SND_SOC_DAPM_SWITCH("HPO R", SND_SOC_NOPM, 0, 0,
 660                 &hpor_enable_control),
 661
 662         /* Output Lines */
 663         SND_SOC_DAPM_OUTPUT("SPOL"),
 664         SND_SOC_DAPM_OUTPUT("SPOR"),
 665         SND_SOC_DAPM_OUTPUT("HPO Pin"),
 666         SND_SOC_DAPM_OUTPUT("SPDIF"),
 667 };
 668
 669 static const struct snd_soc_dapm_route rt298_dapm_routes[] = {
 670
 671         {"ADC 0", NULL, "MCLK MODE", is_mclk_mode},
 672         {"ADC 1", NULL, "MCLK MODE", is_mclk_mode},
 673         {"Front", NULL, "MCLK MODE", is_mclk_mode},
 674         {"Surround", NULL, "MCLK MODE", is_mclk_mode},
 675
 676         {"HP Power", NULL, "LDO1"},
 677         {"HP Power", NULL, "LDO2"},
 678         {"HP Power", NULL, "LV"},
 679         {"HP Power", NULL, "VREF1"},
 680         {"HP Power", NULL, "BG_MBIAS"},
 681
 682         {"MIC1", NULL, "LDO1"},
 683         {"MIC1", NULL, "LDO2"},
 684         {"MIC1", NULL, "HV"},
 685         {"MIC1", NULL, "LV"},
 686         {"MIC1", NULL, "VREF"},
 687         {"MIC1", NULL, "VREF1"},
 688         {"MIC1", NULL, "BG_MBIAS"},
 689         {"MIC1", NULL, "MIC1 Input Buffer"},
 690
 691         {"SPO", NULL, "LDO1"},
 692         {"SPO", NULL, "LDO2"},
 693         {"SPO", NULL, "HV"},
 694         {"SPO", NULL, "LV"},
 695         {"SPO", NULL, "VREF"},
 696         {"SPO", NULL, "VREF1"},
 697         {"SPO", NULL, "BG_MBIAS"},
 698
 699         {"DMIC1", NULL, "DMIC1 Pin"},
 700         {"DMIC2", NULL, "DMIC2 Pin"},
 701         {"DMIC1", NULL, "DMIC Receiver"},
 702         {"DMIC2", NULL, "DMIC Receiver"},
 703
 704         {"RECMIX", "Beep Switch", "Beep"},
 705         {"RECMIX", "Line1 Switch", "LINE1"},
 706         {"RECMIX", "Mic1 Switch", "MIC1"},
 707
 708         {"ADC 0 Mux", "Dmic", "DMIC1"},
 709         {"ADC 0 Mux", "RECMIX", "RECMIX"},
 710         {"ADC 0 Mux", "Mic", "MIC1"},
 711         {"ADC 1 Mux", "Dmic", "DMIC2"},
 712         {"ADC 1 Mux", "RECMIX", "RECMIX"},
 713         {"ADC 1 Mux", "Mic", "MIC1"},
 714
 715         {"ADC 0", NULL, "ADC 0 Mux"},
 716         {"ADC 1", NULL, "ADC 1 Mux"},
 717
 718         {"AIF1TX", NULL, "ADC 0"},
 719         {"AIF2TX", NULL, "ADC 1"},
 720
 721         {"DAC 0", NULL, "AIF1RX"},
 722         {"DAC 1", NULL, "AIF2RX"},
 723
 724         {"Front", "DAC Switch", "DAC 0"},
 725         {"Front", "RECMIX Switch", "RECMIX"},
 726
 727         {"Surround", NULL, "DAC 1"},
 728
 729         {"SPK Mux", "Front", "Front"},
 730         {"SPK Mux", "Surround", "Surround"},
 731
 732         {"HPO Mux", "Front", "Front"},
 733         {"HPO Mux", "Surround", "Surround"},
 734
 735         {"SPO", "Switch", "SPK Mux"},
 736         {"HPO L", "Switch", "HPO Mux"},
 737         {"HPO R", "Switch", "HPO Mux"},
 738         {"HPO L", NULL, "HP Power"},
 739         {"HPO R", NULL, "HP Power"},
 740
 741         {"SPOL", NULL, "SPO"},
 742         {"SPOR", NULL, "SPO"},
 743         {"HPO Pin", NULL, "HPO L"},
 744         {"HPO Pin", NULL, "HPO R"},
 745 };
 746
 747 static int rt298_hw_params(struct snd_pcm_substream *substream,
 748                             struct snd_pcm_hw_params *params,
 749                             struct snd_soc_dai *dai)
 750 {
 751         struct snd_soc_component *component = dai->component;
 752         struct rt298_priv *rt298 = snd_soc_component_get_drvdata(component);
 753         unsigned int val = 0;
 754         int d_len_code;
 755
 756         switch (params_rate(params)) {
 757         /* bit 14 0:48K 1:44.1K */
 758         case 44100:
 759         case 48000:
 760                 break;
 761         default:
 762                 dev_err(component->dev, "Unsupported sample rate %d\n",
 763                                         params_rate(params));
 764                 return -EINVAL;
 765         }
 766         switch (rt298->sys_clk) {
 767         case 12288000:
 768         case 24576000:
 769                 if (params_rate(params) != 48000) {
 770                         dev_err(component->dev, "Sys_clk is not matched (%d %d)\n",
 771                                         params_rate(params), rt298->sys_clk);
 772                         return -EINVAL;
 773                 }
 774                 break;
 775         case 11289600:
 776         case 22579200:
 777                 if (params_rate(params) != 44100) {
 778                         dev_err(component->dev, "Sys_clk is not matched (%d %d)\n",
 779                                         params_rate(params), rt298->sys_clk);
 780                         return -EINVAL;
 781                 }
 782                 break;
 783         }
 784
 785         if (params_channels(params) <= 16) {
 786                 /* bit 3:0 Number of Channel */
 787                 val |= (params_channels(params) - 1);
 788         } else {
 789                 dev_err(component->dev, "Unsupported channels %d\n",
 790                                         params_channels(params));
 791                 return -EINVAL;
 792         }
 793
 794         d_len_code = 0;
 795         switch (params_width(params)) {
 796         /* bit 6:4 Bits per Sample */
 797         case 16:
 798                 d_len_code = 0;
 799                 val |= (0x1 << 4);
 800                 break;
 801         case 32:
 802                 d_len_code = 2;
 803                 val |= (0x4 << 4);
 804                 break;
 805         case 20:
 806                 d_len_code = 1;
 807                 val |= (0x2 << 4);
 808                 break;
 809         case 24:
 810                 d_len_code = 2;
 811                 val |= (0x3 << 4);
 812                 break;
 813         case 8:
 814                 d_len_code = 3;
 815                 break;
 816         default:
 817                 return -EINVAL;
 818         }
 819
 820         snd_soc_component_update_bits(component,
 821                 RT298_I2S_CTRL1, 0x0018, d_len_code << 3);
 822         dev_dbg(component->dev, "format val = 0x%x\n", val);
 823
 824         snd_soc_component_update_bits(component, RT298_DAC_FORMAT, 0x407f, val);
 825         snd_soc_component_update_bits(component, RT298_ADC_FORMAT, 0x407f, val);
 826
 827         return 0;
 828 }
 829
 830 static int rt298_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 831 {
 832         struct snd_soc_component *component = dai->component;
 833
 834         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 835         case SND_SOC_DAIFMT_CBM_CFM:
 836                 snd_soc_component_update_bits(component,
 837                         RT298_I2S_CTRL1, 0x800, 0x800);
 838                 break;
 839         case SND_SOC_DAIFMT_CBS_CFS:
 840                 snd_soc_component_update_bits(component,
 841                         RT298_I2S_CTRL1, 0x800, 0x0);
 842                 break;
 843         default:
 844                 return -EINVAL;
 845         }
 846
 847         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 848         case SND_SOC_DAIFMT_I2S:
 849                 snd_soc_component_update_bits(component,
 850                         RT298_I2S_CTRL1, 0x300, 0x0);
 851                 break;
 852         case SND_SOC_DAIFMT_LEFT_J:
 853                 snd_soc_component_update_bits(component,
 854                         RT298_I2S_CTRL1, 0x300, 0x1 << 8);
 855                 break;
 856         case SND_SOC_DAIFMT_DSP_A:
 857                 snd_soc_component_update_bits(component,
 858                         RT298_I2S_CTRL1, 0x300, 0x2 << 8);
 859                 break;
 860         case SND_SOC_DAIFMT_DSP_B:
 861                 snd_soc_component_update_bits(component,
 862                         RT298_I2S_CTRL1, 0x300, 0x3 << 8);
 863                 break;
 864         default:
 865                 return -EINVAL;
 866         }
 867         /* bit 15 Stream Type 0:PCM 1:Non-PCM */
 868         snd_soc_component_update_bits(component, RT298_DAC_FORMAT, 0x8000, 0);
 869         snd_soc_component_update_bits(component, RT298_ADC_FORMAT, 0x8000, 0);
 870
 871         return 0;
 872 }
 873
 874 static int rt298_set_dai_sysclk(struct snd_soc_dai *dai,
 875                                 int clk_id, unsigned int freq, int dir)
 876 {
 877         struct snd_soc_component *component = dai->component;
 878         struct rt298_priv *rt298 = snd_soc_component_get_drvdata(component);
 879
 880         dev_dbg(component->dev, "%s freq=%d\n", __func__, freq);
 881
 882         if (RT298_SCLK_S_MCLK == clk_id) {
 883                 snd_soc_component_update_bits(component,
 884                         RT298_I2S_CTRL2, 0x0100, 0x0);
 885                 snd_soc_component_update_bits(component,
 886                         RT298_PLL_CTRL1, 0x20, 0x20);
 887         } else {
 888                 snd_soc_component_update_bits(component,
 889                         RT298_I2S_CTRL2, 0x0100, 0x0100);
 890                 snd_soc_component_update_bits(component,
 891                         RT298_PLL_CTRL1, 0x20, 0x0);
 892         }
 893
 894         switch (freq) {
 895         case 19200000:
 896                 if (RT298_SCLK_S_MCLK == clk_id) {
 897                         dev_err(component->dev, "Should not use MCLK\n");
 898                         return -EINVAL;
 899                 }
 900                 snd_soc_component_update_bits(component,
 901                         RT298_I2S_CTRL2, 0x40, 0x40);
 902                 break;
 903         case 24000000:
 904                 if (RT298_SCLK_S_MCLK == clk_id) {
 905                         dev_err(component->dev, "Should not use MCLK\n");
 906                         return -EINVAL;
 907                 }
 908                 snd_soc_component_update_bits(component,
 909                         RT298_I2S_CTRL2, 0x40, 0x0);
 910                 break;
 911         case 12288000:
 912         case 11289600:
 913                 snd_soc_component_update_bits(component,
 914                         RT298_I2S_CTRL2, 0x8, 0x0);
 915                 snd_soc_component_update_bits(component,
 916                         RT298_CLK_DIV, 0xfc1e, 0x0004);
 917                 break;
 918         case 24576000:
 919         case 22579200:
 920                 snd_soc_component_update_bits(component,
 921                         RT298_I2S_CTRL2, 0x8, 0x8);
 922                 snd_soc_component_update_bits(component,
 923                         RT298_CLK_DIV, 0xfc1e, 0x5406);
 924                 break;
 925         default:
 926                 dev_err(component->dev, "Unsupported system clock\n");
 927                 return -EINVAL;
 928         }
 929
 930         rt298->sys_clk = freq;
 931         rt298->clk_id = clk_id;
 932
 933         return 0;
 934 }
 935
 936 static int rt298_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
 937 {
 938         struct snd_soc_component *component = dai->component;
 939
 940         dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio);
 941         if (50 == ratio)
 942                 snd_soc_component_update_bits(component,
 943                         RT298_I2S_CTRL1, 0x1000, 0x1000);
 944         else
 945                 snd_soc_component_update_bits(component,
 946                         RT298_I2S_CTRL1, 0x1000, 0x0);
 947
 948
 949         return 0;
 950 }
 951
 952 static int rt298_set_bias_level(struct snd_soc_component *component,
 953                                  enum snd_soc_bias_level level)
 954 {
 955         switch (level) {
 956         case SND_SOC_BIAS_PREPARE:
 957                 if (SND_SOC_BIAS_STANDBY ==
 958                         snd_soc_component_get_bias_level(component)) {
 959                         snd_soc_component_write(component,
 960                                 RT298_SET_AUDIO_POWER, AC_PWRST_D0);
 961                         snd_soc_component_update_bits(component, 0x0d, 0x200, 0x200);
 962                         snd_soc_component_update_bits(component, 0x52, 0x80, 0x0);
 963                         mdelay(20);
 964                         snd_soc_component_update_bits(component, 0x0d, 0x200, 0x0);
 965                         snd_soc_component_update_bits(component, 0x52, 0x80, 0x80);
 966                 }
 967                 break;
 968
 969         case SND_SOC_BIAS_STANDBY:
 970                 snd_soc_component_write(component,
 971                         RT298_SET_AUDIO_POWER, AC_PWRST_D3);
 972                 break;
 973
 974         default:
 975                 break;
 976         }
 977
 978         return 0;
 979 }
 980
 981 static irqreturn_t rt298_irq(int irq, void *data)
 982 {
 983         struct rt298_priv *rt298 = data;
 984         bool hp = false;
 985         bool mic = false;
 986         int ret, status = 0;
 987
 988         ret = rt298_jack_detect(rt298, &hp, &mic);
 989
 990         /* Clear IRQ */
 991         regmap_update_bits(rt298->regmap, RT298_IRQ_CTRL, 0x1, 0x1);
 992
 993         if (ret == 0) {
 994                 if (hp)
 995                         status |= SND_JACK_HEADPHONE;
 996
 997                 if (mic)
 998                         status |= SND_JACK_MICROPHONE;
 999
1000                 snd_soc_jack_report(rt298->jack, status,
1001                         SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
1002
1003                 pm_wakeup_event(&rt298->i2c->dev, 300);
1004         }
1005
1006         return IRQ_HANDLED;
1007 }
1008
1009 static int rt298_probe(struct snd_soc_component *component)
1010 {
1011         struct rt298_priv *rt298 = snd_soc_component_get_drvdata(component);
1012
1013         rt298->component = component;
1014
1015         if (rt298->i2c->irq) {
1016                 regmap_update_bits(rt298->regmap,
1017                                         RT298_IRQ_CTRL, 0x2, 0x2);
1018
1019                 INIT_DELAYED_WORK(&rt298->jack_detect_work,
1020                                         rt298_jack_detect_work);
1021                 schedule_delayed_work(&rt298->jack_detect_work,
1022                                         msecs_to_jiffies(1250));
1023         }
1024
1025         return 0;
1026 }
1027
1028 static void rt298_remove(struct snd_soc_component *component)
1029 {
1030         struct rt298_priv *rt298 = snd_soc_component_get_drvdata(component);
1031
1032         cancel_delayed_work_sync(&rt298->jack_detect_work);
1033 }
1034
1035 #ifdef CONFIG_PM
1036 static int rt298_suspend(struct snd_soc_component *component)
1037 {
1038         struct rt298_priv *rt298 = snd_soc_component_get_drvdata(component);
1039
1040         rt298->is_hp_in = -1;
1041         regcache_cache_only(rt298->regmap, true);
1042         regcache_mark_dirty(rt298->regmap);
1043
1044         return 0;
1045 }
1046
1047 static int rt298_resume(struct snd_soc_component *component)
1048 {
1049         struct rt298_priv *rt298 = snd_soc_component_get_drvdata(component);
1050
1051         regcache_cache_only(rt298->regmap, false);
1052         rt298_index_sync(component);
1053         regcache_sync(rt298->regmap);
1054
1055         return 0;
1056 }
1057 #else
1058 #define rt298_suspend NULL
1059 #define rt298_resume NULL
1060 #endif
1061
1062 #define RT298_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
1063 #define RT298_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1064                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1065
1066 static const struct snd_soc_dai_ops rt298_aif_dai_ops = {
1067         .hw_params = rt298_hw_params,
1068         .set_fmt = rt298_set_dai_fmt,
1069         .set_sysclk = rt298_set_dai_sysclk,
1070         .set_bclk_ratio = rt298_set_bclk_ratio,
1071 };
1072
1073 static struct snd_soc_dai_driver rt298_dai[] = {
1074         {
1075                 .name = "rt298-aif1",
1076                 .id = RT298_AIF1,
1077                 .playback = {
1078                         .stream_name = "AIF1 Playback",
1079                         .channels_min = 1,
1080                         .channels_max = 2,
1081                         .rates = RT298_STEREO_RATES,
1082                         .formats = RT298_FORMATS,
1083                 },
1084                 .capture = {
1085                         .stream_name = "AIF1 Capture",
1086                         .channels_min = 1,
1087                         .channels_max = 2,
1088                         .rates = RT298_STEREO_RATES,
1089                         .formats = RT298_FORMATS,
1090                 },
1091                 .ops = &rt298_aif_dai_ops,
1092                 .symmetric_rate = 1,
1093         },
1094         {
1095                 .name = "rt298-aif2",
1096                 .id = RT298_AIF2,
1097                 .playback = {
1098                         .stream_name = "AIF2 Playback",
1099                         .channels_min = 1,
1100                         .channels_max = 2,
1101                         .rates = RT298_STEREO_RATES,
1102                         .formats = RT298_FORMATS,
1103                 },
1104                 .capture = {
1105                         .stream_name = "AIF2 Capture",
1106                         .channels_min = 1,
1107                         .channels_max = 2,
1108                         .rates = RT298_STEREO_RATES,
1109                         .formats = RT298_FORMATS,
1110                 },
1111                 .ops = &rt298_aif_dai_ops,
1112                 .symmetric_rate = 1,
1113         },
1114
1115 };
1116
1117 static const struct snd_soc_component_driver soc_component_dev_rt298 = {
1118         .probe                  = rt298_probe,
1119         .remove                 = rt298_remove,
1120         .suspend                = rt298_suspend,
1121         .resume                 = rt298_resume,
1122         .set_bias_level         = rt298_set_bias_level,
1123         .controls               = rt298_snd_controls,
1124         .num_controls           = ARRAY_SIZE(rt298_snd_controls),
1125         .dapm_widgets           = rt298_dapm_widgets,
1126         .num_dapm_widgets       = ARRAY_SIZE(rt298_dapm_widgets),
1127         .dapm_routes            = rt298_dapm_routes,
1128         .num_dapm_routes        = ARRAY_SIZE(rt298_dapm_routes),
1129         .use_pmdown_time        = 1,
1130         .endianness             = 1,
1131         .non_legacy_dai_naming  = 1,
1132 };
1133
1134 static const struct regmap_config rt298_regmap = {
1135         .reg_bits = 32,
1136         .val_bits = 32,
1137         .max_register = 0x02370100,
1138         .volatile_reg = rt298_volatile_register,
1139         .readable_reg = rt298_readable_register,
1140         .reg_write = rl6347a_hw_write,
1141         .reg_read = rl6347a_hw_read,
1142         .cache_type = REGCACHE_RBTREE,
1143         .reg_defaults = rt298_reg,
1144         .num_reg_defaults = ARRAY_SIZE(rt298_reg),
1145 };
1146
1147 static const struct i2c_device_id rt298_i2c_id[] = {
1148         {"rt298", 0},
1149         {}
1150 };
1151 MODULE_DEVICE_TABLE(i2c, rt298_i2c_id);
1152
1153 #ifdef CONFIG_ACPI
1154 static const struct acpi_device_id rt298_acpi_match[] = {
1155         { "INT343A", 0 },
1156         {},
1157 };
1158 MODULE_DEVICE_TABLE(acpi, rt298_acpi_match);
1159 #endif
1160
1161 static const struct dmi_system_id force_combo_jack_table[] = {
1162         {
1163                 .ident = "Intel Broxton P",
1164                 .matches = {
1165                         DMI_MATCH(DMI_SYS_VENDOR, "Intel Corp"),
1166                         DMI_MATCH(DMI_PRODUCT_NAME, "Broxton P")
1167                 }
1168         },
1169         {
1170                 .ident = "Intel Gemini Lake",
1171                 .matches = {
1172                         DMI_MATCH(DMI_SYS_VENDOR, "Intel Corp"),
1173                         DMI_MATCH(DMI_PRODUCT_NAME, "Geminilake")
1174                 }
1175         },
1176         { }
1177 };
1178
1179 static int rt298_i2c_probe(struct i2c_client *i2c)
1180 {
1181         struct rt298_platform_data *pdata = dev_get_platdata(&i2c->dev);
1182         struct rt298_priv *rt298;
1183         struct device *dev = &i2c->dev;
1184         const struct acpi_device_id *acpiid;
1185         int i, ret;
1186
1187         rt298 = devm_kzalloc(&i2c->dev, sizeof(*rt298),
1188                                 GFP_KERNEL);
1189         if (NULL == rt298)
1190                 return -ENOMEM;
1191
1192         rt298->regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt298_regmap);
1193         if (IS_ERR(rt298->regmap)) {
1194                 ret = PTR_ERR(rt298->regmap);
1195                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1196                         ret);
1197                 return ret;
1198         }
1199
1200         regmap_read(rt298->regmap,
1201                 RT298_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID), &ret);
1202         if (ret != RT298_VENDOR_ID) {
1203                 dev_err(&i2c->dev,
1204                         "Device with ID register %#x is not rt298\n", ret);
1205                 return -ENODEV;
1206         }
1207
1208         rt298->index_cache = devm_kmemdup(&i2c->dev, rt298_index_def,
1209                                           sizeof(rt298_index_def), GFP_KERNEL);
1210         if (!rt298->index_cache)
1211                 return -ENOMEM;
1212
1213         rt298->index_cache_size = INDEX_CACHE_SIZE;
1214         rt298->i2c = i2c;
1215         i2c_set_clientdata(i2c, rt298);
1216
1217         /* restore codec default */
1218         for (i = 0; i < INDEX_CACHE_SIZE; i++)
1219                 regmap_write(rt298->regmap, rt298->index_cache[i].reg,
1220                                 rt298->index_cache[i].def);
1221         for (i = 0; i < ARRAY_SIZE(rt298_reg); i++)
1222                 regmap_write(rt298->regmap, rt298_reg[i].reg,
1223                                 rt298_reg[i].def);
1224
1225         if (pdata)
1226                 rt298->pdata = *pdata;
1227
1228         /* enable jack combo mode on supported devices */
1229         acpiid = acpi_match_device(dev->driver->acpi_match_table, dev);
1230         if (acpiid && acpiid->driver_data) {
1231                 rt298->pdata = *(struct rt298_platform_data *)
1232                                 acpiid->driver_data;
1233         }
1234
1235         if (dmi_check_system(force_combo_jack_table)) {
1236                 rt298->pdata.cbj_en = true;
1237                 rt298->pdata.gpio2_en = false;
1238         }
1239
1240         /* VREF Charging */
1241         regmap_update_bits(rt298->regmap, 0x04, 0x80, 0x80);
1242         regmap_update_bits(rt298->regmap, 0x1b, 0x860, 0x860);
1243         /* Vref2 */
1244         regmap_update_bits(rt298->regmap, 0x08, 0x20, 0x20);
1245
1246         regmap_write(rt298->regmap, RT298_SET_AUDIO_POWER, AC_PWRST_D3);
1247
1248         for (i = 0; i < RT298_POWER_REG_LEN; i++)
1249                 regmap_write(rt298->regmap,
1250                         RT298_SET_POWER(rt298_support_power_controls[i]),
1251                         AC_PWRST_D1);
1252
1253         if (!rt298->pdata.cbj_en) {
1254                 regmap_write(rt298->regmap, RT298_CBJ_CTRL2, 0x0000);
1255                 regmap_write(rt298->regmap, RT298_MIC1_DET_CTRL, 0x0816);
1256                 regmap_update_bits(rt298->regmap,
1257                                         RT298_CBJ_CTRL1, 0xf000, 0xb000);
1258         } else {
1259                 regmap_update_bits(rt298->regmap,
1260                                         RT298_CBJ_CTRL1, 0xf000, 0x5000);
1261         }
1262
1263         mdelay(10);
1264
1265         if (!rt298->pdata.gpio2_en)
1266                 regmap_write(rt298->regmap, RT298_SET_DMIC2_DEFAULT, 0x40);
1267         else
1268                 regmap_write(rt298->regmap, RT298_SET_DMIC2_DEFAULT, 0);
1269
1270         mdelay(10);
1271
1272         regmap_write(rt298->regmap, RT298_MISC_CTRL1, 0x0000);
1273         regmap_update_bits(rt298->regmap,
1274                                 RT298_WIND_FILTER_CTRL, 0x0082, 0x0082);
1275
1276         regmap_write(rt298->regmap, RT298_UNSOLICITED_INLINE_CMD, 0x81);
1277         regmap_write(rt298->regmap, RT298_UNSOLICITED_HP_OUT, 0x82);
1278         regmap_write(rt298->regmap, RT298_UNSOLICITED_MIC1, 0x84);
1279         regmap_update_bits(rt298->regmap, RT298_IRQ_FLAG_CTRL, 0x2, 0x2);
1280
1281         rt298->is_hp_in = -1;
1282
1283         if (rt298->i2c->irq) {
1284                 ret = request_threaded_irq(rt298->i2c->irq, NULL, rt298_irq,
1285                         IRQF_TRIGGER_HIGH | IRQF_ONESHOT, "rt298", rt298);
1286                 if (ret != 0) {
1287                         dev_err(&i2c->dev,
1288                                 "Failed to reguest IRQ: %d\n", ret);
1289                         return ret;
1290                 }
1291         }
1292
1293         ret = devm_snd_soc_register_component(&i2c->dev,
1294                                      &soc_component_dev_rt298,
1295                                      rt298_dai, ARRAY_SIZE(rt298_dai));
1296
1297         return ret;
1298 }
1299
1300 static int rt298_i2c_remove(struct i2c_client *i2c)
1301 {
1302         struct rt298_priv *rt298 = i2c_get_clientdata(i2c);
1303
1304         if (i2c->irq)
1305                 free_irq(i2c->irq, rt298);
1306
1307         return 0;
1308 }
1309
1310
1311 static struct i2c_driver rt298_i2c_driver = {
1312         .driver = {
1313                    .name = "rt298",
1314                    .acpi_match_table = ACPI_PTR(rt298_acpi_match),
1315                    },
1316         .probe_new = rt298_i2c_probe,
1317         .remove = rt298_i2c_remove,
1318         .id_table = rt298_i2c_id,
1319 };
1320
1321 module_i2c_driver(rt298_i2c_driver);
1322
1323 MODULE_DESCRIPTION("ASoC RT298 driver");
1324 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
1325 MODULE_LICENSE("GPL");