sound/pci/hda/patch_hdmi.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *
   4  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   5  *
   6  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   7  *  Copyright (c) 2006 ATI Technologies Inc.
   8  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   9  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  10  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  11  *
  12  *  Authors:
  13  *                      Wu Fengguang <wfg@linux.intel.com>
  14  *
  15  *  Maintained by:
  16  *                      Wu Fengguang <wfg@linux.intel.com>
  17  */
  18
  19 #include <linux/init.h>
  20 #include <linux/delay.h>
  21 #include <linux/pci.h>
  22 #include <linux/slab.h>
  23 #include <linux/module.h>
  24 #include <linux/pm_runtime.h>
  25 #include <sound/core.h>
  26 #include <sound/jack.h>
  27 #include <sound/asoundef.h>
  28 #include <sound/tlv.h>
  29 #include <sound/hdaudio.h>
  30 #include <sound/hda_i915.h>
  31 #include <sound/hda_chmap.h>
  32 #include <sound/hda_codec.h>
  33 #include "hda_local.h"
  34 #include "hda_jack.h"
  35
  36 static bool static_hdmi_pcm;
  37 module_param(static_hdmi_pcm, bool, 0644);
  38 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  39
  40 #define is_haswell(codec)  ((codec)->core.vendor_id == 0x80862807)
  41 #define is_broadwell(codec)    ((codec)->core.vendor_id == 0x80862808)
  42 #define is_skylake(codec) ((codec)->core.vendor_id == 0x80862809)
  43 #define is_broxton(codec) ((codec)->core.vendor_id == 0x8086280a)
  44 #define is_kabylake(codec) ((codec)->core.vendor_id == 0x8086280b)
  45 #define is_geminilake(codec) (((codec)->core.vendor_id == 0x8086280d) || \
  46                                 ((codec)->core.vendor_id == 0x80862800))
  47 #define is_cannonlake(codec) ((codec)->core.vendor_id == 0x8086280c)
  48 #define is_icelake(codec) ((codec)->core.vendor_id == 0x8086280f)
  49 #define is_tigerlake(codec) ((codec)->core.vendor_id == 0x80862812)
  50 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
  51                                 || is_skylake(codec) || is_broxton(codec) \
  52                                 || is_kabylake(codec) || is_geminilake(codec) \
  53                                 || is_cannonlake(codec) || is_icelake(codec) \
  54                                 || is_tigerlake(codec))
  55 #define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
  56 #define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
  57 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
  58
  59 struct hdmi_spec_per_cvt {
  60         hda_nid_t cvt_nid;
  61         int assigned;
  62         unsigned int channels_min;
  63         unsigned int channels_max;
  64         u32 rates;
  65         u64 formats;
  66         unsigned int maxbps;
  67 };
  68
  69 /* max. connections to a widget */
  70 #define HDA_MAX_CONNECTIONS     32
  71
  72 struct hdmi_spec_per_pin {
  73         hda_nid_t pin_nid;
  74         int dev_id;
  75         /* pin idx, different device entries on the same pin use the same idx */
  76         int pin_nid_idx;
  77         int num_mux_nids;
  78         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  79         int mux_idx;
  80         hda_nid_t cvt_nid;
  81
  82         struct hda_codec *codec;
  83         struct hdmi_eld sink_eld;
  84         struct mutex lock;
  85         struct delayed_work work;
  86         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  87         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  88         int repoll_count;
  89         bool setup; /* the stream has been set up by prepare callback */
  90         int channels; /* current number of channels */
  91         bool non_pcm;
  92         bool chmap_set;         /* channel-map override by ALSA API? */
  93         unsigned char chmap[8]; /* ALSA API channel-map */
  94 #ifdef CONFIG_SND_PROC_FS
  95         struct snd_info_entry *proc_entry;
  96 #endif
  97 };
  98
  99 /* operations used by generic code that can be overridden by patches */
 100 struct hdmi_ops {
 101         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
 102                            unsigned char *buf, int *eld_size);
 103
 104         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 105                                     int ca, int active_channels, int conn_type);
 106
 107         /* enable/disable HBR (HD passthrough) */
 108         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
 109
 110         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 111                             hda_nid_t pin_nid, u32 stream_tag, int format);
 112
 113         void (*pin_cvt_fixup)(struct hda_codec *codec,
 114                               struct hdmi_spec_per_pin *per_pin,
 115                               hda_nid_t cvt_nid);
 116 };
 117
 118 struct hdmi_pcm {
 119         struct hda_pcm *pcm;
 120         struct snd_jack *jack;
 121         struct snd_kcontrol *eld_ctl;
 122 };
 123
 124 struct hdmi_spec {
 125         struct hda_codec *codec;
 126         int num_cvts;
 127         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 128         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 129
 130         /*
 131          * num_pins is the number of virtual pins
 132          * for example, there are 3 pins, and each pin
 133          * has 4 device entries, then the num_pins is 12
 134          */
 135         int num_pins;
 136         /*
 137          * num_nids is the number of real pins
 138          * In the above example, num_nids is 3
 139          */
 140         int num_nids;
 141         /*
 142          * dev_num is the number of device entries
 143          * on each pin.
 144          * In the above example, dev_num is 4
 145          */
 146         int dev_num;
 147         struct snd_array pins; /* struct hdmi_spec_per_pin */
 148         struct hdmi_pcm pcm_rec[16];
 149         struct mutex pcm_lock;
 150         struct mutex bind_lock; /* for audio component binding */
 151         /* pcm_bitmap means which pcms have been assigned to pins*/
 152         unsigned long pcm_bitmap;
 153         int pcm_used;   /* counter of pcm_rec[] */
 154         /* bitmap shows whether the pcm is opened in user space
 155          * bit 0 means the first playback PCM (PCM3);
 156          * bit 1 means the second playback PCM, and so on.
 157          */
 158         unsigned long pcm_in_use;
 159
 160         struct hdmi_eld temp_eld;
 161         struct hdmi_ops ops;
 162
 163         bool dyn_pin_out;
 164         bool dyn_pcm_assign;
 165         /*
 166          * Non-generic VIA/NVIDIA specific
 167          */
 168         struct hda_multi_out multiout;
 169         struct hda_pcm_stream pcm_playback;
 170
 171         bool use_jack_detect; /* jack detection enabled */
 172         bool use_acomp_notifier; /* use eld_notify callback for hotplug */
 173         bool acomp_registered; /* audio component registered in this driver */
 174         struct drm_audio_component_audio_ops drm_audio_ops;
 175         int (*port2pin)(struct hda_codec *, int); /* reverse port/pin mapping */
 176
 177         struct hdac_chmap chmap;
 178         hda_nid_t vendor_nid;
 179         const int *port_map;
 180         int port_num;
 181 };
 182
 183 #ifdef CONFIG_SND_HDA_COMPONENT
 184 static inline bool codec_has_acomp(struct hda_codec *codec)
 185 {
 186         struct hdmi_spec *spec = codec->spec;
 187         return spec->use_acomp_notifier;
 188 }
 189 #else
 190 #define codec_has_acomp(codec)  false
 191 #endif
 192
 193 struct hdmi_audio_infoframe {
 194         u8 type; /* 0x84 */
 195         u8 ver;  /* 0x01 */
 196         u8 len;  /* 0x0a */
 197
 198         u8 checksum;
 199
 200         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 201         u8 SS01_SF24;
 202         u8 CXT04;
 203         u8 CA;
 204         u8 LFEPBL01_LSV36_DM_INH7;
 205 };
 206
 207 struct dp_audio_infoframe {
 208         u8 type; /* 0x84 */
 209         u8 len;  /* 0x1b */
 210         u8 ver;  /* 0x11 << 2 */
 211
 212         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 213         u8 SS01_SF24;
 214         u8 CXT04;
 215         u8 CA;
 216         u8 LFEPBL01_LSV36_DM_INH7;
 217 };
 218
 219 union audio_infoframe {
 220         struct hdmi_audio_infoframe hdmi;
 221         struct dp_audio_infoframe dp;
 222         u8 bytes[0];
 223 };
 224
 225 /*
 226  * HDMI routines
 227  */
 228
 229 #define get_pin(spec, idx) \
 230         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 231 #define get_cvt(spec, idx) \
 232         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 233 /* obtain hdmi_pcm object assigned to idx */
 234 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 235 /* obtain hda_pcm object assigned to idx */
 236 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 237
 238 static int pin_id_to_pin_index(struct hda_codec *codec,
 239                                hda_nid_t pin_nid, int dev_id)
 240 {
 241         struct hdmi_spec *spec = codec->spec;
 242         int pin_idx;
 243         struct hdmi_spec_per_pin *per_pin;
 244
 245         /*
 246          * (dev_id == -1) means it is NON-MST pin
 247          * return the first virtual pin on this port
 248          */
 249         if (dev_id == -1)
 250                 dev_id = 0;
 251
 252         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 253                 per_pin = get_pin(spec, pin_idx);
 254                 if ((per_pin->pin_nid == pin_nid) &&
 255                         (per_pin->dev_id == dev_id))
 256                         return pin_idx;
 257         }
 258
 259         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 260         return -EINVAL;
 261 }
 262
 263 static int hinfo_to_pcm_index(struct hda_codec *codec,
 264                         struct hda_pcm_stream *hinfo)
 265 {
 266         struct hdmi_spec *spec = codec->spec;
 267         int pcm_idx;
 268
 269         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 270                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 271                         return pcm_idx;
 272
 273         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 274         return -EINVAL;
 275 }
 276
 277 static int hinfo_to_pin_index(struct hda_codec *codec,
 278                               struct hda_pcm_stream *hinfo)
 279 {
 280         struct hdmi_spec *spec = codec->spec;
 281         struct hdmi_spec_per_pin *per_pin;
 282         int pin_idx;
 283
 284         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 285                 per_pin = get_pin(spec, pin_idx);
 286                 if (per_pin->pcm &&
 287                         per_pin->pcm->pcm->stream == hinfo)
 288                         return pin_idx;
 289         }
 290
 291         codec_dbg(codec, "HDMI: hinfo %p not registered\n", hinfo);
 292         return -EINVAL;
 293 }
 294
 295 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
 296                                                 int pcm_idx)
 297 {
 298         int i;
 299         struct hdmi_spec_per_pin *per_pin;
 300
 301         for (i = 0; i < spec->num_pins; i++) {
 302                 per_pin = get_pin(spec, i);
 303                 if (per_pin->pcm_idx == pcm_idx)
 304                         return per_pin;
 305         }
 306         return NULL;
 307 }
 308
 309 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 310 {
 311         struct hdmi_spec *spec = codec->spec;
 312         int cvt_idx;
 313
 314         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 315                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 316                         return cvt_idx;
 317
 318         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 319         return -EINVAL;
 320 }
 321
 322 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 323                         struct snd_ctl_elem_info *uinfo)
 324 {
 325         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 326         struct hdmi_spec *spec = codec->spec;
 327         struct hdmi_spec_per_pin *per_pin;
 328         struct hdmi_eld *eld;
 329         int pcm_idx;
 330
 331         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 332
 333         pcm_idx = kcontrol->private_value;
 334         mutex_lock(&spec->pcm_lock);
 335         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 336         if (!per_pin) {
 337                 /* no pin is bound to the pcm */
 338                 uinfo->count = 0;
 339                 goto unlock;
 340         }
 341         eld = &per_pin->sink_eld;
 342         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 343
 344  unlock:
 345         mutex_unlock(&spec->pcm_lock);
 346         return 0;
 347 }
 348
 349 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 350                         struct snd_ctl_elem_value *ucontrol)
 351 {
 352         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 353         struct hdmi_spec *spec = codec->spec;
 354         struct hdmi_spec_per_pin *per_pin;
 355         struct hdmi_eld *eld;
 356         int pcm_idx;
 357         int err = 0;
 358
 359         pcm_idx = kcontrol->private_value;
 360         mutex_lock(&spec->pcm_lock);
 361         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 362         if (!per_pin) {
 363                 /* no pin is bound to the pcm */
 364                 memset(ucontrol->value.bytes.data, 0,
 365                        ARRAY_SIZE(ucontrol->value.bytes.data));
 366                 goto unlock;
 367         }
 368
 369         eld = &per_pin->sink_eld;
 370         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
 371             eld->eld_size > ELD_MAX_SIZE) {
 372                 snd_BUG();
 373                 err = -EINVAL;
 374                 goto unlock;
 375         }
 376
 377         memset(ucontrol->value.bytes.data, 0,
 378                ARRAY_SIZE(ucontrol->value.bytes.data));
 379         if (eld->eld_valid)
 380                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 381                        eld->eld_size);
 382
 383  unlock:
 384         mutex_unlock(&spec->pcm_lock);
 385         return err;
 386 }
 387
 388 static const struct snd_kcontrol_new eld_bytes_ctl = {
 389         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 390         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 391         .name = "ELD",
 392         .info = hdmi_eld_ctl_info,
 393         .get = hdmi_eld_ctl_get,
 394 };
 395
 396 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
 397                         int device)
 398 {
 399         struct snd_kcontrol *kctl;
 400         struct hdmi_spec *spec = codec->spec;
 401         int err;
 402
 403         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 404         if (!kctl)
 405                 return -ENOMEM;
 406         kctl->private_value = pcm_idx;
 407         kctl->id.device = device;
 408
 409         /* no pin nid is associated with the kctl now
 410          * tbd: associate pin nid to eld ctl later
 411          */
 412         err = snd_hda_ctl_add(codec, 0, kctl);
 413         if (err < 0)
 414                 return err;
 415
 416         get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
 417         return 0;
 418 }
 419
 420 #ifdef BE_PARANOID
 421 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 422                                 int *packet_index, int *byte_index)
 423 {
 424         int val;
 425
 426         val = snd_hda_codec_read(codec, pin_nid, 0,
 427                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 428
 429         *packet_index = val >> 5;
 430         *byte_index = val & 0x1f;
 431 }
 432 #endif
 433
 434 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 435                                 int packet_index, int byte_index)
 436 {
 437         int val;
 438
 439         val = (packet_index << 5) | (byte_index & 0x1f);
 440
 441         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 442 }
 443
 444 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 445                                 unsigned char val)
 446 {
 447         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 448 }
 449
 450 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 451 {
 452         struct hdmi_spec *spec = codec->spec;
 453         int pin_out;
 454
 455         /* Unmute */
 456         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 457                 snd_hda_codec_write(codec, pin_nid, 0,
 458                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 459
 460         if (spec->dyn_pin_out)
 461                 /* Disable pin out until stream is active */
 462                 pin_out = 0;
 463         else
 464                 /* Enable pin out: some machines with GM965 gets broken output
 465                  * when the pin is disabled or changed while using with HDMI
 466                  */
 467                 pin_out = PIN_OUT;
 468
 469         snd_hda_codec_write(codec, pin_nid, 0,
 470                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 471 }
 472
 473 /*
 474  * ELD proc files
 475  */
 476
 477 #ifdef CONFIG_SND_PROC_FS
 478 static void print_eld_info(struct snd_info_entry *entry,
 479                            struct snd_info_buffer *buffer)
 480 {
 481         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 482
 483         mutex_lock(&per_pin->lock);
 484         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 485         mutex_unlock(&per_pin->lock);
 486 }
 487
 488 static void write_eld_info(struct snd_info_entry *entry,
 489                            struct snd_info_buffer *buffer)
 490 {
 491         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 492
 493         mutex_lock(&per_pin->lock);
 494         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 495         mutex_unlock(&per_pin->lock);
 496 }
 497
 498 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 499 {
 500         char name[32];
 501         struct hda_codec *codec = per_pin->codec;
 502         struct snd_info_entry *entry;
 503         int err;
 504
 505         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 506         err = snd_card_proc_new(codec->card, name, &entry);
 507         if (err < 0)
 508                 return err;
 509
 510         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 511         entry->c.text.write = write_eld_info;
 512         entry->mode |= 0200;
 513         per_pin->proc_entry = entry;
 514
 515         return 0;
 516 }
 517
 518 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 519 {
 520         if (!per_pin->codec->bus->shutdown) {
 521                 snd_info_free_entry(per_pin->proc_entry);
 522                 per_pin->proc_entry = NULL;
 523         }
 524 }
 525 #else
 526 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 527                                int index)
 528 {
 529         return 0;
 530 }
 531 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 532 {
 533 }
 534 #endif
 535
 536 /*
 537  * Audio InfoFrame routines
 538  */
 539
 540 /*
 541  * Enable Audio InfoFrame Transmission
 542  */
 543 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 544                                        hda_nid_t pin_nid)
 545 {
 546         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 547         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 548                                                 AC_DIPXMIT_BEST);
 549 }
 550
 551 /*
 552  * Disable Audio InfoFrame Transmission
 553  */
 554 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 555                                       hda_nid_t pin_nid)
 556 {
 557         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 558         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 559                                                 AC_DIPXMIT_DISABLE);
 560 }
 561
 562 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 563 {
 564 #ifdef CONFIG_SND_DEBUG_VERBOSE
 565         int i;
 566         int size;
 567
 568         size = snd_hdmi_get_eld_size(codec, pin_nid);
 569         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 570
 571         for (i = 0; i < 8; i++) {
 572                 size = snd_hda_codec_read(codec, pin_nid, 0,
 573                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 574                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 575         }
 576 #endif
 577 }
 578
 579 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 580 {
 581 #ifdef BE_PARANOID
 582         int i, j;
 583         int size;
 584         int pi, bi;
 585         for (i = 0; i < 8; i++) {
 586                 size = snd_hda_codec_read(codec, pin_nid, 0,
 587                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 588                 if (size == 0)
 589                         continue;
 590
 591                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 592                 for (j = 1; j < 1000; j++) {
 593                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 594                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 595                         if (pi != i)
 596                                 codec_dbg(codec, "dip index %d: %d != %d\n",
 597                                                 bi, pi, i);
 598                         if (bi == 0) /* byte index wrapped around */
 599                                 break;
 600                 }
 601                 codec_dbg(codec,
 602                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 603                         i, size, j);
 604         }
 605 #endif
 606 }
 607
 608 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 609 {
 610         u8 *bytes = (u8 *)hdmi_ai;
 611         u8 sum = 0;
 612         int i;
 613
 614         hdmi_ai->checksum = 0;
 615
 616         for (i = 0; i < sizeof(*hdmi_ai); i++)
 617                 sum += bytes[i];
 618
 619         hdmi_ai->checksum = -sum;
 620 }
 621
 622 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 623                                       hda_nid_t pin_nid,
 624                                       u8 *dip, int size)
 625 {
 626         int i;
 627
 628         hdmi_debug_dip_size(codec, pin_nid);
 629         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 630
 631         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 632         for (i = 0; i < size; i++)
 633                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 634 }
 635
 636 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 637                                     u8 *dip, int size)
 638 {
 639         u8 val;
 640         int i;
 641
 642         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 643                                                             != AC_DIPXMIT_BEST)
 644                 return false;
 645
 646         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 647         for (i = 0; i < size; i++) {
 648                 val = snd_hda_codec_read(codec, pin_nid, 0,
 649                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 650                 if (val != dip[i])
 651                         return false;
 652         }
 653
 654         return true;
 655 }
 656
 657 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
 658                                      hda_nid_t pin_nid,
 659                                      int ca, int active_channels,
 660                                      int conn_type)
 661 {
 662         union audio_infoframe ai;
 663
 664         memset(&ai, 0, sizeof(ai));
 665         if (conn_type == 0) { /* HDMI */
 666                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 667
 668                 hdmi_ai->type           = 0x84;
 669                 hdmi_ai->ver            = 0x01;
 670                 hdmi_ai->len            = 0x0a;
 671                 hdmi_ai->CC02_CT47      = active_channels - 1;
 672                 hdmi_ai->CA             = ca;
 673                 hdmi_checksum_audio_infoframe(hdmi_ai);
 674         } else if (conn_type == 1) { /* DisplayPort */
 675                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 676
 677                 dp_ai->type             = 0x84;
 678                 dp_ai->len              = 0x1b;
 679                 dp_ai->ver              = 0x11 << 2;
 680                 dp_ai->CC02_CT47        = active_channels - 1;
 681                 dp_ai->CA               = ca;
 682         } else {
 683                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
 684                             pin_nid);
 685                 return;
 686         }
 687
 688         /*
 689          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 690          * sizeof(*dp_ai) to avoid partial match/update problems when
 691          * the user switches between HDMI/DP monitors.
 692          */
 693         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 694                                         sizeof(ai))) {
 695                 codec_dbg(codec,
 696                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
 697                             pin_nid,
 698                             active_channels, ca);
 699                 hdmi_stop_infoframe_trans(codec, pin_nid);
 700                 hdmi_fill_audio_infoframe(codec, pin_nid,
 701                                             ai.bytes, sizeof(ai));
 702                 hdmi_start_infoframe_trans(codec, pin_nid);
 703         }
 704 }
 705
 706 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
 707                                        struct hdmi_spec_per_pin *per_pin,
 708                                        bool non_pcm)
 709 {
 710         struct hdmi_spec *spec = codec->spec;
 711         struct hdac_chmap *chmap = &spec->chmap;
 712         hda_nid_t pin_nid = per_pin->pin_nid;
 713         int channels = per_pin->channels;
 714         int active_channels;
 715         struct hdmi_eld *eld;
 716         int ca;
 717
 718         if (!channels)
 719                 return;
 720
 721         /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
 722         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 723                 snd_hda_codec_write(codec, pin_nid, 0,
 724                                             AC_VERB_SET_AMP_GAIN_MUTE,
 725                                             AMP_OUT_UNMUTE);
 726
 727         eld = &per_pin->sink_eld;
 728
 729         ca = snd_hdac_channel_allocation(&codec->core,
 730                         eld->info.spk_alloc, channels,
 731                         per_pin->chmap_set, non_pcm, per_pin->chmap);
 732
 733         active_channels = snd_hdac_get_active_channels(ca);
 734
 735         chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
 736                                                 active_channels);
 737
 738         /*
 739          * always configure channel mapping, it may have been changed by the
 740          * user in the meantime
 741          */
 742         snd_hdac_setup_channel_mapping(&spec->chmap,
 743                                 pin_nid, non_pcm, ca, channels,
 744                                 per_pin->chmap, per_pin->chmap_set);
 745
 746         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
 747                                       eld->info.conn_type);
 748
 749         per_pin->non_pcm = non_pcm;
 750 }
 751
 752 /*
 753  * Unsolicited events
 754  */
 755
 756 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 757
 758 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid,
 759                                       int dev_id)
 760 {
 761         struct hdmi_spec *spec = codec->spec;
 762         int pin_idx = pin_id_to_pin_index(codec, nid, dev_id);
 763
 764         if (pin_idx < 0)
 765                 return;
 766         mutex_lock(&spec->pcm_lock);
 767         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
 768                 snd_hda_jack_report_sync(codec);
 769         mutex_unlock(&spec->pcm_lock);
 770 }
 771
 772 static void jack_callback(struct hda_codec *codec,
 773                           struct hda_jack_callback *jack)
 774 {
 775         /* stop polling when notification is enabled */
 776         if (codec_has_acomp(codec))
 777                 return;
 778
 779         /* hda_jack don't support DP MST */
 780         check_presence_and_report(codec, jack->nid, 0);
 781 }
 782
 783 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 784 {
 785         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 786         struct hda_jack_tbl *jack;
 787         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 788
 789         /*
 790          * assume DP MST uses dyn_pcm_assign and acomp and
 791          * never comes here
 792          * if DP MST supports unsol event, below code need
 793          * consider dev_entry
 794          */
 795         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
 796         if (!jack)
 797                 return;
 798         jack->jack_dirty = 1;
 799
 800         codec_dbg(codec,
 801                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
 802                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
 803                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
 804
 805         /* hda_jack don't support DP MST */
 806         check_presence_and_report(codec, jack->nid, 0);
 807 }
 808
 809 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 810 {
 811         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 812         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 813         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 814         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 815
 816         codec_info(codec,
 817                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 818                 codec->addr,
 819                 tag,
 820                 subtag,
 821                 cp_state,
 822                 cp_ready);
 823
 824         /* TODO */
 825         if (cp_state)
 826                 ;
 827         if (cp_ready)
 828                 ;
 829 }
 830
 831
 832 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 833 {
 834         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 835         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 836
 837         if (codec_has_acomp(codec))
 838                 return;
 839
 840         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
 841                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
 842                 return;
 843         }
 844
 845         if (subtag == 0)
 846                 hdmi_intrinsic_event(codec, res);
 847         else
 848                 hdmi_non_intrinsic_event(codec, res);
 849 }
 850
 851 static void haswell_verify_D0(struct hda_codec *codec,
 852                 hda_nid_t cvt_nid, hda_nid_t nid)
 853 {
 854         int pwr;
 855
 856         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
 857          * thus pins could only choose converter 0 for use. Make sure the
 858          * converters are in correct power state */
 859         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
 860                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
 861
 862         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
 863                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
 864                                     AC_PWRST_D0);
 865                 msleep(40);
 866                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
 867                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
 868                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
 869         }
 870 }
 871
 872 /*
 873  * Callbacks
 874  */
 875
 876 /* HBR should be Non-PCM, 8 channels */
 877 #define is_hbr_format(format) \
 878         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 879
 880 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
 881                               bool hbr)
 882 {
 883         int pinctl, new_pinctl;
 884
 885         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 886                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 887                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 888
 889                 if (pinctl < 0)
 890                         return hbr ? -EINVAL : 0;
 891
 892                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 893                 if (hbr)
 894                         new_pinctl |= AC_PINCTL_EPT_HBR;
 895                 else
 896                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 897
 898                 codec_dbg(codec,
 899                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
 900                             pin_nid,
 901                             pinctl == new_pinctl ? "" : "new-",
 902                             new_pinctl);
 903
 904                 if (pinctl != new_pinctl)
 905                         snd_hda_codec_write(codec, pin_nid, 0,
 906                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 907                                             new_pinctl);
 908         } else if (hbr)
 909                 return -EINVAL;
 910
 911         return 0;
 912 }
 913
 914 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 915                               hda_nid_t pin_nid, u32 stream_tag, int format)
 916 {
 917         struct hdmi_spec *spec = codec->spec;
 918         unsigned int param;
 919         int err;
 920
 921         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
 922
 923         if (err) {
 924                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
 925                 return err;
 926         }
 927
 928         if (is_haswell_plus(codec)) {
 929
 930                 /*
 931                  * on recent platforms IEC Coding Type is required for HBR
 932                  * support, read current Digital Converter settings and set
 933                  * ICT bitfield if needed.
 934                  */
 935                 param = snd_hda_codec_read(codec, cvt_nid, 0,
 936                                            AC_VERB_GET_DIGI_CONVERT_1, 0);
 937
 938                 param = (param >> 16) & ~(AC_DIG3_ICT);
 939
 940                 /* on recent platforms ICT mode is required for HBR support */
 941                 if (is_hbr_format(format))
 942                         param |= 0x1;
 943
 944                 snd_hda_codec_write(codec, cvt_nid, 0,
 945                                     AC_VERB_SET_DIGI_CONVERT_3, param);
 946         }
 947
 948         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 949         return 0;
 950 }
 951
 952 /* Try to find an available converter
 953  * If pin_idx is less then zero, just try to find an available converter.
 954  * Otherwise, try to find an available converter and get the cvt mux index
 955  * of the pin.
 956  */
 957 static int hdmi_choose_cvt(struct hda_codec *codec,
 958                            int pin_idx, int *cvt_id)
 959 {
 960         struct hdmi_spec *spec = codec->spec;
 961         struct hdmi_spec_per_pin *per_pin;
 962         struct hdmi_spec_per_cvt *per_cvt = NULL;
 963         int cvt_idx, mux_idx = 0;
 964
 965         /* pin_idx < 0 means no pin will be bound to the converter */
 966         if (pin_idx < 0)
 967                 per_pin = NULL;
 968         else
 969                 per_pin = get_pin(spec, pin_idx);
 970
 971         /* Dynamically assign converter to stream */
 972         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
 973                 per_cvt = get_cvt(spec, cvt_idx);
 974
 975                 /* Must not already be assigned */
 976                 if (per_cvt->assigned)
 977                         continue;
 978                 if (per_pin == NULL)
 979                         break;
 980                 /* Must be in pin's mux's list of converters */
 981                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
 982                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
 983                                 break;
 984                 /* Not in mux list */
 985                 if (mux_idx == per_pin->num_mux_nids)
 986                         continue;
 987                 break;
 988         }
 989
 990         /* No free converters */
 991         if (cvt_idx == spec->num_cvts)
 992                 return -EBUSY;
 993
 994         if (per_pin != NULL)
 995                 per_pin->mux_idx = mux_idx;
 996
 997         if (cvt_id)
 998                 *cvt_id = cvt_idx;
 999
1000         return 0;
1001 }
1002
1003 /* Assure the pin select the right convetor */
1004 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1005                         struct hdmi_spec_per_pin *per_pin)
1006 {
1007         hda_nid_t pin_nid = per_pin->pin_nid;
1008         int mux_idx, curr;
1009
1010         mux_idx = per_pin->mux_idx;
1011         curr = snd_hda_codec_read(codec, pin_nid, 0,
1012                                           AC_VERB_GET_CONNECT_SEL, 0);
1013         if (curr != mux_idx)
1014                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1015                                             AC_VERB_SET_CONNECT_SEL,
1016                                             mux_idx);
1017 }
1018
1019 /* get the mux index for the converter of the pins
1020  * converter's mux index is the same for all pins on Intel platform
1021  */
1022 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1023                         hda_nid_t cvt_nid)
1024 {
1025         int i;
1026
1027         for (i = 0; i < spec->num_cvts; i++)
1028                 if (spec->cvt_nids[i] == cvt_nid)
1029                         return i;
1030         return -EINVAL;
1031 }
1032
1033 /* Intel HDMI workaround to fix audio routing issue:
1034  * For some Intel display codecs, pins share the same connection list.
1035  * So a conveter can be selected by multiple pins and playback on any of these
1036  * pins will generate sound on the external display, because audio flows from
1037  * the same converter to the display pipeline. Also muting one pin may make
1038  * other pins have no sound output.
1039  * So this function assures that an assigned converter for a pin is not selected
1040  * by any other pins.
1041  */
1042 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1043                                          hda_nid_t pin_nid,
1044                                          int dev_id, int mux_idx)
1045 {
1046         struct hdmi_spec *spec = codec->spec;
1047         hda_nid_t nid;
1048         int cvt_idx, curr;
1049         struct hdmi_spec_per_cvt *per_cvt;
1050         struct hdmi_spec_per_pin *per_pin;
1051         int pin_idx;
1052
1053         /* configure the pins connections */
1054         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1055                 int dev_id_saved;
1056                 int dev_num;
1057
1058                 per_pin = get_pin(spec, pin_idx);
1059                 /*
1060                  * pin not connected to monitor
1061                  * no need to operate on it
1062                  */
1063                 if (!per_pin->pcm)
1064                         continue;
1065
1066                 if ((per_pin->pin_nid == pin_nid) &&
1067                         (per_pin->dev_id == dev_id))
1068                         continue;
1069
1070                 /*
1071                  * if per_pin->dev_id >= dev_num,
1072                  * snd_hda_get_dev_select() will fail,
1073                  * and the following operation is unpredictable.
1074                  * So skip this situation.
1075                  */
1076                 dev_num = snd_hda_get_num_devices(codec, per_pin->pin_nid) + 1;
1077                 if (per_pin->dev_id >= dev_num)
1078                         continue;
1079
1080                 nid = per_pin->pin_nid;
1081
1082                 /*
1083                  * Calling this function should not impact
1084                  * on the device entry selection
1085                  * So let's save the dev id for each pin,
1086                  * and restore it when return
1087                  */
1088                 dev_id_saved = snd_hda_get_dev_select(codec, nid);
1089                 snd_hda_set_dev_select(codec, nid, per_pin->dev_id);
1090                 curr = snd_hda_codec_read(codec, nid, 0,
1091                                           AC_VERB_GET_CONNECT_SEL, 0);
1092                 if (curr != mux_idx) {
1093                         snd_hda_set_dev_select(codec, nid, dev_id_saved);
1094                         continue;
1095                 }
1096
1097
1098                 /* choose an unassigned converter. The conveters in the
1099                  * connection list are in the same order as in the codec.
1100                  */
1101                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1102                         per_cvt = get_cvt(spec, cvt_idx);
1103                         if (!per_cvt->assigned) {
1104                                 codec_dbg(codec,
1105                                           "choose cvt %d for pin nid %d\n",
1106                                         cvt_idx, nid);
1107                                 snd_hda_codec_write_cache(codec, nid, 0,
1108                                             AC_VERB_SET_CONNECT_SEL,
1109                                             cvt_idx);
1110                                 break;
1111                         }
1112                 }
1113                 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1114         }
1115 }
1116
1117 /* A wrapper of intel_not_share_asigned_cvt() */
1118 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1119                         hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid)
1120 {
1121         int mux_idx;
1122         struct hdmi_spec *spec = codec->spec;
1123
1124         /* On Intel platform, the mapping of converter nid to
1125          * mux index of the pins are always the same.
1126          * The pin nid may be 0, this means all pins will not
1127          * share the converter.
1128          */
1129         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1130         if (mux_idx >= 0)
1131                 intel_not_share_assigned_cvt(codec, pin_nid, dev_id, mux_idx);
1132 }
1133
1134 /* skeleton caller of pin_cvt_fixup ops */
1135 static void pin_cvt_fixup(struct hda_codec *codec,
1136                           struct hdmi_spec_per_pin *per_pin,
1137                           hda_nid_t cvt_nid)
1138 {
1139         struct hdmi_spec *spec = codec->spec;
1140
1141         if (spec->ops.pin_cvt_fixup)
1142                 spec->ops.pin_cvt_fixup(codec, per_pin, cvt_nid);
1143 }
1144
1145 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1146  * in dyn_pcm_assign mode.
1147  */
1148 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1149                          struct hda_codec *codec,
1150                          struct snd_pcm_substream *substream)
1151 {
1152         struct hdmi_spec *spec = codec->spec;
1153         struct snd_pcm_runtime *runtime = substream->runtime;
1154         int cvt_idx, pcm_idx;
1155         struct hdmi_spec_per_cvt *per_cvt = NULL;
1156         int err;
1157
1158         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1159         if (pcm_idx < 0)
1160                 return -EINVAL;
1161
1162         err = hdmi_choose_cvt(codec, -1, &cvt_idx);
1163         if (err)
1164                 return err;
1165
1166         per_cvt = get_cvt(spec, cvt_idx);
1167         per_cvt->assigned = 1;
1168         hinfo->nid = per_cvt->cvt_nid;
1169
1170         pin_cvt_fixup(codec, NULL, per_cvt->cvt_nid);
1171
1172         set_bit(pcm_idx, &spec->pcm_in_use);
1173         /* todo: setup spdif ctls assign */
1174
1175         /* Initially set the converter's capabilities */
1176         hinfo->channels_min = per_cvt->channels_min;
1177         hinfo->channels_max = per_cvt->channels_max;
1178         hinfo->rates = per_cvt->rates;
1179         hinfo->formats = per_cvt->formats;
1180         hinfo->maxbps = per_cvt->maxbps;
1181
1182         /* Store the updated parameters */
1183         runtime->hw.channels_min = hinfo->channels_min;
1184         runtime->hw.channels_max = hinfo->channels_max;
1185         runtime->hw.formats = hinfo->formats;
1186         runtime->hw.rates = hinfo->rates;
1187
1188         snd_pcm_hw_constraint_step(substream->runtime, 0,
1189                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1190         return 0;
1191 }
1192
1193 /*
1194  * HDA PCM callbacks
1195  */
1196 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1197                          struct hda_codec *codec,
1198                          struct snd_pcm_substream *substream)
1199 {
1200         struct hdmi_spec *spec = codec->spec;
1201         struct snd_pcm_runtime *runtime = substream->runtime;
1202         int pin_idx, cvt_idx, pcm_idx;
1203         struct hdmi_spec_per_pin *per_pin;
1204         struct hdmi_eld *eld;
1205         struct hdmi_spec_per_cvt *per_cvt = NULL;
1206         int err;
1207
1208         /* Validate hinfo */
1209         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1210         if (pcm_idx < 0)
1211                 return -EINVAL;
1212
1213         mutex_lock(&spec->pcm_lock);
1214         pin_idx = hinfo_to_pin_index(codec, hinfo);
1215         if (!spec->dyn_pcm_assign) {
1216                 if (snd_BUG_ON(pin_idx < 0)) {
1217                         err = -EINVAL;
1218                         goto unlock;
1219                 }
1220         } else {
1221                 /* no pin is assigned to the PCM
1222                  * PA need pcm open successfully when probe
1223                  */
1224                 if (pin_idx < 0) {
1225                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1226                         goto unlock;
1227                 }
1228         }
1229
1230         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1231         if (err < 0)
1232                 goto unlock;
1233
1234         per_cvt = get_cvt(spec, cvt_idx);
1235         /* Claim converter */
1236         per_cvt->assigned = 1;
1237
1238         set_bit(pcm_idx, &spec->pcm_in_use);
1239         per_pin = get_pin(spec, pin_idx);
1240         per_pin->cvt_nid = per_cvt->cvt_nid;
1241         hinfo->nid = per_cvt->cvt_nid;
1242
1243         snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1244         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1245                             AC_VERB_SET_CONNECT_SEL,
1246                             per_pin->mux_idx);
1247
1248         /* configure unused pins to choose other converters */
1249         pin_cvt_fixup(codec, per_pin, 0);
1250
1251         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1252
1253         /* Initially set the converter's capabilities */
1254         hinfo->channels_min = per_cvt->channels_min;
1255         hinfo->channels_max = per_cvt->channels_max;
1256         hinfo->rates = per_cvt->rates;
1257         hinfo->formats = per_cvt->formats;
1258         hinfo->maxbps = per_cvt->maxbps;
1259
1260         eld = &per_pin->sink_eld;
1261         /* Restrict capabilities by ELD if this isn't disabled */
1262         if (!static_hdmi_pcm && eld->eld_valid) {
1263                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1264                 if (hinfo->channels_min > hinfo->channels_max ||
1265                     !hinfo->rates || !hinfo->formats) {
1266                         per_cvt->assigned = 0;
1267                         hinfo->nid = 0;
1268                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1269                         err = -ENODEV;
1270                         goto unlock;
1271                 }
1272         }
1273
1274         /* Store the updated parameters */
1275         runtime->hw.channels_min = hinfo->channels_min;
1276         runtime->hw.channels_max = hinfo->channels_max;
1277         runtime->hw.formats = hinfo->formats;
1278         runtime->hw.rates = hinfo->rates;
1279
1280         snd_pcm_hw_constraint_step(substream->runtime, 0,
1281                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1282  unlock:
1283         mutex_unlock(&spec->pcm_lock);
1284         return err;
1285 }
1286
1287 /*
1288  * HDA/HDMI auto parsing
1289  */
1290 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1291 {
1292         struct hdmi_spec *spec = codec->spec;
1293         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1294         hda_nid_t pin_nid = per_pin->pin_nid;
1295
1296         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1297                 codec_warn(codec,
1298                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1299                            pin_nid, get_wcaps(codec, pin_nid));
1300                 return -EINVAL;
1301         }
1302
1303         /* all the device entries on the same pin have the same conn list */
1304         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1305                                                         per_pin->mux_nids,
1306                                                         HDA_MAX_CONNECTIONS);
1307
1308         return 0;
1309 }
1310
1311 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1312                                 struct hdmi_spec_per_pin *per_pin)
1313 {
1314         int i;
1315
1316         /* try the prefer PCM */
1317         if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1318                 return per_pin->pin_nid_idx;
1319
1320         /* have a second try; check the "reserved area" over num_pins */
1321         for (i = spec->num_nids; i < spec->pcm_used; i++) {
1322                 if (!test_bit(i, &spec->pcm_bitmap))
1323                         return i;
1324         }
1325
1326         /* the last try; check the empty slots in pins */
1327         for (i = 0; i < spec->num_nids; i++) {
1328                 if (!test_bit(i, &spec->pcm_bitmap))
1329                         return i;
1330         }
1331         return -EBUSY;
1332 }
1333
1334 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1335                                 struct hdmi_spec_per_pin *per_pin)
1336 {
1337         int idx;
1338
1339         /* pcm already be attached to the pin */
1340         if (per_pin->pcm)
1341                 return;
1342         idx = hdmi_find_pcm_slot(spec, per_pin);
1343         if (idx == -EBUSY)
1344                 return;
1345         per_pin->pcm_idx = idx;
1346         per_pin->pcm = get_hdmi_pcm(spec, idx);
1347         set_bit(idx, &spec->pcm_bitmap);
1348 }
1349
1350 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1351                                 struct hdmi_spec_per_pin *per_pin)
1352 {
1353         int idx;
1354
1355         /* pcm already be detached from the pin */
1356         if (!per_pin->pcm)
1357                 return;
1358         idx = per_pin->pcm_idx;
1359         per_pin->pcm_idx = -1;
1360         per_pin->pcm = NULL;
1361         if (idx >= 0 && idx < spec->pcm_used)
1362                 clear_bit(idx, &spec->pcm_bitmap);
1363 }
1364
1365 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1366                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1367 {
1368         int mux_idx;
1369
1370         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1371                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1372                         break;
1373         return mux_idx;
1374 }
1375
1376 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1377
1378 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1379                            struct hdmi_spec_per_pin *per_pin)
1380 {
1381         struct hda_codec *codec = per_pin->codec;
1382         struct hda_pcm *pcm;
1383         struct hda_pcm_stream *hinfo;
1384         struct snd_pcm_substream *substream;
1385         int mux_idx;
1386         bool non_pcm;
1387
1388         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1389                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1390         else
1391                 return;
1392         if (!pcm->pcm)
1393                 return;
1394         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1395                 return;
1396
1397         /* hdmi audio only uses playback and one substream */
1398         hinfo = pcm->stream;
1399         substream = pcm->pcm->streams[0].substream;
1400
1401         per_pin->cvt_nid = hinfo->nid;
1402
1403         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1404         if (mux_idx < per_pin->num_mux_nids) {
1405                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1406                                    per_pin->dev_id);
1407                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1408                                 AC_VERB_SET_CONNECT_SEL,
1409                                 mux_idx);
1410         }
1411         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1412
1413         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1414         if (substream->runtime)
1415                 per_pin->channels = substream->runtime->channels;
1416         per_pin->setup = true;
1417         per_pin->mux_idx = mux_idx;
1418
1419         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1420 }
1421
1422 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1423                            struct hdmi_spec_per_pin *per_pin)
1424 {
1425         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1426                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1427
1428         per_pin->chmap_set = false;
1429         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1430
1431         per_pin->setup = false;
1432         per_pin->channels = 0;
1433 }
1434
1435 /* update per_pin ELD from the given new ELD;
1436  * setup info frame and notification accordingly
1437  */
1438 static bool update_eld(struct hda_codec *codec,
1439                        struct hdmi_spec_per_pin *per_pin,
1440                        struct hdmi_eld *eld)
1441 {
1442         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1443         struct hdmi_spec *spec = codec->spec;
1444         bool old_eld_valid = pin_eld->eld_valid;
1445         bool eld_changed;
1446         int pcm_idx;
1447
1448         /* for monitor disconnection, save pcm_idx firstly */
1449         pcm_idx = per_pin->pcm_idx;
1450         if (spec->dyn_pcm_assign) {
1451                 if (eld->eld_valid) {
1452                         hdmi_attach_hda_pcm(spec, per_pin);
1453                         hdmi_pcm_setup_pin(spec, per_pin);
1454                 } else {
1455                         hdmi_pcm_reset_pin(spec, per_pin);
1456                         hdmi_detach_hda_pcm(spec, per_pin);
1457                 }
1458         }
1459         /* if pcm_idx == -1, it means this is in monitor connection event
1460          * we can get the correct pcm_idx now.
1461          */
1462         if (pcm_idx == -1)
1463                 pcm_idx = per_pin->pcm_idx;
1464
1465         if (eld->eld_valid)
1466                 snd_hdmi_show_eld(codec, &eld->info);
1467
1468         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1469         eld_changed |= (pin_eld->monitor_present != eld->monitor_present);
1470         if (!eld_changed && eld->eld_valid && pin_eld->eld_valid)
1471                 if (pin_eld->eld_size != eld->eld_size ||
1472                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1473                            eld->eld_size) != 0)
1474                         eld_changed = true;
1475
1476         if (eld_changed) {
1477                 pin_eld->monitor_present = eld->monitor_present;
1478                 pin_eld->eld_valid = eld->eld_valid;
1479                 pin_eld->eld_size = eld->eld_size;
1480                 if (eld->eld_valid)
1481                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1482                                eld->eld_size);
1483                 pin_eld->info = eld->info;
1484         }
1485
1486         /*
1487          * Re-setup pin and infoframe. This is needed e.g. when
1488          * - sink is first plugged-in
1489          * - transcoder can change during stream playback on Haswell
1490          *   and this can make HW reset converter selection on a pin.
1491          */
1492         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1493                 pin_cvt_fixup(codec, per_pin, 0);
1494                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1495         }
1496
1497         if (eld_changed && pcm_idx >= 0)
1498                 snd_ctl_notify(codec->card,
1499                                SNDRV_CTL_EVENT_MASK_VALUE |
1500                                SNDRV_CTL_EVENT_MASK_INFO,
1501                                &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1502         return eld_changed;
1503 }
1504
1505 /* update ELD and jack state via HD-audio verbs */
1506 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1507                                          int repoll)
1508 {
1509         struct hda_jack_tbl *jack;
1510         struct hda_codec *codec = per_pin->codec;
1511         struct hdmi_spec *spec = codec->spec;
1512         struct hdmi_eld *eld = &spec->temp_eld;
1513         hda_nid_t pin_nid = per_pin->pin_nid;
1514         /*
1515          * Always execute a GetPinSense verb here, even when called from
1516          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1517          * response's PD bit is not the real PD value, but indicates that
1518          * the real PD value changed. An older version of the HD-audio
1519          * specification worked this way. Hence, we just ignore the data in
1520          * the unsolicited response to avoid custom WARs.
1521          */
1522         int present;
1523         bool ret;
1524         bool do_repoll = false;
1525
1526         present = snd_hda_pin_sense(codec, pin_nid);
1527
1528         mutex_lock(&per_pin->lock);
1529         eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1530         if (eld->monitor_present)
1531                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1532         else
1533                 eld->eld_valid = false;
1534
1535         codec_dbg(codec,
1536                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1537                 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
1538
1539         if (eld->eld_valid) {
1540                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1541                                                      &eld->eld_size) < 0)
1542                         eld->eld_valid = false;
1543                 else {
1544                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1545                                                     eld->eld_size) < 0)
1546                                 eld->eld_valid = false;
1547                 }
1548                 if (!eld->eld_valid && repoll)
1549                         do_repoll = true;
1550         }
1551
1552         if (do_repoll)
1553                 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1554         else
1555                 update_eld(codec, per_pin, eld);
1556
1557         ret = !repoll || !eld->monitor_present || eld->eld_valid;
1558
1559         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1560         if (jack) {
1561                 jack->block_report = !ret;
1562                 jack->pin_sense = (eld->monitor_present && eld->eld_valid) ?
1563                         AC_PINSENSE_PRESENCE : 0;
1564         }
1565         mutex_unlock(&per_pin->lock);
1566         return ret;
1567 }
1568
1569 static struct snd_jack *pin_idx_to_jack(struct hda_codec *codec,
1570                                  struct hdmi_spec_per_pin *per_pin)
1571 {
1572         struct hdmi_spec *spec = codec->spec;
1573         struct snd_jack *jack = NULL;
1574         struct hda_jack_tbl *jack_tbl;
1575
1576         /* if !dyn_pcm_assign, get jack from hda_jack_tbl
1577          * in !dyn_pcm_assign case, spec->pcm_rec[].jack is not
1578          * NULL even after snd_hda_jack_tbl_clear() is called to
1579          * free snd_jack. This may cause access invalid memory
1580          * when calling snd_jack_report
1581          */
1582         if (per_pin->pcm_idx >= 0 && spec->dyn_pcm_assign)
1583                 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1584         else if (!spec->dyn_pcm_assign) {
1585                 /*
1586                  * jack tbl doesn't support DP MST
1587                  * DP MST will use dyn_pcm_assign,
1588                  * so DP MST will never come here
1589                  */
1590                 jack_tbl = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1591                 if (jack_tbl)
1592                         jack = jack_tbl->jack;
1593         }
1594         return jack;
1595 }
1596
1597 /* update ELD and jack state via audio component */
1598 static void sync_eld_via_acomp(struct hda_codec *codec,
1599                                struct hdmi_spec_per_pin *per_pin)
1600 {
1601         struct hdmi_spec *spec = codec->spec;
1602         struct hdmi_eld *eld = &spec->temp_eld;
1603         struct snd_jack *jack = NULL;
1604         bool changed;
1605         int size;
1606
1607         mutex_lock(&per_pin->lock);
1608         eld->monitor_present = false;
1609         size = snd_hdac_acomp_get_eld(&codec->core, per_pin->pin_nid,
1610                                       per_pin->dev_id, &eld->monitor_present,
1611                                       eld->eld_buffer, ELD_MAX_SIZE);
1612         if (size > 0) {
1613                 size = min(size, ELD_MAX_SIZE);
1614                 if (snd_hdmi_parse_eld(codec, &eld->info,
1615                                        eld->eld_buffer, size) < 0)
1616                         size = -EINVAL;
1617         }
1618
1619         if (size > 0) {
1620                 eld->eld_valid = true;
1621                 eld->eld_size = size;
1622         } else {
1623                 eld->eld_valid = false;
1624                 eld->eld_size = 0;
1625         }
1626
1627         /* pcm_idx >=0 before update_eld() means it is in monitor
1628          * disconnected event. Jack must be fetched before update_eld()
1629          */
1630         jack = pin_idx_to_jack(codec, per_pin);
1631         changed = update_eld(codec, per_pin, eld);
1632         if (jack == NULL)
1633                 jack = pin_idx_to_jack(codec, per_pin);
1634         if (changed && jack)
1635                 snd_jack_report(jack,
1636                                 (eld->monitor_present && eld->eld_valid) ?
1637                                 SND_JACK_AVOUT : 0);
1638         mutex_unlock(&per_pin->lock);
1639 }
1640
1641 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1642 {
1643         struct hda_codec *codec = per_pin->codec;
1644         int ret;
1645
1646         /* no temporary power up/down needed for component notifier */
1647         if (!codec_has_acomp(codec)) {
1648                 ret = snd_hda_power_up_pm(codec);
1649                 if (ret < 0 && pm_runtime_suspended(hda_codec_dev(codec))) {
1650                         snd_hda_power_down_pm(codec);
1651                         return false;
1652                 }
1653                 ret = hdmi_present_sense_via_verbs(per_pin, repoll);
1654                 snd_hda_power_down_pm(codec);
1655         } else {
1656                 sync_eld_via_acomp(codec, per_pin);
1657                 ret = false; /* don't call snd_hda_jack_report_sync() */
1658         }
1659
1660         return ret;
1661 }
1662
1663 static void hdmi_repoll_eld(struct work_struct *work)
1664 {
1665         struct hdmi_spec_per_pin *per_pin =
1666         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1667         struct hda_codec *codec = per_pin->codec;
1668         struct hdmi_spec *spec = codec->spec;
1669         struct hda_jack_tbl *jack;
1670
1671         jack = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1672         if (jack)
1673                 jack->jack_dirty = 1;
1674
1675         if (per_pin->repoll_count++ > 6)
1676                 per_pin->repoll_count = 0;
1677
1678         mutex_lock(&spec->pcm_lock);
1679         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1680                 snd_hda_jack_report_sync(per_pin->codec);
1681         mutex_unlock(&spec->pcm_lock);
1682 }
1683
1684 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1685                                              hda_nid_t nid);
1686
1687 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1688 {
1689         struct hdmi_spec *spec = codec->spec;
1690         unsigned int caps, config;
1691         int pin_idx;
1692         struct hdmi_spec_per_pin *per_pin;
1693         int err;
1694         int dev_num, i;
1695
1696         caps = snd_hda_query_pin_caps(codec, pin_nid);
1697         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1698                 return 0;
1699
1700         /*
1701          * For DP MST audio, Configuration Default is the same for
1702          * all device entries on the same pin
1703          */
1704         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1705         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1706                 return 0;
1707
1708         /*
1709          * To simplify the implementation, malloc all
1710          * the virtual pins in the initialization statically
1711          */
1712         if (is_haswell_plus(codec)) {
1713                 /*
1714                  * On Intel platforms, device entries number is
1715                  * changed dynamically. If there is a DP MST
1716                  * hub connected, the device entries number is 3.
1717                  * Otherwise, it is 1.
1718                  * Here we manually set dev_num to 3, so that
1719                  * we can initialize all the device entries when
1720                  * bootup statically.
1721                  */
1722                 dev_num = 3;
1723                 spec->dev_num = 3;
1724         } else if (spec->dyn_pcm_assign && codec->dp_mst) {
1725                 dev_num = snd_hda_get_num_devices(codec, pin_nid) + 1;
1726                 /*
1727                  * spec->dev_num is the maxinum number of device entries
1728                  * among all the pins
1729                  */
1730                 spec->dev_num = (spec->dev_num > dev_num) ?
1731                         spec->dev_num : dev_num;
1732         } else {
1733                 /*
1734                  * If the platform doesn't support DP MST,
1735                  * manually set dev_num to 1. This means
1736                  * the pin has only one device entry.
1737                  */
1738                 dev_num = 1;
1739                 spec->dev_num = 1;
1740         }
1741
1742         for (i = 0; i < dev_num; i++) {
1743                 pin_idx = spec->num_pins;
1744                 per_pin = snd_array_new(&spec->pins);
1745
1746                 if (!per_pin)
1747                         return -ENOMEM;
1748
1749                 if (spec->dyn_pcm_assign) {
1750                         per_pin->pcm = NULL;
1751                         per_pin->pcm_idx = -1;
1752                 } else {
1753                         per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1754                         per_pin->pcm_idx = pin_idx;
1755                 }
1756                 per_pin->pin_nid = pin_nid;
1757                 per_pin->pin_nid_idx = spec->num_nids;
1758                 per_pin->dev_id = i;
1759                 per_pin->non_pcm = false;
1760                 snd_hda_set_dev_select(codec, pin_nid, i);
1761                 if (is_haswell_plus(codec))
1762                         intel_haswell_fixup_connect_list(codec, pin_nid);
1763                 err = hdmi_read_pin_conn(codec, pin_idx);
1764                 if (err < 0)
1765                         return err;
1766                 spec->num_pins++;
1767         }
1768         spec->num_nids++;
1769
1770         return 0;
1771 }
1772
1773 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1774 {
1775         struct hdmi_spec *spec = codec->spec;
1776         struct hdmi_spec_per_cvt *per_cvt;
1777         unsigned int chans;
1778         int err;
1779
1780         chans = get_wcaps(codec, cvt_nid);
1781         chans = get_wcaps_channels(chans);
1782
1783         per_cvt = snd_array_new(&spec->cvts);
1784         if (!per_cvt)
1785                 return -ENOMEM;
1786
1787         per_cvt->cvt_nid = cvt_nid;
1788         per_cvt->channels_min = 2;
1789         if (chans <= 16) {
1790                 per_cvt->channels_max = chans;
1791                 if (chans > spec->chmap.channels_max)
1792                         spec->chmap.channels_max = chans;
1793         }
1794
1795         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1796                                           &per_cvt->rates,
1797                                           &per_cvt->formats,
1798                                           &per_cvt->maxbps);
1799         if (err < 0)
1800                 return err;
1801
1802         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1803                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1804         spec->num_cvts++;
1805
1806         return 0;
1807 }
1808
1809 static int hdmi_parse_codec(struct hda_codec *codec)
1810 {
1811         hda_nid_t nid;
1812         int i, nodes;
1813
1814         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
1815         if (!nid || nodes < 0) {
1816                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1817                 return -EINVAL;
1818         }
1819
1820         for (i = 0; i < nodes; i++, nid++) {
1821                 unsigned int caps;
1822                 unsigned int type;
1823
1824                 caps = get_wcaps(codec, nid);
1825                 type = get_wcaps_type(caps);
1826
1827                 if (!(caps & AC_WCAP_DIGITAL))
1828                         continue;
1829
1830                 switch (type) {
1831                 case AC_WID_AUD_OUT:
1832                         hdmi_add_cvt(codec, nid);
1833                         break;
1834                 case AC_WID_PIN:
1835                         hdmi_add_pin(codec, nid);
1836                         break;
1837                 }
1838         }
1839
1840         return 0;
1841 }
1842
1843 /*
1844  */
1845 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1846 {
1847         struct hda_spdif_out *spdif;
1848         bool non_pcm;
1849
1850         mutex_lock(&codec->spdif_mutex);
1851         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1852         /* Add sanity check to pass klockwork check.
1853          * This should never happen.
1854          */
1855         if (WARN_ON(spdif == NULL))
1856                 return true;
1857         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1858         mutex_unlock(&codec->spdif_mutex);
1859         return non_pcm;
1860 }
1861
1862 /*
1863  * HDMI callbacks
1864  */
1865
1866 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1867                                            struct hda_codec *codec,
1868                                            unsigned int stream_tag,
1869                                            unsigned int format,
1870                                            struct snd_pcm_substream *substream)
1871 {
1872         hda_nid_t cvt_nid = hinfo->nid;
1873         struct hdmi_spec *spec = codec->spec;
1874         int pin_idx;
1875         struct hdmi_spec_per_pin *per_pin;
1876         hda_nid_t pin_nid;
1877         struct snd_pcm_runtime *runtime = substream->runtime;
1878         bool non_pcm;
1879         int pinctl, stripe;
1880         int err = 0;
1881
1882         mutex_lock(&spec->pcm_lock);
1883         pin_idx = hinfo_to_pin_index(codec, hinfo);
1884         if (spec->dyn_pcm_assign && pin_idx < 0) {
1885                 /* when dyn_pcm_assign and pcm is not bound to a pin
1886                  * skip pin setup and return 0 to make audio playback
1887                  * be ongoing
1888                  */
1889                 pin_cvt_fixup(codec, NULL, cvt_nid);
1890                 snd_hda_codec_setup_stream(codec, cvt_nid,
1891                                         stream_tag, 0, format);
1892                 goto unlock;
1893         }
1894
1895         if (snd_BUG_ON(pin_idx < 0)) {
1896                 err = -EINVAL;
1897                 goto unlock;
1898         }
1899         per_pin = get_pin(spec, pin_idx);
1900         pin_nid = per_pin->pin_nid;
1901
1902         /* Verify pin:cvt selections to avoid silent audio after S3.
1903          * After S3, the audio driver restores pin:cvt selections
1904          * but this can happen before gfx is ready and such selection
1905          * is overlooked by HW. Thus multiple pins can share a same
1906          * default convertor and mute control will affect each other,
1907          * which can cause a resumed audio playback become silent
1908          * after S3.
1909          */
1910         pin_cvt_fixup(codec, per_pin, 0);
1911
1912         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1913         /* Todo: add DP1.2 MST audio support later */
1914         if (codec_has_acomp(codec))
1915                 snd_hdac_sync_audio_rate(&codec->core, pin_nid, per_pin->dev_id,
1916                                          runtime->rate);
1917
1918         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1919         mutex_lock(&per_pin->lock);
1920         per_pin->channels = substream->runtime->channels;
1921         per_pin->setup = true;
1922
1923         if (get_wcaps(codec, cvt_nid) & AC_WCAP_STRIPE) {
1924                 stripe = snd_hdac_get_stream_stripe_ctl(&codec->bus->core,
1925                                                         substream);
1926                 snd_hda_codec_write(codec, cvt_nid, 0,
1927                                     AC_VERB_SET_STRIPE_CONTROL,
1928                                     stripe);
1929         }
1930
1931         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1932         mutex_unlock(&per_pin->lock);
1933         if (spec->dyn_pin_out) {
1934                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1935                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1936                 snd_hda_codec_write(codec, pin_nid, 0,
1937                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1938                                     pinctl | PIN_OUT);
1939         }
1940
1941         /* snd_hda_set_dev_select() has been called before */
1942         err = spec->ops.setup_stream(codec, cvt_nid, pin_nid,
1943                                  stream_tag, format);
1944  unlock:
1945         mutex_unlock(&spec->pcm_lock);
1946         return err;
1947 }
1948
1949 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1950                                              struct hda_codec *codec,
1951                                              struct snd_pcm_substream *substream)
1952 {
1953         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1954         return 0;
1955 }
1956
1957 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1958                           struct hda_codec *codec,
1959                           struct snd_pcm_substream *substream)
1960 {
1961         struct hdmi_spec *spec = codec->spec;
1962         int cvt_idx, pin_idx, pcm_idx;
1963         struct hdmi_spec_per_cvt *per_cvt;
1964         struct hdmi_spec_per_pin *per_pin;
1965         int pinctl;
1966         int err = 0;
1967
1968         if (hinfo->nid) {
1969                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1970                 if (snd_BUG_ON(pcm_idx < 0))
1971                         return -EINVAL;
1972                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
1973                 if (snd_BUG_ON(cvt_idx < 0))
1974                         return -EINVAL;
1975                 per_cvt = get_cvt(spec, cvt_idx);
1976
1977                 snd_BUG_ON(!per_cvt->assigned);
1978                 per_cvt->assigned = 0;
1979                 hinfo->nid = 0;
1980
1981                 mutex_lock(&spec->pcm_lock);
1982                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1983                 clear_bit(pcm_idx, &spec->pcm_in_use);
1984                 pin_idx = hinfo_to_pin_index(codec, hinfo);
1985                 if (spec->dyn_pcm_assign && pin_idx < 0)
1986                         goto unlock;
1987
1988                 if (snd_BUG_ON(pin_idx < 0)) {
1989                         err = -EINVAL;
1990                         goto unlock;
1991                 }
1992                 per_pin = get_pin(spec, pin_idx);
1993
1994                 if (spec->dyn_pin_out) {
1995                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1996                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1997                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1998                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1999                                             pinctl & ~PIN_OUT);
2000                 }
2001
2002                 mutex_lock(&per_pin->lock);
2003                 per_pin->chmap_set = false;
2004                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
2005
2006                 per_pin->setup = false;
2007                 per_pin->channels = 0;
2008                 mutex_unlock(&per_pin->lock);
2009         unlock:
2010                 mutex_unlock(&spec->pcm_lock);
2011         }
2012
2013         return err;
2014 }
2015
2016 static const struct hda_pcm_ops generic_ops = {
2017         .open = hdmi_pcm_open,
2018         .close = hdmi_pcm_close,
2019         .prepare = generic_hdmi_playback_pcm_prepare,
2020         .cleanup = generic_hdmi_playback_pcm_cleanup,
2021 };
2022
2023 static int hdmi_get_spk_alloc(struct hdac_device *hdac, int pcm_idx)
2024 {
2025         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2026         struct hdmi_spec *spec = codec->spec;
2027         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2028
2029         if (!per_pin)
2030                 return 0;
2031
2032         return per_pin->sink_eld.info.spk_alloc;
2033 }
2034
2035 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
2036                                         unsigned char *chmap)
2037 {
2038         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2039         struct hdmi_spec *spec = codec->spec;
2040         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2041
2042         /* chmap is already set to 0 in caller */
2043         if (!per_pin)
2044                 return;
2045
2046         memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
2047 }
2048
2049 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
2050                                 unsigned char *chmap, int prepared)
2051 {
2052         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2053         struct hdmi_spec *spec = codec->spec;
2054         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2055
2056         if (!per_pin)
2057                 return;
2058         mutex_lock(&per_pin->lock);
2059         per_pin->chmap_set = true;
2060         memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
2061         if (prepared)
2062                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2063         mutex_unlock(&per_pin->lock);
2064 }
2065
2066 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
2067 {
2068         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2069         struct hdmi_spec *spec = codec->spec;
2070         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2071
2072         return per_pin ? true:false;
2073 }
2074
2075 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2076 {
2077         struct hdmi_spec *spec = codec->spec;
2078         int idx, pcm_num;
2079
2080         /*
2081          * for non-mst mode, pcm number is the same as before
2082          * for DP MST mode without extra PCM, pcm number is same
2083          * for DP MST mode with extra PCMs, pcm number is
2084          *  (nid number + dev_num - 1)
2085          * dev_num is the device entry number in a pin
2086          */
2087
2088         if (codec->mst_no_extra_pcms)
2089                 pcm_num = spec->num_nids;
2090         else
2091                 pcm_num = spec->num_nids + spec->dev_num - 1;
2092
2093         codec_dbg(codec, "hdmi: pcm_num set to %d\n", pcm_num);
2094
2095         for (idx = 0; idx < pcm_num; idx++) {
2096                 struct hda_pcm *info;
2097                 struct hda_pcm_stream *pstr;
2098
2099                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", idx);
2100                 if (!info)
2101                         return -ENOMEM;
2102
2103                 spec->pcm_rec[idx].pcm = info;
2104                 spec->pcm_used++;
2105                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2106                 info->own_chmap = true;
2107
2108                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2109                 pstr->substreams = 1;
2110                 pstr->ops = generic_ops;
2111                 /* pcm number is less than 16 */
2112                 if (spec->pcm_used >= 16)
2113                         break;
2114                 /* other pstr fields are set in open */
2115         }
2116
2117         return 0;
2118 }
2119
2120 static void free_hdmi_jack_priv(struct snd_jack *jack)
2121 {
2122         struct hdmi_pcm *pcm = jack->private_data;
2123
2124         pcm->jack = NULL;
2125 }
2126
2127 static int add_hdmi_jack_kctl(struct hda_codec *codec,
2128                                struct hdmi_spec *spec,
2129                                int pcm_idx,
2130                                const char *name)
2131 {
2132         struct snd_jack *jack;
2133         int err;
2134
2135         err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
2136                            true, false);
2137         if (err < 0)
2138                 return err;
2139
2140         spec->pcm_rec[pcm_idx].jack = jack;
2141         jack->private_data = &spec->pcm_rec[pcm_idx];
2142         jack->private_free = free_hdmi_jack_priv;
2143         return 0;
2144 }
2145
2146 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2147 {
2148         char hdmi_str[32] = "HDMI/DP";
2149         struct hdmi_spec *spec = codec->spec;
2150         struct hdmi_spec_per_pin *per_pin;
2151         struct hda_jack_tbl *jack;
2152         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2153         bool phantom_jack;
2154         int ret;
2155
2156         if (pcmdev > 0)
2157                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2158
2159         if (spec->dyn_pcm_assign)
2160                 return add_hdmi_jack_kctl(codec, spec, pcm_idx, hdmi_str);
2161
2162         /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
2163         /* if !dyn_pcm_assign, it must be non-MST mode.
2164          * This means pcms and pins are statically mapped.
2165          * And pcm_idx is pin_idx.
2166          */
2167         per_pin = get_pin(spec, pcm_idx);
2168         phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
2169         if (phantom_jack)
2170                 strncat(hdmi_str, " Phantom",
2171                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2172         ret = snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str,
2173                                     phantom_jack, 0, NULL);
2174         if (ret < 0)
2175                 return ret;
2176         jack = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
2177         if (jack == NULL)
2178                 return 0;
2179         /* assign jack->jack to pcm_rec[].jack to
2180          * align with dyn_pcm_assign mode
2181          */
2182         spec->pcm_rec[pcm_idx].jack = jack->jack;
2183         return 0;
2184 }
2185
2186 static int generic_hdmi_build_controls(struct hda_codec *codec)
2187 {
2188         struct hdmi_spec *spec = codec->spec;
2189         int dev, err;
2190         int pin_idx, pcm_idx;
2191
2192         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2193                 if (!get_pcm_rec(spec, pcm_idx)->pcm) {
2194                         /* no PCM: mark this for skipping permanently */
2195                         set_bit(pcm_idx, &spec->pcm_bitmap);
2196                         continue;
2197                 }
2198
2199                 err = generic_hdmi_build_jack(codec, pcm_idx);
2200                 if (err < 0)
2201                         return err;
2202
2203                 /* create the spdif for each pcm
2204                  * pin will be bound when monitor is connected
2205                  */
2206                 if (spec->dyn_pcm_assign)
2207                         err = snd_hda_create_dig_out_ctls(codec,
2208                                           0, spec->cvt_nids[0],
2209                                           HDA_PCM_TYPE_HDMI);
2210                 else {
2211                         struct hdmi_spec_per_pin *per_pin =
2212                                 get_pin(spec, pcm_idx);
2213                         err = snd_hda_create_dig_out_ctls(codec,
2214                                                   per_pin->pin_nid,
2215                                                   per_pin->mux_nids[0],
2216                                                   HDA_PCM_TYPE_HDMI);
2217                 }
2218                 if (err < 0)
2219                         return err;
2220                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2221
2222                 dev = get_pcm_rec(spec, pcm_idx)->device;
2223                 if (dev != SNDRV_PCM_INVALID_DEVICE) {
2224                         /* add control for ELD Bytes */
2225                         err = hdmi_create_eld_ctl(codec, pcm_idx, dev);
2226                         if (err < 0)
2227                                 return err;
2228                 }
2229         }
2230
2231         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2232                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2233
2234                 hdmi_present_sense(per_pin, 0);
2235         }
2236
2237         /* add channel maps */
2238         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2239                 struct hda_pcm *pcm;
2240
2241                 pcm = get_pcm_rec(spec, pcm_idx);
2242                 if (!pcm || !pcm->pcm)
2243                         break;
2244                 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2245                 if (err < 0)
2246                         return err;
2247         }
2248
2249         return 0;
2250 }
2251
2252 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2253 {
2254         struct hdmi_spec *spec = codec->spec;
2255         int pin_idx;
2256
2257         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2258                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2259
2260                 per_pin->codec = codec;
2261                 mutex_init(&per_pin->lock);
2262                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2263                 eld_proc_new(per_pin, pin_idx);
2264         }
2265         return 0;
2266 }
2267
2268 static int generic_hdmi_init(struct hda_codec *codec)
2269 {
2270         struct hdmi_spec *spec = codec->spec;
2271         int pin_idx;
2272
2273         mutex_lock(&spec->bind_lock);
2274         spec->use_jack_detect = !codec->jackpoll_interval;
2275         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2276                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2277                 hda_nid_t pin_nid = per_pin->pin_nid;
2278                 int dev_id = per_pin->dev_id;
2279
2280                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
2281                 hdmi_init_pin(codec, pin_nid);
2282                 if (codec_has_acomp(codec))
2283                         continue;
2284                 if (spec->use_jack_detect)
2285                         snd_hda_jack_detect_enable(codec, pin_nid);
2286                 else
2287                         snd_hda_jack_detect_enable_callback(codec, pin_nid,
2288                                                             jack_callback);
2289         }
2290         mutex_unlock(&spec->bind_lock);
2291         return 0;
2292 }
2293
2294 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2295 {
2296         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2297         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2298 }
2299
2300 static void hdmi_array_free(struct hdmi_spec *spec)
2301 {
2302         snd_array_free(&spec->pins);
2303         snd_array_free(&spec->cvts);
2304 }
2305
2306 static void generic_spec_free(struct hda_codec *codec)
2307 {
2308         struct hdmi_spec *spec = codec->spec;
2309
2310         if (spec) {
2311                 hdmi_array_free(spec);
2312                 kfree(spec);
2313                 codec->spec = NULL;
2314         }
2315         codec->dp_mst = false;
2316 }
2317
2318 static void generic_hdmi_free(struct hda_codec *codec)
2319 {
2320         struct hdmi_spec *spec = codec->spec;
2321         int pin_idx, pcm_idx;
2322
2323         if (spec->acomp_registered) {
2324                 snd_hdac_acomp_exit(&codec->bus->core);
2325         } else if (codec_has_acomp(codec)) {
2326                 snd_hdac_acomp_register_notifier(&codec->bus->core, NULL);
2327                 codec->relaxed_resume = 0;
2328         }
2329
2330         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2331                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2332                 cancel_delayed_work_sync(&per_pin->work);
2333                 eld_proc_free(per_pin);
2334         }
2335
2336         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2337                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2338                         continue;
2339                 if (spec->dyn_pcm_assign)
2340                         snd_device_free(codec->card,
2341                                         spec->pcm_rec[pcm_idx].jack);
2342                 else
2343                         spec->pcm_rec[pcm_idx].jack = NULL;
2344         }
2345
2346         generic_spec_free(codec);
2347 }
2348
2349 #ifdef CONFIG_PM
2350 static int generic_hdmi_resume(struct hda_codec *codec)
2351 {
2352         struct hdmi_spec *spec = codec->spec;
2353         int pin_idx;
2354
2355         codec->patch_ops.init(codec);
2356         regcache_sync(codec->core.regmap);
2357
2358         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2359                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2360                 hdmi_present_sense(per_pin, 1);
2361         }
2362         return 0;
2363 }
2364 #endif
2365
2366 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2367         .init                   = generic_hdmi_init,
2368         .free                   = generic_hdmi_free,
2369         .build_pcms             = generic_hdmi_build_pcms,
2370         .build_controls         = generic_hdmi_build_controls,
2371         .unsol_event            = hdmi_unsol_event,
2372 #ifdef CONFIG_PM
2373         .resume                 = generic_hdmi_resume,
2374 #endif
2375 };
2376
2377 static const struct hdmi_ops generic_standard_hdmi_ops = {
2378         .pin_get_eld                            = snd_hdmi_get_eld,
2379         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2380         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2381         .setup_stream                           = hdmi_setup_stream,
2382 };
2383
2384 /* allocate codec->spec and assign/initialize generic parser ops */
2385 static int alloc_generic_hdmi(struct hda_codec *codec)
2386 {
2387         struct hdmi_spec *spec;
2388
2389         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2390         if (!spec)
2391                 return -ENOMEM;
2392
2393         spec->codec = codec;
2394         spec->ops = generic_standard_hdmi_ops;
2395         spec->dev_num = 1;      /* initialize to 1 */
2396         mutex_init(&spec->pcm_lock);
2397         mutex_init(&spec->bind_lock);
2398         snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2399
2400         spec->chmap.ops.get_chmap = hdmi_get_chmap;
2401         spec->chmap.ops.set_chmap = hdmi_set_chmap;
2402         spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2403         spec->chmap.ops.get_spk_alloc = hdmi_get_spk_alloc,
2404
2405         codec->spec = spec;
2406         hdmi_array_init(spec, 4);
2407
2408         codec->patch_ops = generic_hdmi_patch_ops;
2409
2410         return 0;
2411 }
2412
2413 /* generic HDMI parser */
2414 static int patch_generic_hdmi(struct hda_codec *codec)
2415 {
2416         int err;
2417
2418         err = alloc_generic_hdmi(codec);
2419         if (err < 0)
2420                 return err;
2421
2422         err = hdmi_parse_codec(codec);
2423         if (err < 0) {
2424                 generic_spec_free(codec);
2425                 return err;
2426         }
2427
2428         generic_hdmi_init_per_pins(codec);
2429         return 0;
2430 }
2431
2432 /*
2433  * generic audio component binding
2434  */
2435
2436 /* turn on / off the unsol event jack detection dynamically */
2437 static void reprogram_jack_detect(struct hda_codec *codec, hda_nid_t nid,
2438                                   bool use_acomp)
2439 {
2440         struct hda_jack_tbl *tbl;
2441
2442         tbl = snd_hda_jack_tbl_get(codec, nid);
2443         if (tbl) {
2444                 /* clear unsol even if component notifier is used, or re-enable
2445                  * if notifier is cleared
2446                  */
2447                 unsigned int val = use_acomp ? 0 : (AC_USRSP_EN | tbl->tag);
2448                 snd_hda_codec_write_cache(codec, nid, 0,
2449                                           AC_VERB_SET_UNSOLICITED_ENABLE, val);
2450         } else {
2451                 /* if no jack entry was defined beforehand, create a new one
2452                  * at need (i.e. only when notifier is cleared)
2453                  */
2454                 if (!use_acomp)
2455                         snd_hda_jack_detect_enable(codec, nid);
2456         }
2457 }
2458
2459 /* set up / clear component notifier dynamically */
2460 static void generic_acomp_notifier_set(struct drm_audio_component *acomp,
2461                                        bool use_acomp)
2462 {
2463         struct hdmi_spec *spec;
2464         int i;
2465
2466         spec = container_of(acomp->audio_ops, struct hdmi_spec, drm_audio_ops);
2467         mutex_lock(&spec->bind_lock);
2468         spec->use_acomp_notifier = use_acomp;
2469         spec->codec->relaxed_resume = use_acomp;
2470         /* reprogram each jack detection logic depending on the notifier */
2471         if (spec->use_jack_detect) {
2472                 for (i = 0; i < spec->num_pins; i++)
2473                         reprogram_jack_detect(spec->codec,
2474                                               get_pin(spec, i)->pin_nid,
2475                                               use_acomp);
2476         }
2477         mutex_unlock(&spec->bind_lock);
2478 }
2479
2480 /* enable / disable the notifier via master bind / unbind */
2481 static int generic_acomp_master_bind(struct device *dev,
2482                                      struct drm_audio_component *acomp)
2483 {
2484         generic_acomp_notifier_set(acomp, true);
2485         return 0;
2486 }
2487
2488 static void generic_acomp_master_unbind(struct device *dev,
2489                                         struct drm_audio_component *acomp)
2490 {
2491         generic_acomp_notifier_set(acomp, false);
2492 }
2493
2494 /* check whether both HD-audio and DRM PCI devices belong to the same bus */
2495 static int match_bound_vga(struct device *dev, int subtype, void *data)
2496 {
2497         struct hdac_bus *bus = data;
2498         struct pci_dev *pci, *master;
2499
2500         if (!dev_is_pci(dev) || !dev_is_pci(bus->dev))
2501                 return 0;
2502         master = to_pci_dev(bus->dev);
2503         pci = to_pci_dev(dev);
2504         return master->bus == pci->bus;
2505 }
2506
2507 /* audio component notifier for AMD/Nvidia HDMI codecs */
2508 static void generic_acomp_pin_eld_notify(void *audio_ptr, int port, int dev_id)
2509 {
2510         struct hda_codec *codec = audio_ptr;
2511         struct hdmi_spec *spec = codec->spec;
2512         hda_nid_t pin_nid = spec->port2pin(codec, port);
2513
2514         if (!pin_nid)
2515                 return;
2516         if (get_wcaps_type(get_wcaps(codec, pin_nid)) != AC_WID_PIN)
2517                 return;
2518         /* skip notification during system suspend (but not in runtime PM);
2519          * the state will be updated at resume
2520          */
2521         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2522                 return;
2523         /* ditto during suspend/resume process itself */
2524         if (snd_hdac_is_in_pm(&codec->core))
2525                 return;
2526
2527         check_presence_and_report(codec, pin_nid, dev_id);
2528 }
2529
2530 /* set up the private drm_audio_ops from the template */
2531 static void setup_drm_audio_ops(struct hda_codec *codec,
2532                                 const struct drm_audio_component_audio_ops *ops)
2533 {
2534         struct hdmi_spec *spec = codec->spec;
2535
2536         spec->drm_audio_ops.audio_ptr = codec;
2537         /* intel_audio_codec_enable() or intel_audio_codec_disable()
2538          * will call pin_eld_notify with using audio_ptr pointer
2539          * We need make sure audio_ptr is really setup
2540          */
2541         wmb();
2542         spec->drm_audio_ops.pin2port = ops->pin2port;
2543         spec->drm_audio_ops.pin_eld_notify = ops->pin_eld_notify;
2544         spec->drm_audio_ops.master_bind = ops->master_bind;
2545         spec->drm_audio_ops.master_unbind = ops->master_unbind;
2546 }
2547
2548 /* initialize the generic HDMI audio component */
2549 static void generic_acomp_init(struct hda_codec *codec,
2550                                const struct drm_audio_component_audio_ops *ops,
2551                                int (*port2pin)(struct hda_codec *, int))
2552 {
2553         struct hdmi_spec *spec = codec->spec;
2554
2555         spec->port2pin = port2pin;
2556         setup_drm_audio_ops(codec, ops);
2557         if (!snd_hdac_acomp_init(&codec->bus->core, &spec->drm_audio_ops,
2558                                  match_bound_vga, 0)) {
2559                 spec->acomp_registered = true;
2560                 codec->bus->keep_power = 0;
2561         }
2562 }
2563
2564 /*
2565  * Intel codec parsers and helpers
2566  */
2567
2568 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2569                                              hda_nid_t nid)
2570 {
2571         struct hdmi_spec *spec = codec->spec;
2572         hda_nid_t conns[4];
2573         int nconns;
2574
2575         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2576         if (nconns == spec->num_cvts &&
2577             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2578                 return;
2579
2580         /* override pins connection list */
2581         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2582         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2583 }
2584
2585 #define INTEL_GET_VENDOR_VERB   0xf81
2586 #define INTEL_SET_VENDOR_VERB   0x781
2587 #define INTEL_EN_DP12           0x02    /* enable DP 1.2 features */
2588 #define INTEL_EN_ALL_PIN_CVTS   0x01    /* enable 2nd & 3rd pins and convertors */
2589
2590 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2591                                           bool update_tree)
2592 {
2593         unsigned int vendor_param;
2594         struct hdmi_spec *spec = codec->spec;
2595
2596         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2597                                 INTEL_GET_VENDOR_VERB, 0);
2598         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2599                 return;
2600
2601         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2602         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2603                                 INTEL_SET_VENDOR_VERB, vendor_param);
2604         if (vendor_param == -1)
2605                 return;
2606
2607         if (update_tree)
2608                 snd_hda_codec_update_widgets(codec);
2609 }
2610
2611 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2612 {
2613         unsigned int vendor_param;
2614         struct hdmi_spec *spec = codec->spec;
2615
2616         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2617                                 INTEL_GET_VENDOR_VERB, 0);
2618         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2619                 return;
2620
2621         /* enable DP1.2 mode */
2622         vendor_param |= INTEL_EN_DP12;
2623         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2624         snd_hda_codec_write_cache(codec, spec->vendor_nid, 0,
2625                                 INTEL_SET_VENDOR_VERB, vendor_param);
2626 }
2627
2628 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2629  * Otherwise you may get severe h/w communication errors.
2630  */
2631 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2632                                 unsigned int power_state)
2633 {
2634         if (power_state == AC_PWRST_D0) {
2635                 intel_haswell_enable_all_pins(codec, false);
2636                 intel_haswell_fixup_enable_dp12(codec);
2637         }
2638
2639         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2640         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2641 }
2642
2643 /* There is a fixed mapping between audio pin node and display port.
2644  * on SNB, IVY, HSW, BSW, SKL, BXT, KBL:
2645  * Pin Widget 5 - PORT B (port = 1 in i915 driver)
2646  * Pin Widget 6 - PORT C (port = 2 in i915 driver)
2647  * Pin Widget 7 - PORT D (port = 3 in i915 driver)
2648  *
2649  * on VLV, ILK:
2650  * Pin Widget 4 - PORT B (port = 1 in i915 driver)
2651  * Pin Widget 5 - PORT C (port = 2 in i915 driver)
2652  * Pin Widget 6 - PORT D (port = 3 in i915 driver)
2653  */
2654 static int intel_base_nid(struct hda_codec *codec)
2655 {
2656         switch (codec->core.vendor_id) {
2657         case 0x80860054: /* ILK */
2658         case 0x80862804: /* ILK */
2659         case 0x80862882: /* VLV */
2660                 return 4;
2661         default:
2662                 return 5;
2663         }
2664 }
2665
2666 static int intel_pin2port(void *audio_ptr, int pin_nid)
2667 {
2668         struct hda_codec *codec = audio_ptr;
2669         struct hdmi_spec *spec = codec->spec;
2670         int base_nid, i;
2671
2672         if (!spec->port_num) {
2673                 base_nid = intel_base_nid(codec);
2674                 if (WARN_ON(pin_nid < base_nid || pin_nid >= base_nid + 3))
2675                         return -1;
2676                 return pin_nid - base_nid + 1; /* intel port is 1-based */
2677         }
2678
2679         /*
2680          * looking for the pin number in the mapping table and return
2681          * the index which indicate the port number
2682          */
2683         for (i = 0; i < spec->port_num; i++) {
2684                 if (pin_nid == spec->port_map[i])
2685                         return i + 1;
2686         }
2687
2688         /* return -1 if pin number exceeds our expectation */
2689         codec_info(codec, "Can't find the HDMI/DP port for pin %d\n", pin_nid);
2690         return -1;
2691 }
2692
2693 static int intel_port2pin(struct hda_codec *codec, int port)
2694 {
2695         struct hdmi_spec *spec = codec->spec;
2696
2697         if (!spec->port_num) {
2698                 /* we assume only from port-B to port-D */
2699                 if (port < 1 || port > 3)
2700                         return 0;
2701                 /* intel port is 1-based */
2702                 return port + intel_base_nid(codec) - 1;
2703         }
2704
2705         if (port < 1 || port > spec->port_num)
2706                 return 0;
2707         return spec->port_map[port - 1];
2708 }
2709
2710 static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe)
2711 {
2712         struct hda_codec *codec = audio_ptr;
2713         int pin_nid;
2714         int dev_id = pipe;
2715
2716         pin_nid = intel_port2pin(codec, port);
2717         if (!pin_nid)
2718                 return;
2719         /* skip notification during system suspend (but not in runtime PM);
2720          * the state will be updated at resume
2721          */
2722         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2723                 return;
2724         /* ditto during suspend/resume process itself */
2725         if (snd_hdac_is_in_pm(&codec->core))
2726                 return;
2727
2728         snd_hdac_i915_set_bclk(&codec->bus->core);
2729         check_presence_and_report(codec, pin_nid, dev_id);
2730 }
2731
2732 static const struct drm_audio_component_audio_ops intel_audio_ops = {
2733         .pin2port = intel_pin2port,
2734         .pin_eld_notify = intel_pin_eld_notify,
2735 };
2736
2737 /* register i915 component pin_eld_notify callback */
2738 static void register_i915_notifier(struct hda_codec *codec)
2739 {
2740         struct hdmi_spec *spec = codec->spec;
2741
2742         spec->use_acomp_notifier = true;
2743         spec->port2pin = intel_port2pin;
2744         setup_drm_audio_ops(codec, &intel_audio_ops);
2745         snd_hdac_acomp_register_notifier(&codec->bus->core,
2746                                         &spec->drm_audio_ops);
2747         /* no need for forcible resume for jack check thanks to notifier */
2748         codec->relaxed_resume = 1;
2749 }
2750
2751 /* setup_stream ops override for HSW+ */
2752 static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
2753                                  hda_nid_t pin_nid, u32 stream_tag, int format)
2754 {
2755         haswell_verify_D0(codec, cvt_nid, pin_nid);
2756         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
2757 }
2758
2759 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2760 static void i915_pin_cvt_fixup(struct hda_codec *codec,
2761                                struct hdmi_spec_per_pin *per_pin,
2762                                hda_nid_t cvt_nid)
2763 {
2764         if (per_pin) {
2765                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2766                                per_pin->dev_id);
2767                 intel_verify_pin_cvt_connect(codec, per_pin);
2768                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
2769                                      per_pin->dev_id, per_pin->mux_idx);
2770         } else {
2771                 intel_not_share_assigned_cvt_nid(codec, 0, 0, cvt_nid);
2772         }
2773 }
2774
2775 /* precondition and allocation for Intel codecs */
2776 static int alloc_intel_hdmi(struct hda_codec *codec)
2777 {
2778         int err;
2779
2780         /* requires i915 binding */
2781         if (!codec->bus->core.audio_component) {
2782                 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2783                 /* set probe_id here to prevent generic fallback binding */
2784                 codec->probe_id = HDA_CODEC_ID_SKIP_PROBE;
2785                 return -ENODEV;
2786         }
2787
2788         err = alloc_generic_hdmi(codec);
2789         if (err < 0)
2790                 return err;
2791         /* no need to handle unsol events */
2792         codec->patch_ops.unsol_event = NULL;
2793         return 0;
2794 }
2795
2796 /* parse and post-process for Intel codecs */
2797 static int parse_intel_hdmi(struct hda_codec *codec)
2798 {
2799         int err;
2800
2801         err = hdmi_parse_codec(codec);
2802         if (err < 0) {
2803                 generic_spec_free(codec);
2804                 return err;
2805         }
2806
2807         generic_hdmi_init_per_pins(codec);
2808         register_i915_notifier(codec);
2809         return 0;
2810 }
2811
2812 /* Intel Haswell and onwards; audio component with eld notifier */
2813 static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid,
2814                                  const int *port_map, int port_num)
2815 {
2816         struct hdmi_spec *spec;
2817         int err;
2818
2819         err = alloc_intel_hdmi(codec);
2820         if (err < 0)
2821                 return err;
2822         spec = codec->spec;
2823         codec->dp_mst = true;
2824         spec->dyn_pcm_assign = true;
2825         spec->vendor_nid = vendor_nid;
2826         spec->port_map = port_map;
2827         spec->port_num = port_num;
2828
2829         intel_haswell_enable_all_pins(codec, true);
2830         intel_haswell_fixup_enable_dp12(codec);
2831
2832         codec->display_power_control = 1;
2833
2834         codec->patch_ops.set_power_state = haswell_set_power_state;
2835         codec->depop_delay = 0;
2836         codec->auto_runtime_pm = 1;
2837
2838         spec->ops.setup_stream = i915_hsw_setup_stream;
2839         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2840
2841         return parse_intel_hdmi(codec);
2842 }
2843
2844 static int patch_i915_hsw_hdmi(struct hda_codec *codec)
2845 {
2846         return intel_hsw_common_init(codec, 0x08, NULL, 0);
2847 }
2848
2849 static int patch_i915_glk_hdmi(struct hda_codec *codec)
2850 {
2851         return intel_hsw_common_init(codec, 0x0b, NULL, 0);
2852 }
2853
2854 static int patch_i915_icl_hdmi(struct hda_codec *codec)
2855 {
2856         /*
2857          * pin to port mapping table where the value indicate the pin number and
2858          * the index indicate the port number with 1 base.
2859          */
2860         static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb};
2861
2862         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2863 }
2864
2865 static int patch_i915_tgl_hdmi(struct hda_codec *codec)
2866 {
2867         /*
2868          * pin to port mapping table where the value indicate the pin number and
2869          * the index indicate the port number with 1 base.
2870          */
2871         static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
2872
2873         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2874 }
2875
2876
2877 /* Intel Baytrail and Braswell; with eld notifier */
2878 static int patch_i915_byt_hdmi(struct hda_codec *codec)
2879 {
2880         struct hdmi_spec *spec;
2881         int err;
2882
2883         err = alloc_intel_hdmi(codec);
2884         if (err < 0)
2885                 return err;
2886         spec = codec->spec;
2887
2888         /* For Valleyview/Cherryview, only the display codec is in the display
2889          * power well and can use link_power ops to request/release the power.
2890          */
2891         codec->display_power_control = 1;
2892
2893         codec->depop_delay = 0;
2894         codec->auto_runtime_pm = 1;
2895
2896         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2897
2898         return parse_intel_hdmi(codec);
2899 }
2900
2901 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
2902 static int patch_i915_cpt_hdmi(struct hda_codec *codec)
2903 {
2904         int err;
2905
2906         err = alloc_intel_hdmi(codec);
2907         if (err < 0)
2908                 return err;
2909         return parse_intel_hdmi(codec);
2910 }
2911
2912 /*
2913  * Shared non-generic implementations
2914  */
2915
2916 static int simple_playback_build_pcms(struct hda_codec *codec)
2917 {
2918         struct hdmi_spec *spec = codec->spec;
2919         struct hda_pcm *info;
2920         unsigned int chans;
2921         struct hda_pcm_stream *pstr;
2922         struct hdmi_spec_per_cvt *per_cvt;
2923
2924         per_cvt = get_cvt(spec, 0);
2925         chans = get_wcaps(codec, per_cvt->cvt_nid);
2926         chans = get_wcaps_channels(chans);
2927
2928         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2929         if (!info)
2930                 return -ENOMEM;
2931         spec->pcm_rec[0].pcm = info;
2932         info->pcm_type = HDA_PCM_TYPE_HDMI;
2933         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2934         *pstr = spec->pcm_playback;
2935         pstr->nid = per_cvt->cvt_nid;
2936         if (pstr->channels_max <= 2 && chans && chans <= 16)
2937                 pstr->channels_max = chans;
2938
2939         return 0;
2940 }
2941
2942 /* unsolicited event for jack sensing */
2943 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2944                                     unsigned int res)
2945 {
2946         snd_hda_jack_set_dirty_all(codec);
2947         snd_hda_jack_report_sync(codec);
2948 }
2949
2950 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2951  * as long as spec->pins[] is set correctly
2952  */
2953 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2954
2955 static int simple_playback_build_controls(struct hda_codec *codec)
2956 {
2957         struct hdmi_spec *spec = codec->spec;
2958         struct hdmi_spec_per_cvt *per_cvt;
2959         int err;
2960
2961         per_cvt = get_cvt(spec, 0);
2962         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2963                                           per_cvt->cvt_nid,
2964                                           HDA_PCM_TYPE_HDMI);
2965         if (err < 0)
2966                 return err;
2967         return simple_hdmi_build_jack(codec, 0);
2968 }
2969
2970 static int simple_playback_init(struct hda_codec *codec)
2971 {
2972         struct hdmi_spec *spec = codec->spec;
2973         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2974         hda_nid_t pin = per_pin->pin_nid;
2975
2976         snd_hda_codec_write(codec, pin, 0,
2977                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2978         /* some codecs require to unmute the pin */
2979         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2980                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2981                                     AMP_OUT_UNMUTE);
2982         snd_hda_jack_detect_enable(codec, pin);
2983         return 0;
2984 }
2985
2986 static void simple_playback_free(struct hda_codec *codec)
2987 {
2988         struct hdmi_spec *spec = codec->spec;
2989
2990         hdmi_array_free(spec);
2991         kfree(spec);
2992 }
2993
2994 /*
2995  * Nvidia specific implementations
2996  */
2997
2998 #define Nv_VERB_SET_Channel_Allocation          0xF79
2999 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
3000 #define Nv_VERB_SET_Audio_Protection_On         0xF98
3001 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
3002
3003 #define nvhdmi_master_con_nid_7x        0x04
3004 #define nvhdmi_master_pin_nid_7x        0x05
3005
3006 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
3007         /*front, rear, clfe, rear_surr */
3008         0x6, 0x8, 0xa, 0xc,
3009 };
3010
3011 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
3012         /* set audio protect on */
3013         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3014         /* enable digital output on pin widget */
3015         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3016         {} /* terminator */
3017 };
3018
3019 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
3020         /* set audio protect on */
3021         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3022         /* enable digital output on pin widget */
3023         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3024         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3025         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3026         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3027         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3028         {} /* terminator */
3029 };
3030
3031 #ifdef LIMITED_RATE_FMT_SUPPORT
3032 /* support only the safe format and rate */
3033 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
3034 #define SUPPORTED_MAXBPS        16
3035 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
3036 #else
3037 /* support all rates and formats */
3038 #define SUPPORTED_RATES \
3039         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
3040         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
3041          SNDRV_PCM_RATE_192000)
3042 #define SUPPORTED_MAXBPS        24
3043 #define SUPPORTED_FORMATS \
3044         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
3045 #endif
3046
3047 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
3048 {
3049         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
3050         return 0;
3051 }
3052
3053 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
3054 {
3055         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
3056         return 0;
3057 }
3058
3059 static const unsigned int channels_2_6_8[] = {
3060         2, 6, 8
3061 };
3062
3063 static const unsigned int channels_2_8[] = {
3064         2, 8
3065 };
3066
3067 static const struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
3068         .count = ARRAY_SIZE(channels_2_6_8),
3069         .list = channels_2_6_8,
3070         .mask = 0,
3071 };
3072
3073 static const struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
3074         .count = ARRAY_SIZE(channels_2_8),
3075         .list = channels_2_8,
3076         .mask = 0,
3077 };
3078
3079 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
3080                                     struct hda_codec *codec,
3081                                     struct snd_pcm_substream *substream)
3082 {
3083         struct hdmi_spec *spec = codec->spec;
3084         const struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
3085
3086         switch (codec->preset->vendor_id) {
3087         case 0x10de0002:
3088         case 0x10de0003:
3089         case 0x10de0005:
3090         case 0x10de0006:
3091                 hw_constraints_channels = &hw_constraints_2_8_channels;
3092                 break;
3093         case 0x10de0007:
3094                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
3095                 break;
3096         default:
3097                 break;
3098         }
3099
3100         if (hw_constraints_channels != NULL) {
3101                 snd_pcm_hw_constraint_list(substream->runtime, 0,
3102                                 SNDRV_PCM_HW_PARAM_CHANNELS,
3103                                 hw_constraints_channels);
3104         } else {
3105                 snd_pcm_hw_constraint_step(substream->runtime, 0,
3106                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
3107         }
3108
3109         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3110 }
3111
3112 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
3113                                      struct hda_codec *codec,
3114                                      struct snd_pcm_substream *substream)
3115 {
3116         struct hdmi_spec *spec = codec->spec;
3117         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3118 }
3119
3120 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3121                                        struct hda_codec *codec,
3122                                        unsigned int stream_tag,
3123                                        unsigned int format,
3124                                        struct snd_pcm_substream *substream)
3125 {
3126         struct hdmi_spec *spec = codec->spec;
3127         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3128                                              stream_tag, format, substream);
3129 }
3130
3131 static const struct hda_pcm_stream simple_pcm_playback = {
3132         .substreams = 1,
3133         .channels_min = 2,
3134         .channels_max = 2,
3135         .ops = {
3136                 .open = simple_playback_pcm_open,
3137                 .close = simple_playback_pcm_close,
3138                 .prepare = simple_playback_pcm_prepare
3139         },
3140 };
3141
3142 static const struct hda_codec_ops simple_hdmi_patch_ops = {
3143         .build_controls = simple_playback_build_controls,
3144         .build_pcms = simple_playback_build_pcms,
3145         .init = simple_playback_init,
3146         .free = simple_playback_free,
3147         .unsol_event = simple_hdmi_unsol_event,
3148 };
3149
3150 static int patch_simple_hdmi(struct hda_codec *codec,
3151                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
3152 {
3153         struct hdmi_spec *spec;
3154         struct hdmi_spec_per_cvt *per_cvt;
3155         struct hdmi_spec_per_pin *per_pin;
3156
3157         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3158         if (!spec)
3159                 return -ENOMEM;
3160
3161         spec->codec = codec;
3162         codec->spec = spec;
3163         hdmi_array_init(spec, 1);
3164
3165         spec->multiout.num_dacs = 0;  /* no analog */
3166         spec->multiout.max_channels = 2;
3167         spec->multiout.dig_out_nid = cvt_nid;
3168         spec->num_cvts = 1;
3169         spec->num_pins = 1;
3170         per_pin = snd_array_new(&spec->pins);
3171         per_cvt = snd_array_new(&spec->cvts);
3172         if (!per_pin || !per_cvt) {
3173                 simple_playback_free(codec);
3174                 return -ENOMEM;
3175         }
3176         per_cvt->cvt_nid = cvt_nid;
3177         per_pin->pin_nid = pin_nid;
3178         spec->pcm_playback = simple_pcm_playback;
3179
3180         codec->patch_ops = simple_hdmi_patch_ops;
3181
3182         return 0;
3183 }
3184
3185 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
3186                                                     int channels)
3187 {
3188         unsigned int chanmask;
3189         int chan = channels ? (channels - 1) : 1;
3190
3191         switch (channels) {
3192         default:
3193         case 0:
3194         case 2:
3195                 chanmask = 0x00;
3196                 break;
3197         case 4:
3198                 chanmask = 0x08;
3199                 break;
3200         case 6:
3201                 chanmask = 0x0b;
3202                 break;
3203         case 8:
3204                 chanmask = 0x13;
3205                 break;
3206         }
3207
3208         /* Set the audio infoframe channel allocation and checksum fields.  The
3209          * channel count is computed implicitly by the hardware. */
3210         snd_hda_codec_write(codec, 0x1, 0,
3211                         Nv_VERB_SET_Channel_Allocation, chanmask);
3212
3213         snd_hda_codec_write(codec, 0x1, 0,
3214                         Nv_VERB_SET_Info_Frame_Checksum,
3215                         (0x71 - chan - chanmask));
3216 }
3217
3218 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3219                                    struct hda_codec *codec,
3220                                    struct snd_pcm_substream *substream)
3221 {
3222         struct hdmi_spec *spec = codec->spec;
3223         int i;
3224
3225         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3226                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3227         for (i = 0; i < 4; i++) {
3228                 /* set the stream id */
3229                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3230                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
3231                 /* set the stream format */
3232                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3233                                 AC_VERB_SET_STREAM_FORMAT, 0);
3234         }
3235
3236         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3237          * streams are disabled. */
3238         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3239
3240         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3241 }
3242
3243 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3244                                      struct hda_codec *codec,
3245                                      unsigned int stream_tag,
3246                                      unsigned int format,
3247                                      struct snd_pcm_substream *substream)
3248 {
3249         int chs;
3250         unsigned int dataDCC2, channel_id;
3251         int i;
3252         struct hdmi_spec *spec = codec->spec;
3253         struct hda_spdif_out *spdif;
3254         struct hdmi_spec_per_cvt *per_cvt;
3255
3256         mutex_lock(&codec->spdif_mutex);
3257         per_cvt = get_cvt(spec, 0);
3258         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3259
3260         chs = substream->runtime->channels;
3261
3262         dataDCC2 = 0x2;
3263
3264         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3265         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3266                 snd_hda_codec_write(codec,
3267                                 nvhdmi_master_con_nid_7x,
3268                                 0,
3269                                 AC_VERB_SET_DIGI_CONVERT_1,
3270                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3271
3272         /* set the stream id */
3273         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3274                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3275
3276         /* set the stream format */
3277         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3278                         AC_VERB_SET_STREAM_FORMAT, format);
3279
3280         /* turn on again (if needed) */
3281         /* enable and set the channel status audio/data flag */
3282         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3283                 snd_hda_codec_write(codec,
3284                                 nvhdmi_master_con_nid_7x,
3285                                 0,
3286                                 AC_VERB_SET_DIGI_CONVERT_1,
3287                                 spdif->ctls & 0xff);
3288                 snd_hda_codec_write(codec,
3289                                 nvhdmi_master_con_nid_7x,
3290                                 0,
3291                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3292         }
3293
3294         for (i = 0; i < 4; i++) {
3295                 if (chs == 2)
3296                         channel_id = 0;
3297                 else
3298                         channel_id = i * 2;
3299
3300                 /* turn off SPDIF once;
3301                  *otherwise the IEC958 bits won't be updated
3302                  */
3303                 if (codec->spdif_status_reset &&
3304                 (spdif->ctls & AC_DIG1_ENABLE))
3305                         snd_hda_codec_write(codec,
3306                                 nvhdmi_con_nids_7x[i],
3307                                 0,
3308                                 AC_VERB_SET_DIGI_CONVERT_1,
3309                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3310                 /* set the stream id */
3311                 snd_hda_codec_write(codec,
3312                                 nvhdmi_con_nids_7x[i],
3313                                 0,
3314                                 AC_VERB_SET_CHANNEL_STREAMID,
3315                                 (stream_tag << 4) | channel_id);
3316                 /* set the stream format */
3317                 snd_hda_codec_write(codec,
3318                                 nvhdmi_con_nids_7x[i],
3319                                 0,
3320                                 AC_VERB_SET_STREAM_FORMAT,
3321                                 format);
3322                 /* turn on again (if needed) */
3323                 /* enable and set the channel status audio/data flag */
3324                 if (codec->spdif_status_reset &&
3325                 (spdif->ctls & AC_DIG1_ENABLE)) {
3326                         snd_hda_codec_write(codec,
3327                                         nvhdmi_con_nids_7x[i],
3328                                         0,
3329                                         AC_VERB_SET_DIGI_CONVERT_1,
3330                                         spdif->ctls & 0xff);
3331                         snd_hda_codec_write(codec,
3332                                         nvhdmi_con_nids_7x[i],
3333                                         0,
3334                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3335                 }
3336         }
3337
3338         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3339
3340         mutex_unlock(&codec->spdif_mutex);
3341         return 0;
3342 }
3343
3344 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3345         .substreams = 1,
3346         .channels_min = 2,
3347         .channels_max = 8,
3348         .nid = nvhdmi_master_con_nid_7x,
3349         .rates = SUPPORTED_RATES,
3350         .maxbps = SUPPORTED_MAXBPS,
3351         .formats = SUPPORTED_FORMATS,
3352         .ops = {
3353                 .open = simple_playback_pcm_open,
3354                 .close = nvhdmi_8ch_7x_pcm_close,
3355                 .prepare = nvhdmi_8ch_7x_pcm_prepare
3356         },
3357 };
3358
3359 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3360 {
3361         struct hdmi_spec *spec;
3362         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3363                                     nvhdmi_master_pin_nid_7x);
3364         if (err < 0)
3365                 return err;
3366
3367         codec->patch_ops.init = nvhdmi_7x_init_2ch;
3368         /* override the PCM rates, etc, as the codec doesn't give full list */
3369         spec = codec->spec;
3370         spec->pcm_playback.rates = SUPPORTED_RATES;
3371         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3372         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3373         return 0;
3374 }
3375
3376 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3377 {
3378         struct hdmi_spec *spec = codec->spec;
3379         int err = simple_playback_build_pcms(codec);
3380         if (!err) {
3381                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3382                 info->own_chmap = true;
3383         }
3384         return err;
3385 }
3386
3387 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3388 {
3389         struct hdmi_spec *spec = codec->spec;
3390         struct hda_pcm *info;
3391         struct snd_pcm_chmap *chmap;
3392         int err;
3393
3394         err = simple_playback_build_controls(codec);
3395         if (err < 0)
3396                 return err;
3397
3398         /* add channel maps */
3399         info = get_pcm_rec(spec, 0);
3400         err = snd_pcm_add_chmap_ctls(info->pcm,
3401                                      SNDRV_PCM_STREAM_PLAYBACK,
3402                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3403         if (err < 0)
3404                 return err;
3405         switch (codec->preset->vendor_id) {
3406         case 0x10de0002:
3407         case 0x10de0003:
3408         case 0x10de0005:
3409         case 0x10de0006:
3410                 chmap->channel_mask = (1U << 2) | (1U << 8);
3411                 break;
3412         case 0x10de0007:
3413                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3414         }
3415         return 0;
3416 }
3417
3418 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3419 {
3420         struct hdmi_spec *spec;
3421         int err = patch_nvhdmi_2ch(codec);
3422         if (err < 0)
3423                 return err;
3424         spec = codec->spec;
3425         spec->multiout.max_channels = 8;
3426         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3427         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3428         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3429         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3430
3431         /* Initialize the audio infoframe channel mask and checksum to something
3432          * valid */
3433         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3434
3435         return 0;
3436 }
3437
3438 /*
3439  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3440  * - 0x10de0015
3441  * - 0x10de0040
3442  */
3443 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
3444                 struct hdac_cea_channel_speaker_allocation *cap, int channels)
3445 {
3446         if (cap->ca_index == 0x00 && channels == 2)
3447                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3448
3449         /* If the speaker allocation matches the channel count, it is OK. */
3450         if (cap->channels != channels)
3451                 return -1;
3452
3453         /* all channels are remappable freely */
3454         return SNDRV_CTL_TLVT_CHMAP_VAR;
3455 }
3456
3457 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
3458                 int ca, int chs, unsigned char *map)
3459 {
3460         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3461                 return -EINVAL;
3462
3463         return 0;
3464 }
3465
3466 /* map from pin NID to port; port is 0-based */
3467 /* for Nvidia: assume widget NID starting from 4, with step 1 (4, 5, 6, ...) */
3468 static int nvhdmi_pin2port(void *audio_ptr, int pin_nid)
3469 {
3470         return pin_nid - 4;
3471 }
3472
3473 /* reverse-map from port to pin NID: see above */
3474 static int nvhdmi_port2pin(struct hda_codec *codec, int port)
3475 {
3476         return port + 4;
3477 }
3478
3479 static const struct drm_audio_component_audio_ops nvhdmi_audio_ops = {
3480         .pin2port = nvhdmi_pin2port,
3481         .pin_eld_notify = generic_acomp_pin_eld_notify,
3482         .master_bind = generic_acomp_master_bind,
3483         .master_unbind = generic_acomp_master_unbind,
3484 };
3485
3486 static int patch_nvhdmi(struct hda_codec *codec)
3487 {
3488         struct hdmi_spec *spec;
3489         int err;
3490
3491         err = patch_generic_hdmi(codec);
3492         if (err)
3493                 return err;
3494
3495         spec = codec->spec;
3496         spec->dyn_pin_out = true;
3497
3498         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3499                 nvhdmi_chmap_cea_alloc_validate_get_type;
3500         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3501
3502         codec->link_down_at_suspend = 1;
3503
3504         generic_acomp_init(codec, &nvhdmi_audio_ops, nvhdmi_port2pin);
3505
3506         return 0;
3507 }
3508
3509 /*
3510  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3511  * accessed using vendor-defined verbs. These registers can be used for
3512  * interoperability between the HDA and HDMI drivers.
3513  */
3514
3515 /* Audio Function Group node */
3516 #define NVIDIA_AFG_NID 0x01
3517
3518 /*
3519  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3520  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3521  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3522  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3523  * additional bit (at position 30) to signal the validity of the format.
3524  *
3525  * | 31      | 30    | 29  16 | 15   0 |
3526  * +---------+-------+--------+--------+
3527  * | TRIGGER | VALID | UNUSED | FORMAT |
3528  * +-----------------------------------|
3529  *
3530  * Note that for the trigger bit to take effect it needs to change value
3531  * (i.e. it needs to be toggled).
3532  */
3533 #define NVIDIA_GET_SCRATCH0             0xfa6
3534 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3535 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3536 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3537 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3538 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3539 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3540
3541 #define NVIDIA_GET_SCRATCH1             0xfab
3542 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3543 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3544 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3545 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3546
3547 /*
3548  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3549  * the format is invalidated so that the HDMI codec can be disabled.
3550  */
3551 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3552 {
3553         unsigned int value;
3554
3555         /* bits [31:30] contain the trigger and valid bits */
3556         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3557                                    NVIDIA_GET_SCRATCH0, 0);
3558         value = (value >> 24) & 0xff;
3559
3560         /* bits [15:0] are used to store the HDA format */
3561         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3562                             NVIDIA_SET_SCRATCH0_BYTE0,
3563                             (format >> 0) & 0xff);
3564         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3565                             NVIDIA_SET_SCRATCH0_BYTE1,
3566                             (format >> 8) & 0xff);
3567
3568         /* bits [16:24] are unused */
3569         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3570                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3571
3572         /*
3573          * Bit 30 signals that the data is valid and hence that HDMI audio can
3574          * be enabled.
3575          */
3576         if (format == 0)
3577                 value &= ~NVIDIA_SCRATCH_VALID;
3578         else
3579                 value |= NVIDIA_SCRATCH_VALID;
3580
3581         /*
3582          * Whenever the trigger bit is toggled, an interrupt is raised in the
3583          * HDMI codec. The HDMI driver will use that as trigger to update its
3584          * configuration.
3585          */
3586         value ^= NVIDIA_SCRATCH_TRIGGER;
3587
3588         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3589                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3590 }
3591
3592 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3593                                   struct hda_codec *codec,
3594                                   unsigned int stream_tag,
3595                                   unsigned int format,
3596                                   struct snd_pcm_substream *substream)
3597 {
3598         int err;
3599
3600         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3601                                                 format, substream);
3602         if (err < 0)
3603                 return err;
3604
3605         /* notify the HDMI codec of the format change */
3606         tegra_hdmi_set_format(codec, format);
3607
3608         return 0;
3609 }
3610
3611 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3612                                   struct hda_codec *codec,
3613                                   struct snd_pcm_substream *substream)
3614 {
3615         /* invalidate the format in the HDMI codec */
3616         tegra_hdmi_set_format(codec, 0);
3617
3618         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3619 }
3620
3621 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3622 {
3623         struct hdmi_spec *spec = codec->spec;
3624         unsigned int i;
3625
3626         for (i = 0; i < spec->num_pins; i++) {
3627                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3628
3629                 if (pcm->pcm_type == type)
3630                         return pcm;
3631         }
3632
3633         return NULL;
3634 }
3635
3636 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3637 {
3638         struct hda_pcm_stream *stream;
3639         struct hda_pcm *pcm;
3640         int err;
3641
3642         err = generic_hdmi_build_pcms(codec);
3643         if (err < 0)
3644                 return err;
3645
3646         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3647         if (!pcm)
3648                 return -ENODEV;
3649
3650         /*
3651          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3652          * codec about format changes.
3653          */
3654         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3655         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3656         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3657
3658         return 0;
3659 }
3660
3661 static int patch_tegra_hdmi(struct hda_codec *codec)
3662 {
3663         int err;
3664
3665         err = patch_generic_hdmi(codec);
3666         if (err)
3667                 return err;
3668
3669         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3670
3671         return 0;
3672 }
3673
3674 /*
3675  * ATI/AMD-specific implementations
3676  */
3677
3678 #define is_amdhdmi_rev3_or_later(codec) \
3679         ((codec)->core.vendor_id == 0x1002aa01 && \
3680          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3681 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3682
3683 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3684 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3685 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3686 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3687 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3688 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3689 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3690 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3691 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3692 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3693 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3694 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3695 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3696 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3697 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3698 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3699 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3700 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3701 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3702 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3703 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3704 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3705 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3706 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3707 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3708
3709 /* AMD specific HDA cvt verbs */
3710 #define ATI_VERB_SET_RAMP_RATE          0x770
3711 #define ATI_VERB_GET_RAMP_RATE          0xf70
3712
3713 #define ATI_OUT_ENABLE 0x1
3714
3715 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3716 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3717
3718 #define ATI_HBR_CAPABLE 0x01
3719 #define ATI_HBR_ENABLE 0x10
3720
3721 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3722                            unsigned char *buf, int *eld_size)
3723 {
3724         /* call hda_eld.c ATI/AMD-specific function */
3725         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3726                                     is_amdhdmi_rev3_or_later(codec));
3727 }
3728
3729 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
3730                                         int active_channels, int conn_type)
3731 {
3732         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3733 }
3734
3735 static int atihdmi_paired_swap_fc_lfe(int pos)
3736 {
3737         /*
3738          * ATI/AMD have automatic FC/LFE swap built-in
3739          * when in pairwise mapping mode.
3740          */
3741
3742         switch (pos) {
3743                 /* see channel_allocations[].speakers[] */
3744                 case 2: return 3;
3745                 case 3: return 2;
3746                 default: break;
3747         }
3748
3749         return pos;
3750 }
3751
3752 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3753                         int ca, int chs, unsigned char *map)
3754 {
3755         struct hdac_cea_channel_speaker_allocation *cap;
3756         int i, j;
3757
3758         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3759
3760         cap = snd_hdac_get_ch_alloc_from_ca(ca);
3761         for (i = 0; i < chs; ++i) {
3762                 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3763                 bool ok = false;
3764                 bool companion_ok = false;
3765
3766                 if (!mask)
3767                         continue;
3768
3769                 for (j = 0 + i % 2; j < 8; j += 2) {
3770                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3771                         if (cap->speakers[chan_idx] == mask) {
3772                                 /* channel is in a supported position */
3773                                 ok = true;
3774
3775                                 if (i % 2 == 0 && i + 1 < chs) {
3776                                         /* even channel, check the odd companion */
3777                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3778                                         int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3779                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3780
3781                                         if (comp_mask_req == comp_mask_act)
3782                                                 companion_ok = true;
3783                                         else
3784                                                 return -EINVAL;
3785                                 }
3786                                 break;
3787                         }
3788                 }
3789
3790                 if (!ok)
3791                         return -EINVAL;
3792
3793                 if (companion_ok)
3794                         i++; /* companion channel already checked */
3795         }
3796
3797         return 0;
3798 }
3799
3800 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3801                 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3802 {
3803         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3804         int verb;
3805         int ati_channel_setup = 0;
3806
3807         if (hdmi_slot > 7)
3808                 return -EINVAL;
3809
3810         if (!has_amd_full_remap_support(codec)) {
3811                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3812
3813                 /* In case this is an odd slot but without stream channel, do not
3814                  * disable the slot since the corresponding even slot could have a
3815                  * channel. In case neither have a channel, the slot pair will be
3816                  * disabled when this function is called for the even slot. */
3817                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3818                         return 0;
3819
3820                 hdmi_slot -= hdmi_slot % 2;
3821
3822                 if (stream_channel != 0xf)
3823                         stream_channel -= stream_channel % 2;
3824         }
3825
3826         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3827
3828         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3829
3830         if (stream_channel != 0xf)
3831                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3832
3833         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3834 }
3835
3836 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
3837                                 hda_nid_t pin_nid, int asp_slot)
3838 {
3839         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3840         bool was_odd = false;
3841         int ati_asp_slot = asp_slot;
3842         int verb;
3843         int ati_channel_setup;
3844
3845         if (asp_slot > 7)
3846                 return -EINVAL;
3847
3848         if (!has_amd_full_remap_support(codec)) {
3849                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3850                 if (ati_asp_slot % 2 != 0) {
3851                         ati_asp_slot -= 1;
3852                         was_odd = true;
3853                 }
3854         }
3855
3856         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3857
3858         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3859
3860         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3861                 return 0xf;
3862
3863         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3864 }
3865
3866 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
3867                 struct hdac_chmap *chmap,
3868                 struct hdac_cea_channel_speaker_allocation *cap,
3869                 int channels)
3870 {
3871         int c;
3872
3873         /*
3874          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3875          * we need to take that into account (a single channel may take 2
3876          * channel slots if we need to carry a silent channel next to it).
3877          * On Rev3+ AMD codecs this function is not used.
3878          */
3879         int chanpairs = 0;
3880
3881         /* We only produce even-numbered channel count TLVs */
3882         if ((channels % 2) != 0)
3883                 return -1;
3884
3885         for (c = 0; c < 7; c += 2) {
3886                 if (cap->speakers[c] || cap->speakers[c+1])
3887                         chanpairs++;
3888         }
3889
3890         if (chanpairs * 2 != channels)
3891                 return -1;
3892
3893         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3894 }
3895
3896 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
3897                 struct hdac_cea_channel_speaker_allocation *cap,
3898                 unsigned int *chmap, int channels)
3899 {
3900         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3901         int count = 0;
3902         int c;
3903
3904         for (c = 7; c >= 0; c--) {
3905                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3906                 int spk = cap->speakers[chan];
3907                 if (!spk) {
3908                         /* add N/A channel if the companion channel is occupied */
3909                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3910                                 chmap[count++] = SNDRV_CHMAP_NA;
3911
3912                         continue;
3913                 }
3914
3915                 chmap[count++] = snd_hdac_spk_to_chmap(spk);
3916         }
3917
3918         WARN_ON(count != channels);
3919 }
3920
3921 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3922                                  bool hbr)
3923 {
3924         int hbr_ctl, hbr_ctl_new;
3925
3926         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3927         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3928                 if (hbr)
3929                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3930                 else
3931                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3932
3933                 codec_dbg(codec,
3934                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3935                                 pin_nid,
3936                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3937                                 hbr_ctl_new);
3938
3939                 if (hbr_ctl != hbr_ctl_new)
3940                         snd_hda_codec_write(codec, pin_nid, 0,
3941                                                 ATI_VERB_SET_HBR_CONTROL,
3942                                                 hbr_ctl_new);
3943
3944         } else if (hbr)
3945                 return -EINVAL;
3946
3947         return 0;
3948 }
3949
3950 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3951                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3952 {
3953
3954         if (is_amdhdmi_rev3_or_later(codec)) {
3955                 int ramp_rate = 180; /* default as per AMD spec */
3956                 /* disable ramp-up/down for non-pcm as per AMD spec */
3957                 if (format & AC_FMT_TYPE_NON_PCM)
3958                         ramp_rate = 0;
3959
3960                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3961         }
3962
3963         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3964 }
3965
3966
3967 static int atihdmi_init(struct hda_codec *codec)
3968 {
3969         struct hdmi_spec *spec = codec->spec;
3970         int pin_idx, err;
3971
3972         err = generic_hdmi_init(codec);
3973
3974         if (err)
3975                 return err;
3976
3977         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3978                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3979
3980                 /* make sure downmix information in infoframe is zero */
3981                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3982
3983                 /* enable channel-wise remap mode if supported */
3984                 if (has_amd_full_remap_support(codec))
3985                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3986                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3987                                             ATI_MULTICHANNEL_MODE_SINGLE);
3988         }
3989
3990         return 0;
3991 }
3992
3993 /* map from pin NID to port; port is 0-based */
3994 /* for AMD: assume widget NID starting from 3, with step 2 (3, 5, 7, ...) */
3995 static int atihdmi_pin2port(void *audio_ptr, int pin_nid)
3996 {
3997         return pin_nid / 2 - 1;
3998 }
3999
4000 /* reverse-map from port to pin NID: see above */
4001 static int atihdmi_port2pin(struct hda_codec *codec, int port)
4002 {
4003         return port * 2 + 3;
4004 }
4005
4006 static const struct drm_audio_component_audio_ops atihdmi_audio_ops = {
4007         .pin2port = atihdmi_pin2port,
4008         .pin_eld_notify = generic_acomp_pin_eld_notify,
4009         .master_bind = generic_acomp_master_bind,
4010         .master_unbind = generic_acomp_master_unbind,
4011 };
4012
4013 static int patch_atihdmi(struct hda_codec *codec)
4014 {
4015         struct hdmi_spec *spec;
4016         struct hdmi_spec_per_cvt *per_cvt;
4017         int err, cvt_idx;
4018
4019         err = patch_generic_hdmi(codec);
4020
4021         if (err)
4022                 return err;
4023
4024         codec->patch_ops.init = atihdmi_init;
4025
4026         spec = codec->spec;
4027
4028         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
4029         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
4030         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
4031         spec->ops.setup_stream = atihdmi_setup_stream;
4032
4033         spec->chmap.ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
4034         spec->chmap.ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
4035
4036         if (!has_amd_full_remap_support(codec)) {
4037                 /* override to ATI/AMD-specific versions with pairwise mapping */
4038                 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
4039                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
4040                 spec->chmap.ops.cea_alloc_to_tlv_chmap =
4041                                 atihdmi_paired_cea_alloc_to_tlv_chmap;
4042                 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
4043         }
4044
4045         /* ATI/AMD converters do not advertise all of their capabilities */
4046         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
4047                 per_cvt = get_cvt(spec, cvt_idx);
4048                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
4049                 per_cvt->rates |= SUPPORTED_RATES;
4050                 per_cvt->formats |= SUPPORTED_FORMATS;
4051                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
4052         }
4053
4054         spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
4055
4056         /* AMD GPUs have neither EPSS nor CLKSTOP bits, hence preventing
4057          * the link-down as is.  Tell the core to allow it.
4058          */
4059         codec->link_down_at_suspend = 1;
4060
4061         generic_acomp_init(codec, &atihdmi_audio_ops, atihdmi_port2pin);
4062
4063         return 0;
4064 }
4065
4066 /* VIA HDMI Implementation */
4067 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
4068 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
4069
4070 static int patch_via_hdmi(struct hda_codec *codec)
4071 {
4072         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
4073 }
4074
4075 /*
4076  * patch entries
4077  */
4078 static const struct hda_device_id snd_hda_id_hdmi[] = {
4079 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
4080 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
4081 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
4082 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
4083 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
4084 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
4085 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
4086 HDA_CODEC_ENTRY(0x10de0001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4087 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4088 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4089 HDA_CODEC_ENTRY(0x10de0004, "GPU 04 HDMI",      patch_nvhdmi_8ch_7x),
4090 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4091 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4092 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
4093 HDA_CODEC_ENTRY(0x10de0008, "GPU 08 HDMI/DP",   patch_nvhdmi),
4094 HDA_CODEC_ENTRY(0x10de0009, "GPU 09 HDMI/DP",   patch_nvhdmi),
4095 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi),
4096 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi),
4097 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi),
4098 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi),
4099 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi),
4100 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi),
4101 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi),
4102 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi),
4103 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi),
4104 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi),
4105 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi),
4106 /* 17 is known to be absent */
4107 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi),
4108 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi),
4109 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi),
4110 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi),
4111 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi),
4112 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
4113 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
4114 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
4115 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
4116 HDA_CODEC_ENTRY(0x10de002d, "Tegra186 HDMI/DP0", patch_tegra_hdmi),
4117 HDA_CODEC_ENTRY(0x10de002e, "Tegra186 HDMI/DP1", patch_tegra_hdmi),
4118 HDA_CODEC_ENTRY(0x10de002f, "Tegra194 HDMI/DP2", patch_tegra_hdmi),
4119 HDA_CODEC_ENTRY(0x10de0030, "Tegra194 HDMI/DP3", patch_tegra_hdmi),
4120 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
4121 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
4122 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
4123 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
4124 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
4125 HDA_CODEC_ENTRY(0x10de0045, "GPU 45 HDMI/DP",   patch_nvhdmi),
4126 HDA_CODEC_ENTRY(0x10de0050, "GPU 50 HDMI/DP",   patch_nvhdmi),
4127 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
4128 HDA_CODEC_ENTRY(0x10de0052, "GPU 52 HDMI/DP",   patch_nvhdmi),
4129 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
4130 HDA_CODEC_ENTRY(0x10de0061, "GPU 61 HDMI/DP",   patch_nvhdmi),
4131 HDA_CODEC_ENTRY(0x10de0062, "GPU 62 HDMI/DP",   patch_nvhdmi),
4132 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
4133 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
4134 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
4135 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
4136 HDA_CODEC_ENTRY(0x10de0073, "GPU 73 HDMI/DP",   patch_nvhdmi),
4137 HDA_CODEC_ENTRY(0x10de0074, "GPU 74 HDMI/DP",   patch_nvhdmi),
4138 HDA_CODEC_ENTRY(0x10de0076, "GPU 76 HDMI/DP",   patch_nvhdmi),
4139 HDA_CODEC_ENTRY(0x10de007b, "GPU 7b HDMI/DP",   patch_nvhdmi),
4140 HDA_CODEC_ENTRY(0x10de007c, "GPU 7c HDMI/DP",   patch_nvhdmi),
4141 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
4142 HDA_CODEC_ENTRY(0x10de007e, "GPU 7e HDMI/DP",   patch_nvhdmi),
4143 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP",   patch_nvhdmi),
4144 HDA_CODEC_ENTRY(0x10de0081, "GPU 81 HDMI/DP",   patch_nvhdmi),
4145 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP",   patch_nvhdmi),
4146 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
4147 HDA_CODEC_ENTRY(0x10de0084, "GPU 84 HDMI/DP",   patch_nvhdmi),
4148 HDA_CODEC_ENTRY(0x10de0090, "GPU 90 HDMI/DP",   patch_nvhdmi),
4149 HDA_CODEC_ENTRY(0x10de0091, "GPU 91 HDMI/DP",   patch_nvhdmi),
4150 HDA_CODEC_ENTRY(0x10de0092, "GPU 92 HDMI/DP",   patch_nvhdmi),
4151 HDA_CODEC_ENTRY(0x10de0093, "GPU 93 HDMI/DP",   patch_nvhdmi),
4152 HDA_CODEC_ENTRY(0x10de0094, "GPU 94 HDMI/DP",   patch_nvhdmi),
4153 HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI/DP",   patch_nvhdmi),
4154 HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP",   patch_nvhdmi),
4155 HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP",   patch_nvhdmi),
4156 HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP",   patch_nvhdmi),
4157 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4158 HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI",    patch_nvhdmi_2ch),
4159 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
4160 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
4161 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
4162 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
4163 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4164 HDA_CODEC_ENTRY(0x80862800, "Geminilake HDMI",  patch_i915_glk_hdmi),
4165 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
4166 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
4167 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
4168 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4169 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi),
4170 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi),
4171 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_i915_hsw_hdmi),
4172 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_i915_hsw_hdmi),
4173 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_i915_hsw_hdmi),
4174 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_i915_hsw_hdmi),
4175 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_i915_hsw_hdmi),
4176 HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI",  patch_i915_glk_hdmi),
4177 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI",  patch_i915_glk_hdmi),
4178 HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI",     patch_i915_icl_hdmi),
4179 HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI",   patch_i915_tgl_hdmi),
4180 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
4181 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
4182 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_i915_byt_hdmi),
4183 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
4184 /* special ID for generic HDMI */
4185 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
4186 {} /* terminator */
4187 };
4188 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
4189
4190 MODULE_LICENSE("GPL");
4191 MODULE_DESCRIPTION("HDMI HD-audio codec");
4192 MODULE_ALIAS("snd-hda-codec-intelhdmi");
4193 MODULE_ALIAS("snd-hda-codec-nvhdmi");
4194 MODULE_ALIAS("snd-hda-codec-atihdmi");
4195
4196 static struct hda_codec_driver hdmi_driver = {
4197         .id = snd_hda_id_hdmi,
4198 };
4199
4200 module_hda_codec_driver(hdmi_driver);