1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
3 * Copyright (c) 2018 Mellanox Technologies. All rights reserved.
9 #include <linux/mlx5/driver.h>
10 #include <net/devlink.h>
12 #define MLX5_ESWITCH_MANAGER(mdev) MLX5_CAP_GEN(mdev, eswitch_manager)
32 struct mlx5_eswitch_rep;
33 struct mlx5_eswitch_rep_ops {
34 int (*load)(struct mlx5_core_dev *dev, struct mlx5_eswitch_rep *rep);
35 void (*unload)(struct mlx5_eswitch_rep *rep);
36 void *(*get_proto_dev)(struct mlx5_eswitch_rep *rep);
39 struct mlx5_eswitch_rep_data {
44 struct mlx5_eswitch_rep {
45 struct mlx5_eswitch_rep_data rep_data[NUM_REP_TYPES];
48 /* Only IB rep is using vport_index */
53 void mlx5_eswitch_register_vport_reps(struct mlx5_eswitch *esw,
54 const struct mlx5_eswitch_rep_ops *ops,
56 void mlx5_eswitch_unregister_vport_reps(struct mlx5_eswitch *esw, u8 rep_type);
57 void *mlx5_eswitch_get_proto_dev(struct mlx5_eswitch *esw,
60 struct mlx5_eswitch_rep *mlx5_eswitch_vport_rep(struct mlx5_eswitch *esw,
62 void *mlx5_eswitch_uplink_get_proto_dev(struct mlx5_eswitch *esw, u8 rep_type);
63 struct mlx5_flow_handle *
64 mlx5_eswitch_add_send_to_vport_rule(struct mlx5_eswitch *esw,
65 u16 vport_num, u32 sqn);
67 u16 mlx5_eswitch_get_total_vports(const struct mlx5_core_dev *dev);
69 #ifdef CONFIG_MLX5_ESWITCH
70 enum devlink_eswitch_encap_mode
71 mlx5_eswitch_get_encap_mode(const struct mlx5_core_dev *dev);
73 bool mlx5_eswitch_reg_c1_loopback_enabled(const struct mlx5_eswitch *esw);
74 bool mlx5_eswitch_vport_match_metadata_enabled(const struct mlx5_eswitch *esw);
77 * Reg C0 = < ESW_PFNUM_BITS(4) | ESW_VPORT BITS(12) | ESW_CHAIN_TAG(16) >
79 * Highest 4 bits of the reg c0 is the PF_NUM (range 0-15), 12 bits of
80 * unique non-zero vport id (range 1-4095). The rest (lowest 16 bits) is left
81 * for tc chain tag restoration.
82 * PFNUM + VPORT comprise the SOURCE_PORT matching.
84 #define ESW_VPORT_BITS 12
85 #define ESW_PFNUM_BITS 4
86 #define ESW_SOURCE_PORT_METADATA_BITS (ESW_PFNUM_BITS + ESW_VPORT_BITS)
87 #define ESW_SOURCE_PORT_METADATA_OFFSET (32 - ESW_SOURCE_PORT_METADATA_BITS)
88 #define ESW_CHAIN_TAG_METADATA_BITS (32 - ESW_SOURCE_PORT_METADATA_BITS)
89 #define ESW_CHAIN_TAG_METADATA_MASK GENMASK(ESW_CHAIN_TAG_METADATA_BITS - 1,\
92 static inline u32 mlx5_eswitch_get_vport_metadata_mask(void)
94 return GENMASK(31, 32 - ESW_SOURCE_PORT_METADATA_BITS);
97 u32 mlx5_eswitch_get_vport_metadata_for_match(struct mlx5_eswitch *esw,
99 u8 mlx5_eswitch_mode(struct mlx5_eswitch *esw);
100 #else /* CONFIG_MLX5_ESWITCH */
102 static inline u8 mlx5_eswitch_mode(struct mlx5_eswitch *esw)
104 return MLX5_ESWITCH_NONE;
107 static inline enum devlink_eswitch_encap_mode
108 mlx5_eswitch_get_encap_mode(const struct mlx5_core_dev *dev)
110 return DEVLINK_ESWITCH_ENCAP_MODE_NONE;
114 mlx5_eswitch_reg_c1_loopback_enabled(const struct mlx5_eswitch *esw)
120 mlx5_eswitch_vport_match_metadata_enabled(const struct mlx5_eswitch *esw)
126 mlx5_eswitch_get_vport_metadata_for_match(struct mlx5_eswitch *esw,
133 mlx5_eswitch_get_vport_metadata_mask(void)
137 #endif /* CONFIG_MLX5_ESWITCH */