1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _LINUX_DMA_MAPPING_H
3 #define _LINUX_DMA_MAPPING_H
5 #include <linux/sizes.h>
6 #include <linux/string.h>
7 #include <linux/device.h>
9 #include <linux/dma-debug.h>
10 #include <linux/dma-direction.h>
11 #include <linux/scatterlist.h>
12 #include <linux/bug.h>
13 #include <linux/mem_encrypt.h>
16 * List of possible attributes associated with a DMA mapping. The semantics
17 * of each attribute should be defined in Documentation/DMA-attributes.txt.
19 * DMA_ATTR_WRITE_BARRIER: DMA to a memory region with this attribute
20 * forces all pending DMA writes to complete.
22 #define DMA_ATTR_WRITE_BARRIER (1UL << 0)
24 * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping
25 * may be weakly ordered, that is that reads and writes may pass each other.
27 #define DMA_ATTR_WEAK_ORDERING (1UL << 1)
29 * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be
30 * buffered to improve performance.
32 #define DMA_ATTR_WRITE_COMBINE (1UL << 2)
34 * DMA_ATTR_NON_CONSISTENT: Lets the platform to choose to return either
35 * consistent or non-consistent memory as it sees fit.
37 #define DMA_ATTR_NON_CONSISTENT (1UL << 3)
39 * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel
40 * virtual mapping for the allocated buffer.
42 #define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4)
44 * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of
45 * the CPU cache for the given buffer assuming that it has been already
46 * transferred to 'device' domain.
48 #define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5)
50 * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer
53 #define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6)
55 * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem
56 * that it's probably not worth the time to try to allocate memory to in a way
57 * that gives better TLB efficiency.
59 #define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7)
61 * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress
62 * allocation failure reports (similarly to __GFP_NOWARN).
64 #define DMA_ATTR_NO_WARN (1UL << 8)
67 * DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully
68 * accessible at an elevated privilege level (and ideally inaccessible or
69 * at least read-only at lesser-privileged levels).
71 #define DMA_ATTR_PRIVILEGED (1UL << 9)
74 * A dma_addr_t can hold any valid DMA or bus address for the platform.
75 * It can be given to a device to use as a DMA source or target. A CPU cannot
76 * reference a dma_addr_t directly because there may be translation between
77 * its physical address space and the bus address space.
80 void* (*alloc)(struct device *dev, size_t size,
81 dma_addr_t *dma_handle, gfp_t gfp,
83 void (*free)(struct device *dev, size_t size,
84 void *vaddr, dma_addr_t dma_handle,
86 int (*mmap)(struct device *, struct vm_area_struct *,
87 void *, dma_addr_t, size_t,
90 int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *,
91 dma_addr_t, size_t, unsigned long attrs);
93 dma_addr_t (*map_page)(struct device *dev, struct page *page,
94 unsigned long offset, size_t size,
95 enum dma_data_direction dir,
97 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
98 size_t size, enum dma_data_direction dir,
101 * map_sg returns 0 on error and a value > 0 on success.
102 * It should never return a value < 0.
104 int (*map_sg)(struct device *dev, struct scatterlist *sg,
105 int nents, enum dma_data_direction dir,
106 unsigned long attrs);
107 void (*unmap_sg)(struct device *dev,
108 struct scatterlist *sg, int nents,
109 enum dma_data_direction dir,
110 unsigned long attrs);
111 dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr,
112 size_t size, enum dma_data_direction dir,
113 unsigned long attrs);
114 void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle,
115 size_t size, enum dma_data_direction dir,
116 unsigned long attrs);
117 void (*sync_single_for_cpu)(struct device *dev,
118 dma_addr_t dma_handle, size_t size,
119 enum dma_data_direction dir);
120 void (*sync_single_for_device)(struct device *dev,
121 dma_addr_t dma_handle, size_t size,
122 enum dma_data_direction dir);
123 void (*sync_sg_for_cpu)(struct device *dev,
124 struct scatterlist *sg, int nents,
125 enum dma_data_direction dir);
126 void (*sync_sg_for_device)(struct device *dev,
127 struct scatterlist *sg, int nents,
128 enum dma_data_direction dir);
129 void (*cache_sync)(struct device *dev, void *vaddr, size_t size,
130 enum dma_data_direction direction);
131 int (*dma_supported)(struct device *dev, u64 mask);
132 u64 (*get_required_mask)(struct device *dev);
135 #define DMA_MAPPING_ERROR (~(dma_addr_t)0)
137 extern const struct dma_map_ops dma_virt_ops;
138 extern const struct dma_map_ops dma_dummy_ops;
140 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
142 #define DMA_MASK_NONE 0x0ULL
144 static inline int valid_dma_direction(int dma_direction)
146 return ((dma_direction == DMA_BIDIRECTIONAL) ||
147 (dma_direction == DMA_TO_DEVICE) ||
148 (dma_direction == DMA_FROM_DEVICE));
151 static inline int is_device_dma_capable(struct device *dev)
153 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
156 #ifdef CONFIG_DMA_DECLARE_COHERENT
158 * These three functions are only for dma allocator.
159 * Don't use them in device drivers.
161 int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size,
162 dma_addr_t *dma_handle, void **ret);
163 int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr);
165 int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma,
166 void *cpu_addr, size_t size, int *ret);
168 void *dma_alloc_from_global_coherent(ssize_t size, dma_addr_t *dma_handle);
169 int dma_release_from_global_coherent(int order, void *vaddr);
170 int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr,
171 size_t size, int *ret);
174 #define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0)
175 #define dma_release_from_dev_coherent(dev, order, vaddr) (0)
176 #define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0)
178 static inline void *dma_alloc_from_global_coherent(ssize_t size,
179 dma_addr_t *dma_handle)
184 static inline int dma_release_from_global_coherent(int order, void *vaddr)
189 static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma,
190 void *cpu_addr, size_t size,
195 #endif /* CONFIG_DMA_DECLARE_COHERENT */
197 static inline bool dma_is_direct(const struct dma_map_ops *ops)
203 * All the dma_direct_* declarations are here just for the indirect call bypass,
204 * and must not be used directly drivers!
206 dma_addr_t dma_direct_map_page(struct device *dev, struct page *page,
207 unsigned long offset, size_t size, enum dma_data_direction dir,
208 unsigned long attrs);
209 int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
210 enum dma_data_direction dir, unsigned long attrs);
211 dma_addr_t dma_direct_map_resource(struct device *dev, phys_addr_t paddr,
212 size_t size, enum dma_data_direction dir, unsigned long attrs);
214 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
215 defined(CONFIG_SWIOTLB)
216 void dma_direct_sync_single_for_device(struct device *dev,
217 dma_addr_t addr, size_t size, enum dma_data_direction dir);
218 void dma_direct_sync_sg_for_device(struct device *dev,
219 struct scatterlist *sgl, int nents, enum dma_data_direction dir);
221 static inline void dma_direct_sync_single_for_device(struct device *dev,
222 dma_addr_t addr, size_t size, enum dma_data_direction dir)
225 static inline void dma_direct_sync_sg_for_device(struct device *dev,
226 struct scatterlist *sgl, int nents, enum dma_data_direction dir)
231 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
232 defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \
233 defined(CONFIG_SWIOTLB)
234 void dma_direct_unmap_page(struct device *dev, dma_addr_t addr,
235 size_t size, enum dma_data_direction dir, unsigned long attrs);
236 void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl,
237 int nents, enum dma_data_direction dir, unsigned long attrs);
238 void dma_direct_sync_single_for_cpu(struct device *dev,
239 dma_addr_t addr, size_t size, enum dma_data_direction dir);
240 void dma_direct_sync_sg_for_cpu(struct device *dev,
241 struct scatterlist *sgl, int nents, enum dma_data_direction dir);
243 static inline void dma_direct_unmap_page(struct device *dev, dma_addr_t addr,
244 size_t size, enum dma_data_direction dir, unsigned long attrs)
247 static inline void dma_direct_unmap_sg(struct device *dev,
248 struct scatterlist *sgl, int nents, enum dma_data_direction dir,
252 static inline void dma_direct_sync_single_for_cpu(struct device *dev,
253 dma_addr_t addr, size_t size, enum dma_data_direction dir)
256 static inline void dma_direct_sync_sg_for_cpu(struct device *dev,
257 struct scatterlist *sgl, int nents, enum dma_data_direction dir)
262 #ifdef CONFIG_HAS_DMA
263 #include <asm/dma-mapping.h>
265 static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
267 if (dev && dev->dma_ops)
269 return get_arch_dma_ops(dev ? dev->bus : NULL);
272 static inline void set_dma_ops(struct device *dev,
273 const struct dma_map_ops *dma_ops)
275 dev->dma_ops = dma_ops;
278 static inline dma_addr_t dma_map_page_attrs(struct device *dev,
279 struct page *page, size_t offset, size_t size,
280 enum dma_data_direction dir, unsigned long attrs)
282 const struct dma_map_ops *ops = get_dma_ops(dev);
285 BUG_ON(!valid_dma_direction(dir));
286 if (dma_is_direct(ops))
287 addr = dma_direct_map_page(dev, page, offset, size, dir, attrs);
289 addr = ops->map_page(dev, page, offset, size, dir, attrs);
290 debug_dma_map_page(dev, page, offset, size, dir, addr);
295 static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr,
296 size_t size, enum dma_data_direction dir, unsigned long attrs)
298 const struct dma_map_ops *ops = get_dma_ops(dev);
300 BUG_ON(!valid_dma_direction(dir));
301 if (dma_is_direct(ops))
302 dma_direct_unmap_page(dev, addr, size, dir, attrs);
303 else if (ops->unmap_page)
304 ops->unmap_page(dev, addr, size, dir, attrs);
305 debug_dma_unmap_page(dev, addr, size, dir);
309 * dma_maps_sg_attrs returns 0 on error and > 0 on success.
310 * It should never return a value < 0.
312 static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
313 int nents, enum dma_data_direction dir,
316 const struct dma_map_ops *ops = get_dma_ops(dev);
319 BUG_ON(!valid_dma_direction(dir));
320 if (dma_is_direct(ops))
321 ents = dma_direct_map_sg(dev, sg, nents, dir, attrs);
323 ents = ops->map_sg(dev, sg, nents, dir, attrs);
325 debug_dma_map_sg(dev, sg, nents, ents, dir);
330 static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
331 int nents, enum dma_data_direction dir,
334 const struct dma_map_ops *ops = get_dma_ops(dev);
336 BUG_ON(!valid_dma_direction(dir));
337 debug_dma_unmap_sg(dev, sg, nents, dir);
338 if (dma_is_direct(ops))
339 dma_direct_unmap_sg(dev, sg, nents, dir, attrs);
340 else if (ops->unmap_sg)
341 ops->unmap_sg(dev, sg, nents, dir, attrs);
344 static inline dma_addr_t dma_map_resource(struct device *dev,
345 phys_addr_t phys_addr,
347 enum dma_data_direction dir,
350 const struct dma_map_ops *ops = get_dma_ops(dev);
351 dma_addr_t addr = DMA_MAPPING_ERROR;
353 BUG_ON(!valid_dma_direction(dir));
355 /* Don't allow RAM to be mapped */
356 if (WARN_ON_ONCE(pfn_valid(PHYS_PFN(phys_addr))))
357 return DMA_MAPPING_ERROR;
359 if (dma_is_direct(ops))
360 addr = dma_direct_map_resource(dev, phys_addr, size, dir, attrs);
361 else if (ops->map_resource)
362 addr = ops->map_resource(dev, phys_addr, size, dir, attrs);
364 debug_dma_map_resource(dev, phys_addr, size, dir, addr);
368 static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr,
369 size_t size, enum dma_data_direction dir,
372 const struct dma_map_ops *ops = get_dma_ops(dev);
374 BUG_ON(!valid_dma_direction(dir));
375 if (!dma_is_direct(ops) && ops->unmap_resource)
376 ops->unmap_resource(dev, addr, size, dir, attrs);
377 debug_dma_unmap_resource(dev, addr, size, dir);
380 static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
382 enum dma_data_direction dir)
384 const struct dma_map_ops *ops = get_dma_ops(dev);
386 BUG_ON(!valid_dma_direction(dir));
387 if (dma_is_direct(ops))
388 dma_direct_sync_single_for_cpu(dev, addr, size, dir);
389 else if (ops->sync_single_for_cpu)
390 ops->sync_single_for_cpu(dev, addr, size, dir);
391 debug_dma_sync_single_for_cpu(dev, addr, size, dir);
394 static inline void dma_sync_single_for_device(struct device *dev,
395 dma_addr_t addr, size_t size,
396 enum dma_data_direction dir)
398 const struct dma_map_ops *ops = get_dma_ops(dev);
400 BUG_ON(!valid_dma_direction(dir));
401 if (dma_is_direct(ops))
402 dma_direct_sync_single_for_device(dev, addr, size, dir);
403 else if (ops->sync_single_for_device)
404 ops->sync_single_for_device(dev, addr, size, dir);
405 debug_dma_sync_single_for_device(dev, addr, size, dir);
409 dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
410 int nelems, enum dma_data_direction dir)
412 const struct dma_map_ops *ops = get_dma_ops(dev);
414 BUG_ON(!valid_dma_direction(dir));
415 if (dma_is_direct(ops))
416 dma_direct_sync_sg_for_cpu(dev, sg, nelems, dir);
417 else if (ops->sync_sg_for_cpu)
418 ops->sync_sg_for_cpu(dev, sg, nelems, dir);
419 debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
423 dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
424 int nelems, enum dma_data_direction dir)
426 const struct dma_map_ops *ops = get_dma_ops(dev);
428 BUG_ON(!valid_dma_direction(dir));
429 if (dma_is_direct(ops))
430 dma_direct_sync_sg_for_device(dev, sg, nelems, dir);
431 else if (ops->sync_sg_for_device)
432 ops->sync_sg_for_device(dev, sg, nelems, dir);
433 debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
437 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
439 debug_dma_mapping_error(dev, dma_addr);
441 if (dma_addr == DMA_MAPPING_ERROR)
446 void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
447 gfp_t flag, unsigned long attrs);
448 void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
449 dma_addr_t dma_handle, unsigned long attrs);
450 void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
451 gfp_t gfp, unsigned long attrs);
452 void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
453 dma_addr_t dma_handle);
454 void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
455 enum dma_data_direction dir);
456 int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt,
457 void *cpu_addr, dma_addr_t dma_addr, size_t size,
458 unsigned long attrs);
459 int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
460 void *cpu_addr, dma_addr_t dma_addr, size_t size,
461 unsigned long attrs);
462 int dma_supported(struct device *dev, u64 mask);
463 int dma_set_mask(struct device *dev, u64 mask);
464 int dma_set_coherent_mask(struct device *dev, u64 mask);
465 u64 dma_get_required_mask(struct device *dev);
466 #else /* CONFIG_HAS_DMA */
467 static inline dma_addr_t dma_map_page_attrs(struct device *dev,
468 struct page *page, size_t offset, size_t size,
469 enum dma_data_direction dir, unsigned long attrs)
471 return DMA_MAPPING_ERROR;
473 static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr,
474 size_t size, enum dma_data_direction dir, unsigned long attrs)
477 static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
478 int nents, enum dma_data_direction dir, unsigned long attrs)
482 static inline void dma_unmap_sg_attrs(struct device *dev,
483 struct scatterlist *sg, int nents, enum dma_data_direction dir,
487 static inline dma_addr_t dma_map_resource(struct device *dev,
488 phys_addr_t phys_addr, size_t size, enum dma_data_direction dir,
491 return DMA_MAPPING_ERROR;
493 static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr,
494 size_t size, enum dma_data_direction dir, unsigned long attrs)
497 static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
498 size_t size, enum dma_data_direction dir)
501 static inline void dma_sync_single_for_device(struct device *dev,
502 dma_addr_t addr, size_t size, enum dma_data_direction dir)
505 static inline void dma_sync_sg_for_cpu(struct device *dev,
506 struct scatterlist *sg, int nelems, enum dma_data_direction dir)
509 static inline void dma_sync_sg_for_device(struct device *dev,
510 struct scatterlist *sg, int nelems, enum dma_data_direction dir)
513 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
517 static inline void *dma_alloc_attrs(struct device *dev, size_t size,
518 dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs)
522 static void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
523 dma_addr_t dma_handle, unsigned long attrs)
526 static inline void *dmam_alloc_attrs(struct device *dev, size_t size,
527 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
531 static inline void dmam_free_coherent(struct device *dev, size_t size,
532 void *vaddr, dma_addr_t dma_handle)
535 static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
536 enum dma_data_direction dir)
539 static inline int dma_get_sgtable_attrs(struct device *dev,
540 struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr,
541 size_t size, unsigned long attrs)
545 static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
546 void *cpu_addr, dma_addr_t dma_addr, size_t size,
551 static inline int dma_supported(struct device *dev, u64 mask)
555 static inline int dma_set_mask(struct device *dev, u64 mask)
559 static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
563 static inline u64 dma_get_required_mask(struct device *dev)
567 #endif /* CONFIG_HAS_DMA */
569 static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr,
570 size_t size, enum dma_data_direction dir, unsigned long attrs)
572 debug_dma_map_single(dev, ptr, size);
573 return dma_map_page_attrs(dev, virt_to_page(ptr), offset_in_page(ptr),
577 static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr,
578 size_t size, enum dma_data_direction dir, unsigned long attrs)
580 return dma_unmap_page_attrs(dev, addr, size, dir, attrs);
583 static inline void dma_sync_single_range_for_cpu(struct device *dev,
584 dma_addr_t addr, unsigned long offset, size_t size,
585 enum dma_data_direction dir)
587 return dma_sync_single_for_cpu(dev, addr + offset, size, dir);
590 static inline void dma_sync_single_range_for_device(struct device *dev,
591 dma_addr_t addr, unsigned long offset, size_t size,
592 enum dma_data_direction dir)
594 return dma_sync_single_for_device(dev, addr + offset, size, dir);
597 #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0)
598 #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0)
599 #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0)
600 #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0)
601 #define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0)
602 #define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0)
603 #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0)
604 #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0)
606 extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
607 void *cpu_addr, dma_addr_t dma_addr, size_t size,
608 unsigned long attrs);
610 void *dma_common_contiguous_remap(struct page *page, size_t size,
611 unsigned long vm_flags,
612 pgprot_t prot, const void *caller);
614 void *dma_common_pages_remap(struct page **pages, size_t size,
615 unsigned long vm_flags, pgprot_t prot,
617 void dma_common_free_remap(void *cpu_addr, size_t size, unsigned long vm_flags);
619 int __init dma_atomic_pool_init(gfp_t gfp, pgprot_t prot);
620 bool dma_in_atomic_pool(void *start, size_t size);
621 void *dma_alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags);
622 bool dma_free_from_pool(void *start, size_t size);
625 dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, void *cpu_addr,
626 dma_addr_t dma_addr, size_t size, unsigned long attrs);
628 static inline void *dma_alloc_coherent(struct device *dev, size_t size,
629 dma_addr_t *dma_handle, gfp_t gfp)
632 return dma_alloc_attrs(dev, size, dma_handle, gfp,
633 (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0);
636 static inline void dma_free_coherent(struct device *dev, size_t size,
637 void *cpu_addr, dma_addr_t dma_handle)
639 return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0);
643 static inline u64 dma_get_mask(struct device *dev)
645 if (dev && dev->dma_mask && *dev->dma_mask)
646 return *dev->dma_mask;
647 return DMA_BIT_MASK(32);
651 * Set both the DMA mask and the coherent DMA mask to the same thing.
652 * Note that we don't check the return value from dma_set_coherent_mask()
653 * as the DMA API guarantees that the coherent DMA mask can be set to
654 * the same or smaller than the streaming DMA mask.
656 static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask)
658 int rc = dma_set_mask(dev, mask);
660 dma_set_coherent_mask(dev, mask);
665 * Similar to the above, except it deals with the case where the device
666 * does not have dev->dma_mask appropriately setup.
668 static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
670 dev->dma_mask = &dev->coherent_dma_mask;
671 return dma_set_mask_and_coherent(dev, mask);
674 #ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS
675 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
676 const struct iommu_ops *iommu, bool coherent);
678 static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
679 u64 size, const struct iommu_ops *iommu, bool coherent)
682 #endif /* CONFIG_ARCH_HAS_SETUP_DMA_OPS */
684 #ifdef CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS
685 void arch_teardown_dma_ops(struct device *dev);
687 static inline void arch_teardown_dma_ops(struct device *dev)
690 #endif /* CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS */
692 static inline unsigned int dma_get_max_seg_size(struct device *dev)
694 if (dev->dma_parms && dev->dma_parms->max_segment_size)
695 return dev->dma_parms->max_segment_size;
699 static inline int dma_set_max_seg_size(struct device *dev, unsigned int size)
701 if (dev->dma_parms) {
702 dev->dma_parms->max_segment_size = size;
708 static inline unsigned long dma_get_seg_boundary(struct device *dev)
710 if (dev->dma_parms && dev->dma_parms->segment_boundary_mask)
711 return dev->dma_parms->segment_boundary_mask;
712 return DMA_BIT_MASK(32);
715 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
717 if (dev->dma_parms) {
718 dev->dma_parms->segment_boundary_mask = mask;
725 static inline unsigned long dma_max_pfn(struct device *dev)
727 return (*dev->dma_mask >> PAGE_SHIFT) + dev->dma_pfn_offset;
731 static inline int dma_get_cache_alignment(void)
733 #ifdef ARCH_DMA_MINALIGN
734 return ARCH_DMA_MINALIGN;
739 #ifdef CONFIG_DMA_DECLARE_COHERENT
740 int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
741 dma_addr_t device_addr, size_t size);
742 void dma_release_declared_memory(struct device *dev);
745 dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
746 dma_addr_t device_addr, size_t size)
752 dma_release_declared_memory(struct device *dev)
755 #endif /* CONFIG_DMA_DECLARE_COHERENT */
757 static inline void *dmam_alloc_coherent(struct device *dev, size_t size,
758 dma_addr_t *dma_handle, gfp_t gfp)
760 return dmam_alloc_attrs(dev, size, dma_handle, gfp,
761 (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0);
764 static inline void *dma_alloc_wc(struct device *dev, size_t size,
765 dma_addr_t *dma_addr, gfp_t gfp)
767 unsigned long attrs = DMA_ATTR_WRITE_COMBINE;
769 if (gfp & __GFP_NOWARN)
770 attrs |= DMA_ATTR_NO_WARN;
772 return dma_alloc_attrs(dev, size, dma_addr, gfp, attrs);
774 #ifndef dma_alloc_writecombine
775 #define dma_alloc_writecombine dma_alloc_wc
778 static inline void dma_free_wc(struct device *dev, size_t size,
779 void *cpu_addr, dma_addr_t dma_addr)
781 return dma_free_attrs(dev, size, cpu_addr, dma_addr,
782 DMA_ATTR_WRITE_COMBINE);
784 #ifndef dma_free_writecombine
785 #define dma_free_writecombine dma_free_wc
788 static inline int dma_mmap_wc(struct device *dev,
789 struct vm_area_struct *vma,
790 void *cpu_addr, dma_addr_t dma_addr,
793 return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size,
794 DMA_ATTR_WRITE_COMBINE);
796 #ifndef dma_mmap_writecombine
797 #define dma_mmap_writecombine dma_mmap_wc
800 #ifdef CONFIG_NEED_DMA_MAP_STATE
801 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME
802 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME
803 #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
804 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
805 #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
806 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
808 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
809 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
810 #define dma_unmap_addr(PTR, ADDR_NAME) (0)
811 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
812 #define dma_unmap_len(PTR, LEN_NAME) (0)
813 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)