include/asm-arm/arch-ixp2000/io.h

   1 /*
   2  * linux/include/asm-arm/arch-ixp2000/io.h
   3  *
   4  * Original Author: Naeem M Afzal <naeem.m.afzal@intel.com>
   5  * Maintainer: Deepak Saxena <dsaxena@plexity.net>
   6  *
   7  * Copyright (C) 2002  Intel Corp.
   8  * Copyrgiht (C) 2003-2004 MontaVista Software, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #ifndef __ASM_ARM_ARCH_IO_H
  16 #define __ASM_ARM_ARCH_IO_H
  17
  18 #define IO_SPACE_LIMIT          0xffffffff
  19 #define __mem_pci(a)            (a)
  20
  21 /*
  22  * The A? revisions of the IXP2000s assert byte lanes for PCI I/O
  23  * transactions the other way round (MEM transactions don't have this
  24  * issue), so if we want to support those models, we need to override
  25  * the standard I/O functions.
  26  *
  27  * B0 and later have a bit that can be set to 1 to get the proper
  28  * behavior for I/O transactions, which then allows us to use the
  29  * standard I/O functions.  This is what we do if the user does not
  30  * explicitly ask for support for pre-B0.
  31  */
  32 #ifdef CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO
  33 #define ___io(p)                ((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE))
  34
  35 #define alignb(addr)            (void __iomem *)((unsigned long)(addr) ^ 3)
  36 #define alignw(addr)            (void __iomem *)((unsigned long)(addr) ^ 2)
  37
  38 #define outb(v,p)               __raw_writeb((v),alignb(___io(p)))
  39 #define outw(v,p)               __raw_writew((v),alignw(___io(p)))
  40 #define outl(v,p)               __raw_writel((v),___io(p))
  41
  42 #define inb(p)          ({ unsigned int __v = __raw_readb(alignb(___io(p))); __v; })
  43 #define inw(p)          \
  44         ({ unsigned int __v = (__raw_readw(alignw(___io(p)))); __v; })
  45 #define inl(p)          \
  46         ({ unsigned int __v = (__raw_readl(___io(p))); __v; })
  47
  48 #define outsb(p,d,l)            __raw_writesb(alignb(___io(p)),d,l)
  49 #define outsw(p,d,l)            __raw_writesw(alignw(___io(p)),d,l)
  50 #define outsl(p,d,l)            __raw_writesl(___io(p),d,l)
  51
  52 #define insb(p,d,l)             __raw_readsb(alignb(___io(p)),d,l)
  53 #define insw(p,d,l)             __raw_readsw(alignw(___io(p)),d,l)
  54 #define insl(p,d,l)             __raw_readsl(___io(p),d,l)
  55
  56 #define __is_io_address(p)      ((((unsigned long)(p)) & ~(IXP2000_PCI_IO_SIZE - 1)) == IXP2000_PCI_IO_VIRT_BASE)
  57
  58 #define ioread8(p)                                              \
  59         ({                                                      \
  60                 unsigned int __v;                               \
  61                                                                 \
  62                 if (__is_io_address(p)) {                       \
  63                         __v = __raw_readb(alignb(p));           \
  64                 } else {                                        \
  65                         __v = __raw_readb(p);                   \
  66                 }                                               \
  67                                                                 \
  68                 __v;                                            \
  69         })                                                      \
  70
  71 #define ioread16(p)                                             \
  72         ({                                                      \
  73                 unsigned int __v;                               \
  74                                                                 \
  75                 if (__is_io_address(p)) {                       \
  76                         __v = __raw_readw(alignw(p));           \
  77                 } else {                                        \
  78                         __v = le16_to_cpu(__raw_readw(p));      \
  79                 }                                               \
  80                                                                 \
  81                 __v;                                            \
  82         })
  83
  84 #define ioread32(p)                                             \
  85         ({                                                      \
  86                 unsigned int __v;                               \
  87                                                                 \
  88                 if (__is_io_address(p)) {                       \
  89                         __v = __raw_readl(p);                   \
  90                 } else {                                        \
  91                         __v = le32_to_cpu(__raw_readl(p));      \
  92                 }                                               \
  93                                                                 \
  94                  __v;                                           \
  95         })
  96
  97 #define iowrite8(v,p)                                           \
  98         ({                                                      \
  99                 if (__is_io_address(p)) {                       \
 100                         __raw_writeb((v), alignb(p));           \
 101                 } else {                                        \
 102                         __raw_writeb((v), p);                   \
 103                 }                                               \
 104         })
 105
 106 #define iowrite16(v,p)                                          \
 107         ({                                                      \
 108                 if (__is_io_address(p)) {                       \
 109                         __raw_writew((v), alignw(p));           \
 110                 } else {                                        \
 111                         __raw_writew(cpu_to_le16(v), p);        \
 112                 }                                               \
 113         })
 114
 115 #define iowrite32(v,p)                                          \
 116         ({                                                      \
 117                 if (__is_io_address(p)) {                       \
 118                         __raw_writel((v), p);                   \
 119                 } else {                                        \
 120                         __raw_writel(cpu_to_le32(v), p);        \
 121                 }                                               \
 122         })
 123
 124 #define ioport_map(port, nr)    ___io(port)
 125
 126 #define ioport_unmap(addr)
 127 #else
 128 #define __io(p)                 ((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE))
 129 #endif
 130
 131
 132 #ifdef CONFIG_ARCH_IXDP2X01
 133 /*
 134  * This is an ugly hack but the CS8900 on the 2x01's does not sit in any sort
 135  * of "I/O space" and is just direct mapped into a 32-bit-only addressable
 136  * bus. The address space for this bus is such that we can't really easily
 137  * make it contiguous to the PCI I/O address range, and it also does not
 138  * need swapping like PCI addresses do (IXDP2x01 is a BE platform).
 139  * B/C of this we can't use the standard in/out functions and need to
 140  * runtime check if the incoming address is a PCI address or for
 141  * the CS89x0.
 142  */
 143 #undef inw
 144 #undef outw
 145 #undef insw
 146 #undef outsw
 147
 148 #include <asm/mach-types.h>
 149
 150 static inline void insw(u32 ptr, void *buf, int length)
 151 {
 152         register volatile u32 *port = (volatile u32 *)ptr;
 153
 154         /*
 155          * Is this cycle meant for the CS8900?
 156          */
 157         if ((machine_is_ixdp2401() || machine_is_ixdp2801()) &&
 158                 (((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
 159                  ((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
 160                 u8 *buf8 = (u8*)buf;
 161                 register u32 tmp32;
 162
 163                 do {
 164                         tmp32 = *port;
 165                         *buf8++ = (u8)tmp32;
 166                         *buf8++ = (u8)(tmp32 >> 8);
 167                 } while(--length);
 168
 169                 return;
 170         }
 171
 172         __raw_readsw(alignw(___io(ptr)),buf,length);
 173 }
 174
 175 static inline void outsw(u32 ptr, void *buf, int length)
 176 {
 177         register volatile u32 *port = (volatile u32 *)ptr;
 178
 179         /*
 180          * Is this cycle meant for the CS8900?
 181          */
 182         if ((machine_is_ixdp2401() || machine_is_ixdp2801()) &&
 183                 (((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
 184                  ((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
 185                 register u32 tmp32;
 186                 u8 *buf8 = (u8*)buf;
 187                 do {
 188                         tmp32 = *buf8++;
 189                         tmp32 |= (*buf8++) << 8;
 190                         *port = tmp32;
 191                 } while(--length);
 192                 return;
 193         }
 194
 195         __raw_writesw(alignw(___io(ptr)),buf,length);
 196 }
 197
 198
 199 static inline u16 inw(u32 ptr)
 200 {
 201         register volatile u32 *port = (volatile u32 *)ptr;
 202
 203         /*
 204          * Is this cycle meant for the CS8900?
 205          */
 206         if ((machine_is_ixdp2401() || machine_is_ixdp2801()) &&
 207                 (((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
 208                  ((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
 209                 return (u16)(*port);
 210         }
 211
 212         return __raw_readw(alignw(___io(ptr)));
 213 }
 214
 215 static inline void outw(u16 value, u32 ptr)
 216 {
 217         register volatile u32 *port = (volatile u32 *)ptr;
 218
 219         if ((machine_is_ixdp2401() || machine_is_ixdp2801()) &&
 220                 (((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
 221                  ((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
 222                 *port = value;
 223                 return;
 224         }
 225
 226         __raw_writew((value),alignw(___io(ptr)));
 227 }
 228 #endif  /* IXDP2x01 */
 229
 230 #endif