2 * Copyright (c) 2000-2004 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/dmapool.h>
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/ioport.h>
25 #include <linux/sched.h>
26 #include <linux/slab.h>
27 #include <linux/smp_lock.h>
28 #include <linux/errno.h>
29 #include <linux/init.h>
30 #include <linux/timer.h>
31 #include <linux/list.h>
32 #include <linux/interrupt.h>
33 #include <linux/reboot.h>
34 #include <linux/usb.h>
35 #include <linux/moduleparam.h>
36 #include <linux/dma-mapping.h>
38 #include "../core/hcd.h"
40 #include <asm/byteorder.h>
43 #include <asm/system.h>
44 #include <asm/unaligned.h>
47 /*-------------------------------------------------------------------------*/
50 * EHCI hc_driver implementation ... experimental, incomplete.
51 * Based on the final 1.0 register interface specification.
53 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
54 * First was PCMCIA, like ISA; then CardBus, which is PCI.
55 * Next comes "CardBay", using USB 2.0 signals.
57 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
58 * Special thanks to Intel and VIA for providing host controllers to
59 * test this driver on, and Cypress (including In-System Design) for
60 * providing early devices for those host controllers to talk to!
64 * 2004-05-10 Root hub and PCI suspend/resume support; remote wakeup. (db)
65 * 2004-02-24 Replace pci_* with generic dma_* API calls (dsaxena@plexity.net)
66 * 2003-12-29 Rewritten high speed iso transfer support (by Michal Sojka,
67 * <sojkam@centrum.cz>, updates by DB).
69 * 2002-11-29 Correct handling for hw async_next register.
70 * 2002-08-06 Handling for bulk and interrupt transfers is mostly shared;
71 * only scheduling is different, no arbitrary limitations.
72 * 2002-07-25 Sanity check PCI reads, mostly for better cardbus support,
73 * clean up HC run state handshaking.
74 * 2002-05-24 Preliminary FS/LS interrupts, using scheduling shortcuts
75 * 2002-05-11 Clear TT errors for FS/LS ctrl/bulk. Fill in some other
76 * missing pieces: enabling 64bit dma, handoff from BIOS/SMM.
77 * 2002-05-07 Some error path cleanups to report better errors; wmb();
78 * use non-CVS version id; better iso bandwidth claim.
79 * 2002-04-19 Control/bulk/interrupt submit no longer uses giveback() on
80 * errors in submit path. Bugfixes to interrupt scheduling/processing.
81 * 2002-03-05 Initial high-speed ISO support; reduce ITD memory; shift
82 * more checking to generic hcd framework (db). Make it work with
83 * Philips EHCI; reduce PCI traffic; shorten IRQ path (Rory Bolt).
84 * 2002-01-14 Minor cleanup; version synch.
85 * 2002-01-08 Fix roothub handoff of FS/LS to companion controllers.
86 * 2002-01-04 Control/Bulk queuing behaves.
88 * 2001-12-12 Initial patch version for Linux 2.5.1 kernel.
89 * 2001-June Works with usb-storage and NEC EHCI on 2.4
92 #define DRIVER_VERSION "10 Dec 2004"
93 #define DRIVER_AUTHOR "David Brownell"
94 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
96 static const char hcd_name [] = "ehci_hcd";
99 #undef EHCI_VERBOSE_DEBUG
100 #undef EHCI_URB_TRACE
106 /* magic numbers that can affect system performance */
107 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
108 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
109 #define EHCI_TUNE_RL_TT 0
110 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
111 #define EHCI_TUNE_MULT_TT 1
112 #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
114 #define EHCI_IAA_JIFFIES (HZ/100) /* arbitrary; ~10 msec */
115 #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */
116 #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */
117 #define EHCI_SHRINK_JIFFIES (HZ/200) /* async qh unlink delay */
119 /* Initial IRQ latency: faster than hw default */
120 static int log2_irq_thresh = 0; // 0 to 6
121 module_param (log2_irq_thresh, int, S_IRUGO);
122 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
124 /* initial park setting: slower than hw default */
125 static unsigned park = 0;
126 module_param (park, uint, S_IRUGO);
127 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
129 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
131 /*-------------------------------------------------------------------------*/
134 #include "ehci-dbg.c"
136 /*-------------------------------------------------------------------------*/
139 * handshake - spin reading hc until handshake completes or fails
140 * @ptr: address of hc register to be read
141 * @mask: bits to look at in result of read
142 * @done: value of those bits when handshake succeeds
143 * @usec: timeout in microseconds
145 * Returns negative errno, or zero on success
147 * Success happens when the "mask" bits have the specified value (hardware
148 * handshake done). There are two failure modes: "usec" have passed (major
149 * hardware flakeout), or the register reads as all-ones (hardware removed).
151 * That last failure should_only happen in cases like physical cardbus eject
152 * before driver shutdown. But it also seems to be caused by bugs in cardbus
153 * bridge shutdown: shutting down the bridge before the devices using it.
155 static int handshake (void __iomem *ptr, u32 mask, u32 done, int usec)
160 result = readl (ptr);
161 if (result == ~(u32)0) /* card removed */
172 /* force HC to halt state from unknown (EHCI spec section 2.3) */
173 static int ehci_halt (struct ehci_hcd *ehci)
175 u32 temp = readl (&ehci->regs->status);
177 /* disable any irqs left enabled by previous code */
178 writel (0, &ehci->regs->intr_enable);
180 if ((temp & STS_HALT) != 0)
183 temp = readl (&ehci->regs->command);
185 writel (temp, &ehci->regs->command);
186 return handshake (&ehci->regs->status, STS_HALT, STS_HALT, 16 * 125);
189 /* put TDI/ARC silicon into EHCI mode */
190 static void tdi_reset (struct ehci_hcd *ehci)
192 u32 __iomem *reg_ptr;
195 reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + 0x68);
196 tmp = readl (reg_ptr);
198 writel (tmp, reg_ptr);
201 /* reset a non-running (STS_HALT == 1) controller */
202 static int ehci_reset (struct ehci_hcd *ehci)
205 u32 command = readl (&ehci->regs->command);
207 command |= CMD_RESET;
208 dbg_cmd (ehci, "reset", command);
209 writel (command, &ehci->regs->command);
210 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
211 ehci->next_statechange = jiffies;
212 retval = handshake (&ehci->regs->command, CMD_RESET, 0, 250 * 1000);
217 if (ehci_is_TDI(ehci))
223 /* idle the controller (from running) */
224 static void ehci_quiesce (struct ehci_hcd *ehci)
229 if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
233 /* wait for any schedule enables/disables to take effect */
234 temp = readl (&ehci->regs->command) << 10;
235 temp &= STS_ASS | STS_PSS;
236 if (handshake (&ehci->regs->status, STS_ASS | STS_PSS,
237 temp, 16 * 125) != 0) {
238 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
242 /* then disable anything that's still active */
243 temp = readl (&ehci->regs->command);
244 temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
245 writel (temp, &ehci->regs->command);
247 /* hardware can take 16 microframes to turn off ... */
248 if (handshake (&ehci->regs->status, STS_ASS | STS_PSS,
250 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
255 /*-------------------------------------------------------------------------*/
257 static void ehci_work(struct ehci_hcd *ehci, struct pt_regs *regs);
259 #include "ehci-hub.c"
260 #include "ehci-mem.c"
262 #include "ehci-sched.c"
264 /*-------------------------------------------------------------------------*/
266 static void ehci_watchdog (unsigned long param)
268 struct ehci_hcd *ehci = (struct ehci_hcd *) param;
271 spin_lock_irqsave (&ehci->lock, flags);
273 /* lost IAA irqs wedge things badly; seen with a vt8235 */
275 u32 status = readl (&ehci->regs->status);
277 if (status & STS_IAA) {
278 ehci_vdbg (ehci, "lost IAA\n");
279 COUNT (ehci->stats.lost_iaa);
280 writel (STS_IAA, &ehci->regs->status);
281 ehci->reclaim_ready = 1;
285 /* stop async processing after it's idled a bit */
286 if (test_bit (TIMER_ASYNC_OFF, &ehci->actions))
287 start_unlink_async (ehci, ehci->async);
289 /* ehci could run by timer, without IRQs ... */
290 ehci_work (ehci, NULL);
292 spin_unlock_irqrestore (&ehci->lock, flags);
295 /* Reboot notifiers kick in for silicon on any bus (not just pci, etc).
296 * This forcibly disables dma and IRQs, helping kexec and other cases
297 * where the next system software may expect clean state.
300 ehci_reboot (struct notifier_block *self, unsigned long code, void *null)
302 struct ehci_hcd *ehci;
304 ehci = container_of (self, struct ehci_hcd, reboot_notifier);
305 (void) ehci_halt (ehci);
307 /* make BIOS/etc use companion controller during reboot */
308 writel (0, &ehci->regs->configured_flag);
312 static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
316 if (!HCS_PPC (ehci->hcs_params))
319 ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down");
320 for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; )
321 (void) ehci_hub_control(ehci_to_hcd(ehci),
322 is_on ? SetPortFeature : ClearPortFeature,
328 /*-------------------------------------------------------------------------*/
331 * ehci_work is called from some interrupts, timers, and so on.
332 * it calls driver completion functions, after dropping ehci->lock.
334 static void ehci_work (struct ehci_hcd *ehci, struct pt_regs *regs)
336 timer_action_done (ehci, TIMER_IO_WATCHDOG);
337 if (ehci->reclaim_ready)
338 end_unlink_async (ehci, regs);
340 /* another CPU may drop ehci->lock during a schedule scan while
341 * it reports urb completions. this flag guards against bogus
342 * attempts at re-entrant schedule scanning.
347 scan_async (ehci, regs);
348 if (ehci->next_uframe != -1)
349 scan_periodic (ehci, regs);
352 /* the IO watchdog guards against hardware or driver bugs that
353 * misplace IRQs, and should let us run completely without IRQs.
354 * such lossage has been observed on both VT6202 and VT8235.
356 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
357 (ehci->async->qh_next.ptr != NULL ||
358 ehci->periodic_sched != 0))
359 timer_action (ehci, TIMER_IO_WATCHDOG);
362 static void ehci_stop (struct usb_hcd *hcd)
364 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
366 ehci_dbg (ehci, "stop\n");
368 /* Turn off port power on all root hub ports. */
369 ehci_port_power (ehci, 0);
371 /* no more interrupts ... */
372 del_timer_sync (&ehci->watchdog);
374 spin_lock_irq(&ehci->lock);
375 if (HC_IS_RUNNING (hcd->state))
379 writel (0, &ehci->regs->intr_enable);
380 spin_unlock_irq(&ehci->lock);
382 /* let companion controllers work when we aren't */
383 writel (0, &ehci->regs->configured_flag);
384 unregister_reboot_notifier (&ehci->reboot_notifier);
386 remove_debug_files (ehci);
388 /* root hub is shut down separately (first, when possible) */
389 spin_lock_irq (&ehci->lock);
391 ehci_work (ehci, NULL);
392 spin_unlock_irq (&ehci->lock);
393 ehci_mem_cleanup (ehci);
396 ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
397 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
398 ehci->stats.lost_iaa);
399 ehci_dbg (ehci, "complete %ld unlink %ld\n",
400 ehci->stats.complete, ehci->stats.unlink);
403 dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status));
406 /* one-time init, only for memory state */
407 static int ehci_init(struct usb_hcd *hcd)
409 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
414 spin_lock_init(&ehci->lock);
416 init_timer(&ehci->watchdog);
417 ehci->watchdog.function = ehci_watchdog;
418 ehci->watchdog.data = (unsigned long) ehci;
421 * hw default: 1K periodic list heads, one per frame.
422 * periodic_size can shrink by USBCMD update if hcc_params allows.
424 ehci->periodic_size = DEFAULT_I_TDPS;
425 if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
428 /* controllers may cache some of the periodic schedule ... */
429 hcc_params = readl(&ehci->caps->hcc_params);
430 if (HCC_ISOC_CACHE(hcc_params)) // full frame cache
432 else // N microframes cached
433 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
435 ehci->reclaim = NULL;
436 ehci->reclaim_ready = 0;
437 ehci->next_uframe = -1;
440 * dedicate a qh for the async ring head, since we couldn't unlink
441 * a 'real' qh without stopping the async schedule [4.8]. use it
442 * as the 'reclamation list head' too.
443 * its dummy is used in hw_alt_next of many tds, to prevent the qh
444 * from automatically advancing to the next td after short reads.
446 ehci->async->qh_next.qh = NULL;
447 ehci->async->hw_next = QH_NEXT(ehci->async->qh_dma);
448 ehci->async->hw_info1 = cpu_to_le32(QH_HEAD);
449 ehci->async->hw_token = cpu_to_le32(QTD_STS_HALT);
450 ehci->async->hw_qtd_next = EHCI_LIST_END;
451 ehci->async->qh_state = QH_STATE_LINKED;
452 ehci->async->hw_alt_next = QTD_NEXT(ehci->async->dummy->qtd_dma);
454 /* clear interrupt enables, set irq latency */
455 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
457 temp = 1 << (16 + log2_irq_thresh);
458 if (HCC_CANPARK(hcc_params)) {
459 /* HW default park == 3, on hardware that supports it (like
460 * NVidia and ALI silicon), maximizes throughput on the async
461 * schedule by avoiding QH fetches between transfers.
463 * With fast usb storage devices and NForce2, "park" seems to
464 * make problems: throughput reduction (!), data errors...
467 park = min(park, (unsigned) 3);
471 ehci_dbg(ehci, "park %d\n", park);
473 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
474 /* periodic schedule size can be smaller than default */
476 temp |= (EHCI_TUNE_FLS << 2);
477 switch (EHCI_TUNE_FLS) {
478 case 0: ehci->periodic_size = 1024; break;
479 case 1: ehci->periodic_size = 512; break;
480 case 2: ehci->periodic_size = 256; break;
484 ehci->command = temp;
486 ehci->reboot_notifier.notifier_call = ehci_reboot;
487 register_reboot_notifier(&ehci->reboot_notifier);
492 /* start HC running; it's halted, ehci_init() has been run (once) */
493 static int ehci_run (struct usb_hcd *hcd)
495 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
500 /* EHCI spec section 4.1 */
501 if ((retval = ehci_reset(ehci)) != 0) {
502 unregister_reboot_notifier(&ehci->reboot_notifier);
503 ehci_mem_cleanup(ehci);
506 writel(ehci->periodic_dma, &ehci->regs->frame_list);
507 writel((u32)ehci->async->qh_dma, &ehci->regs->async_next);
510 * hcc_params controls whether ehci->regs->segment must (!!!)
511 * be used; it constrains QH/ITD/SITD and QTD locations.
512 * pci_pool consistent memory always uses segment zero.
513 * streaming mappings for I/O buffers, like pci_map_single(),
514 * can return segments above 4GB, if the device allows.
516 * NOTE: the dma mask is visible through dma_supported(), so
517 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
518 * Scsi_Host.highmem_io, and so forth. It's readonly to all
519 * host side drivers though.
521 hcc_params = readl(&ehci->caps->hcc_params);
522 if (HCC_64BIT_ADDR(hcc_params)) {
523 writel(0, &ehci->regs->segment);
525 // this is deeply broken on almost all architectures
526 if (!dma_set_mask(hcd->self.controller, DMA_64BIT_MASK))
527 ehci_info(ehci, "enabled 64bit DMA\n");
532 // Philips, Intel, and maybe others need CMD_RUN before the
533 // root hub will detect new devices (why?); NEC doesn't
534 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
535 ehci->command |= CMD_RUN;
536 writel (ehci->command, &ehci->regs->command);
537 dbg_cmd (ehci, "init", ehci->command);
540 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
541 * are explicitly handed to companion controller(s), so no TT is
542 * involved with the root hub. (Except where one is integrated,
543 * and there's no companion controller unless maybe for USB OTG.)
545 hcd->state = HC_STATE_RUNNING;
546 writel (FLAG_CF, &ehci->regs->configured_flag);
547 readl (&ehci->regs->command); /* unblock posted writes */
549 temp = HC_VERSION(readl (&ehci->caps->hc_capbase));
551 "USB %x.%x started, EHCI %x.%02x, driver %s\n",
552 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
553 temp >> 8, temp & 0xff, DRIVER_VERSION);
555 writel (INTR_MASK, &ehci->regs->intr_enable); /* Turn On Interrupts */
557 /* GRR this is run-once init(), being done every time the HC starts.
558 * So long as they're part of class devices, we can't do it init()
559 * since the class device isn't created that early.
561 create_debug_files(ehci);
566 /*-------------------------------------------------------------------------*/
568 static irqreturn_t ehci_irq (struct usb_hcd *hcd, struct pt_regs *regs)
570 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
574 spin_lock (&ehci->lock);
576 status = readl (&ehci->regs->status);
578 /* e.g. cardbus physical eject */
579 if (status == ~(u32) 0) {
580 ehci_dbg (ehci, "device removed\n");
585 if (!status) { /* irq sharing? */
586 spin_unlock(&ehci->lock);
590 /* clear (just) interrupts */
591 writel (status, &ehci->regs->status);
592 readl (&ehci->regs->command); /* unblock posted write */
595 #ifdef EHCI_VERBOSE_DEBUG
596 /* unrequested/ignored: Frame List Rollover */
597 dbg_status (ehci, "irq", status);
600 /* INT, ERR, and IAA interrupt rates can be throttled */
602 /* normal [4.15.1.2] or error [4.15.1.1] completion */
603 if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
604 if (likely ((status & STS_ERR) == 0))
605 COUNT (ehci->stats.normal);
607 COUNT (ehci->stats.error);
611 /* complete the unlinking of some qh [4.15.2.3] */
612 if (status & STS_IAA) {
613 COUNT (ehci->stats.reclaim);
614 ehci->reclaim_ready = 1;
618 /* remote wakeup [4.3.1] */
619 if (status & STS_PCD) {
620 unsigned i = HCS_N_PORTS (ehci->hcs_params);
622 /* resume root hub? */
623 status = readl (&ehci->regs->command);
624 if (!(status & CMD_RUN))
625 writel (status | CMD_RUN, &ehci->regs->command);
628 int pstatus = readl (&ehci->regs->port_status [i]);
630 if (pstatus & PORT_OWNER)
632 if (!(pstatus & PORT_RESUME)
633 || ehci->reset_done [i] != 0)
636 /* start 20 msec resume signaling from this port,
637 * and make khubd collect PORT_STAT_C_SUSPEND to
638 * stop that signaling.
640 ehci->reset_done [i] = jiffies + msecs_to_jiffies (20);
641 ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
642 usb_hcd_resume_root_hub(hcd);
646 /* PCI errors [4.15.2.4] */
647 if (unlikely ((status & STS_FATAL) != 0)) {
648 /* bogus "fatal" IRQs appear on some chips... why? */
649 status = readl (&ehci->regs->status);
650 dbg_cmd (ehci, "fatal", readl (&ehci->regs->command));
651 dbg_status (ehci, "fatal", status);
652 if (status & STS_HALT) {
653 ehci_err (ehci, "fatal error\n");
656 writel (0, &ehci->regs->configured_flag);
657 /* generic layer kills/unlinks all urbs, then
658 * uses ehci_stop to clean up the rest
665 ehci_work (ehci, regs);
666 spin_unlock (&ehci->lock);
670 /*-------------------------------------------------------------------------*/
673 * non-error returns are a promise to giveback() the urb later
674 * we drop ownership so next owner (or urb unlink) can get it
676 * urb + dev is in hcd.self.controller.urb_list
677 * we're queueing TDs onto software and hardware lists
679 * hcd-specific init for hcpriv hasn't been done yet
681 * NOTE: control, bulk, and interrupt share the same code to append TDs
682 * to a (possibly active) QH, and the same QH scanning code.
684 static int ehci_urb_enqueue (
686 struct usb_host_endpoint *ep,
690 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
691 struct list_head qtd_list;
693 INIT_LIST_HEAD (&qtd_list);
695 switch (usb_pipetype (urb->pipe)) {
696 // case PIPE_CONTROL:
699 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
701 return submit_async (ehci, ep, urb, &qtd_list, mem_flags);
704 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
706 return intr_submit (ehci, ep, urb, &qtd_list, mem_flags);
708 case PIPE_ISOCHRONOUS:
709 if (urb->dev->speed == USB_SPEED_HIGH)
710 return itd_submit (ehci, urb, mem_flags);
712 return sitd_submit (ehci, urb, mem_flags);
716 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
718 /* if we need to use IAA and it's busy, defer */
719 if (qh->qh_state == QH_STATE_LINKED
721 && HC_IS_RUNNING (ehci_to_hcd(ehci)->state)) {
722 struct ehci_qh *last;
724 for (last = ehci->reclaim;
726 last = last->reclaim)
728 qh->qh_state = QH_STATE_UNLINK_WAIT;
731 /* bypass IAA if the hc can't care */
732 } else if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state) && ehci->reclaim)
733 end_unlink_async (ehci, NULL);
735 /* something else might have unlinked the qh by now */
736 if (qh->qh_state == QH_STATE_LINKED)
737 start_unlink_async (ehci, qh);
740 /* remove from hardware lists
741 * completions normally happen asynchronously
744 static int ehci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
746 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
750 spin_lock_irqsave (&ehci->lock, flags);
751 switch (usb_pipetype (urb->pipe)) {
752 // case PIPE_CONTROL:
755 qh = (struct ehci_qh *) urb->hcpriv;
758 unlink_async (ehci, qh);
762 qh = (struct ehci_qh *) urb->hcpriv;
765 switch (qh->qh_state) {
766 case QH_STATE_LINKED:
767 intr_deschedule (ehci, qh);
770 qh_completions (ehci, qh, NULL);
773 ehci_dbg (ehci, "bogus qh %p state %d\n",
778 /* reschedule QH iff another request is queued */
779 if (!list_empty (&qh->qtd_list)
780 && HC_IS_RUNNING (hcd->state)) {
783 status = qh_schedule (ehci, qh);
784 spin_unlock_irqrestore (&ehci->lock, flags);
787 // shouldn't happen often, but ...
788 // FIXME kill those tds' urbs
789 err ("can't reschedule qh %p, err %d",
796 case PIPE_ISOCHRONOUS:
799 // wait till next completion, do it then.
800 // completion irqs can wait up to 1024 msec,
804 spin_unlock_irqrestore (&ehci->lock, flags);
808 /*-------------------------------------------------------------------------*/
810 // bulk qh holds the data toggle
813 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
815 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
817 struct ehci_qh *qh, *tmp;
819 /* ASSERT: any requests/urbs are being unlinked */
820 /* ASSERT: nobody can be submitting urbs for this any more */
823 spin_lock_irqsave (&ehci->lock, flags);
828 /* endpoints can be iso streams. for now, we don't
829 * accelerate iso completions ... so spin a while.
831 if (qh->hw_info1 == 0) {
832 ehci_vdbg (ehci, "iso delay\n");
836 if (!HC_IS_RUNNING (hcd->state))
837 qh->qh_state = QH_STATE_IDLE;
838 switch (qh->qh_state) {
839 case QH_STATE_LINKED:
840 for (tmp = ehci->async->qh_next.qh;
842 tmp = tmp->qh_next.qh)
844 /* periodic qh self-unlinks on empty */
847 unlink_async (ehci, qh);
849 case QH_STATE_UNLINK: /* wait for hw to finish? */
851 spin_unlock_irqrestore (&ehci->lock, flags);
852 schedule_timeout_uninterruptible(1);
854 case QH_STATE_IDLE: /* fully unlinked */
855 if (list_empty (&qh->qtd_list)) {
859 /* else FALL THROUGH */
862 /* caller was supposed to have unlinked any requests;
863 * that's not our job. just leak this memory.
865 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
866 qh, ep->desc.bEndpointAddress, qh->qh_state,
867 list_empty (&qh->qtd_list) ? "" : "(has tds)");
872 spin_unlock_irqrestore (&ehci->lock, flags);
876 static int ehci_get_frame (struct usb_hcd *hcd)
878 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
879 return (readl (&ehci->regs->frame_index) >> 3) % ehci->periodic_size;
882 /*-------------------------------------------------------------------------*/
884 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
886 MODULE_DESCRIPTION (DRIVER_INFO);
887 MODULE_AUTHOR (DRIVER_AUTHOR);
888 MODULE_LICENSE ("GPL");
891 #include "ehci-pci.c"
892 #define PCI_DRIVER ehci_pci_driver
895 #ifdef CONFIG_MPC834x
896 #include "ehci-fsl.c"
897 #define PLATFORM_DRIVER ehci_fsl_driver
900 #ifdef CONFIG_SOC_AU1200
901 #include "ehci-au1xxx.c"
902 #define PLATFORM_DRIVER ehci_hcd_au1xxx_driver
905 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER)
906 #error "missing bus glue for ehci-hcd"
909 static int __init ehci_hcd_init(void)
913 pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
915 sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
916 sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
918 #ifdef PLATFORM_DRIVER
919 retval = platform_driver_register(&PLATFORM_DRIVER);
925 retval = pci_register_driver(&PCI_DRIVER);
927 #ifdef PLATFORM_DRIVER
928 platform_driver_unregister(&PLATFORM_DRIVER);
935 module_init(ehci_hcd_init);
937 static void __exit ehci_hcd_cleanup(void)
939 #ifdef PLATFORM_DRIVER
940 platform_driver_unregister(&PLATFORM_DRIVER);
943 pci_unregister_driver(&PCI_DRIVER);
946 module_exit(ehci_hcd_cleanup);