drivers/usb/gadget/udc/atmel_usba_udc.c

   1 /*
   2  * Driver for the Atmel USBA high speed USB device controller
   3  *
   4  * Copyright (C) 2005-2007 Atmel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/clk.h>
  11 #include <linux/clk/at91_pmc.h>
  12 #include <linux/module.h>
  13 #include <linux/init.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/io.h>
  16 #include <linux/slab.h>
  17 #include <linux/device.h>
  18 #include <linux/dma-mapping.h>
  19 #include <linux/list.h>
  20 #include <linux/mfd/syscon.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/regmap.h>
  23 #include <linux/ctype.h>
  24 #include <linux/usb/ch9.h>
  25 #include <linux/usb/gadget.h>
  26 #include <linux/usb/atmel_usba_udc.h>
  27 #include <linux/delay.h>
  28 #include <linux/of.h>
  29 #include <linux/of_gpio.h>
  30
  31 #include "atmel_usba_udc.h"
  32 #define USBA_VBUS_IRQFLAGS (IRQF_ONESHOT \
  33                            | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING)
  34
  35 #ifdef CONFIG_USB_GADGET_DEBUG_FS
  36 #include <linux/debugfs.h>
  37 #include <linux/uaccess.h>
  38
  39 static int queue_dbg_open(struct inode *inode, struct file *file)
  40 {
  41         struct usba_ep *ep = inode->i_private;
  42         struct usba_request *req, *req_copy;
  43         struct list_head *queue_data;
  44
  45         queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
  46         if (!queue_data)
  47                 return -ENOMEM;
  48         INIT_LIST_HEAD(queue_data);
  49
  50         spin_lock_irq(&ep->udc->lock);
  51         list_for_each_entry(req, &ep->queue, queue) {
  52                 req_copy = kmemdup(req, sizeof(*req_copy), GFP_ATOMIC);
  53                 if (!req_copy)
  54                         goto fail;
  55                 list_add_tail(&req_copy->queue, queue_data);
  56         }
  57         spin_unlock_irq(&ep->udc->lock);
  58
  59         file->private_data = queue_data;
  60         return 0;
  61
  62 fail:
  63         spin_unlock_irq(&ep->udc->lock);
  64         list_for_each_entry_safe(req, req_copy, queue_data, queue) {
  65                 list_del(&req->queue);
  66                 kfree(req);
  67         }
  68         kfree(queue_data);
  69         return -ENOMEM;
  70 }
  71
  72 /*
  73  * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
  74  *
  75  * b: buffer address
  76  * l: buffer length
  77  * I/i: interrupt/no interrupt
  78  * Z/z: zero/no zero
  79  * S/s: short ok/short not ok
  80  * s: status
  81  * n: nr_packets
  82  * F/f: submitted/not submitted to FIFO
  83  * D/d: using/not using DMA
  84  * L/l: last transaction/not last transaction
  85  */
  86 static ssize_t queue_dbg_read(struct file *file, char __user *buf,
  87                 size_t nbytes, loff_t *ppos)
  88 {
  89         struct list_head *queue = file->private_data;
  90         struct usba_request *req, *tmp_req;
  91         size_t len, remaining, actual = 0;
  92         char tmpbuf[38];
  93
  94         if (!access_ok(VERIFY_WRITE, buf, nbytes))
  95                 return -EFAULT;
  96
  97         inode_lock(file_inode(file));
  98         list_for_each_entry_safe(req, tmp_req, queue, queue) {
  99                 len = snprintf(tmpbuf, sizeof(tmpbuf),
 100                                 "%8p %08x %c%c%c %5d %c%c%c\n",
 101                                 req->req.buf, req->req.length,
 102                                 req->req.no_interrupt ? 'i' : 'I',
 103                                 req->req.zero ? 'Z' : 'z',
 104                                 req->req.short_not_ok ? 's' : 'S',
 105                                 req->req.status,
 106                                 req->submitted ? 'F' : 'f',
 107                                 req->using_dma ? 'D' : 'd',
 108                                 req->last_transaction ? 'L' : 'l');
 109                 len = min(len, sizeof(tmpbuf));
 110                 if (len > nbytes)
 111                         break;
 112
 113                 list_del(&req->queue);
 114                 kfree(req);
 115
 116                 remaining = __copy_to_user(buf, tmpbuf, len);
 117                 actual += len - remaining;
 118                 if (remaining)
 119                         break;
 120
 121                 nbytes -= len;
 122                 buf += len;
 123         }
 124         inode_unlock(file_inode(file));
 125
 126         return actual;
 127 }
 128
 129 static int queue_dbg_release(struct inode *inode, struct file *file)
 130 {
 131         struct list_head *queue_data = file->private_data;
 132         struct usba_request *req, *tmp_req;
 133
 134         list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
 135                 list_del(&req->queue);
 136                 kfree(req);
 137         }
 138         kfree(queue_data);
 139         return 0;
 140 }
 141
 142 static int regs_dbg_open(struct inode *inode, struct file *file)
 143 {
 144         struct usba_udc *udc;
 145         unsigned int i;
 146         u32 *data;
 147         int ret = -ENOMEM;
 148
 149         inode_lock(inode);
 150         udc = inode->i_private;
 151         data = kmalloc(inode->i_size, GFP_KERNEL);
 152         if (!data)
 153                 goto out;
 154
 155         spin_lock_irq(&udc->lock);
 156         for (i = 0; i < inode->i_size / 4; i++)
 157                 data[i] = readl_relaxed(udc->regs + i * 4);
 158         spin_unlock_irq(&udc->lock);
 159
 160         file->private_data = data;
 161         ret = 0;
 162
 163 out:
 164         inode_unlock(inode);
 165
 166         return ret;
 167 }
 168
 169 static ssize_t regs_dbg_read(struct file *file, char __user *buf,
 170                 size_t nbytes, loff_t *ppos)
 171 {
 172         struct inode *inode = file_inode(file);
 173         int ret;
 174
 175         inode_lock(inode);
 176         ret = simple_read_from_buffer(buf, nbytes, ppos,
 177                         file->private_data,
 178                         file_inode(file)->i_size);
 179         inode_unlock(inode);
 180
 181         return ret;
 182 }
 183
 184 static int regs_dbg_release(struct inode *inode, struct file *file)
 185 {
 186         kfree(file->private_data);
 187         return 0;
 188 }
 189
 190 const struct file_operations queue_dbg_fops = {
 191         .owner          = THIS_MODULE,
 192         .open           = queue_dbg_open,
 193         .llseek         = no_llseek,
 194         .read           = queue_dbg_read,
 195         .release        = queue_dbg_release,
 196 };
 197
 198 const struct file_operations regs_dbg_fops = {
 199         .owner          = THIS_MODULE,
 200         .open           = regs_dbg_open,
 201         .llseek         = generic_file_llseek,
 202         .read           = regs_dbg_read,
 203         .release        = regs_dbg_release,
 204 };
 205
 206 static void usba_ep_init_debugfs(struct usba_udc *udc,
 207                 struct usba_ep *ep)
 208 {
 209         struct dentry *ep_root;
 210
 211         ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
 212         if (!ep_root)
 213                 goto err_root;
 214         ep->debugfs_dir = ep_root;
 215
 216         ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
 217                                                 ep, &queue_dbg_fops);
 218         if (!ep->debugfs_queue)
 219                 goto err_queue;
 220
 221         if (ep->can_dma) {
 222                 ep->debugfs_dma_status
 223                         = debugfs_create_u32("dma_status", 0400, ep_root,
 224                                         &ep->last_dma_status);
 225                 if (!ep->debugfs_dma_status)
 226                         goto err_dma_status;
 227         }
 228         if (ep_is_control(ep)) {
 229                 ep->debugfs_state
 230                         = debugfs_create_u32("state", 0400, ep_root,
 231                                         &ep->state);
 232                 if (!ep->debugfs_state)
 233                         goto err_state;
 234         }
 235
 236         return;
 237
 238 err_state:
 239         if (ep->can_dma)
 240                 debugfs_remove(ep->debugfs_dma_status);
 241 err_dma_status:
 242         debugfs_remove(ep->debugfs_queue);
 243 err_queue:
 244         debugfs_remove(ep_root);
 245 err_root:
 246         dev_err(&ep->udc->pdev->dev,
 247                 "failed to create debugfs directory for %s\n", ep->ep.name);
 248 }
 249
 250 static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
 251 {
 252         debugfs_remove(ep->debugfs_queue);
 253         debugfs_remove(ep->debugfs_dma_status);
 254         debugfs_remove(ep->debugfs_state);
 255         debugfs_remove(ep->debugfs_dir);
 256         ep->debugfs_dma_status = NULL;
 257         ep->debugfs_dir = NULL;
 258 }
 259
 260 static void usba_init_debugfs(struct usba_udc *udc)
 261 {
 262         struct dentry *root, *regs;
 263         struct resource *regs_resource;
 264
 265         root = debugfs_create_dir(udc->gadget.name, NULL);
 266         if (IS_ERR(root) || !root)
 267                 goto err_root;
 268         udc->debugfs_root = root;
 269
 270         regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
 271                                 CTRL_IOMEM_ID);
 272
 273         if (regs_resource) {
 274                 regs = debugfs_create_file_size("regs", 0400, root, udc,
 275                                                 &regs_dbg_fops,
 276                                                 resource_size(regs_resource));
 277                 if (!regs)
 278                         goto err_regs;
 279                 udc->debugfs_regs = regs;
 280         }
 281
 282         usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
 283
 284         return;
 285
 286 err_regs:
 287         debugfs_remove(root);
 288 err_root:
 289         udc->debugfs_root = NULL;
 290         dev_err(&udc->pdev->dev, "debugfs is not available\n");
 291 }
 292
 293 static void usba_cleanup_debugfs(struct usba_udc *udc)
 294 {
 295         usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
 296         debugfs_remove(udc->debugfs_regs);
 297         debugfs_remove(udc->debugfs_root);
 298         udc->debugfs_regs = NULL;
 299         udc->debugfs_root = NULL;
 300 }
 301 #else
 302 static inline void usba_ep_init_debugfs(struct usba_udc *udc,
 303                                          struct usba_ep *ep)
 304 {
 305
 306 }
 307
 308 static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
 309 {
 310
 311 }
 312
 313 static inline void usba_init_debugfs(struct usba_udc *udc)
 314 {
 315
 316 }
 317
 318 static inline void usba_cleanup_debugfs(struct usba_udc *udc)
 319 {
 320
 321 }
 322 #endif
 323
 324 static ushort fifo_mode;
 325
 326 module_param(fifo_mode, ushort, 0x0);
 327 MODULE_PARM_DESC(fifo_mode, "Endpoint configuration mode");
 328
 329 /* mode 0 - uses autoconfig */
 330
 331 /* mode 1 - fits in 8KB, generic max fifo configuration */
 332 static struct usba_fifo_cfg mode_1_cfg[] = {
 333 { .hw_ep_num = 0, .fifo_size = 64,      .nr_banks = 1, },
 334 { .hw_ep_num = 1, .fifo_size = 1024,    .nr_banks = 2, },
 335 { .hw_ep_num = 2, .fifo_size = 1024,    .nr_banks = 1, },
 336 { .hw_ep_num = 3, .fifo_size = 1024,    .nr_banks = 1, },
 337 { .hw_ep_num = 4, .fifo_size = 1024,    .nr_banks = 1, },
 338 { .hw_ep_num = 5, .fifo_size = 1024,    .nr_banks = 1, },
 339 { .hw_ep_num = 6, .fifo_size = 1024,    .nr_banks = 1, },
 340 };
 341
 342 /* mode 2 - fits in 8KB, performance max fifo configuration */
 343 static struct usba_fifo_cfg mode_2_cfg[] = {
 344 { .hw_ep_num = 0, .fifo_size = 64,      .nr_banks = 1, },
 345 { .hw_ep_num = 1, .fifo_size = 1024,    .nr_banks = 3, },
 346 { .hw_ep_num = 2, .fifo_size = 1024,    .nr_banks = 2, },
 347 { .hw_ep_num = 3, .fifo_size = 1024,    .nr_banks = 2, },
 348 };
 349
 350 /* mode 3 - fits in 8KB, mixed fifo configuration */
 351 static struct usba_fifo_cfg mode_3_cfg[] = {
 352 { .hw_ep_num = 0, .fifo_size = 64,      .nr_banks = 1, },
 353 { .hw_ep_num = 1, .fifo_size = 1024,    .nr_banks = 2, },
 354 { .hw_ep_num = 2, .fifo_size = 512,     .nr_banks = 2, },
 355 { .hw_ep_num = 3, .fifo_size = 512,     .nr_banks = 2, },
 356 { .hw_ep_num = 4, .fifo_size = 512,     .nr_banks = 2, },
 357 { .hw_ep_num = 5, .fifo_size = 512,     .nr_banks = 2, },
 358 { .hw_ep_num = 6, .fifo_size = 512,     .nr_banks = 2, },
 359 };
 360
 361 /* mode 4 - fits in 8KB, custom fifo configuration */
 362 static struct usba_fifo_cfg mode_4_cfg[] = {
 363 { .hw_ep_num = 0, .fifo_size = 64,      .nr_banks = 1, },
 364 { .hw_ep_num = 1, .fifo_size = 512,     .nr_banks = 2, },
 365 { .hw_ep_num = 2, .fifo_size = 512,     .nr_banks = 2, },
 366 { .hw_ep_num = 3, .fifo_size = 8,       .nr_banks = 2, },
 367 { .hw_ep_num = 4, .fifo_size = 512,     .nr_banks = 2, },
 368 { .hw_ep_num = 5, .fifo_size = 512,     .nr_banks = 2, },
 369 { .hw_ep_num = 6, .fifo_size = 16,      .nr_banks = 2, },
 370 { .hw_ep_num = 7, .fifo_size = 8,       .nr_banks = 2, },
 371 { .hw_ep_num = 8, .fifo_size = 8,       .nr_banks = 2, },
 372 };
 373 /* Add additional configurations here */
 374
 375 static int usba_config_fifo_table(struct usba_udc *udc)
 376 {
 377         int n;
 378
 379         switch (fifo_mode) {
 380         default:
 381                 fifo_mode = 0;
 382         case 0:
 383                 udc->fifo_cfg = NULL;
 384                 n = 0;
 385                 break;
 386         case 1:
 387                 udc->fifo_cfg = mode_1_cfg;
 388                 n = ARRAY_SIZE(mode_1_cfg);
 389                 break;
 390         case 2:
 391                 udc->fifo_cfg = mode_2_cfg;
 392                 n = ARRAY_SIZE(mode_2_cfg);
 393                 break;
 394         case 3:
 395                 udc->fifo_cfg = mode_3_cfg;
 396                 n = ARRAY_SIZE(mode_3_cfg);
 397                 break;
 398         case 4:
 399                 udc->fifo_cfg = mode_4_cfg;
 400                 n = ARRAY_SIZE(mode_4_cfg);
 401                 break;
 402         }
 403         DBG(DBG_HW, "Setup fifo_mode %d\n", fifo_mode);
 404
 405         return n;
 406 }
 407
 408 static inline u32 usba_int_enb_get(struct usba_udc *udc)
 409 {
 410         return udc->int_enb_cache;
 411 }
 412
 413 static inline void usba_int_enb_set(struct usba_udc *udc, u32 val)
 414 {
 415         usba_writel(udc, INT_ENB, val);
 416         udc->int_enb_cache = val;
 417 }
 418
 419 static int vbus_is_present(struct usba_udc *udc)
 420 {
 421         if (gpio_is_valid(udc->vbus_pin))
 422                 return gpio_get_value(udc->vbus_pin) ^ udc->vbus_pin_inverted;
 423
 424         /* No Vbus detection: Assume always present */
 425         return 1;
 426 }
 427
 428 static void toggle_bias(struct usba_udc *udc, int is_on)
 429 {
 430         if (udc->errata && udc->errata->toggle_bias)
 431                 udc->errata->toggle_bias(udc, is_on);
 432 }
 433
 434 static void generate_bias_pulse(struct usba_udc *udc)
 435 {
 436         if (!udc->bias_pulse_needed)
 437                 return;
 438
 439         if (udc->errata && udc->errata->pulse_bias)
 440                 udc->errata->pulse_bias(udc);
 441
 442         udc->bias_pulse_needed = false;
 443 }
 444
 445 static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
 446 {
 447         unsigned int transaction_len;
 448
 449         transaction_len = req->req.length - req->req.actual;
 450         req->last_transaction = 1;
 451         if (transaction_len > ep->ep.maxpacket) {
 452                 transaction_len = ep->ep.maxpacket;
 453                 req->last_transaction = 0;
 454         } else if (transaction_len == ep->ep.maxpacket && req->req.zero)
 455                 req->last_transaction = 0;
 456
 457         DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
 458                 ep->ep.name, req, transaction_len,
 459                 req->last_transaction ? ", done" : "");
 460
 461         memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
 462         usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
 463         req->req.actual += transaction_len;
 464 }
 465
 466 static void submit_request(struct usba_ep *ep, struct usba_request *req)
 467 {
 468         DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
 469                 ep->ep.name, req, req->req.length);
 470
 471         req->req.actual = 0;
 472         req->submitted = 1;
 473
 474         if (req->using_dma) {
 475                 if (req->req.length == 0) {
 476                         usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
 477                         return;
 478                 }
 479
 480                 if (req->req.zero)
 481                         usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
 482                 else
 483                         usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
 484
 485                 usba_dma_writel(ep, ADDRESS, req->req.dma);
 486                 usba_dma_writel(ep, CONTROL, req->ctrl);
 487         } else {
 488                 next_fifo_transaction(ep, req);
 489                 if (req->last_transaction) {
 490                         usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
 491                         usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
 492                 } else {
 493                         usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
 494                         usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
 495                 }
 496         }
 497 }
 498
 499 static void submit_next_request(struct usba_ep *ep)
 500 {
 501         struct usba_request *req;
 502
 503         if (list_empty(&ep->queue)) {
 504                 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
 505                 return;
 506         }
 507
 508         req = list_entry(ep->queue.next, struct usba_request, queue);
 509         if (!req->submitted)
 510                 submit_request(ep, req);
 511 }
 512
 513 static void send_status(struct usba_udc *udc, struct usba_ep *ep)
 514 {
 515         ep->state = STATUS_STAGE_IN;
 516         usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
 517         usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
 518 }
 519
 520 static void receive_data(struct usba_ep *ep)
 521 {
 522         struct usba_udc *udc = ep->udc;
 523         struct usba_request *req;
 524         unsigned long status;
 525         unsigned int bytecount, nr_busy;
 526         int is_complete = 0;
 527
 528         status = usba_ep_readl(ep, STA);
 529         nr_busy = USBA_BFEXT(BUSY_BANKS, status);
 530
 531         DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
 532
 533         while (nr_busy > 0) {
 534                 if (list_empty(&ep->queue)) {
 535                         usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
 536                         break;
 537                 }
 538                 req = list_entry(ep->queue.next,
 539                                  struct usba_request, queue);
 540
 541                 bytecount = USBA_BFEXT(BYTE_COUNT, status);
 542
 543                 if (status & (1 << 31))
 544                         is_complete = 1;
 545                 if (req->req.actual + bytecount >= req->req.length) {
 546                         is_complete = 1;
 547                         bytecount = req->req.length - req->req.actual;
 548                 }
 549
 550                 memcpy_fromio(req->req.buf + req->req.actual,
 551                                 ep->fifo, bytecount);
 552                 req->req.actual += bytecount;
 553
 554                 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
 555
 556                 if (is_complete) {
 557                         DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
 558                         req->req.status = 0;
 559                         list_del_init(&req->queue);
 560                         usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
 561                         spin_unlock(&udc->lock);
 562                         usb_gadget_giveback_request(&ep->ep, &req->req);
 563                         spin_lock(&udc->lock);
 564                 }
 565
 566                 status = usba_ep_readl(ep, STA);
 567                 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
 568
 569                 if (is_complete && ep_is_control(ep)) {
 570                         send_status(udc, ep);
 571                         break;
 572                 }
 573         }
 574 }
 575
 576 static void
 577 request_complete(struct usba_ep *ep, struct usba_request *req, int status)
 578 {
 579         struct usba_udc *udc = ep->udc;
 580
 581         WARN_ON(!list_empty(&req->queue));
 582
 583         if (req->req.status == -EINPROGRESS)
 584                 req->req.status = status;
 585
 586         if (req->using_dma)
 587                 usb_gadget_unmap_request(&udc->gadget, &req->req, ep->is_in);
 588
 589         DBG(DBG_GADGET | DBG_REQ,
 590                 "%s: req %p complete: status %d, actual %u\n",
 591                 ep->ep.name, req, req->req.status, req->req.actual);
 592
 593         spin_unlock(&udc->lock);
 594         usb_gadget_giveback_request(&ep->ep, &req->req);
 595         spin_lock(&udc->lock);
 596 }
 597
 598 static void
 599 request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
 600 {
 601         struct usba_request *req, *tmp_req;
 602
 603         list_for_each_entry_safe(req, tmp_req, list, queue) {
 604                 list_del_init(&req->queue);
 605                 request_complete(ep, req, status);
 606         }
 607 }
 608
 609 static int
 610 usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
 611 {
 612         struct usba_ep *ep = to_usba_ep(_ep);
 613         struct usba_udc *udc = ep->udc;
 614         unsigned long flags, maxpacket;
 615         unsigned int nr_trans;
 616
 617         DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
 618
 619         maxpacket = usb_endpoint_maxp(desc);
 620
 621         if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
 622                         || ep->index == 0
 623                         || desc->bDescriptorType != USB_DT_ENDPOINT
 624                         || maxpacket == 0
 625                         || maxpacket > ep->fifo_size) {
 626                 DBG(DBG_ERR, "ep_enable: Invalid argument");
 627                 return -EINVAL;
 628         }
 629
 630         ep->is_isoc = 0;
 631         ep->is_in = 0;
 632
 633         DBG(DBG_ERR, "%s: EPT_CFG = 0x%lx (maxpacket = %lu)\n",
 634                         ep->ep.name, ep->ept_cfg, maxpacket);
 635
 636         if (usb_endpoint_dir_in(desc)) {
 637                 ep->is_in = 1;
 638                 ep->ept_cfg |= USBA_EPT_DIR_IN;
 639         }
 640
 641         switch (usb_endpoint_type(desc)) {
 642         case USB_ENDPOINT_XFER_CONTROL:
 643                 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
 644                 break;
 645         case USB_ENDPOINT_XFER_ISOC:
 646                 if (!ep->can_isoc) {
 647                         DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
 648                                         ep->ep.name);
 649                         return -EINVAL;
 650                 }
 651
 652                 /*
 653                  * Bits 11:12 specify number of _additional_
 654                  * transactions per microframe.
 655                  */
 656                 nr_trans = usb_endpoint_maxp_mult(desc);
 657                 if (nr_trans > 3)
 658                         return -EINVAL;
 659
 660                 ep->is_isoc = 1;
 661                 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
 662                 ep->ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
 663
 664                 break;
 665         case USB_ENDPOINT_XFER_BULK:
 666                 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
 667                 break;
 668         case USB_ENDPOINT_XFER_INT:
 669                 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
 670                 break;
 671         }
 672
 673         spin_lock_irqsave(&ep->udc->lock, flags);
 674
 675         ep->ep.desc = desc;
 676         ep->ep.maxpacket = maxpacket;
 677
 678         usba_ep_writel(ep, CFG, ep->ept_cfg);
 679         usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
 680
 681         if (ep->can_dma) {
 682                 u32 ctrl;
 683
 684                 usba_int_enb_set(udc, usba_int_enb_get(udc) |
 685                                       USBA_BF(EPT_INT, 1 << ep->index) |
 686                                       USBA_BF(DMA_INT, 1 << ep->index));
 687                 ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
 688                 usba_ep_writel(ep, CTL_ENB, ctrl);
 689         } else {
 690                 usba_int_enb_set(udc, usba_int_enb_get(udc) |
 691                                       USBA_BF(EPT_INT, 1 << ep->index));
 692         }
 693
 694         spin_unlock_irqrestore(&udc->lock, flags);
 695
 696         DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
 697                         (unsigned long)usba_ep_readl(ep, CFG));
 698         DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
 699                         (unsigned long)usba_int_enb_get(udc));
 700
 701         return 0;
 702 }
 703
 704 static int usba_ep_disable(struct usb_ep *_ep)
 705 {
 706         struct usba_ep *ep = to_usba_ep(_ep);
 707         struct usba_udc *udc = ep->udc;
 708         LIST_HEAD(req_list);
 709         unsigned long flags;
 710
 711         DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
 712
 713         spin_lock_irqsave(&udc->lock, flags);
 714
 715         if (!ep->ep.desc) {
 716                 spin_unlock_irqrestore(&udc->lock, flags);
 717                 /* REVISIT because this driver disables endpoints in
 718                  * reset_all_endpoints() before calling disconnect(),
 719                  * most gadget drivers would trigger this non-error ...
 720                  */
 721                 if (udc->gadget.speed != USB_SPEED_UNKNOWN)
 722                         DBG(DBG_ERR, "ep_disable: %s not enabled\n",
 723                                         ep->ep.name);
 724                 return -EINVAL;
 725         }
 726         ep->ep.desc = NULL;
 727
 728         list_splice_init(&ep->queue, &req_list);
 729         if (ep->can_dma) {
 730                 usba_dma_writel(ep, CONTROL, 0);
 731                 usba_dma_writel(ep, ADDRESS, 0);
 732                 usba_dma_readl(ep, STATUS);
 733         }
 734         usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
 735         usba_int_enb_set(udc, usba_int_enb_get(udc) &
 736                               ~USBA_BF(EPT_INT, 1 << ep->index));
 737
 738         request_complete_list(ep, &req_list, -ESHUTDOWN);
 739
 740         spin_unlock_irqrestore(&udc->lock, flags);
 741
 742         return 0;
 743 }
 744
 745 static struct usb_request *
 746 usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
 747 {
 748         struct usba_request *req;
 749
 750         DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
 751
 752         req = kzalloc(sizeof(*req), gfp_flags);
 753         if (!req)
 754                 return NULL;
 755
 756         INIT_LIST_HEAD(&req->queue);
 757
 758         return &req->req;
 759 }
 760
 761 static void
 762 usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
 763 {
 764         struct usba_request *req = to_usba_req(_req);
 765
 766         DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
 767
 768         kfree(req);
 769 }
 770
 771 static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
 772                 struct usba_request *req, gfp_t gfp_flags)
 773 {
 774         unsigned long flags;
 775         int ret;
 776
 777         DBG(DBG_DMA, "%s: req l/%u d/%pad %c%c%c\n",
 778                 ep->ep.name, req->req.length, &req->req.dma,
 779                 req->req.zero ? 'Z' : 'z',
 780                 req->req.short_not_ok ? 'S' : 's',
 781                 req->req.no_interrupt ? 'I' : 'i');
 782
 783         if (req->req.length > 0x10000) {
 784                 /* Lengths from 0 to 65536 (inclusive) are supported */
 785                 DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
 786                 return -EINVAL;
 787         }
 788
 789         ret = usb_gadget_map_request(&udc->gadget, &req->req, ep->is_in);
 790         if (ret)
 791                 return ret;
 792
 793         req->using_dma = 1;
 794         req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
 795                         | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
 796                         | USBA_DMA_END_BUF_EN;
 797
 798         if (!ep->is_in)
 799                 req->ctrl |= USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
 800
 801         /*
 802          * Add this request to the queue and submit for DMA if
 803          * possible. Check if we're still alive first -- we may have
 804          * received a reset since last time we checked.
 805          */
 806         ret = -ESHUTDOWN;
 807         spin_lock_irqsave(&udc->lock, flags);
 808         if (ep->ep.desc) {
 809                 if (list_empty(&ep->queue))
 810                         submit_request(ep, req);
 811
 812                 list_add_tail(&req->queue, &ep->queue);
 813                 ret = 0;
 814         }
 815         spin_unlock_irqrestore(&udc->lock, flags);
 816
 817         return ret;
 818 }
 819
 820 static int
 821 usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 822 {
 823         struct usba_request *req = to_usba_req(_req);
 824         struct usba_ep *ep = to_usba_ep(_ep);
 825         struct usba_udc *udc = ep->udc;
 826         unsigned long flags;
 827         int ret;
 828
 829         DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
 830                         ep->ep.name, req, _req->length);
 831
 832         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN ||
 833             !ep->ep.desc)
 834                 return -ESHUTDOWN;
 835
 836         req->submitted = 0;
 837         req->using_dma = 0;
 838         req->last_transaction = 0;
 839
 840         _req->status = -EINPROGRESS;
 841         _req->actual = 0;
 842
 843         if (ep->can_dma)
 844                 return queue_dma(udc, ep, req, gfp_flags);
 845
 846         /* May have received a reset since last time we checked */
 847         ret = -ESHUTDOWN;
 848         spin_lock_irqsave(&udc->lock, flags);
 849         if (ep->ep.desc) {
 850                 list_add_tail(&req->queue, &ep->queue);
 851
 852                 if ((!ep_is_control(ep) && ep->is_in) ||
 853                         (ep_is_control(ep)
 854                                 && (ep->state == DATA_STAGE_IN
 855                                         || ep->state == STATUS_STAGE_IN)))
 856                         usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
 857                 else
 858                         usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
 859                 ret = 0;
 860         }
 861         spin_unlock_irqrestore(&udc->lock, flags);
 862
 863         return ret;
 864 }
 865
 866 static void
 867 usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
 868 {
 869         req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
 870 }
 871
 872 static int stop_dma(struct usba_ep *ep, u32 *pstatus)
 873 {
 874         unsigned int timeout;
 875         u32 status;
 876
 877         /*
 878          * Stop the DMA controller. When writing both CH_EN
 879          * and LINK to 0, the other bits are not affected.
 880          */
 881         usba_dma_writel(ep, CONTROL, 0);
 882
 883         /* Wait for the FIFO to empty */
 884         for (timeout = 40; timeout; --timeout) {
 885                 status = usba_dma_readl(ep, STATUS);
 886                 if (!(status & USBA_DMA_CH_EN))
 887                         break;
 888                 udelay(1);
 889         }
 890
 891         if (pstatus)
 892                 *pstatus = status;
 893
 894         if (timeout == 0) {
 895                 dev_err(&ep->udc->pdev->dev,
 896                         "%s: timed out waiting for DMA FIFO to empty\n",
 897                         ep->ep.name);
 898                 return -ETIMEDOUT;
 899         }
 900
 901         return 0;
 902 }
 903
 904 static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 905 {
 906         struct usba_ep *ep = to_usba_ep(_ep);
 907         struct usba_udc *udc = ep->udc;
 908         struct usba_request *req;
 909         unsigned long flags;
 910         u32 status;
 911
 912         DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
 913                         ep->ep.name, req);
 914
 915         spin_lock_irqsave(&udc->lock, flags);
 916
 917         list_for_each_entry(req, &ep->queue, queue) {
 918                 if (&req->req == _req)
 919                         break;
 920         }
 921
 922         if (&req->req != _req) {
 923                 spin_unlock_irqrestore(&udc->lock, flags);
 924                 return -EINVAL;
 925         }
 926
 927         if (req->using_dma) {
 928                 /*
 929                  * If this request is currently being transferred,
 930                  * stop the DMA controller and reset the FIFO.
 931                  */
 932                 if (ep->queue.next == &req->queue) {
 933                         status = usba_dma_readl(ep, STATUS);
 934                         if (status & USBA_DMA_CH_EN)
 935                                 stop_dma(ep, &status);
 936
 937 #ifdef CONFIG_USB_GADGET_DEBUG_FS
 938                         ep->last_dma_status = status;
 939 #endif
 940
 941                         usba_writel(udc, EPT_RST, 1 << ep->index);
 942
 943                         usba_update_req(ep, req, status);
 944                 }
 945         }
 946
 947         /*
 948          * Errors should stop the queue from advancing until the
 949          * completion function returns.
 950          */
 951         list_del_init(&req->queue);
 952
 953         request_complete(ep, req, -ECONNRESET);
 954
 955         /* Process the next request if any */
 956         submit_next_request(ep);
 957         spin_unlock_irqrestore(&udc->lock, flags);
 958
 959         return 0;
 960 }
 961
 962 static int usba_ep_set_halt(struct usb_ep *_ep, int value)
 963 {
 964         struct usba_ep *ep = to_usba_ep(_ep);
 965         struct usba_udc *udc = ep->udc;
 966         unsigned long flags;
 967         int ret = 0;
 968
 969         DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
 970                         value ? "set" : "clear");
 971
 972         if (!ep->ep.desc) {
 973                 DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
 974                                 ep->ep.name);
 975                 return -ENODEV;
 976         }
 977         if (ep->is_isoc) {
 978                 DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
 979                                 ep->ep.name);
 980                 return -ENOTTY;
 981         }
 982
 983         spin_lock_irqsave(&udc->lock, flags);
 984
 985         /*
 986          * We can't halt IN endpoints while there are still data to be
 987          * transferred
 988          */
 989         if (!list_empty(&ep->queue)
 990                         || ((value && ep->is_in && (usba_ep_readl(ep, STA)
 991                                         & USBA_BF(BUSY_BANKS, -1L))))) {
 992                 ret = -EAGAIN;
 993         } else {
 994                 if (value)
 995                         usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
 996                 else
 997                         usba_ep_writel(ep, CLR_STA,
 998                                         USBA_FORCE_STALL | USBA_TOGGLE_CLR);
 999                 usba_ep_readl(ep, STA);
1000         }
1001
1002         spin_unlock_irqrestore(&udc->lock, flags);
1003
1004         return ret;
1005 }
1006
1007 static int usba_ep_fifo_status(struct usb_ep *_ep)
1008 {
1009         struct usba_ep *ep = to_usba_ep(_ep);
1010
1011         return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
1012 }
1013
1014 static void usba_ep_fifo_flush(struct usb_ep *_ep)
1015 {
1016         struct usba_ep *ep = to_usba_ep(_ep);
1017         struct usba_udc *udc = ep->udc;
1018
1019         usba_writel(udc, EPT_RST, 1 << ep->index);
1020 }
1021
1022 static const struct usb_ep_ops usba_ep_ops = {
1023         .enable         = usba_ep_enable,
1024         .disable        = usba_ep_disable,
1025         .alloc_request  = usba_ep_alloc_request,
1026         .free_request   = usba_ep_free_request,
1027         .queue          = usba_ep_queue,
1028         .dequeue        = usba_ep_dequeue,
1029         .set_halt       = usba_ep_set_halt,
1030         .fifo_status    = usba_ep_fifo_status,
1031         .fifo_flush     = usba_ep_fifo_flush,
1032 };
1033
1034 static int usba_udc_get_frame(struct usb_gadget *gadget)
1035 {
1036         struct usba_udc *udc = to_usba_udc(gadget);
1037
1038         return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
1039 }
1040
1041 static int usba_udc_wakeup(struct usb_gadget *gadget)
1042 {
1043         struct usba_udc *udc = to_usba_udc(gadget);
1044         unsigned long flags;
1045         u32 ctrl;
1046         int ret = -EINVAL;
1047
1048         spin_lock_irqsave(&udc->lock, flags);
1049         if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
1050                 ctrl = usba_readl(udc, CTRL);
1051                 usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
1052                 ret = 0;
1053         }
1054         spin_unlock_irqrestore(&udc->lock, flags);
1055
1056         return ret;
1057 }
1058
1059 static int
1060 usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
1061 {
1062         struct usba_udc *udc = to_usba_udc(gadget);
1063         unsigned long flags;
1064
1065         gadget->is_selfpowered = (is_selfpowered != 0);
1066         spin_lock_irqsave(&udc->lock, flags);
1067         if (is_selfpowered)
1068                 udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
1069         else
1070                 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1071         spin_unlock_irqrestore(&udc->lock, flags);
1072
1073         return 0;
1074 }
1075
1076 static int atmel_usba_start(struct usb_gadget *gadget,
1077                 struct usb_gadget_driver *driver);
1078 static int atmel_usba_stop(struct usb_gadget *gadget);
1079
1080 static struct usb_ep *atmel_usba_match_ep(struct usb_gadget *gadget,
1081                                 struct usb_endpoint_descriptor  *desc,
1082                                 struct usb_ss_ep_comp_descriptor *ep_comp)
1083 {
1084         struct usb_ep   *_ep;
1085         struct usba_ep *ep;
1086
1087         /* Look at endpoints until an unclaimed one looks usable */
1088         list_for_each_entry(_ep, &gadget->ep_list, ep_list) {
1089                 if (usb_gadget_ep_match_desc(gadget, _ep, desc, ep_comp))
1090                         goto found_ep;
1091         }
1092         /* Fail */
1093         return NULL;
1094
1095 found_ep:
1096
1097         if (fifo_mode == 0) {
1098                 /* Optimize hw fifo size based on ep type and other info */
1099                 ep = to_usba_ep(_ep);
1100
1101                 switch (usb_endpoint_type(desc)) {
1102                 case USB_ENDPOINT_XFER_CONTROL:
1103                         break;
1104
1105                 case USB_ENDPOINT_XFER_ISOC:
1106                         ep->fifo_size = 1024;
1107                         ep->nr_banks = 2;
1108                         break;
1109
1110                 case USB_ENDPOINT_XFER_BULK:
1111                         ep->fifo_size = 512;
1112                         ep->nr_banks = 1;
1113                         break;
1114
1115                 case USB_ENDPOINT_XFER_INT:
1116                         if (desc->wMaxPacketSize == 0)
1117                                 ep->fifo_size =
1118                                     roundup_pow_of_two(_ep->maxpacket_limit);
1119                         else
1120                                 ep->fifo_size =
1121                                     roundup_pow_of_two(le16_to_cpu(desc->wMaxPacketSize));
1122                         ep->nr_banks = 1;
1123                         break;
1124                 }
1125
1126                 /* It might be a little bit late to set this */
1127                 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
1128
1129                 /* Generate ept_cfg basd on FIFO size and number of banks */
1130                 if (ep->fifo_size  <= 8)
1131                         ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
1132                 else
1133                         /* LSB is bit 1, not 0 */
1134                         ep->ept_cfg =
1135                                 USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
1136
1137                 ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
1138
1139                 ep->udc->configured_ep++;
1140         }
1141
1142         return _ep;
1143 }
1144
1145 static const struct usb_gadget_ops usba_udc_ops = {
1146         .get_frame              = usba_udc_get_frame,
1147         .wakeup                 = usba_udc_wakeup,
1148         .set_selfpowered        = usba_udc_set_selfpowered,
1149         .udc_start              = atmel_usba_start,
1150         .udc_stop               = atmel_usba_stop,
1151         .match_ep               = atmel_usba_match_ep,
1152 };
1153
1154 static struct usb_endpoint_descriptor usba_ep0_desc = {
1155         .bLength = USB_DT_ENDPOINT_SIZE,
1156         .bDescriptorType = USB_DT_ENDPOINT,
1157         .bEndpointAddress = 0,
1158         .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
1159         .wMaxPacketSize = cpu_to_le16(64),
1160         /* FIXME: I have no idea what to put here */
1161         .bInterval = 1,
1162 };
1163
1164 static struct usb_gadget usba_gadget_template = {
1165         .ops            = &usba_udc_ops,
1166         .max_speed      = USB_SPEED_HIGH,
1167         .name           = "atmel_usba_udc",
1168 };
1169
1170 /*
1171  * Called with interrupts disabled and udc->lock held.
1172  */
1173 static void reset_all_endpoints(struct usba_udc *udc)
1174 {
1175         struct usba_ep *ep;
1176         struct usba_request *req, *tmp_req;
1177
1178         usba_writel(udc, EPT_RST, ~0UL);
1179
1180         ep = to_usba_ep(udc->gadget.ep0);
1181         list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
1182                 list_del_init(&req->queue);
1183                 request_complete(ep, req, -ECONNRESET);
1184         }
1185 }
1186
1187 static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
1188 {
1189         struct usba_ep *ep;
1190
1191         if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
1192                 return to_usba_ep(udc->gadget.ep0);
1193
1194         list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
1195                 u8 bEndpointAddress;
1196
1197                 if (!ep->ep.desc)
1198                         continue;
1199                 bEndpointAddress = ep->ep.desc->bEndpointAddress;
1200                 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
1201                         continue;
1202                 if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
1203                                 == (wIndex & USB_ENDPOINT_NUMBER_MASK))
1204                         return ep;
1205         }
1206
1207         return NULL;
1208 }
1209
1210 /* Called with interrupts disabled and udc->lock held */
1211 static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
1212 {
1213         usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
1214         ep->state = WAIT_FOR_SETUP;
1215 }
1216
1217 static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
1218 {
1219         if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
1220                 return 1;
1221         return 0;
1222 }
1223
1224 static inline void set_address(struct usba_udc *udc, unsigned int addr)
1225 {
1226         u32 regval;
1227
1228         DBG(DBG_BUS, "setting address %u...\n", addr);
1229         regval = usba_readl(udc, CTRL);
1230         regval = USBA_BFINS(DEV_ADDR, addr, regval);
1231         usba_writel(udc, CTRL, regval);
1232 }
1233
1234 static int do_test_mode(struct usba_udc *udc)
1235 {
1236         static const char test_packet_buffer[] = {
1237                 /* JKJKJKJK * 9 */
1238                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1239                 /* JJKKJJKK * 8 */
1240                 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
1241                 /* JJKKJJKK * 8 */
1242                 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
1243                 /* JJJJJJJKKKKKKK * 8 */
1244                 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1245                 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1246                 /* JJJJJJJK * 8 */
1247                 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
1248                 /* {JKKKKKKK * 10}, JK */
1249                 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
1250         };
1251         struct usba_ep *ep;
1252         struct device *dev = &udc->pdev->dev;
1253         int test_mode;
1254
1255         test_mode = udc->test_mode;
1256
1257         /* Start from a clean slate */
1258         reset_all_endpoints(udc);
1259
1260         switch (test_mode) {
1261         case 0x0100:
1262                 /* Test_J */
1263                 usba_writel(udc, TST, USBA_TST_J_MODE);
1264                 dev_info(dev, "Entering Test_J mode...\n");
1265                 break;
1266         case 0x0200:
1267                 /* Test_K */
1268                 usba_writel(udc, TST, USBA_TST_K_MODE);
1269                 dev_info(dev, "Entering Test_K mode...\n");
1270                 break;
1271         case 0x0300:
1272                 /*
1273                  * Test_SE0_NAK: Force high-speed mode and set up ep0
1274                  * for Bulk IN transfers
1275                  */
1276                 ep = &udc->usba_ep[0];
1277                 usba_writel(udc, TST,
1278                                 USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
1279                 usba_ep_writel(ep, CFG,
1280                                 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1281                                 | USBA_EPT_DIR_IN
1282                                 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1283                                 | USBA_BF(BK_NUMBER, 1));
1284                 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1285                         set_protocol_stall(udc, ep);
1286                         dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
1287                 } else {
1288                         usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1289                         dev_info(dev, "Entering Test_SE0_NAK mode...\n");
1290                 }
1291                 break;
1292         case 0x0400:
1293                 /* Test_Packet */
1294                 ep = &udc->usba_ep[0];
1295                 usba_ep_writel(ep, CFG,
1296                                 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1297                                 | USBA_EPT_DIR_IN
1298                                 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1299                                 | USBA_BF(BK_NUMBER, 1));
1300                 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1301                         set_protocol_stall(udc, ep);
1302                         dev_err(dev, "Test_Packet: ep0 not mapped\n");
1303                 } else {
1304                         usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1305                         usba_writel(udc, TST, USBA_TST_PKT_MODE);
1306                         memcpy_toio(ep->fifo, test_packet_buffer,
1307                                         sizeof(test_packet_buffer));
1308                         usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1309                         dev_info(dev, "Entering Test_Packet mode...\n");
1310                 }
1311                 break;
1312         default:
1313                 dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
1314                 return -EINVAL;
1315         }
1316
1317         return 0;
1318 }
1319
1320 /* Avoid overly long expressions */
1321 static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
1322 {
1323         if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
1324                 return true;
1325         return false;
1326 }
1327
1328 static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
1329 {
1330         if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE))
1331                 return true;
1332         return false;
1333 }
1334
1335 static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
1336 {
1337         if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT))
1338                 return true;
1339         return false;
1340 }
1341
1342 static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
1343                 struct usb_ctrlrequest *crq)
1344 {
1345         int retval = 0;
1346
1347         switch (crq->bRequest) {
1348         case USB_REQ_GET_STATUS: {
1349                 u16 status;
1350
1351                 if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
1352                         status = cpu_to_le16(udc->devstatus);
1353                 } else if (crq->bRequestType
1354                                 == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
1355                         status = cpu_to_le16(0);
1356                 } else if (crq->bRequestType
1357                                 == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
1358                         struct usba_ep *target;
1359
1360                         target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1361                         if (!target)
1362                                 goto stall;
1363
1364                         status = 0;
1365                         if (is_stalled(udc, target))
1366                                 status |= cpu_to_le16(1);
1367                 } else
1368                         goto delegate;
1369
1370                 /* Write directly to the FIFO. No queueing is done. */
1371                 if (crq->wLength != cpu_to_le16(sizeof(status)))
1372                         goto stall;
1373                 ep->state = DATA_STAGE_IN;
1374                 writew_relaxed(status, ep->fifo);
1375                 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1376                 break;
1377         }
1378
1379         case USB_REQ_CLEAR_FEATURE: {
1380                 if (crq->bRequestType == USB_RECIP_DEVICE) {
1381                         if (feature_is_dev_remote_wakeup(crq))
1382                                 udc->devstatus
1383                                         &= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
1384                         else
1385                                 /* Can't CLEAR_FEATURE TEST_MODE */
1386                                 goto stall;
1387                 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1388                         struct usba_ep *target;
1389
1390                         if (crq->wLength != cpu_to_le16(0)
1391                                         || !feature_is_ep_halt(crq))
1392                                 goto stall;
1393                         target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1394                         if (!target)
1395                                 goto stall;
1396
1397                         usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
1398                         if (target->index != 0)
1399                                 usba_ep_writel(target, CLR_STA,
1400                                                 USBA_TOGGLE_CLR);
1401                 } else {
1402                         goto delegate;
1403                 }
1404
1405                 send_status(udc, ep);
1406                 break;
1407         }
1408
1409         case USB_REQ_SET_FEATURE: {
1410                 if (crq->bRequestType == USB_RECIP_DEVICE) {
1411                         if (feature_is_dev_test_mode(crq)) {
1412                                 send_status(udc, ep);
1413                                 ep->state = STATUS_STAGE_TEST;
1414                                 udc->test_mode = le16_to_cpu(crq->wIndex);
1415                                 return 0;
1416                         } else if (feature_is_dev_remote_wakeup(crq)) {
1417                                 udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
1418                         } else {
1419                                 goto stall;
1420                         }
1421                 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1422                         struct usba_ep *target;
1423
1424                         if (crq->wLength != cpu_to_le16(0)
1425                                         || !feature_is_ep_halt(crq))
1426                                 goto stall;
1427
1428                         target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1429                         if (!target)
1430                                 goto stall;
1431
1432                         usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
1433                 } else
1434                         goto delegate;
1435
1436                 send_status(udc, ep);
1437                 break;
1438         }
1439
1440         case USB_REQ_SET_ADDRESS:
1441                 if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
1442                         goto delegate;
1443
1444                 set_address(udc, le16_to_cpu(crq->wValue));
1445                 send_status(udc, ep);
1446                 ep->state = STATUS_STAGE_ADDR;
1447                 break;
1448
1449         default:
1450 delegate:
1451                 spin_unlock(&udc->lock);
1452                 retval = udc->driver->setup(&udc->gadget, crq);
1453                 spin_lock(&udc->lock);
1454         }
1455
1456         return retval;
1457
1458 stall:
1459         pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
1460                 "halting endpoint...\n",
1461                 ep->ep.name, crq->bRequestType, crq->bRequest,
1462                 le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
1463                 le16_to_cpu(crq->wLength));
1464         set_protocol_stall(udc, ep);
1465         return -1;
1466 }
1467
1468 static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
1469 {
1470         struct usba_request *req;
1471         u32 epstatus;
1472         u32 epctrl;
1473
1474 restart:
1475         epstatus = usba_ep_readl(ep, STA);
1476         epctrl = usba_ep_readl(ep, CTL);
1477
1478         DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
1479                         ep->ep.name, ep->state, epstatus, epctrl);
1480
1481         req = NULL;
1482         if (!list_empty(&ep->queue))
1483                 req = list_entry(ep->queue.next,
1484                                  struct usba_request, queue);
1485
1486         if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1487                 if (req->submitted)
1488                         next_fifo_transaction(ep, req);
1489                 else
1490                         submit_request(ep, req);
1491
1492                 if (req->last_transaction) {
1493                         usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1494                         usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
1495                 }
1496                 goto restart;
1497         }
1498         if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
1499                 usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
1500
1501                 switch (ep->state) {
1502                 case DATA_STAGE_IN:
1503                         usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
1504                         usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1505                         ep->state = STATUS_STAGE_OUT;
1506                         break;
1507                 case STATUS_STAGE_ADDR:
1508                         /* Activate our new address */
1509                         usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
1510                                                 | USBA_FADDR_EN));
1511                         usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1512                         ep->state = WAIT_FOR_SETUP;
1513                         break;
1514                 case STATUS_STAGE_IN:
1515                         if (req) {
1516                                 list_del_init(&req->queue);
1517                                 request_complete(ep, req, 0);
1518                                 submit_next_request(ep);
1519                         }
1520                         usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1521                         ep->state = WAIT_FOR_SETUP;
1522                         break;
1523                 case STATUS_STAGE_TEST:
1524                         usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1525                         ep->state = WAIT_FOR_SETUP;
1526                         if (do_test_mode(udc))
1527                                 set_protocol_stall(udc, ep);
1528                         break;
1529                 default:
1530                         pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, "
1531                                 "halting endpoint...\n",
1532                                 ep->ep.name, ep->state);
1533                         set_protocol_stall(udc, ep);
1534                         break;
1535                 }
1536
1537                 goto restart;
1538         }
1539         if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1540                 switch (ep->state) {
1541                 case STATUS_STAGE_OUT:
1542                         usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1543                         usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1544
1545                         if (req) {
1546                                 list_del_init(&req->queue);
1547                                 request_complete(ep, req, 0);
1548                         }
1549                         ep->state = WAIT_FOR_SETUP;
1550                         break;
1551
1552                 case DATA_STAGE_OUT:
1553                         receive_data(ep);
1554                         break;
1555
1556                 default:
1557                         usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1558                         usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1559                         pr_err("udc: %s: RXRDY: Invalid endpoint state %d, "
1560                                 "halting endpoint...\n",
1561                                 ep->ep.name, ep->state);
1562                         set_protocol_stall(udc, ep);
1563                         break;
1564                 }
1565
1566                 goto restart;
1567         }
1568         if (epstatus & USBA_RX_SETUP) {
1569                 union {
1570                         struct usb_ctrlrequest crq;
1571                         unsigned long data[2];
1572                 } crq;
1573                 unsigned int pkt_len;
1574                 int ret;
1575
1576                 if (ep->state != WAIT_FOR_SETUP) {
1577                         /*
1578                          * Didn't expect a SETUP packet at this
1579                          * point. Clean up any pending requests (which
1580                          * may be successful).
1581                          */
1582                         int status = -EPROTO;
1583
1584                         /*
1585                          * RXRDY and TXCOMP are dropped when SETUP
1586                          * packets arrive.  Just pretend we received
1587                          * the status packet.
1588                          */
1589                         if (ep->state == STATUS_STAGE_OUT
1590                                         || ep->state == STATUS_STAGE_IN) {
1591                                 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1592                                 status = 0;
1593                         }
1594
1595                         if (req) {
1596                                 list_del_init(&req->queue);
1597                                 request_complete(ep, req, status);
1598                         }
1599                 }
1600
1601                 pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
1602                 DBG(DBG_HW, "Packet length: %u\n", pkt_len);
1603                 if (pkt_len != sizeof(crq)) {
1604                         pr_warn("udc: Invalid packet length %u (expected %zu)\n",
1605                                 pkt_len, sizeof(crq));
1606                         set_protocol_stall(udc, ep);
1607                         return;
1608                 }
1609
1610                 DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
1611                 memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
1612
1613                 /* Free up one bank in the FIFO so that we can
1614                  * generate or receive a reply right away. */
1615                 usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
1616
1617                 /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
1618                         ep->state, crq.crq.bRequestType,
1619                         crq.crq.bRequest); */
1620
1621                 if (crq.crq.bRequestType & USB_DIR_IN) {
1622                         /*
1623                          * The USB 2.0 spec states that "if wLength is
1624                          * zero, there is no data transfer phase."
1625                          * However, testusb #14 seems to actually
1626                          * expect a data phase even if wLength = 0...
1627                          */
1628                         ep->state = DATA_STAGE_IN;
1629                 } else {
1630                         if (crq.crq.wLength != cpu_to_le16(0))
1631                                 ep->state = DATA_STAGE_OUT;
1632                         else
1633                                 ep->state = STATUS_STAGE_IN;
1634                 }
1635
1636                 ret = -1;
1637                 if (ep->index == 0)
1638                         ret = handle_ep0_setup(udc, ep, &crq.crq);
1639                 else {
1640                         spin_unlock(&udc->lock);
1641                         ret = udc->driver->setup(&udc->gadget, &crq.crq);
1642                         spin_lock(&udc->lock);
1643                 }
1644
1645                 DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
1646                         crq.crq.bRequestType, crq.crq.bRequest,
1647                         le16_to_cpu(crq.crq.wLength), ep->state, ret);
1648
1649                 if (ret < 0) {
1650                         /* Let the host know that we failed */
1651                         set_protocol_stall(udc, ep);
1652                 }
1653         }
1654 }
1655
1656 static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
1657 {
1658         struct usba_request *req;
1659         u32 epstatus;
1660         u32 epctrl;
1661
1662         epstatus = usba_ep_readl(ep, STA);
1663         epctrl = usba_ep_readl(ep, CTL);
1664
1665         DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
1666
1667         while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1668                 DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
1669
1670                 if (list_empty(&ep->queue)) {
1671                         dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
1672                         usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1673                         return;
1674                 }
1675
1676                 req = list_entry(ep->queue.next, struct usba_request, queue);
1677
1678                 if (req->using_dma) {
1679                         /* Send a zero-length packet */
1680                         usba_ep_writel(ep, SET_STA,
1681                                         USBA_TX_PK_RDY);
1682                         usba_ep_writel(ep, CTL_DIS,
1683                                         USBA_TX_PK_RDY);
1684                         list_del_init(&req->queue);
1685                         submit_next_request(ep);
1686                         request_complete(ep, req, 0);
1687                 } else {
1688                         if (req->submitted)
1689                                 next_fifo_transaction(ep, req);
1690                         else
1691                                 submit_request(ep, req);
1692
1693                         if (req->last_transaction) {
1694                                 list_del_init(&req->queue);
1695                                 submit_next_request(ep);
1696                                 request_complete(ep, req, 0);
1697                         }
1698                 }
1699
1700                 epstatus = usba_ep_readl(ep, STA);
1701                 epctrl = usba_ep_readl(ep, CTL);
1702         }
1703         if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1704                 DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
1705                 receive_data(ep);
1706         }
1707 }
1708
1709 static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
1710 {
1711         struct usba_request *req;
1712         u32 status, control, pending;
1713
1714         status = usba_dma_readl(ep, STATUS);
1715         control = usba_dma_readl(ep, CONTROL);
1716 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1717         ep->last_dma_status = status;
1718 #endif
1719         pending = status & control;
1720         DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
1721
1722         if (status & USBA_DMA_CH_EN) {
1723                 dev_err(&udc->pdev->dev,
1724                         "DMA_CH_EN is set after transfer is finished!\n");
1725                 dev_err(&udc->pdev->dev,
1726                         "status=%#08x, pending=%#08x, control=%#08x\n",
1727                         status, pending, control);
1728
1729                 /*
1730                  * try to pretend nothing happened. We might have to
1731                  * do something here...
1732                  */
1733         }
1734
1735         if (list_empty(&ep->queue))
1736                 /* Might happen if a reset comes along at the right moment */
1737                 return;
1738
1739         if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
1740                 req = list_entry(ep->queue.next, struct usba_request, queue);
1741                 usba_update_req(ep, req, status);
1742
1743                 list_del_init(&req->queue);
1744                 submit_next_request(ep);
1745                 request_complete(ep, req, 0);
1746         }
1747 }
1748
1749 static irqreturn_t usba_udc_irq(int irq, void *devid)
1750 {
1751         struct usba_udc *udc = devid;
1752         u32 status, int_enb;
1753         u32 dma_status;
1754         u32 ep_status;
1755
1756         spin_lock(&udc->lock);
1757
1758         int_enb = usba_int_enb_get(udc);
1759         status = usba_readl(udc, INT_STA) & (int_enb | USBA_HIGH_SPEED);
1760         DBG(DBG_INT, "irq, status=%#08x\n", status);
1761
1762         if (status & USBA_DET_SUSPEND) {
1763                 toggle_bias(udc, 0);
1764                 usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
1765                 usba_int_enb_set(udc, int_enb | USBA_WAKE_UP);
1766                 udc->bias_pulse_needed = true;
1767                 DBG(DBG_BUS, "Suspend detected\n");
1768                 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1769                                 && udc->driver && udc->driver->suspend) {
1770                         spin_unlock(&udc->lock);
1771                         udc->driver->suspend(&udc->gadget);
1772                         spin_lock(&udc->lock);
1773                 }
1774         }
1775
1776         if (status & USBA_WAKE_UP) {
1777                 toggle_bias(udc, 1);
1778                 usba_writel(udc, INT_CLR, USBA_WAKE_UP);
1779                 usba_int_enb_set(udc, int_enb & ~USBA_WAKE_UP);
1780                 DBG(DBG_BUS, "Wake Up CPU detected\n");
1781         }
1782
1783         if (status & USBA_END_OF_RESUME) {
1784                 usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
1785                 generate_bias_pulse(udc);
1786                 DBG(DBG_BUS, "Resume detected\n");
1787                 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1788                                 && udc->driver && udc->driver->resume) {
1789                         spin_unlock(&udc->lock);
1790                         udc->driver->resume(&udc->gadget);
1791                         spin_lock(&udc->lock);
1792                 }
1793         }
1794
1795         dma_status = USBA_BFEXT(DMA_INT, status);
1796         if (dma_status) {
1797                 int i;
1798
1799                 for (i = 1; i <= USBA_NR_DMAS; i++)
1800                         if (dma_status & (1 << i))
1801                                 usba_dma_irq(udc, &udc->usba_ep[i]);
1802         }
1803
1804         ep_status = USBA_BFEXT(EPT_INT, status);
1805         if (ep_status) {
1806                 int i;
1807
1808                 for (i = 0; i < udc->num_ep; i++)
1809                         if (ep_status & (1 << i)) {
1810                                 if (ep_is_control(&udc->usba_ep[i]))
1811                                         usba_control_irq(udc, &udc->usba_ep[i]);
1812                                 else
1813                                         usba_ep_irq(udc, &udc->usba_ep[i]);
1814                         }
1815         }
1816
1817         if (status & USBA_END_OF_RESET) {
1818                 struct usba_ep *ep0, *ep;
1819                 int i, n;
1820
1821                 usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
1822                 generate_bias_pulse(udc);
1823                 reset_all_endpoints(udc);
1824
1825                 if (udc->gadget.speed != USB_SPEED_UNKNOWN && udc->driver) {
1826                         udc->gadget.speed = USB_SPEED_UNKNOWN;
1827                         spin_unlock(&udc->lock);
1828                         usb_gadget_udc_reset(&udc->gadget, udc->driver);
1829                         spin_lock(&udc->lock);
1830                 }
1831
1832                 if (status & USBA_HIGH_SPEED)
1833                         udc->gadget.speed = USB_SPEED_HIGH;
1834                 else
1835                         udc->gadget.speed = USB_SPEED_FULL;
1836                 DBG(DBG_BUS, "%s bus reset detected\n",
1837                     usb_speed_string(udc->gadget.speed));
1838
1839                 ep0 = &udc->usba_ep[0];
1840                 ep0->ep.desc = &usba_ep0_desc;
1841                 ep0->state = WAIT_FOR_SETUP;
1842                 usba_ep_writel(ep0, CFG,
1843                                 (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
1844                                 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
1845                                 | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
1846                 usba_ep_writel(ep0, CTL_ENB,
1847                                 USBA_EPT_ENABLE | USBA_RX_SETUP);
1848                 usba_int_enb_set(udc, int_enb | USBA_BF(EPT_INT, 1) |
1849                                       USBA_DET_SUSPEND | USBA_END_OF_RESUME);
1850
1851                 /*
1852                  * Unclear why we hit this irregularly, e.g. in usbtest,
1853                  * but it's clearly harmless...
1854                  */
1855                 if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
1856                         dev_err(&udc->pdev->dev,
1857                                 "ODD: EP0 configuration is invalid!\n");
1858
1859                 /* Preallocate other endpoints */
1860                 n = fifo_mode ? udc->num_ep : udc->configured_ep;
1861                 for (i = 1; i < n; i++) {
1862                         ep = &udc->usba_ep[i];
1863                         usba_ep_writel(ep, CFG, ep->ept_cfg);
1864                         if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED))
1865                                 dev_err(&udc->pdev->dev,
1866                                         "ODD: EP%d configuration is invalid!\n", i);
1867                 }
1868         }
1869
1870         spin_unlock(&udc->lock);
1871
1872         return IRQ_HANDLED;
1873 }
1874
1875 static int start_clock(struct usba_udc *udc)
1876 {
1877         int ret;
1878
1879         if (udc->clocked)
1880                 return 0;
1881
1882         ret = clk_prepare_enable(udc->pclk);
1883         if (ret)
1884                 return ret;
1885         ret = clk_prepare_enable(udc->hclk);
1886         if (ret) {
1887                 clk_disable_unprepare(udc->pclk);
1888                 return ret;
1889         }
1890
1891         udc->clocked = true;
1892         return 0;
1893 }
1894
1895 static void stop_clock(struct usba_udc *udc)
1896 {
1897         if (!udc->clocked)
1898                 return;
1899
1900         clk_disable_unprepare(udc->hclk);
1901         clk_disable_unprepare(udc->pclk);
1902
1903         udc->clocked = false;
1904 }
1905
1906 static int usba_start(struct usba_udc *udc)
1907 {
1908         unsigned long flags;
1909         int ret;
1910
1911         ret = start_clock(udc);
1912         if (ret)
1913                 return ret;
1914
1915         spin_lock_irqsave(&udc->lock, flags);
1916         toggle_bias(udc, 1);
1917         usba_writel(udc, CTRL, USBA_ENABLE_MASK);
1918         usba_int_enb_set(udc, USBA_END_OF_RESET);
1919         spin_unlock_irqrestore(&udc->lock, flags);
1920
1921         return 0;
1922 }
1923
1924 static void usba_stop(struct usba_udc *udc)
1925 {
1926         unsigned long flags;
1927
1928         spin_lock_irqsave(&udc->lock, flags);
1929         udc->gadget.speed = USB_SPEED_UNKNOWN;
1930         reset_all_endpoints(udc);
1931
1932         /* This will also disable the DP pullup */
1933         toggle_bias(udc, 0);
1934         usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1935         spin_unlock_irqrestore(&udc->lock, flags);
1936
1937         stop_clock(udc);
1938 }
1939
1940 static irqreturn_t usba_vbus_irq_thread(int irq, void *devid)
1941 {
1942         struct usba_udc *udc = devid;
1943         int vbus;
1944
1945         /* debounce */
1946         udelay(10);
1947
1948         mutex_lock(&udc->vbus_mutex);
1949
1950         vbus = vbus_is_present(udc);
1951         if (vbus != udc->vbus_prev) {
1952                 if (vbus) {
1953                         usba_start(udc);
1954                 } else {
1955                         usba_stop(udc);
1956
1957                         if (udc->driver->disconnect)
1958                                 udc->driver->disconnect(&udc->gadget);
1959                 }
1960                 udc->vbus_prev = vbus;
1961         }
1962
1963         mutex_unlock(&udc->vbus_mutex);
1964         return IRQ_HANDLED;
1965 }
1966
1967 static int atmel_usba_start(struct usb_gadget *gadget,
1968                 struct usb_gadget_driver *driver)
1969 {
1970         int ret;
1971         struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
1972         unsigned long flags;
1973
1974         spin_lock_irqsave(&udc->lock, flags);
1975         udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
1976         udc->driver = driver;
1977         spin_unlock_irqrestore(&udc->lock, flags);
1978
1979         mutex_lock(&udc->vbus_mutex);
1980
1981         if (gpio_is_valid(udc->vbus_pin))
1982                 enable_irq(gpio_to_irq(udc->vbus_pin));
1983
1984         /* If Vbus is present, enable the controller and wait for reset */
1985         udc->vbus_prev = vbus_is_present(udc);
1986         if (udc->vbus_prev) {
1987                 ret = usba_start(udc);
1988                 if (ret)
1989                         goto err;
1990         }
1991
1992         mutex_unlock(&udc->vbus_mutex);
1993         return 0;
1994
1995 err:
1996         if (gpio_is_valid(udc->vbus_pin))
1997                 disable_irq(gpio_to_irq(udc->vbus_pin));
1998
1999         mutex_unlock(&udc->vbus_mutex);
2000
2001         spin_lock_irqsave(&udc->lock, flags);
2002         udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
2003         udc->driver = NULL;
2004         spin_unlock_irqrestore(&udc->lock, flags);
2005         return ret;
2006 }
2007
2008 static int atmel_usba_stop(struct usb_gadget *gadget)
2009 {
2010         struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
2011
2012         if (gpio_is_valid(udc->vbus_pin))
2013                 disable_irq(gpio_to_irq(udc->vbus_pin));
2014
2015         if (fifo_mode == 0)
2016                 udc->configured_ep = 1;
2017
2018         usba_stop(udc);
2019
2020         udc->driver = NULL;
2021
2022         return 0;
2023 }
2024
2025 #ifdef CONFIG_OF
2026 static void at91sam9rl_toggle_bias(struct usba_udc *udc, int is_on)
2027 {
2028         regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN,
2029                            is_on ? AT91_PMC_BIASEN : 0);
2030 }
2031
2032 static void at91sam9g45_pulse_bias(struct usba_udc *udc)
2033 {
2034         regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN, 0);
2035         regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN,
2036                            AT91_PMC_BIASEN);
2037 }
2038
2039 static const struct usba_udc_errata at91sam9rl_errata = {
2040         .toggle_bias = at91sam9rl_toggle_bias,
2041 };
2042
2043 static const struct usba_udc_errata at91sam9g45_errata = {
2044         .pulse_bias = at91sam9g45_pulse_bias,
2045 };
2046
2047 static const struct of_device_id atmel_udc_dt_ids[] = {
2048         { .compatible = "atmel,at91sam9rl-udc", .data = &at91sam9rl_errata },
2049         { .compatible = "atmel,at91sam9g45-udc", .data = &at91sam9g45_errata },
2050         { .compatible = "atmel,sama5d3-udc" },
2051         { /* sentinel */ }
2052 };
2053
2054 MODULE_DEVICE_TABLE(of, atmel_udc_dt_ids);
2055
2056 static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
2057                                                     struct usba_udc *udc)
2058 {
2059         u32 val;
2060         const char *name;
2061         enum of_gpio_flags flags;
2062         struct device_node *np = pdev->dev.of_node;
2063         const struct of_device_id *match;
2064         struct device_node *pp;
2065         int i, ret;
2066         struct usba_ep *eps, *ep;
2067
2068         match = of_match_node(atmel_udc_dt_ids, np);
2069         if (!match)
2070                 return ERR_PTR(-EINVAL);
2071
2072         udc->errata = match->data;
2073         udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9g45-pmc");
2074         if (IS_ERR(udc->pmc))
2075                 udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9x5-pmc");
2076         if (udc->errata && IS_ERR(udc->pmc))
2077                 return ERR_CAST(udc->pmc);
2078
2079         udc->num_ep = 0;
2080
2081         udc->vbus_pin = of_get_named_gpio_flags(np, "atmel,vbus-gpio", 0,
2082                                                 &flags);
2083         udc->vbus_pin_inverted = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0;
2084
2085         if (fifo_mode == 0) {
2086                 pp = NULL;
2087                 while ((pp = of_get_next_child(np, pp)))
2088                         udc->num_ep++;
2089                 udc->configured_ep = 1;
2090         } else {
2091                 udc->num_ep = usba_config_fifo_table(udc);
2092         }
2093
2094         eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * udc->num_ep,
2095                            GFP_KERNEL);
2096         if (!eps)
2097                 return ERR_PTR(-ENOMEM);
2098
2099         udc->gadget.ep0 = &eps[0].ep;
2100
2101         INIT_LIST_HEAD(&eps[0].ep.ep_list);
2102
2103         pp = NULL;
2104         i = 0;
2105         while ((pp = of_get_next_child(np, pp)) && i < udc->num_ep) {
2106                 ep = &eps[i];
2107
2108                 ret = of_property_read_u32(pp, "reg", &val);
2109                 if (ret) {
2110                         dev_err(&pdev->dev, "of_probe: reg error(%d)\n", ret);
2111                         goto err;
2112                 }
2113                 ep->index = fifo_mode ? udc->fifo_cfg[i].hw_ep_num : val;
2114
2115                 ret = of_property_read_u32(pp, "atmel,fifo-size", &val);
2116                 if (ret) {
2117                         dev_err(&pdev->dev, "of_probe: fifo-size error(%d)\n", ret);
2118                         goto err;
2119                 }
2120                 if (fifo_mode) {
2121                         if (val < udc->fifo_cfg[i].fifo_size) {
2122                                 dev_warn(&pdev->dev,
2123                                          "Using max fifo-size value from DT\n");
2124                                 ep->fifo_size = val;
2125                         } else {
2126                                 ep->fifo_size = udc->fifo_cfg[i].fifo_size;
2127                         }
2128                 } else {
2129                         ep->fifo_size = val;
2130                 }
2131
2132                 ret = of_property_read_u32(pp, "atmel,nb-banks", &val);
2133                 if (ret) {
2134                         dev_err(&pdev->dev, "of_probe: nb-banks error(%d)\n", ret);
2135                         goto err;
2136                 }
2137                 if (fifo_mode) {
2138                         if (val < udc->fifo_cfg[i].nr_banks) {
2139                                 dev_warn(&pdev->dev,
2140                                          "Using max nb-banks value from DT\n");
2141                                 ep->nr_banks = val;
2142                         } else {
2143                                 ep->nr_banks = udc->fifo_cfg[i].nr_banks;
2144                         }
2145                 } else {
2146                         ep->nr_banks = val;
2147                 }
2148
2149                 ep->can_dma = of_property_read_bool(pp, "atmel,can-dma");
2150                 ep->can_isoc = of_property_read_bool(pp, "atmel,can-isoc");
2151
2152                 ret = of_property_read_string(pp, "name", &name);
2153                 if (ret) {
2154                         dev_err(&pdev->dev, "of_probe: name error(%d)\n", ret);
2155                         goto err;
2156                 }
2157                 sprintf(ep->name, "ep%d", ep->index);
2158                 ep->ep.name = ep->name;
2159
2160                 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
2161                 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
2162                 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
2163                 ep->ep.ops = &usba_ep_ops;
2164                 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
2165                 ep->udc = udc;
2166                 INIT_LIST_HEAD(&ep->queue);
2167
2168                 if (ep->index == 0) {
2169                         ep->ep.caps.type_control = true;
2170                 } else {
2171                         ep->ep.caps.type_iso = ep->can_isoc;
2172                         ep->ep.caps.type_bulk = true;
2173                         ep->ep.caps.type_int = true;
2174                 }
2175
2176                 ep->ep.caps.dir_in = true;
2177                 ep->ep.caps.dir_out = true;
2178
2179                 if (fifo_mode != 0) {
2180                         /*
2181                          * Generate ept_cfg based on FIFO size and
2182                          * banks number
2183                          */
2184                         if (ep->fifo_size  <= 8)
2185                                 ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
2186                         else
2187                                 /* LSB is bit 1, not 0 */
2188                                 ep->ept_cfg =
2189                                   USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
2190
2191                         ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
2192                 }
2193
2194                 if (i)
2195                         list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2196
2197                 i++;
2198         }
2199
2200         if (i == 0) {
2201                 dev_err(&pdev->dev, "of_probe: no endpoint specified\n");
2202                 ret = -EINVAL;
2203                 goto err;
2204         }
2205
2206         return eps;
2207 err:
2208         return ERR_PTR(ret);
2209 }
2210 #else
2211 static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
2212                                                     struct usba_udc *udc)
2213 {
2214         return ERR_PTR(-ENOSYS);
2215 }
2216 #endif
2217
2218 static struct usba_ep * usba_udc_pdata(struct platform_device *pdev,
2219                                                  struct usba_udc *udc)
2220 {
2221         struct usba_platform_data *pdata = dev_get_platdata(&pdev->dev);
2222         struct usba_ep *eps;
2223         int i;
2224
2225         if (!pdata)
2226                 return ERR_PTR(-ENXIO);
2227
2228         eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * pdata->num_ep,
2229                            GFP_KERNEL);
2230         if (!eps)
2231                 return ERR_PTR(-ENOMEM);
2232
2233         udc->gadget.ep0 = &eps[0].ep;
2234
2235         udc->vbus_pin = pdata->vbus_pin;
2236         udc->vbus_pin_inverted = pdata->vbus_pin_inverted;
2237         udc->num_ep = pdata->num_ep;
2238
2239         INIT_LIST_HEAD(&eps[0].ep.ep_list);
2240
2241         for (i = 0; i < pdata->num_ep; i++) {
2242                 struct usba_ep *ep = &eps[i];
2243
2244                 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
2245                 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
2246                 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
2247                 ep->ep.ops = &usba_ep_ops;
2248                 ep->ep.name = pdata->ep[i].name;
2249                 ep->fifo_size = pdata->ep[i].fifo_size;
2250                 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
2251                 ep->udc = udc;
2252                 INIT_LIST_HEAD(&ep->queue);
2253                 ep->nr_banks = pdata->ep[i].nr_banks;
2254                 ep->index = pdata->ep[i].index;
2255                 ep->can_dma = pdata->ep[i].can_dma;
2256                 ep->can_isoc = pdata->ep[i].can_isoc;
2257
2258                 if (i == 0) {
2259                         ep->ep.caps.type_control = true;
2260                 } else {
2261                         ep->ep.caps.type_iso = ep->can_isoc;
2262                         ep->ep.caps.type_bulk = true;
2263                         ep->ep.caps.type_int = true;
2264                 }
2265
2266                 ep->ep.caps.dir_in = true;
2267                 ep->ep.caps.dir_out = true;
2268
2269                 if (i)
2270                         list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2271         }
2272
2273         return eps;
2274 }
2275
2276 static int usba_udc_probe(struct platform_device *pdev)
2277 {
2278         struct resource *regs, *fifo;
2279         struct clk *pclk, *hclk;
2280         struct usba_udc *udc;
2281         int irq, ret, i;
2282
2283         udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL);
2284         if (!udc)
2285                 return -ENOMEM;
2286
2287         udc->gadget = usba_gadget_template;
2288         INIT_LIST_HEAD(&udc->gadget.ep_list);
2289
2290         regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
2291         fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
2292         if (!regs || !fifo)
2293                 return -ENXIO;
2294
2295         irq = platform_get_irq(pdev, 0);
2296         if (irq < 0)
2297                 return irq;
2298
2299         pclk = devm_clk_get(&pdev->dev, "pclk");
2300         if (IS_ERR(pclk))
2301                 return PTR_ERR(pclk);
2302         hclk = devm_clk_get(&pdev->dev, "hclk");
2303         if (IS_ERR(hclk))
2304                 return PTR_ERR(hclk);
2305
2306         spin_lock_init(&udc->lock);
2307         mutex_init(&udc->vbus_mutex);
2308         udc->pdev = pdev;
2309         udc->pclk = pclk;
2310         udc->hclk = hclk;
2311         udc->vbus_pin = -ENODEV;
2312
2313         ret = -ENOMEM;
2314         udc->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs));
2315         if (!udc->regs) {
2316                 dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
2317                 return ret;
2318         }
2319         dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
2320                  (unsigned long)regs->start, udc->regs);
2321         udc->fifo = devm_ioremap(&pdev->dev, fifo->start, resource_size(fifo));
2322         if (!udc->fifo) {
2323                 dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
2324                 return ret;
2325         }
2326         dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
2327                  (unsigned long)fifo->start, udc->fifo);
2328
2329         platform_set_drvdata(pdev, udc);
2330
2331         /* Make sure we start from a clean slate */
2332         ret = clk_prepare_enable(pclk);
2333         if (ret) {
2334                 dev_err(&pdev->dev, "Unable to enable pclk, aborting.\n");
2335                 return ret;
2336         }
2337
2338         usba_writel(udc, CTRL, USBA_DISABLE_MASK);
2339         clk_disable_unprepare(pclk);
2340
2341         if (pdev->dev.of_node)
2342                 udc->usba_ep = atmel_udc_of_init(pdev, udc);
2343         else
2344                 udc->usba_ep = usba_udc_pdata(pdev, udc);
2345
2346         toggle_bias(udc, 0);
2347
2348         if (IS_ERR(udc->usba_ep))
2349                 return PTR_ERR(udc->usba_ep);
2350
2351         ret = devm_request_irq(&pdev->dev, irq, usba_udc_irq, 0,
2352                                 "atmel_usba_udc", udc);
2353         if (ret) {
2354                 dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
2355                         irq, ret);
2356                 return ret;
2357         }
2358         udc->irq = irq;
2359
2360         if (gpio_is_valid(udc->vbus_pin)) {
2361                 if (!devm_gpio_request(&pdev->dev, udc->vbus_pin, "atmel_usba_udc")) {
2362                         irq_set_status_flags(gpio_to_irq(udc->vbus_pin),
2363                                         IRQ_NOAUTOEN);
2364                         ret = devm_request_threaded_irq(&pdev->dev,
2365                                         gpio_to_irq(udc->vbus_pin), NULL,
2366                                         usba_vbus_irq_thread, USBA_VBUS_IRQFLAGS,
2367                                         "atmel_usba_udc", udc);
2368                         if (ret) {
2369                                 udc->vbus_pin = -ENODEV;
2370                                 dev_warn(&udc->pdev->dev,
2371                                          "failed to request vbus irq; "
2372                                          "assuming always on\n");
2373                         }
2374                 } else {
2375                         /* gpio_request fail so use -EINVAL for gpio_is_valid */
2376                         udc->vbus_pin = -EINVAL;
2377                 }
2378         }
2379
2380         ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
2381         if (ret)
2382                 return ret;
2383         device_init_wakeup(&pdev->dev, 1);
2384
2385         usba_init_debugfs(udc);
2386         for (i = 1; i < udc->num_ep; i++)
2387                 usba_ep_init_debugfs(udc, &udc->usba_ep[i]);
2388
2389         return 0;
2390 }
2391
2392 static int usba_udc_remove(struct platform_device *pdev)
2393 {
2394         struct usba_udc *udc;
2395         int i;
2396
2397         udc = platform_get_drvdata(pdev);
2398
2399         device_init_wakeup(&pdev->dev, 0);
2400         usb_del_gadget_udc(&udc->gadget);
2401
2402         for (i = 1; i < udc->num_ep; i++)
2403                 usba_ep_cleanup_debugfs(&udc->usba_ep[i]);
2404         usba_cleanup_debugfs(udc);
2405
2406         return 0;
2407 }
2408
2409 #ifdef CONFIG_PM_SLEEP
2410 static int usba_udc_suspend(struct device *dev)
2411 {
2412         struct usba_udc *udc = dev_get_drvdata(dev);
2413
2414         /* Not started */
2415         if (!udc->driver)
2416                 return 0;
2417
2418         mutex_lock(&udc->vbus_mutex);
2419
2420         if (!device_may_wakeup(dev)) {
2421                 usba_stop(udc);
2422                 goto out;
2423         }
2424
2425         /*
2426          * Device may wake up. We stay clocked if we failed
2427          * to request vbus irq, assuming always on.
2428          */
2429         if (gpio_is_valid(udc->vbus_pin)) {
2430                 usba_stop(udc);
2431                 enable_irq_wake(gpio_to_irq(udc->vbus_pin));
2432         }
2433
2434 out:
2435         mutex_unlock(&udc->vbus_mutex);
2436         return 0;
2437 }
2438
2439 static int usba_udc_resume(struct device *dev)
2440 {
2441         struct usba_udc *udc = dev_get_drvdata(dev);
2442
2443         /* Not started */
2444         if (!udc->driver)
2445                 return 0;
2446
2447         if (device_may_wakeup(dev) && gpio_is_valid(udc->vbus_pin))
2448                 disable_irq_wake(gpio_to_irq(udc->vbus_pin));
2449
2450         /* If Vbus is present, enable the controller and wait for reset */
2451         mutex_lock(&udc->vbus_mutex);
2452         udc->vbus_prev = vbus_is_present(udc);
2453         if (udc->vbus_prev)
2454                 usba_start(udc);
2455         mutex_unlock(&udc->vbus_mutex);
2456
2457         return 0;
2458 }
2459 #endif
2460
2461 static SIMPLE_DEV_PM_OPS(usba_udc_pm_ops, usba_udc_suspend, usba_udc_resume);
2462
2463 static struct platform_driver udc_driver = {
2464         .remove         = usba_udc_remove,
2465         .driver         = {
2466                 .name           = "atmel_usba_udc",
2467                 .pm             = &usba_udc_pm_ops,
2468                 .of_match_table = of_match_ptr(atmel_udc_dt_ids),
2469         },
2470 };
2471
2472 module_platform_driver_probe(udc_driver, usba_udc_probe);
2473
2474 MODULE_DESCRIPTION("Atmel USBA UDC driver");
2475 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
2476 MODULE_LICENSE("GPL");
2477 MODULE_ALIAS("platform:atmel_usba_udc");