1 // SPDX-License-Identifier: GPL-2.0
3 * host.c - ChipIdea USB host controller driver
5 * Copyright (c) 2012 Intel Corporation
7 * Author: Alexander Shishkin
10 #include <linux/kernel.h>
12 #include <linux/usb.h>
13 #include <linux/usb/hcd.h>
14 #include <linux/usb/chipidea.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/pinctrl/consumer.h>
18 #include "../host/ehci.h"
24 static struct hc_driver __read_mostly ci_ehci_hc_driver;
25 static int (*orig_bus_suspend)(struct usb_hcd *hcd);
28 struct regulator *reg_vbus;
32 struct ci_hdrc_dma_aligned_buffer {
34 void *old_xfer_buffer;
38 static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
40 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
41 struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv;
42 struct device *dev = hcd->self.controller;
43 struct ci_hdrc *ci = dev_get_drvdata(dev);
45 int port = HCS_N_PORTS(ehci->hcs_params);
47 if (priv->reg_vbus && enable != priv->enabled) {
50 "Not support multi-port regulator control\n");
54 ret = regulator_enable(priv->reg_vbus);
56 ret = regulator_disable(priv->reg_vbus);
59 "Failed to %s vbus regulator, ret=%d\n",
60 enable ? "enable" : "disable", ret);
63 priv->enabled = enable;
66 if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL) {
68 usb_phy_vbus_on(ci->usb_phy);
70 usb_phy_vbus_off(ci->usb_phy);
73 if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
75 * Marvell 28nm HSIC PHY requires forcing the port to HS mode.
76 * As HSIC is always HS, this should be safe for others.
78 hw_port_test_set(ci, 5);
79 hw_port_test_set(ci, 0);
84 static int ehci_ci_reset(struct usb_hcd *hcd)
86 struct device *dev = hcd->self.controller;
87 struct ci_hdrc *ci = dev_get_drvdata(dev);
88 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
91 ret = ehci_setup(hcd);
95 ehci->need_io_watchdog = 0;
97 if (ci->platdata->notify_event) {
98 ret = ci->platdata->notify_event(ci,
99 CI_HDRC_CONTROLLER_RESET_EVENT);
104 ci_platform_configure(ci);
109 static const struct ehci_driver_overrides ehci_ci_overrides = {
110 .extra_priv_size = sizeof(struct ehci_ci_priv),
111 .port_power = ehci_ci_portpower,
112 .reset = ehci_ci_reset,
115 static irqreturn_t host_irq(struct ci_hdrc *ci)
117 return usb_hcd_irq(ci->irq, ci->hcd);
120 static int host_start(struct ci_hdrc *ci)
123 struct ehci_hcd *ehci;
124 struct ehci_ci_priv *priv;
130 hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent,
131 ci->dev, dev_name(ci->dev), NULL);
135 dev_set_drvdata(ci->dev, ci);
136 hcd->rsrc_start = ci->hw_bank.phys;
137 hcd->rsrc_len = ci->hw_bank.size;
138 hcd->regs = ci->hw_bank.abs;
141 hcd->power_budget = ci->platdata->power_budget;
142 hcd->tpl_support = ci->platdata->tpl_support;
143 if (ci->phy || ci->usb_phy) {
144 hcd->skip_phy_initialization = 1;
146 hcd->usb_phy = ci->usb_phy;
149 ehci = hcd_to_ehci(hcd);
150 ehci->caps = ci->hw_bank.cap;
151 ehci->has_hostpc = ci->hw_bank.lpm;
152 ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
153 ehci->imx28_write_fix = ci->imx28_write_fix;
154 ehci->has_ci_pec_bug = ci->has_portsc_pec_bug;
156 priv = (struct ehci_ci_priv *)ehci->priv;
157 priv->reg_vbus = NULL;
159 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
160 if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
161 ret = regulator_enable(ci->platdata->reg_vbus);
164 "Failed to enable vbus regulator, ret=%d\n",
169 priv->reg_vbus = ci->platdata->reg_vbus;
173 if (ci->platdata->pins_host)
174 pinctrl_select_state(ci->platdata->pctl,
175 ci->platdata->pins_host);
179 ret = usb_add_hcd(hcd, 0, 0);
184 struct usb_otg *otg = &ci->otg;
186 if (ci_otg_is_fsm_mode(ci)) {
187 otg->host = &hcd->self;
188 hcd->self.otg_port = 1;
191 if (ci->platdata->notify_event &&
192 (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC))
193 ci->platdata->notify_event
194 (ci, CI_HDRC_IMX_HSIC_ACTIVE_EVENT);
200 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
201 (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
202 regulator_disable(ci->platdata->reg_vbus);
209 static void host_stop(struct ci_hdrc *ci)
211 struct usb_hcd *hcd = ci->hcd;
214 if (ci->platdata->notify_event)
215 ci->platdata->notify_event(ci,
216 CI_HDRC_CONTROLLER_STOPPED_EVENT);
218 ci->role = CI_ROLE_END;
219 synchronize_irq(ci->irq);
221 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
222 (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
223 regulator_disable(ci->platdata->reg_vbus);
228 if (ci->platdata->pins_host && ci->platdata->pins_default)
229 pinctrl_select_state(ci->platdata->pctl,
230 ci->platdata->pins_default);
234 void ci_hdrc_host_destroy(struct ci_hdrc *ci)
236 if (ci->role == CI_ROLE_HOST && ci->hcd)
240 /* The below code is based on tegra ehci driver */
241 static int ci_ehci_hub_control(
250 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
251 unsigned int ports = HCS_N_PORTS(ehci->hcs_params);
252 u32 __iomem *status_reg;
253 u32 temp, port_index;
257 struct device *dev = hcd->self.controller;
258 struct ci_hdrc *ci = dev_get_drvdata(dev);
260 port_index = wIndex & 0xff;
261 port_index -= (port_index > 0);
262 status_reg = &ehci->regs->port_status[port_index];
264 spin_lock_irqsave(&ehci->lock, flags);
266 if (ci->platdata->hub_control) {
267 retval = ci->platdata->hub_control(ci, typeReq, wValue, wIndex,
268 buf, wLength, &done, &flags);
273 if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
274 if (!wIndex || wIndex > ports) {
279 temp = ehci_readl(ehci, status_reg);
280 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) {
285 temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E);
286 temp |= PORT_WKDISC_E | PORT_WKOC_E;
287 ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
290 * If a transaction is in progress, there may be a delay in
291 * suspending the port. Poll until the port is suspended.
293 if (ehci_handshake(ehci, status_reg, PORT_SUSPEND,
295 ehci_err(ehci, "timeout waiting for SUSPEND\n");
297 if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
298 if (ci->platdata->notify_event)
299 ci->platdata->notify_event(ci,
300 CI_HDRC_IMX_HSIC_SUSPEND_EVENT);
302 temp = ehci_readl(ehci, status_reg);
303 temp &= ~(PORT_WKDISC_E | PORT_WKCONN_E);
304 ehci_writel(ehci, temp, status_reg);
307 set_bit(port_index, &ehci->suspended_ports);
312 * After resume has finished, it needs do some post resume
313 * operation for some SoCs.
315 else if (typeReq == ClearPortFeature &&
316 wValue == USB_PORT_FEAT_C_SUSPEND) {
317 /* Make sure the resume has finished, it should be finished */
318 if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 25000))
319 ehci_err(ehci, "timeout waiting for resume\n");
322 spin_unlock_irqrestore(&ehci->lock, flags);
324 /* Handle the hub control events here */
325 return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
327 spin_unlock_irqrestore(&ehci->lock, flags);
330 static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
332 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
333 struct device *dev = hcd->self.controller;
334 struct ci_hdrc *ci = dev_get_drvdata(dev);
338 int ret = orig_bus_suspend(hcd);
343 port = HCS_N_PORTS(ehci->hcs_params);
345 u32 __iomem *reg = &ehci->regs->port_status[port];
346 u32 portsc = ehci_readl(ehci, reg);
348 if (portsc & PORT_CONNECT) {
350 * For chipidea, the resume signal will be ended
351 * automatically, so for remote wakeup case, the
352 * usbcmd.rs may not be set before the resume has
353 * ended if other resume paths consumes too much
354 * time (~24ms), in that case, the SOF will not
355 * send out within 3ms after resume ends, then the
356 * high speed device will enter full speed mode.
359 tmp = ehci_readl(ehci, &ehci->regs->command);
361 ehci_writel(ehci, tmp, &ehci->regs->command);
363 * It needs a short delay between set RS bit and PHCD.
365 usleep_range(150, 200);
367 * Need to clear WKCN and WKOC for imx HSIC,
368 * otherwise, there will be wakeup event.
370 if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
371 tmp = ehci_readl(ehci, reg);
372 tmp &= ~(PORT_WKDISC_E | PORT_WKCONN_E);
373 ehci_writel(ehci, tmp, reg);
383 static void ci_hdrc_free_dma_aligned_buffer(struct urb *urb)
385 struct ci_hdrc_dma_aligned_buffer *temp;
388 if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER))
391 temp = container_of(urb->transfer_buffer,
392 struct ci_hdrc_dma_aligned_buffer, data);
394 if (usb_urb_dir_in(urb)) {
395 if (usb_pipeisoc(urb->pipe))
396 length = urb->transfer_buffer_length;
398 length = urb->actual_length;
400 memcpy(temp->old_xfer_buffer, temp->data, length);
402 urb->transfer_buffer = temp->old_xfer_buffer;
403 kfree(temp->kmalloc_ptr);
405 urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;
408 static int ci_hdrc_alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags)
410 struct ci_hdrc_dma_aligned_buffer *temp, *kmalloc_ptr;
411 const unsigned int ci_hdrc_usb_dma_align = 32;
414 if (urb->num_sgs || urb->sg || urb->transfer_buffer_length == 0 ||
415 !((uintptr_t)urb->transfer_buffer & (ci_hdrc_usb_dma_align - 1)))
418 /* Allocate a buffer with enough padding for alignment */
419 kmalloc_size = urb->transfer_buffer_length +
420 sizeof(struct ci_hdrc_dma_aligned_buffer) +
421 ci_hdrc_usb_dma_align - 1;
423 kmalloc_ptr = kmalloc(kmalloc_size, mem_flags);
427 /* Position our struct dma_aligned_buffer such that data is aligned */
428 temp = PTR_ALIGN(kmalloc_ptr + 1, ci_hdrc_usb_dma_align) - 1;
429 temp->kmalloc_ptr = kmalloc_ptr;
430 temp->old_xfer_buffer = urb->transfer_buffer;
431 if (usb_urb_dir_out(urb))
432 memcpy(temp->data, urb->transfer_buffer,
433 urb->transfer_buffer_length);
434 urb->transfer_buffer = temp->data;
436 urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER;
441 static int ci_hdrc_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
446 ret = ci_hdrc_alloc_dma_aligned_buffer(urb, mem_flags);
450 ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
452 ci_hdrc_free_dma_aligned_buffer(urb);
457 static void ci_hdrc_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
459 usb_hcd_unmap_urb_for_dma(hcd, urb);
460 ci_hdrc_free_dma_aligned_buffer(urb);
463 #ifdef CONFIG_PM_SLEEP
464 static void ci_hdrc_host_suspend(struct ci_hdrc *ci)
466 ehci_suspend(ci->hcd, device_may_wakeup(ci->dev));
469 static void ci_hdrc_host_resume(struct ci_hdrc *ci, bool power_lost)
471 ehci_resume(ci->hcd, power_lost);
475 int ci_hdrc_host_init(struct ci_hdrc *ci)
477 struct ci_role_driver *rdrv;
479 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC))
482 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
486 rdrv->start = host_start;
487 rdrv->stop = host_stop;
488 #ifdef CONFIG_PM_SLEEP
489 rdrv->suspend = ci_hdrc_host_suspend;
490 rdrv->resume = ci_hdrc_host_resume;
492 rdrv->irq = host_irq;
494 ci->roles[CI_ROLE_HOST] = rdrv;
496 if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA) {
497 ci_ehci_hc_driver.map_urb_for_dma = ci_hdrc_map_urb_for_dma;
498 ci_ehci_hc_driver.unmap_urb_for_dma = ci_hdrc_unmap_urb_for_dma;
504 void ci_hdrc_host_driver_init(void)
506 ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
507 orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
508 ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
509 ci_ehci_hc_driver.hub_control = ci_ehci_hub_control;