Merge tag 'mvebu-dt-5.1-2' of git://git.infradead.org/linux-mvebu into arm/dt
[sfrench/cifs-2.6.git] / drivers / soc / fsl / qe / qe_tdm.c
1 /*
2  * Copyright (C) 2015 Freescale Semiconductor, Inc. All rights reserved.
3  *
4  * Authors:     Zhao Qiang <qiang.zhao@nxp.com>
5  *
6  * Description:
7  * QE TDM API Set - TDM specific routines implementations.
8  *
9  * This program is free software; you can redistribute  it and/or modify it
10  * under  the terms of  the GNU General  Public License as published by the
11  * Free Software Foundation;  either version 2 of the  License, or (at your
12  * option) any later version.
13  */
14 #include <linux/io.h>
15 #include <linux/kernel.h>
16 #include <linux/of_address.h>
17 #include <linux/of_irq.h>
18 #include <linux/of_platform.h>
19 #include <soc/fsl/qe/qe_tdm.h>
20
21 static int set_tdm_framer(const char *tdm_framer_type)
22 {
23         if (strcmp(tdm_framer_type, "e1") == 0)
24                 return TDM_FRAMER_E1;
25         else if (strcmp(tdm_framer_type, "t1") == 0)
26                 return TDM_FRAMER_T1;
27         else
28                 return -EINVAL;
29 }
30
31 static void set_si_param(struct ucc_tdm *utdm, struct ucc_tdm_info *ut_info)
32 {
33         struct si_mode_info *si_info = &ut_info->si_info;
34
35         if (utdm->tdm_mode == TDM_INTERNAL_LOOPBACK) {
36                 si_info->simr_crt = 1;
37                 si_info->simr_rfsd = 0;
38         }
39 }
40
41 int ucc_of_parse_tdm(struct device_node *np, struct ucc_tdm *utdm,
42                      struct ucc_tdm_info *ut_info)
43 {
44         const char *sprop;
45         int ret = 0;
46         u32 val;
47
48         sprop = of_get_property(np, "fsl,rx-sync-clock", NULL);
49         if (sprop) {
50                 ut_info->uf_info.rx_sync = qe_clock_source(sprop);
51                 if ((ut_info->uf_info.rx_sync < QE_CLK_NONE) ||
52                     (ut_info->uf_info.rx_sync > QE_RSYNC_PIN)) {
53                         pr_err("QE-TDM: Invalid rx-sync-clock property\n");
54                         return -EINVAL;
55                 }
56         } else {
57                 pr_err("QE-TDM: Invalid rx-sync-clock property\n");
58                 return -EINVAL;
59         }
60
61         sprop = of_get_property(np, "fsl,tx-sync-clock", NULL);
62         if (sprop) {
63                 ut_info->uf_info.tx_sync = qe_clock_source(sprop);
64                 if ((ut_info->uf_info.tx_sync < QE_CLK_NONE) ||
65                     (ut_info->uf_info.tx_sync > QE_TSYNC_PIN)) {
66                         pr_err("QE-TDM: Invalid tx-sync-clock property\n");
67                 return -EINVAL;
68                 }
69         } else {
70                 pr_err("QE-TDM: Invalid tx-sync-clock property\n");
71                 return -EINVAL;
72         }
73
74         ret = of_property_read_u32_index(np, "fsl,tx-timeslot-mask", 0, &val);
75         if (ret) {
76                 pr_err("QE-TDM: Invalid tx-timeslot-mask property\n");
77                 return -EINVAL;
78         }
79         utdm->tx_ts_mask = val;
80
81         ret = of_property_read_u32_index(np, "fsl,rx-timeslot-mask", 0, &val);
82         if (ret) {
83                 ret = -EINVAL;
84                 pr_err("QE-TDM: Invalid rx-timeslot-mask property\n");
85                 return ret;
86         }
87         utdm->rx_ts_mask = val;
88
89         ret = of_property_read_u32_index(np, "fsl,tdm-id", 0, &val);
90         if (ret) {
91                 ret = -EINVAL;
92                 pr_err("QE-TDM: No fsl,tdm-id property for this UCC\n");
93                 return ret;
94         }
95         utdm->tdm_port = val;
96         ut_info->uf_info.tdm_num = utdm->tdm_port;
97
98         if (of_property_read_bool(np, "fsl,tdm-internal-loopback"))
99                 utdm->tdm_mode = TDM_INTERNAL_LOOPBACK;
100         else
101                 utdm->tdm_mode = TDM_NORMAL;
102
103         sprop = of_get_property(np, "fsl,tdm-framer-type", NULL);
104         if (!sprop) {
105                 ret = -EINVAL;
106                 pr_err("QE-TDM: No tdm-framer-type property for UCC\n");
107                 return ret;
108         }
109         ret = set_tdm_framer(sprop);
110         if (ret < 0)
111                 return -EINVAL;
112         utdm->tdm_framer_type = ret;
113
114         ret = of_property_read_u32_index(np, "fsl,siram-entry-id", 0, &val);
115         if (ret) {
116                 ret = -EINVAL;
117                 pr_err("QE-TDM: No siram entry id for UCC\n");
118                 return ret;
119         }
120         utdm->siram_entry_id = val;
121
122         set_si_param(utdm, ut_info);
123         return ret;
124 }
125 EXPORT_SYMBOL(ucc_of_parse_tdm);
126
127 void ucc_tdm_init(struct ucc_tdm *utdm, struct ucc_tdm_info *ut_info)
128 {
129         struct si1 __iomem *si_regs;
130         u16 __iomem *siram;
131         u16 siram_entry_valid;
132         u16 siram_entry_closed;
133         u16 ucc_num;
134         u8 csel;
135         u16 sixmr;
136         u16 tdm_port;
137         u32 siram_entry_id;
138         u32 mask;
139         int i;
140
141         si_regs = utdm->si_regs;
142         siram = utdm->siram;
143         ucc_num = ut_info->uf_info.ucc_num;
144         tdm_port = utdm->tdm_port;
145         siram_entry_id = utdm->siram_entry_id;
146
147         if (utdm->tdm_framer_type == TDM_FRAMER_T1)
148                 utdm->num_of_ts = 24;
149         if (utdm->tdm_framer_type == TDM_FRAMER_E1)
150                 utdm->num_of_ts = 32;
151
152         /* set siram table */
153         csel = (ucc_num < 4) ? ucc_num + 9 : ucc_num - 3;
154
155         siram_entry_valid = SIR_CSEL(csel) | SIR_BYTE | SIR_CNT(0);
156         siram_entry_closed = SIR_IDLE | SIR_BYTE | SIR_CNT(0);
157
158         for (i = 0; i < utdm->num_of_ts; i++) {
159                 mask = 0x01 << i;
160
161                 if (utdm->tx_ts_mask & mask)
162                         iowrite16be(siram_entry_valid,
163                                     &siram[siram_entry_id * 32 + i]);
164                 else
165                         iowrite16be(siram_entry_closed,
166                                     &siram[siram_entry_id * 32 + i]);
167
168                 if (utdm->rx_ts_mask & mask)
169                         iowrite16be(siram_entry_valid,
170                                     &siram[siram_entry_id * 32 + 0x200 +  i]);
171                 else
172                         iowrite16be(siram_entry_closed,
173                                     &siram[siram_entry_id * 32 + 0x200 +  i]);
174         }
175
176         setbits16(&siram[(siram_entry_id * 32) + (utdm->num_of_ts - 1)],
177                   SIR_LAST);
178         setbits16(&siram[(siram_entry_id * 32) + 0x200 + (utdm->num_of_ts - 1)],
179                   SIR_LAST);
180
181         /* Set SIxMR register */
182         sixmr = SIMR_SAD(siram_entry_id);
183
184         sixmr &= ~SIMR_SDM_MASK;
185
186         if (utdm->tdm_mode == TDM_INTERNAL_LOOPBACK)
187                 sixmr |= SIMR_SDM_INTERNAL_LOOPBACK;
188         else
189                 sixmr |= SIMR_SDM_NORMAL;
190
191         sixmr |= SIMR_RFSD(ut_info->si_info.simr_rfsd) |
192                         SIMR_TFSD(ut_info->si_info.simr_tfsd);
193
194         if (ut_info->si_info.simr_crt)
195                 sixmr |= SIMR_CRT;
196         if (ut_info->si_info.simr_sl)
197                 sixmr |= SIMR_SL;
198         if (ut_info->si_info.simr_ce)
199                 sixmr |= SIMR_CE;
200         if (ut_info->si_info.simr_fe)
201                 sixmr |= SIMR_FE;
202         if (ut_info->si_info.simr_gm)
203                 sixmr |= SIMR_GM;
204
205         switch (tdm_port) {
206         case 0:
207                 iowrite16be(sixmr, &si_regs->sixmr1[0]);
208                 break;
209         case 1:
210                 iowrite16be(sixmr, &si_regs->sixmr1[1]);
211                 break;
212         case 2:
213                 iowrite16be(sixmr, &si_regs->sixmr1[2]);
214                 break;
215         case 3:
216                 iowrite16be(sixmr, &si_regs->sixmr1[3]);
217                 break;
218         default:
219                 pr_err("QE-TDM: can not find tdm sixmr reg\n");
220                 break;
221         }
222 }
223 EXPORT_SYMBOL(ucc_tdm_init);