drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <linux/blk-mq-pci.h>
  17 #include <linux/refcount.h>
  18
  19 #include <scsi/scsi_tcq.h>
  20 #include <scsi/scsicam.h>
  21 #include <scsi/scsi_transport.h>
  22 #include <scsi/scsi_transport_fc.h>
  23
  24 #include "qla_target.h"
  25
  26 /*
  27  * Driver version
  28  */
  29 char qla2x00_version_str[40];
  30
  31 static int apidev_major;
  32
  33 /*
  34  * SRB allocation cache
  35  */
  36 struct kmem_cache *srb_cachep;
  37
  38 /*
  39  * CT6 CTX allocation cache
  40  */
  41 static struct kmem_cache *ctx_cachep;
  42 /*
  43  * error level for logging
  44  */
  45 uint ql_errlev = 0x8001;
  46
  47 static int ql2xenableclass2;
  48 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  49 MODULE_PARM_DESC(ql2xenableclass2,
  50                 "Specify if Class 2 operations are supported from the very "
  51                 "beginning. Default is 0 - class 2 not supported.");
  52
  53
  54 int ql2xlogintimeout = 20;
  55 module_param(ql2xlogintimeout, int, S_IRUGO);
  56 MODULE_PARM_DESC(ql2xlogintimeout,
  57                 "Login timeout value in seconds.");
  58
  59 int qlport_down_retry;
  60 module_param(qlport_down_retry, int, S_IRUGO);
  61 MODULE_PARM_DESC(qlport_down_retry,
  62                 "Maximum number of command retries to a port that returns "
  63                 "a PORT-DOWN status.");
  64
  65 int ql2xplogiabsentdevice;
  66 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  67 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  68                 "Option to enable PLOGI to devices that are not present after "
  69                 "a Fabric scan.  This is needed for several broken switches. "
  70                 "Default is 0 - no PLOGI. 1 - perform PLOGI.");
  71
  72 int ql2xloginretrycount;
  73 module_param(ql2xloginretrycount, int, S_IRUGO);
  74 MODULE_PARM_DESC(ql2xloginretrycount,
  75                 "Specify an alternate value for the NVRAM login retry count.");
  76
  77 int ql2xallocfwdump = 1;
  78 module_param(ql2xallocfwdump, int, S_IRUGO);
  79 MODULE_PARM_DESC(ql2xallocfwdump,
  80                 "Option to enable allocation of memory for a firmware dump "
  81                 "during HBA initialization.  Memory allocation requirements "
  82                 "vary by ISP type.  Default is 1 - allocate memory.");
  83
  84 int ql2xextended_error_logging;
  85 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  86 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  87 MODULE_PARM_DESC(ql2xextended_error_logging,
  88                 "Option to enable extended error logging,\n"
  89                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  90                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  91                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  92                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  93                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  94                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  95                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  96                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  97                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  98                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  99                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
 100                 "\t\t0x1e400000 - Preferred value for capturing essential "
 101                 "debug information (equivalent to old "
 102                 "ql2xextended_error_logging=1).\n"
 103                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 104
 105 int ql2xshiftctondsd = 6;
 106 module_param(ql2xshiftctondsd, int, S_IRUGO);
 107 MODULE_PARM_DESC(ql2xshiftctondsd,
 108                 "Set to control shifting of command type processing "
 109                 "based on total number of SG elements.");
 110
 111 int ql2xfdmienable = 1;
 112 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 113 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 114 MODULE_PARM_DESC(ql2xfdmienable,
 115                 "Enables FDMI registrations. "
 116                 "0 - no FDMI. Default is 1 - perform FDMI.");
 117
 118 #define MAX_Q_DEPTH     64
 119 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 120 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 121 MODULE_PARM_DESC(ql2xmaxqdepth,
 122                 "Maximum queue depth to set for each LUN. "
 123                 "Default is 64.");
 124
 125 #if (IS_ENABLED(CONFIG_NVME_FC))
 126 int ql2xenabledif;
 127 #else
 128 int ql2xenabledif = 2;
 129 #endif
 130 module_param(ql2xenabledif, int, S_IRUGO);
 131 MODULE_PARM_DESC(ql2xenabledif,
 132                 " Enable T10-CRC-DIF:\n"
 133                 " Default is 2.\n"
 134                 "  0 -- No DIF Support\n"
 135                 "  1 -- Enable DIF for all types\n"
 136                 "  2 -- Enable DIF for all types, except Type 0.\n");
 137
 138 #if (IS_ENABLED(CONFIG_NVME_FC))
 139 int ql2xnvmeenable = 1;
 140 #else
 141 int ql2xnvmeenable;
 142 #endif
 143 module_param(ql2xnvmeenable, int, 0644);
 144 MODULE_PARM_DESC(ql2xnvmeenable,
 145     "Enables NVME support. "
 146     "0 - no NVMe.  Default is Y");
 147
 148 int ql2xenablehba_err_chk = 2;
 149 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 150 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 151                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 152                 " Default is 2.\n"
 153                 "  0 -- Error isolation disabled\n"
 154                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 155                 "  2 -- Error isolation enabled for all Types\n");
 156
 157 int ql2xiidmaenable = 1;
 158 module_param(ql2xiidmaenable, int, S_IRUGO);
 159 MODULE_PARM_DESC(ql2xiidmaenable,
 160                 "Enables iIDMA settings "
 161                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 162
 163 int ql2xmqsupport = 1;
 164 module_param(ql2xmqsupport, int, S_IRUGO);
 165 MODULE_PARM_DESC(ql2xmqsupport,
 166                 "Enable on demand multiple queue pairs support "
 167                 "Default is 1 for supported. "
 168                 "Set it to 0 to turn off mq qpair support.");
 169
 170 int ql2xfwloadbin;
 171 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 172 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 173 MODULE_PARM_DESC(ql2xfwloadbin,
 174                 "Option to specify location from which to load ISP firmware:.\n"
 175                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 176                 "      interface.\n"
 177                 " 1 -- load firmware from flash.\n"
 178                 " 0 -- use default semantics.\n");
 179
 180 int ql2xetsenable;
 181 module_param(ql2xetsenable, int, S_IRUGO);
 182 MODULE_PARM_DESC(ql2xetsenable,
 183                 "Enables firmware ETS burst."
 184                 "Default is 0 - skip ETS enablement.");
 185
 186 int ql2xdbwr = 1;
 187 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 188 MODULE_PARM_DESC(ql2xdbwr,
 189                 "Option to specify scheme for request queue posting.\n"
 190                 " 0 -- Regular doorbell.\n"
 191                 " 1 -- CAMRAM doorbell (faster).\n");
 192
 193 int ql2xtargetreset = 1;
 194 module_param(ql2xtargetreset, int, S_IRUGO);
 195 MODULE_PARM_DESC(ql2xtargetreset,
 196                  "Enable target reset."
 197                  "Default is 1 - use hw defaults.");
 198
 199 int ql2xgffidenable;
 200 module_param(ql2xgffidenable, int, S_IRUGO);
 201 MODULE_PARM_DESC(ql2xgffidenable,
 202                 "Enables GFF_ID checks of port type. "
 203                 "Default is 0 - Do not use GFF_ID information.");
 204
 205 int ql2xasynctmfenable = 1;
 206 module_param(ql2xasynctmfenable, int, S_IRUGO);
 207 MODULE_PARM_DESC(ql2xasynctmfenable,
 208                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 209                 "Default is 1 - Issue TM IOCBs via mailbox mechanism.");
 210
 211 int ql2xdontresethba;
 212 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 213 MODULE_PARM_DESC(ql2xdontresethba,
 214                 "Option to specify reset behaviour.\n"
 215                 " 0 (Default) -- Reset on failure.\n"
 216                 " 1 -- Do not reset on failure.\n");
 217
 218 uint64_t ql2xmaxlun = MAX_LUNS;
 219 module_param(ql2xmaxlun, ullong, S_IRUGO);
 220 MODULE_PARM_DESC(ql2xmaxlun,
 221                 "Defines the maximum LU number to register with the SCSI "
 222                 "midlayer. Default is 65535.");
 223
 224 int ql2xmdcapmask = 0x1F;
 225 module_param(ql2xmdcapmask, int, S_IRUGO);
 226 MODULE_PARM_DESC(ql2xmdcapmask,
 227                 "Set the Minidump driver capture mask level. "
 228                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 229
 230 int ql2xmdenable = 1;
 231 module_param(ql2xmdenable, int, S_IRUGO);
 232 MODULE_PARM_DESC(ql2xmdenable,
 233                 "Enable/disable MiniDump. "
 234                 "0 - MiniDump disabled. "
 235                 "1 (Default) - MiniDump enabled.");
 236
 237 int ql2xexlogins;
 238 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 239 MODULE_PARM_DESC(ql2xexlogins,
 240                  "Number of extended Logins. "
 241                  "0 (Default)- Disabled.");
 242
 243 int ql2xexchoffld = 1024;
 244 module_param(ql2xexchoffld, uint, 0644);
 245 MODULE_PARM_DESC(ql2xexchoffld,
 246         "Number of target exchanges.");
 247
 248 int ql2xiniexchg = 1024;
 249 module_param(ql2xiniexchg, uint, 0644);
 250 MODULE_PARM_DESC(ql2xiniexchg,
 251         "Number of initiator exchanges.");
 252
 253 int ql2xfwholdabts;
 254 module_param(ql2xfwholdabts, int, S_IRUGO);
 255 MODULE_PARM_DESC(ql2xfwholdabts,
 256                 "Allow FW to hold status IOCB until ABTS rsp received. "
 257                 "0 (Default) Do not set fw option. "
 258                 "1 - Set fw option to hold ABTS.");
 259
 260 int ql2xmvasynctoatio = 1;
 261 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 262 MODULE_PARM_DESC(ql2xmvasynctoatio,
 263                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 264                 "0 (Default). Do not move IOCBs"
 265                 "1 - Move IOCBs.");
 266
 267 int ql2xautodetectsfp = 1;
 268 module_param(ql2xautodetectsfp, int, 0444);
 269 MODULE_PARM_DESC(ql2xautodetectsfp,
 270                  "Detect SFP range and set appropriate distance.\n"
 271                  "1 (Default): Enable\n");
 272
 273 int ql2xenablemsix = 1;
 274 module_param(ql2xenablemsix, int, 0444);
 275 MODULE_PARM_DESC(ql2xenablemsix,
 276                  "Set to enable MSI or MSI-X interrupt mechanism.\n"
 277                  " Default is 1, enable MSI-X interrupt mechanism.\n"
 278                  " 0 -- enable traditional pin-based mechanism.\n"
 279                  " 1 -- enable MSI-X interrupt mechanism.\n"
 280                  " 2 -- enable MSI interrupt mechanism.\n");
 281
 282 int qla2xuseresexchforels;
 283 module_param(qla2xuseresexchforels, int, 0444);
 284 MODULE_PARM_DESC(qla2xuseresexchforels,
 285                  "Reserve 1/2 of emergency exchanges for ELS.\n"
 286                  " 0 (default): disabled");
 287
 288 static int ql2xprotmask;
 289 module_param(ql2xprotmask, int, 0644);
 290 MODULE_PARM_DESC(ql2xprotmask,
 291                  "Override DIF/DIX protection capabilities mask\n"
 292                  "Default is 0 which sets protection mask based on "
 293                  "capabilities reported by HBA firmware.\n");
 294
 295 static int ql2xprotguard;
 296 module_param(ql2xprotguard, int, 0644);
 297 MODULE_PARM_DESC(ql2xprotguard, "Override choice of DIX checksum\n"
 298                  "  0 -- Let HBA firmware decide\n"
 299                  "  1 -- Force T10 CRC\n"
 300                  "  2 -- Force IP checksum\n");
 301
 302 int ql2xdifbundlinginternalbuffers;
 303 module_param(ql2xdifbundlinginternalbuffers, int, 0644);
 304 MODULE_PARM_DESC(ql2xdifbundlinginternalbuffers,
 305     "Force using internal buffers for DIF information\n"
 306     "0 (Default). Based on check.\n"
 307     "1 Force using internal buffers\n");
 308
 309 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 310 static void qla2x00_free_device(scsi_qla_host_t *);
 311 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 312 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
 313
 314
 315 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 316 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 317
 318 /* TODO Convert to inlines
 319  *
 320  * Timer routines
 321  */
 322
 323 __inline__ void
 324 qla2x00_start_timer(scsi_qla_host_t *vha, unsigned long interval)
 325 {
 326         timer_setup(&vha->timer, qla2x00_timer, 0);
 327         vha->timer.expires = jiffies + interval * HZ;
 328         add_timer(&vha->timer);
 329         vha->timer_active = 1;
 330 }
 331
 332 static inline void
 333 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 334 {
 335         /* Currently used for 82XX only. */
 336         if (vha->device_flags & DFLG_DEV_FAILED) {
 337                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 338                     "Device in a failed state, returning.\n");
 339                 return;
 340         }
 341
 342         mod_timer(&vha->timer, jiffies + interval * HZ);
 343 }
 344
 345 static __inline__ void
 346 qla2x00_stop_timer(scsi_qla_host_t *vha)
 347 {
 348         del_timer_sync(&vha->timer);
 349         vha->timer_active = 0;
 350 }
 351
 352 static int qla2x00_do_dpc(void *data);
 353
 354 static void qla2x00_rst_aen(scsi_qla_host_t *);
 355
 356 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 357         struct req_que **, struct rsp_que **);
 358 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 359 static void qla2x00_mem_free(struct qla_hw_data *);
 360 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 361         struct qla_qpair *qpair);
 362
 363 /* -------------------------------------------------------------------------- */
 364 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
 365     struct rsp_que *rsp)
 366 {
 367         struct qla_hw_data *ha = vha->hw;
 368
 369         rsp->qpair = ha->base_qpair;
 370         rsp->req = req;
 371         ha->base_qpair->hw = ha;
 372         ha->base_qpair->req = req;
 373         ha->base_qpair->rsp = rsp;
 374         ha->base_qpair->vha = vha;
 375         ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
 376         ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
 377         ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
 378         ha->base_qpair->srb_mempool = ha->srb_mempool;
 379         INIT_LIST_HEAD(&ha->base_qpair->hints_list);
 380         ha->base_qpair->enable_class_2 = ql2xenableclass2;
 381         /* init qpair to this cpu. Will adjust at run time. */
 382         qla_cpu_update(rsp->qpair, raw_smp_processor_id());
 383         ha->base_qpair->pdev = ha->pdev;
 384
 385         if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
 386                 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
 387 }
 388
 389 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 390                                 struct rsp_que *rsp)
 391 {
 392         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 393
 394         ha->req_q_map = kcalloc(ha->max_req_queues, sizeof(struct req_que *),
 395                                 GFP_KERNEL);
 396         if (!ha->req_q_map) {
 397                 ql_log(ql_log_fatal, vha, 0x003b,
 398                     "Unable to allocate memory for request queue ptrs.\n");
 399                 goto fail_req_map;
 400         }
 401
 402         ha->rsp_q_map = kcalloc(ha->max_rsp_queues, sizeof(struct rsp_que *),
 403                                 GFP_KERNEL);
 404         if (!ha->rsp_q_map) {
 405                 ql_log(ql_log_fatal, vha, 0x003c,
 406                     "Unable to allocate memory for response queue ptrs.\n");
 407                 goto fail_rsp_map;
 408         }
 409
 410         ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 411         if (ha->base_qpair == NULL) {
 412                 ql_log(ql_log_warn, vha, 0x00e0,
 413                     "Failed to allocate base queue pair memory.\n");
 414                 goto fail_base_qpair;
 415         }
 416
 417         qla_init_base_qpair(vha, req, rsp);
 418
 419         if ((ql2xmqsupport || ql2xnvmeenable) && ha->max_qpairs) {
 420                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 421                         GFP_KERNEL);
 422                 if (!ha->queue_pair_map) {
 423                         ql_log(ql_log_fatal, vha, 0x0180,
 424                             "Unable to allocate memory for queue pair ptrs.\n");
 425                         goto fail_qpair_map;
 426                 }
 427         }
 428
 429         /*
 430          * Make sure we record at least the request and response queue zero in
 431          * case we need to free them if part of the probe fails.
 432          */
 433         ha->rsp_q_map[0] = rsp;
 434         ha->req_q_map[0] = req;
 435         set_bit(0, ha->rsp_qid_map);
 436         set_bit(0, ha->req_qid_map);
 437         return 0;
 438
 439 fail_qpair_map:
 440         kfree(ha->base_qpair);
 441         ha->base_qpair = NULL;
 442 fail_base_qpair:
 443         kfree(ha->rsp_q_map);
 444         ha->rsp_q_map = NULL;
 445 fail_rsp_map:
 446         kfree(ha->req_q_map);
 447         ha->req_q_map = NULL;
 448 fail_req_map:
 449         return -ENOMEM;
 450 }
 451
 452 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 453 {
 454         if (IS_QLAFX00(ha)) {
 455                 if (req && req->ring_fx00)
 456                         dma_free_coherent(&ha->pdev->dev,
 457                             (req->length_fx00 + 1) * sizeof(request_t),
 458                             req->ring_fx00, req->dma_fx00);
 459         } else if (req && req->ring)
 460                 dma_free_coherent(&ha->pdev->dev,
 461                 (req->length + 1) * sizeof(request_t),
 462                 req->ring, req->dma);
 463
 464         if (req)
 465                 kfree(req->outstanding_cmds);
 466
 467         kfree(req);
 468 }
 469
 470 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 471 {
 472         if (IS_QLAFX00(ha)) {
 473                 if (rsp && rsp->ring_fx00)
 474                         dma_free_coherent(&ha->pdev->dev,
 475                             (rsp->length_fx00 + 1) * sizeof(request_t),
 476                             rsp->ring_fx00, rsp->dma_fx00);
 477         } else if (rsp && rsp->ring) {
 478                 dma_free_coherent(&ha->pdev->dev,
 479                 (rsp->length + 1) * sizeof(response_t),
 480                 rsp->ring, rsp->dma);
 481         }
 482         kfree(rsp);
 483 }
 484
 485 static void qla2x00_free_queues(struct qla_hw_data *ha)
 486 {
 487         struct req_que *req;
 488         struct rsp_que *rsp;
 489         int cnt;
 490         unsigned long flags;
 491
 492         if (ha->queue_pair_map) {
 493                 kfree(ha->queue_pair_map);
 494                 ha->queue_pair_map = NULL;
 495         }
 496         if (ha->base_qpair) {
 497                 kfree(ha->base_qpair);
 498                 ha->base_qpair = NULL;
 499         }
 500
 501         spin_lock_irqsave(&ha->hardware_lock, flags);
 502         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 503                 if (!test_bit(cnt, ha->req_qid_map))
 504                         continue;
 505
 506                 req = ha->req_q_map[cnt];
 507                 clear_bit(cnt, ha->req_qid_map);
 508                 ha->req_q_map[cnt] = NULL;
 509
 510                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 511                 qla2x00_free_req_que(ha, req);
 512                 spin_lock_irqsave(&ha->hardware_lock, flags);
 513         }
 514         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 515
 516         kfree(ha->req_q_map);
 517         ha->req_q_map = NULL;
 518
 519
 520         spin_lock_irqsave(&ha->hardware_lock, flags);
 521         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 522                 if (!test_bit(cnt, ha->rsp_qid_map))
 523                         continue;
 524
 525                 rsp = ha->rsp_q_map[cnt];
 526                 clear_bit(cnt, ha->rsp_qid_map);
 527                 ha->rsp_q_map[cnt] =  NULL;
 528                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 529                 qla2x00_free_rsp_que(ha, rsp);
 530                 spin_lock_irqsave(&ha->hardware_lock, flags);
 531         }
 532         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 533
 534         kfree(ha->rsp_q_map);
 535         ha->rsp_q_map = NULL;
 536 }
 537
 538 static char *
 539 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 540 {
 541         struct qla_hw_data *ha = vha->hw;
 542         static const char *const pci_bus_modes[] = {
 543                 "33", "66", "100", "133",
 544         };
 545         uint16_t pci_bus;
 546
 547         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 548         if (pci_bus) {
 549                 snprintf(str, str_len, "PCI-X (%s MHz)",
 550                          pci_bus_modes[pci_bus]);
 551         } else {
 552                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 553                 snprintf(str, str_len, "PCI (%s MHz)", pci_bus_modes[pci_bus]);
 554         }
 555
 556         return str;
 557 }
 558
 559 static char *
 560 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 561 {
 562         static const char *const pci_bus_modes[] = {
 563                 "33", "66", "100", "133",
 564         };
 565         struct qla_hw_data *ha = vha->hw;
 566         uint32_t pci_bus;
 567
 568         if (pci_is_pcie(ha->pdev)) {
 569                 uint32_t lstat, lspeed, lwidth;
 570                 const char *speed_str;
 571
 572                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 573                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 574                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 575
 576                 switch (lspeed) {
 577                 case 1:
 578                         speed_str = "2.5GT/s";
 579                         break;
 580                 case 2:
 581                         speed_str = "5.0GT/s";
 582                         break;
 583                 case 3:
 584                         speed_str = "8.0GT/s";
 585                         break;
 586                 default:
 587                         speed_str = "<unknown>";
 588                         break;
 589                 }
 590                 snprintf(str, str_len, "PCIe (%s x%d)", speed_str, lwidth);
 591
 592                 return str;
 593         }
 594
 595         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 596         if (pci_bus == 0 || pci_bus == 8)
 597                 snprintf(str, str_len, "PCI (%s MHz)",
 598                          pci_bus_modes[pci_bus >> 3]);
 599         else
 600                 snprintf(str, str_len, "PCI-X Mode %d (%s MHz)",
 601                          pci_bus & 4 ? 2 : 1,
 602                          pci_bus_modes[pci_bus & 3]);
 603
 604         return str;
 605 }
 606
 607 static char *
 608 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 609 {
 610         char un_str[10];
 611         struct qla_hw_data *ha = vha->hw;
 612
 613         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 614             ha->fw_minor_version, ha->fw_subminor_version);
 615
 616         if (ha->fw_attributes & BIT_9) {
 617                 strcat(str, "FLX");
 618                 return (str);
 619         }
 620
 621         switch (ha->fw_attributes & 0xFF) {
 622         case 0x7:
 623                 strcat(str, "EF");
 624                 break;
 625         case 0x17:
 626                 strcat(str, "TP");
 627                 break;
 628         case 0x37:
 629                 strcat(str, "IP");
 630                 break;
 631         case 0x77:
 632                 strcat(str, "VI");
 633                 break;
 634         default:
 635                 sprintf(un_str, "(%x)", ha->fw_attributes);
 636                 strcat(str, un_str);
 637                 break;
 638         }
 639         if (ha->fw_attributes & 0x100)
 640                 strcat(str, "X");
 641
 642         return (str);
 643 }
 644
 645 static char *
 646 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 647 {
 648         struct qla_hw_data *ha = vha->hw;
 649
 650         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 651             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 652         return str;
 653 }
 654
 655 void qla2x00_sp_free_dma(srb_t *sp)
 656 {
 657         struct qla_hw_data *ha = sp->vha->hw;
 658         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 659
 660         if (sp->flags & SRB_DMA_VALID) {
 661                 scsi_dma_unmap(cmd);
 662                 sp->flags &= ~SRB_DMA_VALID;
 663         }
 664
 665         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 666                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 667                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 668                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 669         }
 670
 671         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 672                 /* List assured to be having elements */
 673                 qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx);
 674                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 675         }
 676
 677         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 678                 struct crc_context *ctx0 = sp->u.scmd.crc_ctx;
 679
 680                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 681                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 682         }
 683
 684         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 685                 struct ct6_dsd *ctx1 = sp->u.scmd.ct6_ctx;
 686
 687                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 688                     ctx1->fcp_cmnd_dma);
 689                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 690                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 691                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 692                 mempool_free(ctx1, ha->ctx_mempool);
 693         }
 694 }
 695
 696 void qla2x00_sp_compl(srb_t *sp, int res)
 697 {
 698         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 699         struct completion *comp = sp->comp;
 700
 701         if (WARN_ON_ONCE(atomic_read(&sp->ref_count) == 0))
 702                 return;
 703
 704         atomic_dec(&sp->ref_count);
 705
 706         sp->free(sp);
 707         cmd->result = res;
 708         CMD_SP(cmd) = NULL;
 709         cmd->scsi_done(cmd);
 710         if (comp)
 711                 complete(comp);
 712 }
 713
 714 void qla2xxx_qpair_sp_free_dma(srb_t *sp)
 715 {
 716         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 717         struct qla_hw_data *ha = sp->fcport->vha->hw;
 718
 719         if (sp->flags & SRB_DMA_VALID) {
 720                 scsi_dma_unmap(cmd);
 721                 sp->flags &= ~SRB_DMA_VALID;
 722         }
 723
 724         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 725                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 726                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 727                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 728         }
 729
 730         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 731                 /* List assured to be having elements */
 732                 qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx);
 733                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 734         }
 735
 736         if (sp->flags & SRB_DIF_BUNDL_DMA_VALID) {
 737                 struct crc_context *difctx = sp->u.scmd.crc_ctx;
 738                 struct dsd_dma *dif_dsd, *nxt_dsd;
 739
 740                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 741                     &difctx->ldif_dma_hndl_list, list) {
 742                         list_del(&dif_dsd->list);
 743                         dma_pool_free(ha->dif_bundl_pool, dif_dsd->dsd_addr,
 744                             dif_dsd->dsd_list_dma);
 745                         kfree(dif_dsd);
 746                         difctx->no_dif_bundl--;
 747                 }
 748
 749                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 750                     &difctx->ldif_dsd_list, list) {
 751                         list_del(&dif_dsd->list);
 752                         dma_pool_free(ha->dl_dma_pool, dif_dsd->dsd_addr,
 753                             dif_dsd->dsd_list_dma);
 754                         kfree(dif_dsd);
 755                         difctx->no_ldif_dsd--;
 756                 }
 757
 758                 if (difctx->no_ldif_dsd) {
 759                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 760                             "%s: difctx->no_ldif_dsd=%x\n",
 761                             __func__, difctx->no_ldif_dsd);
 762                 }
 763
 764                 if (difctx->no_dif_bundl) {
 765                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 766                             "%s: difctx->no_dif_bundl=%x\n",
 767                             __func__, difctx->no_dif_bundl);
 768                 }
 769                 sp->flags &= ~SRB_DIF_BUNDL_DMA_VALID;
 770         }
 771
 772         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 773                 struct ct6_dsd *ctx1 = sp->u.scmd.ct6_ctx;
 774
 775                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 776                     ctx1->fcp_cmnd_dma);
 777                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 778                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 779                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 780                 mempool_free(ctx1, ha->ctx_mempool);
 781                 sp->flags &= ~SRB_FCP_CMND_DMA_VALID;
 782         }
 783
 784         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 785                 struct crc_context *ctx0 = sp->u.scmd.crc_ctx;
 786
 787                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 788                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 789         }
 790 }
 791
 792 void qla2xxx_qpair_sp_compl(srb_t *sp, int res)
 793 {
 794         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 795         struct completion *comp = sp->comp;
 796
 797         if (WARN_ON_ONCE(atomic_read(&sp->ref_count) == 0))
 798                 return;
 799
 800         atomic_dec(&sp->ref_count);
 801
 802         sp->free(sp);
 803         cmd->result = res;
 804         CMD_SP(cmd) = NULL;
 805         cmd->scsi_done(cmd);
 806         if (comp)
 807                 complete(comp);
 808 }
 809
 810 static int
 811 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 812 {
 813         scsi_qla_host_t *vha = shost_priv(host);
 814         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 815         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 816         struct qla_hw_data *ha = vha->hw;
 817         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 818         srb_t *sp;
 819         int rval;
 820
 821         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags)) ||
 822             WARN_ON_ONCE(!rport)) {
 823                 cmd->result = DID_NO_CONNECT << 16;
 824                 goto qc24_fail_command;
 825         }
 826
 827         if (ha->mqenable) {
 828                 uint32_t tag;
 829                 uint16_t hwq;
 830                 struct qla_qpair *qpair = NULL;
 831
 832                 tag = blk_mq_unique_tag(cmd->request);
 833                 hwq = blk_mq_unique_tag_to_hwq(tag);
 834                 qpair = ha->queue_pair_map[hwq];
 835
 836                 if (qpair)
 837                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 838         }
 839
 840         if (ha->flags.eeh_busy) {
 841                 if (ha->flags.pci_channel_io_perm_failure) {
 842                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 843                             "PCI Channel IO permanent failure, exiting "
 844                             "cmd=%p.\n", cmd);
 845                         cmd->result = DID_NO_CONNECT << 16;
 846                 } else {
 847                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 848                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 849                         cmd->result = DID_REQUEUE << 16;
 850                 }
 851                 goto qc24_fail_command;
 852         }
 853
 854         rval = fc_remote_port_chkready(rport);
 855         if (rval) {
 856                 cmd->result = rval;
 857                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 858                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 859                     cmd, rval);
 860                 goto qc24_fail_command;
 861         }
 862
 863         if (!vha->flags.difdix_supported &&
 864                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 865                         ql_dbg(ql_dbg_io, vha, 0x3004,
 866                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 867                             cmd);
 868                         cmd->result = DID_NO_CONNECT << 16;
 869                         goto qc24_fail_command;
 870         }
 871
 872         if (!fcport) {
 873                 cmd->result = DID_NO_CONNECT << 16;
 874                 goto qc24_fail_command;
 875         }
 876
 877         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 878                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 879                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 880                         ql_dbg(ql_dbg_io, vha, 0x3005,
 881                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 882                             atomic_read(&fcport->state),
 883                             atomic_read(&base_vha->loop_state));
 884                         cmd->result = DID_NO_CONNECT << 16;
 885                         goto qc24_fail_command;
 886                 }
 887                 goto qc24_target_busy;
 888         }
 889
 890         /*
 891          * Return target busy if we've received a non-zero retry_delay_timer
 892          * in a FCP_RSP.
 893          */
 894         if (fcport->retry_delay_timestamp == 0) {
 895                 /* retry delay not set */
 896         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 897                 fcport->retry_delay_timestamp = 0;
 898         else
 899                 goto qc24_target_busy;
 900
 901         sp = scsi_cmd_priv(cmd);
 902         qla2xxx_init_sp(sp, vha, vha->hw->base_qpair, fcport);
 903
 904         sp->u.scmd.cmd = cmd;
 905         sp->type = SRB_SCSI_CMD;
 906         atomic_set(&sp->ref_count, 1);
 907         CMD_SP(cmd) = (void *)sp;
 908         sp->free = qla2x00_sp_free_dma;
 909         sp->done = qla2x00_sp_compl;
 910
 911         rval = ha->isp_ops->start_scsi(sp);
 912         if (rval != QLA_SUCCESS) {
 913                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 914                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 915                 goto qc24_host_busy_free_sp;
 916         }
 917
 918         return 0;
 919
 920 qc24_host_busy_free_sp:
 921         sp->free(sp);
 922
 923 qc24_target_busy:
 924         return SCSI_MLQUEUE_TARGET_BUSY;
 925
 926 qc24_fail_command:
 927         cmd->scsi_done(cmd);
 928
 929         return 0;
 930 }
 931
 932 /* For MQ supported I/O */
 933 int
 934 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 935     struct qla_qpair *qpair)
 936 {
 937         scsi_qla_host_t *vha = shost_priv(host);
 938         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 939         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 940         struct qla_hw_data *ha = vha->hw;
 941         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 942         srb_t *sp;
 943         int rval;
 944
 945         rval = rport ? fc_remote_port_chkready(rport) : FC_PORTSTATE_OFFLINE;
 946         if (rval) {
 947                 cmd->result = rval;
 948                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 949                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 950                     cmd, rval);
 951                 goto qc24_fail_command;
 952         }
 953
 954         if (!fcport) {
 955                 cmd->result = DID_NO_CONNECT << 16;
 956                 goto qc24_fail_command;
 957         }
 958
 959         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 960                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 961                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 962                         ql_dbg(ql_dbg_io, vha, 0x3077,
 963                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 964                             atomic_read(&fcport->state),
 965                             atomic_read(&base_vha->loop_state));
 966                         cmd->result = DID_NO_CONNECT << 16;
 967                         goto qc24_fail_command;
 968                 }
 969                 goto qc24_target_busy;
 970         }
 971
 972         /*
 973          * Return target busy if we've received a non-zero retry_delay_timer
 974          * in a FCP_RSP.
 975          */
 976         if (fcport->retry_delay_timestamp == 0) {
 977                 /* retry delay not set */
 978         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 979                 fcport->retry_delay_timestamp = 0;
 980         else
 981                 goto qc24_target_busy;
 982
 983         sp = scsi_cmd_priv(cmd);
 984         qla2xxx_init_sp(sp, vha, qpair, fcport);
 985
 986         sp->u.scmd.cmd = cmd;
 987         sp->type = SRB_SCSI_CMD;
 988         atomic_set(&sp->ref_count, 1);
 989         CMD_SP(cmd) = (void *)sp;
 990         sp->free = qla2xxx_qpair_sp_free_dma;
 991         sp->done = qla2xxx_qpair_sp_compl;
 992         sp->qpair = qpair;
 993
 994         rval = ha->isp_ops->start_scsi_mq(sp);
 995         if (rval != QLA_SUCCESS) {
 996                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
 997                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 998                 if (rval == QLA_INTERFACE_ERROR)
 999                         goto qc24_fail_command;
1000                 goto qc24_host_busy_free_sp;
1001         }
1002
1003         return 0;
1004
1005 qc24_host_busy_free_sp:
1006         sp->free(sp);
1007
1008 qc24_target_busy:
1009         return SCSI_MLQUEUE_TARGET_BUSY;
1010
1011 qc24_fail_command:
1012         cmd->scsi_done(cmd);
1013
1014         return 0;
1015 }
1016
1017 /*
1018  * qla2x00_eh_wait_on_command
1019  *    Waits for the command to be returned by the Firmware for some
1020  *    max time.
1021  *
1022  * Input:
1023  *    cmd = Scsi Command to wait on.
1024  *
1025  * Return:
1026  *    Completed in time : QLA_SUCCESS
1027  *    Did not complete in time : QLA_FUNCTION_FAILED
1028  */
1029 static int
1030 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1031 {
1032 #define ABORT_POLLING_PERIOD    1000
1033 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
1034         unsigned long wait_iter = ABORT_WAIT_ITER;
1035         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1036         struct qla_hw_data *ha = vha->hw;
1037         int ret = QLA_SUCCESS;
1038
1039         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1040                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1041                     "Return:eh_wait.\n");
1042                 return ret;
1043         }
1044
1045         while (CMD_SP(cmd) && wait_iter--) {
1046                 msleep(ABORT_POLLING_PERIOD);
1047         }
1048         if (CMD_SP(cmd))
1049                 ret = QLA_FUNCTION_FAILED;
1050
1051         return ret;
1052 }
1053
1054 /*
1055  * qla2x00_wait_for_hba_online
1056  *    Wait till the HBA is online after going through
1057  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1058  *    finally HBA is disabled ie marked offline
1059  *
1060  * Input:
1061  *     ha - pointer to host adapter structure
1062  *
1063  * Note:
1064  *    Does context switching-Release SPIN_LOCK
1065  *    (if any) before calling this routine.
1066  *
1067  * Return:
1068  *    Success (Adapter is online) : 0
1069  *    Failed  (Adapter is offline/disabled) : 1
1070  */
1071 int
1072 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1073 {
1074         int             return_status;
1075         unsigned long   wait_online;
1076         struct qla_hw_data *ha = vha->hw;
1077         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1078
1079         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1080         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1081             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1082             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1083             ha->dpc_active) && time_before(jiffies, wait_online)) {
1084
1085                 msleep(1000);
1086         }
1087         if (base_vha->flags.online)
1088                 return_status = QLA_SUCCESS;
1089         else
1090                 return_status = QLA_FUNCTION_FAILED;
1091
1092         return (return_status);
1093 }
1094
1095 static inline int test_fcport_count(scsi_qla_host_t *vha)
1096 {
1097         struct qla_hw_data *ha = vha->hw;
1098         unsigned long flags;
1099         int res;
1100
1101         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1102         ql_dbg(ql_dbg_init, vha, 0x00ec,
1103             "tgt %p, fcport_count=%d\n",
1104             vha, vha->fcport_count);
1105         res = (vha->fcport_count == 0);
1106         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1107
1108         return res;
1109 }
1110
1111 /*
1112  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1113  * it has dependency on UNLOADING flag to stop device discovery
1114  */
1115 void
1116 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1117 {
1118         u8 i;
1119
1120         qla2x00_mark_all_devices_lost(vha, 0);
1121
1122         for (i = 0; i < 10; i++)
1123                 wait_event_timeout(vha->fcport_waitQ, test_fcport_count(vha),
1124                     HZ);
1125
1126         flush_workqueue(vha->hw->wq);
1127 }
1128
1129 /*
1130  * qla2x00_wait_for_hba_ready
1131  * Wait till the HBA is ready before doing driver unload
1132  *
1133  * Input:
1134  *     ha - pointer to host adapter structure
1135  *
1136  * Note:
1137  *    Does context switching-Release SPIN_LOCK
1138  *    (if any) before calling this routine.
1139  *
1140  */
1141 static void
1142 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1143 {
1144         struct qla_hw_data *ha = vha->hw;
1145         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1146
1147         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1148                 ha->flags.mbox_busy) ||
1149                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1150                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1151                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1152                         break;
1153                 msleep(1000);
1154         }
1155 }
1156
1157 int
1158 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1159 {
1160         int             return_status;
1161         unsigned long   wait_reset;
1162         struct qla_hw_data *ha = vha->hw;
1163         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1164
1165         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1166         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1167             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1168             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1169             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1170
1171                 msleep(1000);
1172
1173                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1174                     ha->flags.chip_reset_done)
1175                         break;
1176         }
1177         if (ha->flags.chip_reset_done)
1178                 return_status = QLA_SUCCESS;
1179         else
1180                 return_status = QLA_FUNCTION_FAILED;
1181
1182         return return_status;
1183 }
1184
1185 static int
1186 sp_get(struct srb *sp)
1187 {
1188         if (!refcount_inc_not_zero((refcount_t *)&sp->ref_count))
1189                 /* kref get fail */
1190                 return ENXIO;
1191         else
1192                 return 0;
1193 }
1194
1195 #define ISP_REG_DISCONNECT 0xffffffffU
1196 /**************************************************************************
1197 * qla2x00_isp_reg_stat
1198 *
1199 * Description:
1200 *       Read the host status register of ISP before aborting the command.
1201 *
1202 * Input:
1203 *       ha = pointer to host adapter structure.
1204 *
1205 *
1206 * Returns:
1207 *       Either true or false.
1208 *
1209 * Note: Return true if there is register disconnect.
1210 **************************************************************************/
1211 static inline
1212 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1213 {
1214         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1215         struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1216
1217         if (IS_P3P_TYPE(ha))
1218                 return ((RD_REG_DWORD(&reg82->host_int)) == ISP_REG_DISCONNECT);
1219         else
1220                 return ((RD_REG_DWORD(&reg->host_status)) ==
1221                         ISP_REG_DISCONNECT);
1222 }
1223
1224 /**************************************************************************
1225 * qla2xxx_eh_abort
1226 *
1227 * Description:
1228 *    The abort function will abort the specified command.
1229 *
1230 * Input:
1231 *    cmd = Linux SCSI command packet to be aborted.
1232 *
1233 * Returns:
1234 *    Either SUCCESS or FAILED.
1235 *
1236 * Note:
1237 *    Only return FAILED if command not returned by firmware.
1238 **************************************************************************/
1239 static int
1240 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1241 {
1242         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1243         DECLARE_COMPLETION_ONSTACK(comp);
1244         srb_t *sp;
1245         int ret;
1246         unsigned int id;
1247         uint64_t lun;
1248         int rval;
1249         struct qla_hw_data *ha = vha->hw;
1250
1251         if (qla2x00_isp_reg_stat(ha)) {
1252                 ql_log(ql_log_info, vha, 0x8042,
1253                     "PCI/Register disconnect, exiting.\n");
1254                 return FAILED;
1255         }
1256
1257         ret = fc_block_scsi_eh(cmd);
1258         if (ret != 0)
1259                 return ret;
1260
1261         sp = scsi_cmd_priv(cmd);
1262
1263         if (sp->fcport && sp->fcport->deleted)
1264                 return SUCCESS;
1265
1266         /* Return if the command has already finished. */
1267         if (sp_get(sp))
1268                 return SUCCESS;
1269
1270         id = cmd->device->id;
1271         lun = cmd->device->lun;
1272
1273         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1274             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1275             vha->host_no, id, lun, sp, cmd, sp->handle);
1276
1277         rval = ha->isp_ops->abort_command(sp);
1278         ql_dbg(ql_dbg_taskm, vha, 0x8003,
1279                "Abort command mbx cmd=%p, rval=%x.\n", cmd, rval);
1280
1281         switch (rval) {
1282         case QLA_SUCCESS:
1283                 /*
1284                  * The command has been aborted. That means that the firmware
1285                  * won't report a completion.
1286                  */
1287                 sp->done(sp, DID_ABORT << 16);
1288                 ret = SUCCESS;
1289                 break;
1290         case QLA_FUNCTION_PARAMETER_ERROR: {
1291                 /* Wait for the command completion. */
1292                 uint32_t ratov = ha->r_a_tov/10;
1293                 uint32_t ratov_j = msecs_to_jiffies(4 * ratov * 1000);
1294
1295                 WARN_ON_ONCE(sp->comp);
1296                 sp->comp = &comp;
1297                 if (!wait_for_completion_timeout(&comp, ratov_j)) {
1298                         ql_dbg(ql_dbg_taskm, vha, 0xffff,
1299                             "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1300                             __func__, ha->r_a_tov);
1301                         ret = FAILED;
1302                 } else {
1303                         ret = SUCCESS;
1304                 }
1305                 break;
1306         }
1307         default:
1308                 /*
1309                  * Either abort failed or abort and completion raced. Let
1310                  * the SCSI core retry the abort in the former case.
1311                  */
1312                 ret = FAILED;
1313                 break;
1314         }
1315
1316         sp->comp = NULL;
1317         atomic_dec(&sp->ref_count);
1318         ql_log(ql_log_info, vha, 0x801c,
1319             "Abort command issued nexus=%ld:%d:%llu -- %x.\n",
1320             vha->host_no, id, lun, ret);
1321
1322         return ret;
1323 }
1324
1325 /*
1326  * Returns: QLA_SUCCESS or QLA_FUNCTION_FAILED.
1327  */
1328 int
1329 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1330         uint64_t l, enum nexus_wait_type type)
1331 {
1332         int cnt, match, status;
1333         unsigned long flags;
1334         struct qla_hw_data *ha = vha->hw;
1335         struct req_que *req;
1336         srb_t *sp;
1337         struct scsi_cmnd *cmd;
1338
1339         status = QLA_SUCCESS;
1340
1341         spin_lock_irqsave(&ha->hardware_lock, flags);
1342         req = vha->req;
1343         for (cnt = 1; status == QLA_SUCCESS &&
1344                 cnt < req->num_outstanding_cmds; cnt++) {
1345                 sp = req->outstanding_cmds[cnt];
1346                 if (!sp)
1347                         continue;
1348                 if (sp->type != SRB_SCSI_CMD)
1349                         continue;
1350                 if (vha->vp_idx != sp->vha->vp_idx)
1351                         continue;
1352                 match = 0;
1353                 cmd = GET_CMD_SP(sp);
1354                 switch (type) {
1355                 case WAIT_HOST:
1356                         match = 1;
1357                         break;
1358                 case WAIT_TARGET:
1359                         match = cmd->device->id == t;
1360                         break;
1361                 case WAIT_LUN:
1362                         match = (cmd->device->id == t &&
1363                                 cmd->device->lun == l);
1364                         break;
1365                 }
1366                 if (!match)
1367                         continue;
1368
1369                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1370                 status = qla2x00_eh_wait_on_command(cmd);
1371                 spin_lock_irqsave(&ha->hardware_lock, flags);
1372         }
1373         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1374
1375         return status;
1376 }
1377
1378 static char *reset_errors[] = {
1379         "HBA not online",
1380         "HBA not ready",
1381         "Task management failed",
1382         "Waiting for command completions",
1383 };
1384
1385 static int
1386 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1387     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1388 {
1389         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1390         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1391         int err;
1392
1393         if (!fcport) {
1394                 return FAILED;
1395         }
1396
1397         err = fc_block_scsi_eh(cmd);
1398         if (err != 0)
1399                 return err;
1400
1401         if (fcport->deleted)
1402                 return SUCCESS;
1403
1404         ql_log(ql_log_info, vha, 0x8009,
1405             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1406             cmd->device->id, cmd->device->lun, cmd);
1407
1408         err = 0;
1409         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1410                 ql_log(ql_log_warn, vha, 0x800a,
1411                     "Wait for hba online failed for cmd=%p.\n", cmd);
1412                 goto eh_reset_failed;
1413         }
1414         err = 2;
1415         if (do_reset(fcport, cmd->device->lun, 1)
1416                 != QLA_SUCCESS) {
1417                 ql_log(ql_log_warn, vha, 0x800c,
1418                     "do_reset failed for cmd=%p.\n", cmd);
1419                 goto eh_reset_failed;
1420         }
1421         err = 3;
1422         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1423             cmd->device->lun, type) != QLA_SUCCESS) {
1424                 ql_log(ql_log_warn, vha, 0x800d,
1425                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1426                 goto eh_reset_failed;
1427         }
1428
1429         ql_log(ql_log_info, vha, 0x800e,
1430             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1431             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1432
1433         return SUCCESS;
1434
1435 eh_reset_failed:
1436         ql_log(ql_log_info, vha, 0x800f,
1437             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1438             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1439             cmd);
1440         return FAILED;
1441 }
1442
1443 static int
1444 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1445 {
1446         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1447         struct qla_hw_data *ha = vha->hw;
1448
1449         if (qla2x00_isp_reg_stat(ha)) {
1450                 ql_log(ql_log_info, vha, 0x803e,
1451                     "PCI/Register disconnect, exiting.\n");
1452                 return FAILED;
1453         }
1454
1455         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1456             ha->isp_ops->lun_reset);
1457 }
1458
1459 static int
1460 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1461 {
1462         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1463         struct qla_hw_data *ha = vha->hw;
1464
1465         if (qla2x00_isp_reg_stat(ha)) {
1466                 ql_log(ql_log_info, vha, 0x803f,
1467                     "PCI/Register disconnect, exiting.\n");
1468                 return FAILED;
1469         }
1470
1471         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1472             ha->isp_ops->target_reset);
1473 }
1474
1475 /**************************************************************************
1476 * qla2xxx_eh_bus_reset
1477 *
1478 * Description:
1479 *    The bus reset function will reset the bus and abort any executing
1480 *    commands.
1481 *
1482 * Input:
1483 *    cmd = Linux SCSI command packet of the command that cause the
1484 *          bus reset.
1485 *
1486 * Returns:
1487 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1488 *
1489 **************************************************************************/
1490 static int
1491 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1492 {
1493         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1494         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1495         int ret = FAILED;
1496         unsigned int id;
1497         uint64_t lun;
1498         struct qla_hw_data *ha = vha->hw;
1499
1500         if (qla2x00_isp_reg_stat(ha)) {
1501                 ql_log(ql_log_info, vha, 0x8040,
1502                     "PCI/Register disconnect, exiting.\n");
1503                 return FAILED;
1504         }
1505
1506         id = cmd->device->id;
1507         lun = cmd->device->lun;
1508
1509         if (!fcport) {
1510                 return ret;
1511         }
1512
1513         ret = fc_block_scsi_eh(cmd);
1514         if (ret != 0)
1515                 return ret;
1516         ret = FAILED;
1517
1518         if (qla2x00_chip_is_down(vha))
1519                 return ret;
1520
1521         ql_log(ql_log_info, vha, 0x8012,
1522             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1523
1524         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1525                 ql_log(ql_log_fatal, vha, 0x8013,
1526                     "Wait for hba online failed board disabled.\n");
1527                 goto eh_bus_reset_done;
1528         }
1529
1530         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1531                 ret = SUCCESS;
1532
1533         if (ret == FAILED)
1534                 goto eh_bus_reset_done;
1535
1536         /* Flush outstanding commands. */
1537         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1538             QLA_SUCCESS) {
1539                 ql_log(ql_log_warn, vha, 0x8014,
1540                     "Wait for pending commands failed.\n");
1541                 ret = FAILED;
1542         }
1543
1544 eh_bus_reset_done:
1545         ql_log(ql_log_warn, vha, 0x802b,
1546             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1547             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1548
1549         return ret;
1550 }
1551
1552 /**************************************************************************
1553 * qla2xxx_eh_host_reset
1554 *
1555 * Description:
1556 *    The reset function will reset the Adapter.
1557 *
1558 * Input:
1559 *      cmd = Linux SCSI command packet of the command that cause the
1560 *            adapter reset.
1561 *
1562 * Returns:
1563 *      Either SUCCESS or FAILED.
1564 *
1565 * Note:
1566 **************************************************************************/
1567 static int
1568 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1569 {
1570         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1571         struct qla_hw_data *ha = vha->hw;
1572         int ret = FAILED;
1573         unsigned int id;
1574         uint64_t lun;
1575         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1576
1577         if (qla2x00_isp_reg_stat(ha)) {
1578                 ql_log(ql_log_info, vha, 0x8041,
1579                     "PCI/Register disconnect, exiting.\n");
1580                 schedule_work(&ha->board_disable);
1581                 return SUCCESS;
1582         }
1583
1584         id = cmd->device->id;
1585         lun = cmd->device->lun;
1586
1587         ql_log(ql_log_info, vha, 0x8018,
1588             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1589
1590         /*
1591          * No point in issuing another reset if one is active.  Also do not
1592          * attempt a reset if we are updating flash.
1593          */
1594         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1595                 goto eh_host_reset_lock;
1596
1597         if (vha != base_vha) {
1598                 if (qla2x00_vp_abort_isp(vha))
1599                         goto eh_host_reset_lock;
1600         } else {
1601                 if (IS_P3P_TYPE(vha->hw)) {
1602                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1603                                 /* Ctx reset success */
1604                                 ret = SUCCESS;
1605                                 goto eh_host_reset_lock;
1606                         }
1607                         /* fall thru if ctx reset failed */
1608                 }
1609                 if (ha->wq)
1610                         flush_workqueue(ha->wq);
1611
1612                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1613                 if (ha->isp_ops->abort_isp(base_vha)) {
1614                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1615                         /* failed. schedule dpc to try */
1616                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1617
1618                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1619                                 ql_log(ql_log_warn, vha, 0x802a,
1620                                     "wait for hba online failed.\n");
1621                                 goto eh_host_reset_lock;
1622                         }
1623                 }
1624                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1625         }
1626
1627         /* Waiting for command to be returned to OS.*/
1628         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1629                 QLA_SUCCESS)
1630                 ret = SUCCESS;
1631
1632 eh_host_reset_lock:
1633         ql_log(ql_log_info, vha, 0x8017,
1634             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1635             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1636
1637         return ret;
1638 }
1639
1640 /*
1641 * qla2x00_loop_reset
1642 *      Issue loop reset.
1643 *
1644 * Input:
1645 *      ha = adapter block pointer.
1646 *
1647 * Returns:
1648 *      0 = success
1649 */
1650 int
1651 qla2x00_loop_reset(scsi_qla_host_t *vha)
1652 {
1653         int ret;
1654         struct fc_port *fcport;
1655         struct qla_hw_data *ha = vha->hw;
1656
1657         if (IS_QLAFX00(ha)) {
1658                 return qlafx00_loop_reset(vha);
1659         }
1660
1661         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1662                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1663                         if (fcport->port_type != FCT_TARGET)
1664                                 continue;
1665
1666                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1667                         if (ret != QLA_SUCCESS) {
1668                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1669                                     "Bus Reset failed: Reset=%d "
1670                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1671                         }
1672                 }
1673         }
1674
1675
1676         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1677                 atomic_set(&vha->loop_state, LOOP_DOWN);
1678                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1679                 qla2x00_mark_all_devices_lost(vha, 0);
1680                 ret = qla2x00_full_login_lip(vha);
1681                 if (ret != QLA_SUCCESS) {
1682                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1683                             "full_login_lip=%d.\n", ret);
1684                 }
1685         }
1686
1687         if (ha->flags.enable_lip_reset) {
1688                 ret = qla2x00_lip_reset(vha);
1689                 if (ret != QLA_SUCCESS)
1690                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1691                             "lip_reset failed (%d).\n", ret);
1692         }
1693
1694         /* Issue marker command only when we are going to start the I/O */
1695         vha->marker_needed = 1;
1696
1697         return QLA_SUCCESS;
1698 }
1699
1700 static void qla2x00_abort_srb(struct qla_qpair *qp, srb_t *sp, const int res,
1701                               unsigned long *flags)
1702         __releases(qp->qp_lock_ptr)
1703         __acquires(qp->qp_lock_ptr)
1704 {
1705         DECLARE_COMPLETION_ONSTACK(comp);
1706         scsi_qla_host_t *vha = qp->vha;
1707         struct qla_hw_data *ha = vha->hw;
1708         int rval;
1709
1710         if (sp_get(sp))
1711                 return;
1712
1713         if (sp->type == SRB_NVME_CMD || sp->type == SRB_NVME_LS ||
1714             (sp->type == SRB_SCSI_CMD && !ha->flags.eeh_busy &&
1715              !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
1716              !qla2x00_isp_reg_stat(ha))) {
1717                 sp->comp = &comp;
1718                 spin_unlock_irqrestore(qp->qp_lock_ptr, *flags);
1719                 rval = ha->isp_ops->abort_command(sp);
1720
1721                 switch (rval) {
1722                 case QLA_SUCCESS:
1723                         sp->done(sp, res);
1724                         break;
1725                 case QLA_FUNCTION_PARAMETER_ERROR:
1726                         wait_for_completion(&comp);
1727                         break;
1728                 }
1729
1730                 spin_lock_irqsave(qp->qp_lock_ptr, *flags);
1731                 sp->comp = NULL;
1732         }
1733
1734         atomic_dec(&sp->ref_count);
1735 }
1736
1737 static void
1738 __qla2x00_abort_all_cmds(struct qla_qpair *qp, int res)
1739 {
1740         int cnt;
1741         unsigned long flags;
1742         srb_t *sp;
1743         scsi_qla_host_t *vha = qp->vha;
1744         struct qla_hw_data *ha = vha->hw;
1745         struct req_que *req;
1746         struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1747         struct qla_tgt_cmd *cmd;
1748
1749         if (!ha->req_q_map)
1750                 return;
1751         spin_lock_irqsave(qp->qp_lock_ptr, flags);
1752         req = qp->req;
1753         for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1754                 sp = req->outstanding_cmds[cnt];
1755                 if (sp) {
1756                         req->outstanding_cmds[cnt] = NULL;
1757                         switch (sp->cmd_type) {
1758                         case TYPE_SRB:
1759                                 qla2x00_abort_srb(qp, sp, res, &flags);
1760                                 break;
1761                         case TYPE_TGT_CMD:
1762                                 if (!vha->hw->tgt.tgt_ops || !tgt ||
1763                                     qla_ini_mode_enabled(vha)) {
1764                                         ql_dbg(ql_dbg_tgt_mgt, vha, 0xf003,
1765                                             "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1766                                             vha->dpc_flags);
1767                                         continue;
1768                                 }
1769                                 cmd = (struct qla_tgt_cmd *)sp;
1770                                 cmd->aborted = 1;
1771                                 break;
1772                         case TYPE_TGT_TMCMD:
1773                                 /* Skip task management functions. */
1774                                 break;
1775                         default:
1776                                 break;
1777                         }
1778                 }
1779         }
1780         spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
1781 }
1782
1783 void
1784 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1785 {
1786         int que;
1787         struct qla_hw_data *ha = vha->hw;
1788
1789         /* Continue only if initialization complete. */
1790         if (!ha->base_qpair)
1791                 return;
1792         __qla2x00_abort_all_cmds(ha->base_qpair, res);
1793
1794         if (!ha->queue_pair_map)
1795                 return;
1796         for (que = 0; que < ha->max_qpairs; que++) {
1797                 if (!ha->queue_pair_map[que])
1798                         continue;
1799
1800                 __qla2x00_abort_all_cmds(ha->queue_pair_map[que], res);
1801         }
1802 }
1803
1804 static int
1805 qla2xxx_slave_alloc(struct scsi_device *sdev)
1806 {
1807         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1808
1809         if (!rport || fc_remote_port_chkready(rport))
1810                 return -ENXIO;
1811
1812         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1813
1814         return 0;
1815 }
1816
1817 static int
1818 qla2xxx_slave_configure(struct scsi_device *sdev)
1819 {
1820         scsi_qla_host_t *vha = shost_priv(sdev->host);
1821         struct req_que *req = vha->req;
1822
1823         if (IS_T10_PI_CAPABLE(vha->hw))
1824                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1825
1826         scsi_change_queue_depth(sdev, req->max_q_depth);
1827         return 0;
1828 }
1829
1830 static void
1831 qla2xxx_slave_destroy(struct scsi_device *sdev)
1832 {
1833         sdev->hostdata = NULL;
1834 }
1835
1836 /**
1837  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1838  * @ha: HA context
1839  *
1840  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1841  * supported addressing method.
1842  */
1843 static void
1844 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1845 {
1846         /* Assume a 32bit DMA mask. */
1847         ha->flags.enable_64bit_addressing = 0;
1848
1849         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1850                 /* Any upper-dword bits set? */
1851                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1852                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1853                         /* Ok, a 64bit DMA mask is applicable. */
1854                         ha->flags.enable_64bit_addressing = 1;
1855                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1856                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1857                         return;
1858                 }
1859         }
1860
1861         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1862         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1863 }
1864
1865 static void
1866 qla2x00_enable_intrs(struct qla_hw_data *ha)
1867 {
1868         unsigned long flags = 0;
1869         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1870
1871         spin_lock_irqsave(&ha->hardware_lock, flags);
1872         ha->interrupts_on = 1;
1873         /* enable risc and host interrupts */
1874         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1875         RD_REG_WORD(&reg->ictrl);
1876         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1877
1878 }
1879
1880 static void
1881 qla2x00_disable_intrs(struct qla_hw_data *ha)
1882 {
1883         unsigned long flags = 0;
1884         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1885
1886         spin_lock_irqsave(&ha->hardware_lock, flags);
1887         ha->interrupts_on = 0;
1888         /* disable risc and host interrupts */
1889         WRT_REG_WORD(&reg->ictrl, 0);
1890         RD_REG_WORD(&reg->ictrl);
1891         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1892 }
1893
1894 static void
1895 qla24xx_enable_intrs(struct qla_hw_data *ha)
1896 {
1897         unsigned long flags = 0;
1898         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1899
1900         spin_lock_irqsave(&ha->hardware_lock, flags);
1901         ha->interrupts_on = 1;
1902         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1903         RD_REG_DWORD(&reg->ictrl);
1904         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1905 }
1906
1907 static void
1908 qla24xx_disable_intrs(struct qla_hw_data *ha)
1909 {
1910         unsigned long flags = 0;
1911         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1912
1913         if (IS_NOPOLLING_TYPE(ha))
1914                 return;
1915         spin_lock_irqsave(&ha->hardware_lock, flags);
1916         ha->interrupts_on = 0;
1917         WRT_REG_DWORD(&reg->ictrl, 0);
1918         RD_REG_DWORD(&reg->ictrl);
1919         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1920 }
1921
1922 static int
1923 qla2x00_iospace_config(struct qla_hw_data *ha)
1924 {
1925         resource_size_t pio;
1926         uint16_t msix;
1927
1928         if (pci_request_selected_regions(ha->pdev, ha->bars,
1929             QLA2XXX_DRIVER_NAME)) {
1930                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1931                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1932                     pci_name(ha->pdev));
1933                 goto iospace_error_exit;
1934         }
1935         if (!(ha->bars & 1))
1936                 goto skip_pio;
1937
1938         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1939         pio = pci_resource_start(ha->pdev, 0);
1940         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1941                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1942                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1943                             "Invalid pci I/O region size (%s).\n",
1944                             pci_name(ha->pdev));
1945                         pio = 0;
1946                 }
1947         } else {
1948                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1949                     "Region #0 no a PIO resource (%s).\n",
1950                     pci_name(ha->pdev));
1951                 pio = 0;
1952         }
1953         ha->pio_address = pio;
1954         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1955             "PIO address=%llu.\n",
1956             (unsigned long long)ha->pio_address);
1957
1958 skip_pio:
1959         /* Use MMIO operations for all accesses. */
1960         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1961                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1962                     "Region #1 not an MMIO resource (%s), aborting.\n",
1963                     pci_name(ha->pdev));
1964                 goto iospace_error_exit;
1965         }
1966         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1967                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1968                     "Invalid PCI mem region size (%s), aborting.\n",
1969                     pci_name(ha->pdev));
1970                 goto iospace_error_exit;
1971         }
1972
1973         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1974         if (!ha->iobase) {
1975                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1976                     "Cannot remap MMIO (%s), aborting.\n",
1977                     pci_name(ha->pdev));
1978                 goto iospace_error_exit;
1979         }
1980
1981         /* Determine queue resources */
1982         ha->max_req_queues = ha->max_rsp_queues = 1;
1983         ha->msix_count = QLA_BASE_VECTORS;
1984         if (!ql2xmqsupport || !ql2xnvmeenable ||
1985             (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1986                 goto mqiobase_exit;
1987
1988         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1989                         pci_resource_len(ha->pdev, 3));
1990         if (ha->mqiobase) {
1991                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1992                     "MQIO Base=%p.\n", ha->mqiobase);
1993                 /* Read MSIX vector size of the board */
1994                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1995                 ha->msix_count = msix + 1;
1996                 /* Max queues are bounded by available msix vectors */
1997                 /* MB interrupt uses 1 vector */
1998                 ha->max_req_queues = ha->msix_count - 1;
1999                 ha->max_rsp_queues = ha->max_req_queues;
2000                 /* Queue pairs is the max value minus the base queue pair */
2001                 ha->max_qpairs = ha->max_rsp_queues - 1;
2002                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
2003                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
2004
2005                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
2006                     "MSI-X vector count: %d.\n", ha->msix_count);
2007         } else
2008                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
2009                     "BAR 3 not enabled.\n");
2010
2011 mqiobase_exit:
2012         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
2013             "MSIX Count: %d.\n", ha->msix_count);
2014         return (0);
2015
2016 iospace_error_exit:
2017         return (-ENOMEM);
2018 }
2019
2020
2021 static int
2022 qla83xx_iospace_config(struct qla_hw_data *ha)
2023 {
2024         uint16_t msix;
2025
2026         if (pci_request_selected_regions(ha->pdev, ha->bars,
2027             QLA2XXX_DRIVER_NAME)) {
2028                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2029                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2030                     pci_name(ha->pdev));
2031
2032                 goto iospace_error_exit;
2033         }
2034
2035         /* Use MMIO operations for all accesses. */
2036         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2037                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2038                     "Invalid pci I/O region size (%s).\n",
2039                     pci_name(ha->pdev));
2040                 goto iospace_error_exit;
2041         }
2042         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2043                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2044                     "Invalid PCI mem region size (%s), aborting\n",
2045                         pci_name(ha->pdev));
2046                 goto iospace_error_exit;
2047         }
2048
2049         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2050         if (!ha->iobase) {
2051                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2052                     "Cannot remap MMIO (%s), aborting.\n",
2053                     pci_name(ha->pdev));
2054                 goto iospace_error_exit;
2055         }
2056
2057         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2058         /* 83XX 26XX always use MQ type access for queues
2059          * - mbar 2, a.k.a region 4 */
2060         ha->max_req_queues = ha->max_rsp_queues = 1;
2061         ha->msix_count = QLA_BASE_VECTORS;
2062         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2063                         pci_resource_len(ha->pdev, 4));
2064
2065         if (!ha->mqiobase) {
2066                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2067                     "BAR2/region4 not enabled\n");
2068                 goto mqiobase_exit;
2069         }
2070
2071         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2072                         pci_resource_len(ha->pdev, 2));
2073         if (ha->msixbase) {
2074                 /* Read MSIX vector size of the board */
2075                 pci_read_config_word(ha->pdev,
2076                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
2077                 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE)  + 1;
2078                 /*
2079                  * By default, driver uses at least two msix vectors
2080                  * (default & rspq)
2081                  */
2082                 if (ql2xmqsupport || ql2xnvmeenable) {
2083                         /* MB interrupt uses 1 vector */
2084                         ha->max_req_queues = ha->msix_count - 1;
2085
2086                         /* ATIOQ needs 1 vector. That's 1 less QPair */
2087                         if (QLA_TGT_MODE_ENABLED())
2088                                 ha->max_req_queues--;
2089
2090                         ha->max_rsp_queues = ha->max_req_queues;
2091
2092                         /* Queue pairs is the max value minus
2093                          * the base queue pair */
2094                         ha->max_qpairs = ha->max_req_queues - 1;
2095                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2096                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
2097                 }
2098                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2099                     "MSI-X vector count: %d.\n", ha->msix_count);
2100         } else
2101                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2102                     "BAR 1 not enabled.\n");
2103
2104 mqiobase_exit:
2105         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2106             "MSIX Count: %d.\n", ha->msix_count);
2107         return 0;
2108
2109 iospace_error_exit:
2110         return -ENOMEM;
2111 }
2112
2113 static struct isp_operations qla2100_isp_ops = {
2114         .pci_config             = qla2100_pci_config,
2115         .reset_chip             = qla2x00_reset_chip,
2116         .chip_diag              = qla2x00_chip_diag,
2117         .config_rings           = qla2x00_config_rings,
2118         .reset_adapter          = qla2x00_reset_adapter,
2119         .nvram_config           = qla2x00_nvram_config,
2120         .update_fw_options      = qla2x00_update_fw_options,
2121         .load_risc              = qla2x00_load_risc,
2122         .pci_info_str           = qla2x00_pci_info_str,
2123         .fw_version_str         = qla2x00_fw_version_str,
2124         .intr_handler           = qla2100_intr_handler,
2125         .enable_intrs           = qla2x00_enable_intrs,
2126         .disable_intrs          = qla2x00_disable_intrs,
2127         .abort_command          = qla2x00_abort_command,
2128         .target_reset           = qla2x00_abort_target,
2129         .lun_reset              = qla2x00_lun_reset,
2130         .fabric_login           = qla2x00_login_fabric,
2131         .fabric_logout          = qla2x00_fabric_logout,
2132         .calc_req_entries       = qla2x00_calc_iocbs_32,
2133         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2134         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2135         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2136         .read_nvram             = qla2x00_read_nvram_data,
2137         .write_nvram            = qla2x00_write_nvram_data,
2138         .fw_dump                = qla2100_fw_dump,
2139         .beacon_on              = NULL,
2140         .beacon_off             = NULL,
2141         .beacon_blink           = NULL,
2142         .read_optrom            = qla2x00_read_optrom_data,
2143         .write_optrom           = qla2x00_write_optrom_data,
2144         .get_flash_version      = qla2x00_get_flash_version,
2145         .start_scsi             = qla2x00_start_scsi,
2146         .start_scsi_mq          = NULL,
2147         .abort_isp              = qla2x00_abort_isp,
2148         .iospace_config         = qla2x00_iospace_config,
2149         .initialize_adapter     = qla2x00_initialize_adapter,
2150 };
2151
2152 static struct isp_operations qla2300_isp_ops = {
2153         .pci_config             = qla2300_pci_config,
2154         .reset_chip             = qla2x00_reset_chip,
2155         .chip_diag              = qla2x00_chip_diag,
2156         .config_rings           = qla2x00_config_rings,
2157         .reset_adapter          = qla2x00_reset_adapter,
2158         .nvram_config           = qla2x00_nvram_config,
2159         .update_fw_options      = qla2x00_update_fw_options,
2160         .load_risc              = qla2x00_load_risc,
2161         .pci_info_str           = qla2x00_pci_info_str,
2162         .fw_version_str         = qla2x00_fw_version_str,
2163         .intr_handler           = qla2300_intr_handler,
2164         .enable_intrs           = qla2x00_enable_intrs,
2165         .disable_intrs          = qla2x00_disable_intrs,
2166         .abort_command          = qla2x00_abort_command,
2167         .target_reset           = qla2x00_abort_target,
2168         .lun_reset              = qla2x00_lun_reset,
2169         .fabric_login           = qla2x00_login_fabric,
2170         .fabric_logout          = qla2x00_fabric_logout,
2171         .calc_req_entries       = qla2x00_calc_iocbs_32,
2172         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2173         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2174         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2175         .read_nvram             = qla2x00_read_nvram_data,
2176         .write_nvram            = qla2x00_write_nvram_data,
2177         .fw_dump                = qla2300_fw_dump,
2178         .beacon_on              = qla2x00_beacon_on,
2179         .beacon_off             = qla2x00_beacon_off,
2180         .beacon_blink           = qla2x00_beacon_blink,
2181         .read_optrom            = qla2x00_read_optrom_data,
2182         .write_optrom           = qla2x00_write_optrom_data,
2183         .get_flash_version      = qla2x00_get_flash_version,
2184         .start_scsi             = qla2x00_start_scsi,
2185         .start_scsi_mq          = NULL,
2186         .abort_isp              = qla2x00_abort_isp,
2187         .iospace_config         = qla2x00_iospace_config,
2188         .initialize_adapter     = qla2x00_initialize_adapter,
2189 };
2190
2191 static struct isp_operations qla24xx_isp_ops = {
2192         .pci_config             = qla24xx_pci_config,
2193         .reset_chip             = qla24xx_reset_chip,
2194         .chip_diag              = qla24xx_chip_diag,
2195         .config_rings           = qla24xx_config_rings,
2196         .reset_adapter          = qla24xx_reset_adapter,
2197         .nvram_config           = qla24xx_nvram_config,
2198         .update_fw_options      = qla24xx_update_fw_options,
2199         .load_risc              = qla24xx_load_risc,
2200         .pci_info_str           = qla24xx_pci_info_str,
2201         .fw_version_str         = qla24xx_fw_version_str,
2202         .intr_handler           = qla24xx_intr_handler,
2203         .enable_intrs           = qla24xx_enable_intrs,
2204         .disable_intrs          = qla24xx_disable_intrs,
2205         .abort_command          = qla24xx_abort_command,
2206         .target_reset           = qla24xx_abort_target,
2207         .lun_reset              = qla24xx_lun_reset,
2208         .fabric_login           = qla24xx_login_fabric,
2209         .fabric_logout          = qla24xx_fabric_logout,
2210         .calc_req_entries       = NULL,
2211         .build_iocbs            = NULL,
2212         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2213         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2214         .read_nvram             = qla24xx_read_nvram_data,
2215         .write_nvram            = qla24xx_write_nvram_data,
2216         .fw_dump                = qla24xx_fw_dump,
2217         .beacon_on              = qla24xx_beacon_on,
2218         .beacon_off             = qla24xx_beacon_off,
2219         .beacon_blink           = qla24xx_beacon_blink,
2220         .read_optrom            = qla24xx_read_optrom_data,
2221         .write_optrom           = qla24xx_write_optrom_data,
2222         .get_flash_version      = qla24xx_get_flash_version,
2223         .start_scsi             = qla24xx_start_scsi,
2224         .start_scsi_mq          = NULL,
2225         .abort_isp              = qla2x00_abort_isp,
2226         .iospace_config         = qla2x00_iospace_config,
2227         .initialize_adapter     = qla2x00_initialize_adapter,
2228 };
2229
2230 static struct isp_operations qla25xx_isp_ops = {
2231         .pci_config             = qla25xx_pci_config,
2232         .reset_chip             = qla24xx_reset_chip,
2233         .chip_diag              = qla24xx_chip_diag,
2234         .config_rings           = qla24xx_config_rings,
2235         .reset_adapter          = qla24xx_reset_adapter,
2236         .nvram_config           = qla24xx_nvram_config,
2237         .update_fw_options      = qla24xx_update_fw_options,
2238         .load_risc              = qla24xx_load_risc,
2239         .pci_info_str           = qla24xx_pci_info_str,
2240         .fw_version_str         = qla24xx_fw_version_str,
2241         .intr_handler           = qla24xx_intr_handler,
2242         .enable_intrs           = qla24xx_enable_intrs,
2243         .disable_intrs          = qla24xx_disable_intrs,
2244         .abort_command          = qla24xx_abort_command,
2245         .target_reset           = qla24xx_abort_target,
2246         .lun_reset              = qla24xx_lun_reset,
2247         .fabric_login           = qla24xx_login_fabric,
2248         .fabric_logout          = qla24xx_fabric_logout,
2249         .calc_req_entries       = NULL,
2250         .build_iocbs            = NULL,
2251         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2252         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2253         .read_nvram             = qla25xx_read_nvram_data,
2254         .write_nvram            = qla25xx_write_nvram_data,
2255         .fw_dump                = qla25xx_fw_dump,
2256         .beacon_on              = qla24xx_beacon_on,
2257         .beacon_off             = qla24xx_beacon_off,
2258         .beacon_blink           = qla24xx_beacon_blink,
2259         .read_optrom            = qla25xx_read_optrom_data,
2260         .write_optrom           = qla24xx_write_optrom_data,
2261         .get_flash_version      = qla24xx_get_flash_version,
2262         .start_scsi             = qla24xx_dif_start_scsi,
2263         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2264         .abort_isp              = qla2x00_abort_isp,
2265         .iospace_config         = qla2x00_iospace_config,
2266         .initialize_adapter     = qla2x00_initialize_adapter,
2267 };
2268
2269 static struct isp_operations qla81xx_isp_ops = {
2270         .pci_config             = qla25xx_pci_config,
2271         .reset_chip             = qla24xx_reset_chip,
2272         .chip_diag              = qla24xx_chip_diag,
2273         .config_rings           = qla24xx_config_rings,
2274         .reset_adapter          = qla24xx_reset_adapter,
2275         .nvram_config           = qla81xx_nvram_config,
2276         .update_fw_options      = qla81xx_update_fw_options,
2277         .load_risc              = qla81xx_load_risc,
2278         .pci_info_str           = qla24xx_pci_info_str,
2279         .fw_version_str         = qla24xx_fw_version_str,
2280         .intr_handler           = qla24xx_intr_handler,
2281         .enable_intrs           = qla24xx_enable_intrs,
2282         .disable_intrs          = qla24xx_disable_intrs,
2283         .abort_command          = qla24xx_abort_command,
2284         .target_reset           = qla24xx_abort_target,
2285         .lun_reset              = qla24xx_lun_reset,
2286         .fabric_login           = qla24xx_login_fabric,
2287         .fabric_logout          = qla24xx_fabric_logout,
2288         .calc_req_entries       = NULL,
2289         .build_iocbs            = NULL,
2290         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2291         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2292         .read_nvram             = NULL,
2293         .write_nvram            = NULL,
2294         .fw_dump                = qla81xx_fw_dump,
2295         .beacon_on              = qla24xx_beacon_on,
2296         .beacon_off             = qla24xx_beacon_off,
2297         .beacon_blink           = qla83xx_beacon_blink,
2298         .read_optrom            = qla25xx_read_optrom_data,
2299         .write_optrom           = qla24xx_write_optrom_data,
2300         .get_flash_version      = qla24xx_get_flash_version,
2301         .start_scsi             = qla24xx_dif_start_scsi,
2302         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2303         .abort_isp              = qla2x00_abort_isp,
2304         .iospace_config         = qla2x00_iospace_config,
2305         .initialize_adapter     = qla2x00_initialize_adapter,
2306 };
2307
2308 static struct isp_operations qla82xx_isp_ops = {
2309         .pci_config             = qla82xx_pci_config,
2310         .reset_chip             = qla82xx_reset_chip,
2311         .chip_diag              = qla24xx_chip_diag,
2312         .config_rings           = qla82xx_config_rings,
2313         .reset_adapter          = qla24xx_reset_adapter,
2314         .nvram_config           = qla81xx_nvram_config,
2315         .update_fw_options      = qla24xx_update_fw_options,
2316         .load_risc              = qla82xx_load_risc,
2317         .pci_info_str           = qla24xx_pci_info_str,
2318         .fw_version_str         = qla24xx_fw_version_str,
2319         .intr_handler           = qla82xx_intr_handler,
2320         .enable_intrs           = qla82xx_enable_intrs,
2321         .disable_intrs          = qla82xx_disable_intrs,
2322         .abort_command          = qla24xx_abort_command,
2323         .target_reset           = qla24xx_abort_target,
2324         .lun_reset              = qla24xx_lun_reset,
2325         .fabric_login           = qla24xx_login_fabric,
2326         .fabric_logout          = qla24xx_fabric_logout,
2327         .calc_req_entries       = NULL,
2328         .build_iocbs            = NULL,
2329         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2330         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2331         .read_nvram             = qla24xx_read_nvram_data,
2332         .write_nvram            = qla24xx_write_nvram_data,
2333         .fw_dump                = qla82xx_fw_dump,
2334         .beacon_on              = qla82xx_beacon_on,
2335         .beacon_off             = qla82xx_beacon_off,
2336         .beacon_blink           = NULL,
2337         .read_optrom            = qla82xx_read_optrom_data,
2338         .write_optrom           = qla82xx_write_optrom_data,
2339         .get_flash_version      = qla82xx_get_flash_version,
2340         .start_scsi             = qla82xx_start_scsi,
2341         .start_scsi_mq          = NULL,
2342         .abort_isp              = qla82xx_abort_isp,
2343         .iospace_config         = qla82xx_iospace_config,
2344         .initialize_adapter     = qla2x00_initialize_adapter,
2345 };
2346
2347 static struct isp_operations qla8044_isp_ops = {
2348         .pci_config             = qla82xx_pci_config,
2349         .reset_chip             = qla82xx_reset_chip,
2350         .chip_diag              = qla24xx_chip_diag,
2351         .config_rings           = qla82xx_config_rings,
2352         .reset_adapter          = qla24xx_reset_adapter,
2353         .nvram_config           = qla81xx_nvram_config,
2354         .update_fw_options      = qla24xx_update_fw_options,
2355         .load_risc              = qla82xx_load_risc,
2356         .pci_info_str           = qla24xx_pci_info_str,
2357         .fw_version_str         = qla24xx_fw_version_str,
2358         .intr_handler           = qla8044_intr_handler,
2359         .enable_intrs           = qla82xx_enable_intrs,
2360         .disable_intrs          = qla82xx_disable_intrs,
2361         .abort_command          = qla24xx_abort_command,
2362         .target_reset           = qla24xx_abort_target,
2363         .lun_reset              = qla24xx_lun_reset,
2364         .fabric_login           = qla24xx_login_fabric,
2365         .fabric_logout          = qla24xx_fabric_logout,
2366         .calc_req_entries       = NULL,
2367         .build_iocbs            = NULL,
2368         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2369         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2370         .read_nvram             = NULL,
2371         .write_nvram            = NULL,
2372         .fw_dump                = qla8044_fw_dump,
2373         .beacon_on              = qla82xx_beacon_on,
2374         .beacon_off             = qla82xx_beacon_off,
2375         .beacon_blink           = NULL,
2376         .read_optrom            = qla8044_read_optrom_data,
2377         .write_optrom           = qla8044_write_optrom_data,
2378         .get_flash_version      = qla82xx_get_flash_version,
2379         .start_scsi             = qla82xx_start_scsi,
2380         .start_scsi_mq          = NULL,
2381         .abort_isp              = qla8044_abort_isp,
2382         .iospace_config         = qla82xx_iospace_config,
2383         .initialize_adapter     = qla2x00_initialize_adapter,
2384 };
2385
2386 static struct isp_operations qla83xx_isp_ops = {
2387         .pci_config             = qla25xx_pci_config,
2388         .reset_chip             = qla24xx_reset_chip,
2389         .chip_diag              = qla24xx_chip_diag,
2390         .config_rings           = qla24xx_config_rings,
2391         .reset_adapter          = qla24xx_reset_adapter,
2392         .nvram_config           = qla81xx_nvram_config,
2393         .update_fw_options      = qla81xx_update_fw_options,
2394         .load_risc              = qla81xx_load_risc,
2395         .pci_info_str           = qla24xx_pci_info_str,
2396         .fw_version_str         = qla24xx_fw_version_str,
2397         .intr_handler           = qla24xx_intr_handler,
2398         .enable_intrs           = qla24xx_enable_intrs,
2399         .disable_intrs          = qla24xx_disable_intrs,
2400         .abort_command          = qla24xx_abort_command,
2401         .target_reset           = qla24xx_abort_target,
2402         .lun_reset              = qla24xx_lun_reset,
2403         .fabric_login           = qla24xx_login_fabric,
2404         .fabric_logout          = qla24xx_fabric_logout,
2405         .calc_req_entries       = NULL,
2406         .build_iocbs            = NULL,
2407         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2408         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2409         .read_nvram             = NULL,
2410         .write_nvram            = NULL,
2411         .fw_dump                = qla83xx_fw_dump,
2412         .beacon_on              = qla24xx_beacon_on,
2413         .beacon_off             = qla24xx_beacon_off,
2414         .beacon_blink           = qla83xx_beacon_blink,
2415         .read_optrom            = qla25xx_read_optrom_data,
2416         .write_optrom           = qla24xx_write_optrom_data,
2417         .get_flash_version      = qla24xx_get_flash_version,
2418         .start_scsi             = qla24xx_dif_start_scsi,
2419         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2420         .abort_isp              = qla2x00_abort_isp,
2421         .iospace_config         = qla83xx_iospace_config,
2422         .initialize_adapter     = qla2x00_initialize_adapter,
2423 };
2424
2425 static struct isp_operations qlafx00_isp_ops = {
2426         .pci_config             = qlafx00_pci_config,
2427         .reset_chip             = qlafx00_soft_reset,
2428         .chip_diag              = qlafx00_chip_diag,
2429         .config_rings           = qlafx00_config_rings,
2430         .reset_adapter          = qlafx00_soft_reset,
2431         .nvram_config           = NULL,
2432         .update_fw_options      = NULL,
2433         .load_risc              = NULL,
2434         .pci_info_str           = qlafx00_pci_info_str,
2435         .fw_version_str         = qlafx00_fw_version_str,
2436         .intr_handler           = qlafx00_intr_handler,
2437         .enable_intrs           = qlafx00_enable_intrs,
2438         .disable_intrs          = qlafx00_disable_intrs,
2439         .abort_command          = qla24xx_async_abort_command,
2440         .target_reset           = qlafx00_abort_target,
2441         .lun_reset              = qlafx00_lun_reset,
2442         .fabric_login           = NULL,
2443         .fabric_logout          = NULL,
2444         .calc_req_entries       = NULL,
2445         .build_iocbs            = NULL,
2446         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2447         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2448         .read_nvram             = qla24xx_read_nvram_data,
2449         .write_nvram            = qla24xx_write_nvram_data,
2450         .fw_dump                = NULL,
2451         .beacon_on              = qla24xx_beacon_on,
2452         .beacon_off             = qla24xx_beacon_off,
2453         .beacon_blink           = NULL,
2454         .read_optrom            = qla24xx_read_optrom_data,
2455         .write_optrom           = qla24xx_write_optrom_data,
2456         .get_flash_version      = qla24xx_get_flash_version,
2457         .start_scsi             = qlafx00_start_scsi,
2458         .start_scsi_mq          = NULL,
2459         .abort_isp              = qlafx00_abort_isp,
2460         .iospace_config         = qlafx00_iospace_config,
2461         .initialize_adapter     = qlafx00_initialize_adapter,
2462 };
2463
2464 static struct isp_operations qla27xx_isp_ops = {
2465         .pci_config             = qla25xx_pci_config,
2466         .reset_chip             = qla24xx_reset_chip,
2467         .chip_diag              = qla24xx_chip_diag,
2468         .config_rings           = qla24xx_config_rings,
2469         .reset_adapter          = qla24xx_reset_adapter,
2470         .nvram_config           = qla81xx_nvram_config,
2471         .update_fw_options      = qla24xx_update_fw_options,
2472         .load_risc              = qla81xx_load_risc,
2473         .pci_info_str           = qla24xx_pci_info_str,
2474         .fw_version_str         = qla24xx_fw_version_str,
2475         .intr_handler           = qla24xx_intr_handler,
2476         .enable_intrs           = qla24xx_enable_intrs,
2477         .disable_intrs          = qla24xx_disable_intrs,
2478         .abort_command          = qla24xx_abort_command,
2479         .target_reset           = qla24xx_abort_target,
2480         .lun_reset              = qla24xx_lun_reset,
2481         .fabric_login           = qla24xx_login_fabric,
2482         .fabric_logout          = qla24xx_fabric_logout,
2483         .calc_req_entries       = NULL,
2484         .build_iocbs            = NULL,
2485         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2486         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2487         .read_nvram             = NULL,
2488         .write_nvram            = NULL,
2489         .fw_dump                = qla27xx_fwdump,
2490         .beacon_on              = qla24xx_beacon_on,
2491         .beacon_off             = qla24xx_beacon_off,
2492         .beacon_blink           = qla83xx_beacon_blink,
2493         .read_optrom            = qla25xx_read_optrom_data,
2494         .write_optrom           = qla24xx_write_optrom_data,
2495         .get_flash_version      = qla24xx_get_flash_version,
2496         .start_scsi             = qla24xx_dif_start_scsi,
2497         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2498         .abort_isp              = qla2x00_abort_isp,
2499         .iospace_config         = qla83xx_iospace_config,
2500         .initialize_adapter     = qla2x00_initialize_adapter,
2501 };
2502
2503 static inline void
2504 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2505 {
2506         ha->device_type = DT_EXTENDED_IDS;
2507         switch (ha->pdev->device) {
2508         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2509                 ha->isp_type |= DT_ISP2100;
2510                 ha->device_type &= ~DT_EXTENDED_IDS;
2511                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2512                 break;
2513         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2514                 ha->isp_type |= DT_ISP2200;
2515                 ha->device_type &= ~DT_EXTENDED_IDS;
2516                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2517                 break;
2518         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2519                 ha->isp_type |= DT_ISP2300;
2520                 ha->device_type |= DT_ZIO_SUPPORTED;
2521                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2522                 break;
2523         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2524                 ha->isp_type |= DT_ISP2312;
2525                 ha->device_type |= DT_ZIO_SUPPORTED;
2526                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2527                 break;
2528         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2529                 ha->isp_type |= DT_ISP2322;
2530                 ha->device_type |= DT_ZIO_SUPPORTED;
2531                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2532                     ha->pdev->subsystem_device == 0x0170)
2533                         ha->device_type |= DT_OEM_001;
2534                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2535                 break;
2536         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2537                 ha->isp_type |= DT_ISP6312;
2538                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2539                 break;
2540         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2541                 ha->isp_type |= DT_ISP6322;
2542                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2543                 break;
2544         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2545                 ha->isp_type |= DT_ISP2422;
2546                 ha->device_type |= DT_ZIO_SUPPORTED;
2547                 ha->device_type |= DT_FWI2;
2548                 ha->device_type |= DT_IIDMA;
2549                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2550                 break;
2551         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2552                 ha->isp_type |= DT_ISP2432;
2553                 ha->device_type |= DT_ZIO_SUPPORTED;
2554                 ha->device_type |= DT_FWI2;
2555                 ha->device_type |= DT_IIDMA;
2556                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2557                 break;
2558         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2559                 ha->isp_type |= DT_ISP8432;
2560                 ha->device_type |= DT_ZIO_SUPPORTED;
2561                 ha->device_type |= DT_FWI2;
2562                 ha->device_type |= DT_IIDMA;
2563                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2564                 break;
2565         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2566                 ha->isp_type |= DT_ISP5422;
2567                 ha->device_type |= DT_FWI2;
2568                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2569                 break;
2570         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2571                 ha->isp_type |= DT_ISP5432;
2572                 ha->device_type |= DT_FWI2;
2573                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2574                 break;
2575         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2576                 ha->isp_type |= DT_ISP2532;
2577                 ha->device_type |= DT_ZIO_SUPPORTED;
2578                 ha->device_type |= DT_FWI2;
2579                 ha->device_type |= DT_IIDMA;
2580                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2581                 break;
2582         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2583                 ha->isp_type |= DT_ISP8001;
2584                 ha->device_type |= DT_ZIO_SUPPORTED;
2585                 ha->device_type |= DT_FWI2;
2586                 ha->device_type |= DT_IIDMA;
2587                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2588                 break;
2589         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2590                 ha->isp_type |= DT_ISP8021;
2591                 ha->device_type |= DT_ZIO_SUPPORTED;
2592                 ha->device_type |= DT_FWI2;
2593                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2594                 /* Initialize 82XX ISP flags */
2595                 qla82xx_init_flags(ha);
2596                 break;
2597          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2598                 ha->isp_type |= DT_ISP8044;
2599                 ha->device_type |= DT_ZIO_SUPPORTED;
2600                 ha->device_type |= DT_FWI2;
2601                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2602                 /* Initialize 82XX ISP flags */
2603                 qla82xx_init_flags(ha);
2604                 break;
2605         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2606                 ha->isp_type |= DT_ISP2031;
2607                 ha->device_type |= DT_ZIO_SUPPORTED;
2608                 ha->device_type |= DT_FWI2;
2609                 ha->device_type |= DT_IIDMA;
2610                 ha->device_type |= DT_T10_PI;
2611                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2612                 break;
2613         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2614                 ha->isp_type |= DT_ISP8031;
2615                 ha->device_type |= DT_ZIO_SUPPORTED;
2616                 ha->device_type |= DT_FWI2;
2617                 ha->device_type |= DT_IIDMA;
2618                 ha->device_type |= DT_T10_PI;
2619                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2620                 break;
2621         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2622                 ha->isp_type |= DT_ISPFX00;
2623                 break;
2624         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2625                 ha->isp_type |= DT_ISP2071;
2626                 ha->device_type |= DT_ZIO_SUPPORTED;
2627                 ha->device_type |= DT_FWI2;
2628                 ha->device_type |= DT_IIDMA;
2629                 ha->device_type |= DT_T10_PI;
2630                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2631                 break;
2632         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2633                 ha->isp_type |= DT_ISP2271;
2634                 ha->device_type |= DT_ZIO_SUPPORTED;
2635                 ha->device_type |= DT_FWI2;
2636                 ha->device_type |= DT_IIDMA;
2637                 ha->device_type |= DT_T10_PI;
2638                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2639                 break;
2640         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2641                 ha->isp_type |= DT_ISP2261;
2642                 ha->device_type |= DT_ZIO_SUPPORTED;
2643                 ha->device_type |= DT_FWI2;
2644                 ha->device_type |= DT_IIDMA;
2645                 ha->device_type |= DT_T10_PI;
2646                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2647                 break;
2648         case PCI_DEVICE_ID_QLOGIC_ISP2081:
2649         case PCI_DEVICE_ID_QLOGIC_ISP2089:
2650                 ha->isp_type |= DT_ISP2081;
2651                 ha->device_type |= DT_ZIO_SUPPORTED;
2652                 ha->device_type |= DT_FWI2;
2653                 ha->device_type |= DT_IIDMA;
2654                 ha->device_type |= DT_T10_PI;
2655                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2656                 break;
2657         case PCI_DEVICE_ID_QLOGIC_ISP2281:
2658         case PCI_DEVICE_ID_QLOGIC_ISP2289:
2659                 ha->isp_type |= DT_ISP2281;
2660                 ha->device_type |= DT_ZIO_SUPPORTED;
2661                 ha->device_type |= DT_FWI2;
2662                 ha->device_type |= DT_IIDMA;
2663                 ha->device_type |= DT_T10_PI;
2664                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2665                 break;
2666         }
2667
2668         if (IS_QLA82XX(ha))
2669                 ha->port_no = ha->portnum & 1;
2670         else {
2671                 /* Get adapter physical port no from interrupt pin register. */
2672                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2673                 if (IS_QLA25XX(ha) || IS_QLA2031(ha) ||
2674                     IS_QLA27XX(ha) || IS_QLA28XX(ha))
2675                         ha->port_no--;
2676                 else
2677                         ha->port_no = !(ha->port_no & 1);
2678         }
2679
2680         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2681             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2682             ha->device_type, ha->port_no, ha->fw_srisc_address);
2683 }
2684
2685 static void
2686 qla2xxx_scan_start(struct Scsi_Host *shost)
2687 {
2688         scsi_qla_host_t *vha = shost_priv(shost);
2689
2690         if (vha->hw->flags.running_gold_fw)
2691                 return;
2692
2693         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2694         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2695         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2696         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2697 }
2698
2699 static int
2700 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2701 {
2702         scsi_qla_host_t *vha = shost_priv(shost);
2703
2704         if (test_bit(UNLOADING, &vha->dpc_flags))
2705                 return 1;
2706         if (!vha->host)
2707                 return 1;
2708         if (time > vha->hw->loop_reset_delay * HZ)
2709                 return 1;
2710
2711         return atomic_read(&vha->loop_state) == LOOP_READY;
2712 }
2713
2714 static void qla2x00_iocb_work_fn(struct work_struct *work)
2715 {
2716         struct scsi_qla_host *vha = container_of(work,
2717                 struct scsi_qla_host, iocb_work);
2718         struct qla_hw_data *ha = vha->hw;
2719         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2720         int i = 2;
2721         unsigned long flags;
2722
2723         if (test_bit(UNLOADING, &base_vha->dpc_flags))
2724                 return;
2725
2726         while (!list_empty(&vha->work_list) && i > 0) {
2727                 qla2x00_do_work(vha);
2728                 i--;
2729         }
2730
2731         spin_lock_irqsave(&vha->work_lock, flags);
2732         clear_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags);
2733         spin_unlock_irqrestore(&vha->work_lock, flags);
2734 }
2735
2736 /*
2737  * PCI driver interface
2738  */
2739 static int
2740 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2741 {
2742         int     ret = -ENODEV;
2743         struct Scsi_Host *host;
2744         scsi_qla_host_t *base_vha = NULL;
2745         struct qla_hw_data *ha;
2746         char pci_info[30];
2747         char fw_str[30], wq_name[30];
2748         struct scsi_host_template *sht;
2749         int bars, mem_only = 0;
2750         uint16_t req_length = 0, rsp_length = 0;
2751         struct req_que *req = NULL;
2752         struct rsp_que *rsp = NULL;
2753         int i;
2754
2755         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2756         sht = &qla2xxx_driver_template;
2757         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2758             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2759             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2760             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2761             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2762             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2763             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2764             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2765             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2766             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2767             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2768             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2769             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2770             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2771             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261 ||
2772             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2081 ||
2773             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2281 ||
2774             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2089 ||
2775             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2289) {
2776                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2777                 mem_only = 1;
2778                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2779                     "Mem only adapter.\n");
2780         }
2781         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2782             "Bars=%d.\n", bars);
2783
2784         if (mem_only) {
2785                 if (pci_enable_device_mem(pdev))
2786                         return ret;
2787         } else {
2788                 if (pci_enable_device(pdev))
2789                         return ret;
2790         }
2791
2792         /* This may fail but that's ok */
2793         pci_enable_pcie_error_reporting(pdev);
2794
2795         /* Turn off T10-DIF when FC-NVMe is enabled */
2796         if (ql2xnvmeenable)
2797                 ql2xenabledif = 0;
2798
2799         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2800         if (!ha) {
2801                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2802                     "Unable to allocate memory for ha.\n");
2803                 goto disable_device;
2804         }
2805         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2806             "Memory allocated for ha=%p.\n", ha);
2807         ha->pdev = pdev;
2808         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2809         spin_lock_init(&ha->tgt.q_full_lock);
2810         spin_lock_init(&ha->tgt.sess_lock);
2811         spin_lock_init(&ha->tgt.atio_lock);
2812
2813         atomic_set(&ha->nvme_active_aen_cnt, 0);
2814
2815         /* Clear our data area */
2816         ha->bars = bars;
2817         ha->mem_only = mem_only;
2818         spin_lock_init(&ha->hardware_lock);
2819         spin_lock_init(&ha->vport_slock);
2820         mutex_init(&ha->selflogin_lock);
2821         mutex_init(&ha->optrom_mutex);
2822
2823         /* Set ISP-type information. */
2824         qla2x00_set_isp_flags(ha);
2825
2826         /* Set EEH reset type to fundamental if required by hba */
2827         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2828             IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
2829                 pdev->needs_freset = 1;
2830
2831         ha->prev_topology = 0;
2832         ha->init_cb_size = sizeof(init_cb_t);
2833         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2834         ha->optrom_size = OPTROM_SIZE_2300;
2835         ha->max_exchg = FW_MAX_EXCHANGES_CNT;
2836         atomic_set(&ha->num_pend_mbx_stage1, 0);
2837         atomic_set(&ha->num_pend_mbx_stage2, 0);
2838         atomic_set(&ha->num_pend_mbx_stage3, 0);
2839         atomic_set(&ha->zio_threshold, DEFAULT_ZIO_THRESHOLD);
2840         ha->last_zio_threshold = DEFAULT_ZIO_THRESHOLD;
2841
2842         /* Assign ISP specific operations. */
2843         if (IS_QLA2100(ha)) {
2844                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2845                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2846                 req_length = REQUEST_ENTRY_CNT_2100;
2847                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2848                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2849                 ha->gid_list_info_size = 4;
2850                 ha->flash_conf_off = ~0;
2851                 ha->flash_data_off = ~0;
2852                 ha->nvram_conf_off = ~0;
2853                 ha->nvram_data_off = ~0;
2854                 ha->isp_ops = &qla2100_isp_ops;
2855         } else if (IS_QLA2200(ha)) {
2856                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2857                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2858                 req_length = REQUEST_ENTRY_CNT_2200;
2859                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2860                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2861                 ha->gid_list_info_size = 4;
2862                 ha->flash_conf_off = ~0;
2863                 ha->flash_data_off = ~0;
2864                 ha->nvram_conf_off = ~0;
2865                 ha->nvram_data_off = ~0;
2866                 ha->isp_ops = &qla2100_isp_ops;
2867         } else if (IS_QLA23XX(ha)) {
2868                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2869                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2870                 req_length = REQUEST_ENTRY_CNT_2200;
2871                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2872                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2873                 ha->gid_list_info_size = 6;
2874                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2875                         ha->optrom_size = OPTROM_SIZE_2322;
2876                 ha->flash_conf_off = ~0;
2877                 ha->flash_data_off = ~0;
2878                 ha->nvram_conf_off = ~0;
2879                 ha->nvram_data_off = ~0;
2880                 ha->isp_ops = &qla2300_isp_ops;
2881         } else if (IS_QLA24XX_TYPE(ha)) {
2882                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2883                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2884                 req_length = REQUEST_ENTRY_CNT_24XX;
2885                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2886                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2887                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2888                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2889                 ha->gid_list_info_size = 8;
2890                 ha->optrom_size = OPTROM_SIZE_24XX;
2891                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2892                 ha->isp_ops = &qla24xx_isp_ops;
2893                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2894                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2895                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2896                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2897         } else if (IS_QLA25XX(ha)) {
2898                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2899                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2900                 req_length = REQUEST_ENTRY_CNT_24XX;
2901                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2902                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2903                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2904                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2905                 ha->gid_list_info_size = 8;
2906                 ha->optrom_size = OPTROM_SIZE_25XX;
2907                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2908                 ha->isp_ops = &qla25xx_isp_ops;
2909                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2910                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2911                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2912                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2913         } else if (IS_QLA81XX(ha)) {
2914                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2915                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2916                 req_length = REQUEST_ENTRY_CNT_24XX;
2917                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2918                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2919                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2920                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2921                 ha->gid_list_info_size = 8;
2922                 ha->optrom_size = OPTROM_SIZE_81XX;
2923                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2924                 ha->isp_ops = &qla81xx_isp_ops;
2925                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2926                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2927                 ha->nvram_conf_off = ~0;
2928                 ha->nvram_data_off = ~0;
2929         } else if (IS_QLA82XX(ha)) {
2930                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2931                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2932                 req_length = REQUEST_ENTRY_CNT_82XX;
2933                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2934                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2935                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2936                 ha->gid_list_info_size = 8;
2937                 ha->optrom_size = OPTROM_SIZE_82XX;
2938                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2939                 ha->isp_ops = &qla82xx_isp_ops;
2940                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2941                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2942                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2943                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2944         } else if (IS_QLA8044(ha)) {
2945                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2946                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2947                 req_length = REQUEST_ENTRY_CNT_82XX;
2948                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2949                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2950                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2951                 ha->gid_list_info_size = 8;
2952                 ha->optrom_size = OPTROM_SIZE_83XX;
2953                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2954                 ha->isp_ops = &qla8044_isp_ops;
2955                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2956                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2957                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2958                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2959         } else if (IS_QLA83XX(ha)) {
2960                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2961                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2962                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2963                 req_length = REQUEST_ENTRY_CNT_83XX;
2964                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2965                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2966                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2967                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2968                 ha->gid_list_info_size = 8;
2969                 ha->optrom_size = OPTROM_SIZE_83XX;
2970                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2971                 ha->isp_ops = &qla83xx_isp_ops;
2972                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2973                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2974                 ha->nvram_conf_off = ~0;
2975                 ha->nvram_data_off = ~0;
2976         }  else if (IS_QLAFX00(ha)) {
2977                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2978                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2979                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2980                 req_length = REQUEST_ENTRY_CNT_FX00;
2981                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2982                 ha->isp_ops = &qlafx00_isp_ops;
2983                 ha->port_down_retry_count = 30; /* default value */
2984                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2985                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2986                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2987                 ha->mr.fw_hbt_en = 1;
2988                 ha->mr.host_info_resend = false;
2989                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2990         } else if (IS_QLA27XX(ha)) {
2991                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2992                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2993                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2994                 req_length = REQUEST_ENTRY_CNT_83XX;
2995                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2996                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2997                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2998                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2999                 ha->gid_list_info_size = 8;
3000                 ha->optrom_size = OPTROM_SIZE_83XX;
3001                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3002                 ha->isp_ops = &qla27xx_isp_ops;
3003                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3004                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3005                 ha->nvram_conf_off = ~0;
3006                 ha->nvram_data_off = ~0;
3007         } else if (IS_QLA28XX(ha)) {
3008                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3009                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3010                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3011                 req_length = REQUEST_ENTRY_CNT_24XX;
3012                 rsp_length = RESPONSE_ENTRY_CNT_2300;
3013                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3014                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3015                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3016                 ha->gid_list_info_size = 8;
3017                 ha->optrom_size = OPTROM_SIZE_28XX;
3018                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3019                 ha->isp_ops = &qla27xx_isp_ops;
3020                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_28XX;
3021                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_28XX;
3022                 ha->nvram_conf_off = ~0;
3023                 ha->nvram_data_off = ~0;
3024         }
3025
3026         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
3027             "mbx_count=%d, req_length=%d, "
3028             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
3029             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
3030             "max_fibre_devices=%d.\n",
3031             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
3032             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
3033             ha->nvram_npiv_size, ha->max_fibre_devices);
3034         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
3035             "isp_ops=%p, flash_conf_off=%d, "
3036             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
3037             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
3038             ha->nvram_conf_off, ha->nvram_data_off);
3039
3040         /* Configure PCI I/O space */
3041         ret = ha->isp_ops->iospace_config(ha);
3042         if (ret)
3043                 goto iospace_config_failed;
3044
3045         ql_log_pci(ql_log_info, pdev, 0x001d,
3046             "Found an ISP%04X irq %d iobase 0x%p.\n",
3047             pdev->device, pdev->irq, ha->iobase);
3048         mutex_init(&ha->vport_lock);
3049         mutex_init(&ha->mq_lock);
3050         init_completion(&ha->mbx_cmd_comp);
3051         complete(&ha->mbx_cmd_comp);
3052         init_completion(&ha->mbx_intr_comp);
3053         init_completion(&ha->dcbx_comp);
3054         init_completion(&ha->lb_portup_comp);
3055
3056         set_bit(0, (unsigned long *) ha->vp_idx_map);
3057
3058         qla2x00_config_dma_addressing(ha);
3059         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
3060             "64 Bit addressing is %s.\n",
3061             ha->flags.enable_64bit_addressing ? "enable" :
3062             "disable");
3063         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
3064         if (ret) {
3065                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
3066                     "Failed to allocate memory for adapter, aborting.\n");
3067
3068                 goto probe_hw_failed;
3069         }
3070
3071         req->max_q_depth = MAX_Q_DEPTH;
3072         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
3073                 req->max_q_depth = ql2xmaxqdepth;
3074
3075
3076         base_vha = qla2x00_create_host(sht, ha);
3077         if (!base_vha) {
3078                 ret = -ENOMEM;
3079                 goto probe_hw_failed;
3080         }
3081
3082         pci_set_drvdata(pdev, base_vha);
3083         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3084
3085         host = base_vha->host;
3086         base_vha->req = req;
3087         if (IS_QLA2XXX_MIDTYPE(ha))
3088                 base_vha->mgmt_svr_loop_id =
3089                         qla2x00_reserve_mgmt_server_loop_id(base_vha);
3090         else
3091                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3092                                                 base_vha->vp_idx;
3093
3094         /* Setup fcport template structure. */
3095         ha->mr.fcport.vha = base_vha;
3096         ha->mr.fcport.port_type = FCT_UNKNOWN;
3097         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3098         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3099         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3100         ha->mr.fcport.scan_state = 1;
3101
3102         /* Set the SG table size based on ISP type */
3103         if (!IS_FWI2_CAPABLE(ha)) {
3104                 if (IS_QLA2100(ha))
3105                         host->sg_tablesize = 32;
3106         } else {
3107                 if (!IS_QLA82XX(ha))
3108                         host->sg_tablesize = QLA_SG_ALL;
3109         }
3110         host->max_id = ha->max_fibre_devices;
3111         host->cmd_per_lun = 3;
3112         host->unique_id = host->host_no;
3113         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3114                 host->max_cmd_len = 32;
3115         else
3116                 host->max_cmd_len = MAX_CMDSZ;
3117         host->max_channel = MAX_BUSES - 1;
3118         /* Older HBAs support only 16-bit LUNs */
3119         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3120             ql2xmaxlun > 0xffff)
3121                 host->max_lun = 0xffff;
3122         else
3123                 host->max_lun = ql2xmaxlun;
3124         host->transportt = qla2xxx_transport_template;
3125         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3126
3127         ql_dbg(ql_dbg_init, base_vha, 0x0033,
3128             "max_id=%d this_id=%d "
3129             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3130             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3131             host->this_id, host->cmd_per_lun, host->unique_id,
3132             host->max_cmd_len, host->max_channel, host->max_lun,
3133             host->transportt, sht->vendor_id);
3134
3135         INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3136
3137         /* Set up the irqs */
3138         ret = qla2x00_request_irqs(ha, rsp);
3139         if (ret)
3140                 goto probe_failed;
3141
3142         /* Alloc arrays of request and response ring ptrs */
3143         ret = qla2x00_alloc_queues(ha, req, rsp);
3144         if (ret) {
3145                 ql_log(ql_log_fatal, base_vha, 0x003d,
3146                     "Failed to allocate memory for queue pointers..."
3147                     "aborting.\n");
3148                 ret = -ENODEV;
3149                 goto probe_failed;
3150         }
3151
3152         if (ha->mqenable) {
3153                 /* number of hardware queues supported by blk/scsi-mq*/
3154                 host->nr_hw_queues = ha->max_qpairs;
3155
3156                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3157                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3158         } else {
3159                 if (ql2xnvmeenable) {
3160                         host->nr_hw_queues = ha->max_qpairs;
3161                         ql_dbg(ql_dbg_init, base_vha, 0x0194,
3162                             "FC-NVMe support is enabled, HW queues=%d\n",
3163                             host->nr_hw_queues);
3164                 } else {
3165                         ql_dbg(ql_dbg_init, base_vha, 0x0193,
3166                             "blk/scsi-mq disabled.\n");
3167                 }
3168         }
3169
3170         qlt_probe_one_stage1(base_vha, ha);
3171
3172         pci_save_state(pdev);
3173
3174         /* Assign back pointers */
3175         rsp->req = req;
3176         req->rsp = rsp;
3177
3178         if (IS_QLAFX00(ha)) {
3179                 ha->rsp_q_map[0] = rsp;
3180                 ha->req_q_map[0] = req;
3181                 set_bit(0, ha->req_qid_map);
3182                 set_bit(0, ha->rsp_qid_map);
3183         }
3184
3185         /* FWI2-capable only. */
3186         req->req_q_in = &ha->iobase->isp24.req_q_in;
3187         req->req_q_out = &ha->iobase->isp24.req_q_out;
3188         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3189         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3190         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3191             IS_QLA28XX(ha)) {
3192                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3193                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3194                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3195                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3196         }
3197
3198         if (IS_QLAFX00(ha)) {
3199                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3200                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3201                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3202                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3203         }
3204
3205         if (IS_P3P_TYPE(ha)) {
3206                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3207                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3208                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3209         }
3210
3211         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3212             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3213             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3214         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3215             "req->req_q_in=%p req->req_q_out=%p "
3216             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3217             req->req_q_in, req->req_q_out,
3218             rsp->rsp_q_in, rsp->rsp_q_out);
3219         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3220             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3221             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3222         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3223             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3224             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3225
3226         ha->wq = alloc_workqueue("qla2xxx_wq", 0, 0);
3227         if (unlikely(!ha->wq)) {
3228                 ret = -ENOMEM;
3229                 goto probe_failed;
3230         }
3231
3232         if (ha->isp_ops->initialize_adapter(base_vha)) {
3233                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3234                     "Failed to initialize adapter - Adapter flags %x.\n",
3235                     base_vha->device_flags);
3236
3237                 if (IS_QLA82XX(ha)) {
3238                         qla82xx_idc_lock(ha);
3239                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3240                                 QLA8XXX_DEV_FAILED);
3241                         qla82xx_idc_unlock(ha);
3242                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3243                             "HW State: FAILED.\n");
3244                 } else if (IS_QLA8044(ha)) {
3245                         qla8044_idc_lock(ha);
3246                         qla8044_wr_direct(base_vha,
3247                                 QLA8044_CRB_DEV_STATE_INDEX,
3248                                 QLA8XXX_DEV_FAILED);
3249                         qla8044_idc_unlock(ha);
3250                         ql_log(ql_log_fatal, base_vha, 0x0150,
3251                             "HW State: FAILED.\n");
3252                 }
3253
3254                 ret = -ENODEV;
3255                 goto probe_failed;
3256         }
3257
3258         if (IS_QLAFX00(ha))
3259                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3260         else
3261                 host->can_queue = req->num_outstanding_cmds - 10;
3262
3263         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3264             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3265             host->can_queue, base_vha->req,
3266             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3267
3268         if (ha->mqenable) {
3269                 bool startit = false;
3270
3271                 if (QLA_TGT_MODE_ENABLED())
3272                         startit = false;
3273
3274                 if (ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED)
3275                         startit = true;
3276
3277                 /* Create start of day qpairs for Block MQ */
3278                 for (i = 0; i < ha->max_qpairs; i++)
3279                         qla2xxx_create_qpair(base_vha, 5, 0, startit);
3280         }
3281
3282         if (ha->flags.running_gold_fw)
3283                 goto skip_dpc;
3284
3285         /*
3286          * Startup the kernel thread for this host adapter
3287          */
3288         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3289             "%s_dpc", base_vha->host_str);
3290         if (IS_ERR(ha->dpc_thread)) {
3291                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3292                     "Failed to start DPC thread.\n");
3293                 ret = PTR_ERR(ha->dpc_thread);
3294                 ha->dpc_thread = NULL;
3295                 goto probe_failed;
3296         }
3297         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3298             "DPC thread started successfully.\n");
3299
3300         /*
3301          * If we're not coming up in initiator mode, we might sit for
3302          * a while without waking up the dpc thread, which leads to a
3303          * stuck process warning.  So just kick the dpc once here and
3304          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3305          */
3306         qla2xxx_wake_dpc(base_vha);
3307
3308         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3309
3310         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3311                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3312                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3313                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3314
3315                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3316                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3317                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3318                 INIT_WORK(&ha->idc_state_handler,
3319                     qla83xx_idc_state_handler_work);
3320                 INIT_WORK(&ha->nic_core_unrecoverable,
3321                     qla83xx_nic_core_unrecoverable_work);
3322         }
3323
3324 skip_dpc:
3325         list_add_tail(&base_vha->list, &ha->vp_list);
3326         base_vha->host->irq = ha->pdev->irq;
3327
3328         /* Initialized the timer */
3329         qla2x00_start_timer(base_vha, WATCH_INTERVAL);
3330         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3331             "Started qla2x00_timer with "
3332             "interval=%d.\n", WATCH_INTERVAL);
3333         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3334             "Detected hba at address=%p.\n",
3335             ha);
3336
3337         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3338                 if (ha->fw_attributes & BIT_4) {
3339                         int prot = 0, guard;
3340
3341                         base_vha->flags.difdix_supported = 1;
3342                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3343                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3344                         if (ql2xenabledif == 1)
3345                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3346                         if (ql2xprotmask)
3347                                 scsi_host_set_prot(host, ql2xprotmask);
3348                         else
3349                                 scsi_host_set_prot(host,
3350                                     prot | SHOST_DIF_TYPE1_PROTECTION
3351                                     | SHOST_DIF_TYPE2_PROTECTION
3352                                     | SHOST_DIF_TYPE3_PROTECTION
3353                                     | SHOST_DIX_TYPE1_PROTECTION
3354                                     | SHOST_DIX_TYPE2_PROTECTION
3355                                     | SHOST_DIX_TYPE3_PROTECTION);
3356
3357                         guard = SHOST_DIX_GUARD_CRC;
3358
3359                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3360                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3361                                 guard |= SHOST_DIX_GUARD_IP;
3362
3363                         if (ql2xprotguard)
3364                                 scsi_host_set_guard(host, ql2xprotguard);
3365                         else
3366                                 scsi_host_set_guard(host, guard);
3367                 } else
3368                         base_vha->flags.difdix_supported = 0;
3369         }
3370
3371         ha->isp_ops->enable_intrs(ha);
3372
3373         if (IS_QLAFX00(ha)) {
3374                 ret = qlafx00_fx_disc(base_vha,
3375                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3376                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3377                     QLA_SG_ALL : 128;
3378         }
3379
3380         ret = scsi_add_host(host, &pdev->dev);
3381         if (ret)
3382                 goto probe_failed;
3383
3384         base_vha->flags.init_done = 1;
3385         base_vha->flags.online = 1;
3386         ha->prev_minidump_failed = 0;
3387
3388         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3389             "Init done and hba is online.\n");
3390
3391         if (qla_ini_mode_enabled(base_vha) ||
3392                 qla_dual_mode_enabled(base_vha))
3393                 scsi_scan_host(host);
3394         else
3395                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3396                         "skipping scsi_scan_host() for non-initiator port\n");
3397
3398         qla2x00_alloc_sysfs_attr(base_vha);
3399
3400         if (IS_QLAFX00(ha)) {
3401                 ret = qlafx00_fx_disc(base_vha,
3402                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3403
3404                 /* Register system information */
3405                 ret =  qlafx00_fx_disc(base_vha,
3406                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3407         }
3408
3409         qla2x00_init_host_attr(base_vha);
3410
3411         qla2x00_dfs_setup(base_vha);
3412
3413         ql_log(ql_log_info, base_vha, 0x00fb,
3414             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3415         ql_log(ql_log_info, base_vha, 0x00fc,
3416             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3417             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info,
3418                                                        sizeof(pci_info)),
3419             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3420             base_vha->host_no,
3421             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3422
3423         qlt_add_target(ha, base_vha);
3424
3425         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3426
3427         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3428                 return -ENODEV;
3429
3430         if (ha->flags.detected_lr_sfp) {
3431                 ql_log(ql_log_info, base_vha, 0xffff,
3432                     "Reset chip to pick up LR SFP setting\n");
3433                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
3434                 qla2xxx_wake_dpc(base_vha);
3435         }
3436
3437         return 0;
3438
3439 probe_failed:
3440         if (base_vha->gnl.l) {
3441                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3442                                 base_vha->gnl.l, base_vha->gnl.ldma);
3443                 base_vha->gnl.l = NULL;
3444         }
3445
3446         if (base_vha->timer_active)
3447                 qla2x00_stop_timer(base_vha);
3448         base_vha->flags.online = 0;
3449         if (ha->dpc_thread) {
3450                 struct task_struct *t = ha->dpc_thread;
3451
3452                 ha->dpc_thread = NULL;
3453                 kthread_stop(t);
3454         }
3455
3456         qla2x00_free_device(base_vha);
3457         scsi_host_put(base_vha->host);
3458         /*
3459          * Need to NULL out local req/rsp after
3460          * qla2x00_free_device => qla2x00_free_queues frees
3461          * what these are pointing to. Or else we'll
3462          * fall over below in qla2x00_free_req/rsp_que.
3463          */
3464         req = NULL;
3465         rsp = NULL;
3466
3467 probe_hw_failed:
3468         qla2x00_mem_free(ha);
3469         qla2x00_free_req_que(ha, req);
3470         qla2x00_free_rsp_que(ha, rsp);
3471         qla2x00_clear_drv_active(ha);
3472
3473 iospace_config_failed:
3474         if (IS_P3P_TYPE(ha)) {
3475                 if (!ha->nx_pcibase)
3476                         iounmap((device_reg_t *)ha->nx_pcibase);
3477                 if (!ql2xdbwr)
3478                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3479         } else {
3480                 if (ha->iobase)
3481                         iounmap(ha->iobase);
3482                 if (ha->cregbase)
3483                         iounmap(ha->cregbase);
3484         }
3485         pci_release_selected_regions(ha->pdev, ha->bars);
3486         kfree(ha);
3487
3488 disable_device:
3489         pci_disable_device(pdev);
3490         return ret;
3491 }
3492
3493 static void
3494 qla2x00_shutdown(struct pci_dev *pdev)
3495 {
3496         scsi_qla_host_t *vha;
3497         struct qla_hw_data  *ha;
3498
3499         vha = pci_get_drvdata(pdev);
3500         ha = vha->hw;
3501
3502         ql_log(ql_log_info, vha, 0xfffa,
3503                 "Adapter shutdown\n");
3504
3505         /*
3506          * Prevent future board_disable and wait
3507          * until any pending board_disable has completed.
3508          */
3509         set_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags);
3510         cancel_work_sync(&ha->board_disable);
3511
3512         if (!atomic_read(&pdev->enable_cnt))
3513                 return;
3514
3515         /* Notify ISPFX00 firmware */
3516         if (IS_QLAFX00(ha))
3517                 qlafx00_driver_shutdown(vha, 20);
3518
3519         /* Turn-off FCE trace */
3520         if (ha->flags.fce_enabled) {
3521                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3522                 ha->flags.fce_enabled = 0;
3523         }
3524
3525         /* Turn-off EFT trace */
3526         if (ha->eft)
3527                 qla2x00_disable_eft_trace(vha);
3528
3529         if (IS_QLA25XX(ha) ||  IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3530             IS_QLA28XX(ha)) {
3531                 if (ha->flags.fw_started)
3532                         qla2x00_abort_isp_cleanup(vha);
3533         } else {
3534                 /* Stop currently executing firmware. */
3535                 qla2x00_try_to_stop_firmware(vha);
3536         }
3537
3538         /* Disable timer */
3539         if (vha->timer_active)
3540                 qla2x00_stop_timer(vha);
3541
3542         /* Turn adapter off line */
3543         vha->flags.online = 0;
3544
3545         /* turn-off interrupts on the card */
3546         if (ha->interrupts_on) {
3547                 vha->flags.init_done = 0;
3548                 ha->isp_ops->disable_intrs(ha);
3549         }
3550
3551         qla2x00_free_irqs(vha);
3552
3553         qla2x00_free_fw_dump(ha);
3554
3555         pci_disable_device(pdev);
3556         ql_log(ql_log_info, vha, 0xfffe,
3557                 "Adapter shutdown successfully.\n");
3558 }
3559
3560 /* Deletes all the virtual ports for a given ha */
3561 static void
3562 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3563 {
3564         scsi_qla_host_t *vha;
3565         unsigned long flags;
3566
3567         mutex_lock(&ha->vport_lock);
3568         while (ha->cur_vport_count) {
3569                 spin_lock_irqsave(&ha->vport_slock, flags);
3570
3571                 BUG_ON(base_vha->list.next == &ha->vp_list);
3572                 /* This assumes first entry in ha->vp_list is always base vha */
3573                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3574                 scsi_host_get(vha->host);
3575
3576                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3577                 mutex_unlock(&ha->vport_lock);
3578
3579                 qla_nvme_delete(vha);
3580
3581                 fc_vport_terminate(vha->fc_vport);
3582                 scsi_host_put(vha->host);
3583
3584                 mutex_lock(&ha->vport_lock);
3585         }
3586         mutex_unlock(&ha->vport_lock);
3587 }
3588
3589 /* Stops all deferred work threads */
3590 static void
3591 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3592 {
3593         /* Cancel all work and destroy DPC workqueues */
3594         if (ha->dpc_lp_wq) {
3595                 cancel_work_sync(&ha->idc_aen);
3596                 destroy_workqueue(ha->dpc_lp_wq);
3597                 ha->dpc_lp_wq = NULL;
3598         }
3599
3600         if (ha->dpc_hp_wq) {
3601                 cancel_work_sync(&ha->nic_core_reset);
3602                 cancel_work_sync(&ha->idc_state_handler);
3603                 cancel_work_sync(&ha->nic_core_unrecoverable);
3604                 destroy_workqueue(ha->dpc_hp_wq);
3605                 ha->dpc_hp_wq = NULL;
3606         }
3607
3608         /* Kill the kernel thread for this host */
3609         if (ha->dpc_thread) {
3610                 struct task_struct *t = ha->dpc_thread;
3611
3612                 /*
3613                  * qla2xxx_wake_dpc checks for ->dpc_thread
3614                  * so we need to zero it out.
3615                  */
3616                 ha->dpc_thread = NULL;
3617                 kthread_stop(t);
3618         }
3619 }
3620
3621 static void
3622 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3623 {
3624         if (IS_QLA82XX(ha)) {
3625
3626                 iounmap((device_reg_t *)ha->nx_pcibase);
3627                 if (!ql2xdbwr)
3628                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3629         } else {
3630                 if (ha->iobase)
3631                         iounmap(ha->iobase);
3632
3633                 if (ha->cregbase)
3634                         iounmap(ha->cregbase);
3635
3636                 if (ha->mqiobase)
3637                         iounmap(ha->mqiobase);
3638
3639                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) &&
3640                     ha->msixbase)
3641                         iounmap(ha->msixbase);
3642         }
3643 }
3644
3645 static void
3646 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3647 {
3648         if (IS_QLA8044(ha)) {
3649                 qla8044_idc_lock(ha);
3650                 qla8044_clear_drv_active(ha);
3651                 qla8044_idc_unlock(ha);
3652         } else if (IS_QLA82XX(ha)) {
3653                 qla82xx_idc_lock(ha);
3654                 qla82xx_clear_drv_active(ha);
3655                 qla82xx_idc_unlock(ha);
3656         }
3657 }
3658
3659 static void
3660 qla2x00_remove_one(struct pci_dev *pdev)
3661 {
3662         scsi_qla_host_t *base_vha;
3663         struct qla_hw_data  *ha;
3664
3665         base_vha = pci_get_drvdata(pdev);
3666         ha = base_vha->hw;
3667         ql_log(ql_log_info, base_vha, 0xb079,
3668             "Removing driver\n");
3669
3670         /* Indicate device removal to prevent future board_disable and wait
3671          * until any pending board_disable has completed. */
3672         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3673         cancel_work_sync(&ha->board_disable);
3674
3675         /*
3676          * If the PCI device is disabled then there was a PCI-disconnect and
3677          * qla2x00_disable_board_on_pci_error has taken care of most of the
3678          * resources.
3679          */
3680         if (!atomic_read(&pdev->enable_cnt)) {
3681                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3682                     base_vha->gnl.l, base_vha->gnl.ldma);
3683                 base_vha->gnl.l = NULL;
3684                 scsi_host_put(base_vha->host);
3685                 kfree(ha);
3686                 pci_set_drvdata(pdev, NULL);
3687                 return;
3688         }
3689         qla2x00_wait_for_hba_ready(base_vha);
3690
3691         if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3692             IS_QLA28XX(ha)) {
3693                 if (ha->flags.fw_started)
3694                         qla2x00_abort_isp_cleanup(base_vha);
3695         } else if (!IS_QLAFX00(ha)) {
3696                 if (IS_QLA8031(ha)) {
3697                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3698                             "Clearing fcoe driver presence.\n");
3699                         if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3700                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3701                                     "Error while clearing DRV-Presence.\n");
3702                 }
3703
3704                 qla2x00_try_to_stop_firmware(base_vha);
3705         }
3706
3707         qla2x00_wait_for_sess_deletion(base_vha);
3708
3709         /*
3710          * if UNLOAD flag is already set, then continue unload,
3711          * where it was set first.
3712          */
3713         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3714                 return;
3715
3716         set_bit(UNLOADING, &base_vha->dpc_flags);
3717
3718         qla_nvme_delete(base_vha);
3719
3720         dma_free_coherent(&ha->pdev->dev,
3721                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3722
3723         base_vha->gnl.l = NULL;
3724
3725         vfree(base_vha->scan.l);
3726
3727         if (IS_QLAFX00(ha))
3728                 qlafx00_driver_shutdown(base_vha, 20);
3729
3730         qla2x00_delete_all_vps(ha, base_vha);
3731
3732         qla2x00_dfs_remove(base_vha);
3733
3734         qla84xx_put_chip(base_vha);
3735
3736         /* Disable timer */
3737         if (base_vha->timer_active)
3738                 qla2x00_stop_timer(base_vha);
3739
3740         base_vha->flags.online = 0;
3741
3742         /* free DMA memory */
3743         if (ha->exlogin_buf)
3744                 qla2x00_free_exlogin_buffer(ha);
3745
3746         /* free DMA memory */
3747         if (ha->exchoffld_buf)
3748                 qla2x00_free_exchoffld_buffer(ha);
3749
3750         qla2x00_destroy_deferred_work(ha);
3751
3752         qlt_remove_target(ha, base_vha);
3753
3754         qla2x00_free_sysfs_attr(base_vha, true);
3755
3756         fc_remove_host(base_vha->host);
3757         qlt_remove_target_resources(ha);
3758
3759         scsi_remove_host(base_vha->host);
3760
3761         qla2x00_free_device(base_vha);
3762
3763         qla2x00_clear_drv_active(ha);
3764
3765         scsi_host_put(base_vha->host);
3766
3767         qla2x00_unmap_iobases(ha);
3768
3769         pci_release_selected_regions(ha->pdev, ha->bars);
3770         kfree(ha);
3771
3772         pci_disable_pcie_error_reporting(pdev);
3773
3774         pci_disable_device(pdev);
3775 }
3776
3777 static void
3778 qla2x00_free_device(scsi_qla_host_t *vha)
3779 {
3780         struct qla_hw_data *ha = vha->hw;
3781
3782         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3783
3784         /* Disable timer */
3785         if (vha->timer_active)
3786                 qla2x00_stop_timer(vha);
3787
3788         qla25xx_delete_queues(vha);
3789         vha->flags.online = 0;
3790
3791         /* turn-off interrupts on the card */
3792         if (ha->interrupts_on) {
3793                 vha->flags.init_done = 0;
3794                 ha->isp_ops->disable_intrs(ha);
3795         }
3796
3797         qla2x00_free_fcports(vha);
3798
3799         qla2x00_free_irqs(vha);
3800
3801         /* Flush the work queue and remove it */
3802         if (ha->wq) {
3803                 flush_workqueue(ha->wq);
3804                 destroy_workqueue(ha->wq);
3805                 ha->wq = NULL;
3806         }
3807
3808
3809         qla2x00_mem_free(ha);
3810
3811         qla82xx_md_free(vha);
3812
3813         qla2x00_free_queues(ha);
3814 }
3815
3816 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3817 {
3818         fc_port_t *fcport, *tfcport;
3819
3820         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list)
3821                 qla2x00_free_fcport(fcport);
3822 }
3823
3824 static inline void
3825 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3826     int defer)
3827 {
3828         struct fc_rport *rport;
3829         scsi_qla_host_t *base_vha;
3830         unsigned long flags;
3831
3832         if (!fcport->rport)
3833                 return;
3834
3835         rport = fcport->rport;
3836         if (defer) {
3837                 base_vha = pci_get_drvdata(vha->hw->pdev);
3838                 spin_lock_irqsave(vha->host->host_lock, flags);
3839                 fcport->drport = rport;
3840                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3841                 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3842                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3843                 qla2xxx_wake_dpc(base_vha);
3844         } else {
3845                 int now;
3846
3847                 if (rport) {
3848                         ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3849                             "%s %8phN. rport %p roles %x\n",
3850                             __func__, fcport->port_name, rport,
3851                             rport->roles);
3852                         fc_remote_port_delete(rport);
3853                 }
3854                 qlt_do_generation_tick(vha, &now);
3855         }
3856 }
3857
3858 /*
3859  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3860  *
3861  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3862  *
3863  * Return: None.
3864  *
3865  * Context:
3866  */
3867 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3868     int do_login, int defer)
3869 {
3870         if (IS_QLAFX00(vha->hw)) {
3871                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3872                 qla2x00_schedule_rport_del(vha, fcport, defer);
3873                 return;
3874         }
3875
3876         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3877             vha->vp_idx == fcport->vha->vp_idx) {
3878                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3879                 qla2x00_schedule_rport_del(vha, fcport, defer);
3880         }
3881         /*
3882          * We may need to retry the login, so don't change the state of the
3883          * port but do the retries.
3884          */
3885         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3886                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3887
3888         if (!do_login)
3889                 return;
3890
3891         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3892 }
3893
3894 /*
3895  * qla2x00_mark_all_devices_lost
3896  *      Updates fcport state when device goes offline.
3897  *
3898  * Input:
3899  *      ha = adapter block pointer.
3900  *      fcport = port structure pointer.
3901  *
3902  * Return:
3903  *      None.
3904  *
3905  * Context:
3906  */
3907 void
3908 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3909 {
3910         fc_port_t *fcport;
3911
3912         ql_dbg(ql_dbg_disc, vha, 0x20f1,
3913             "Mark all dev lost\n");
3914
3915         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3916                 fcport->scan_state = 0;
3917                 qlt_schedule_sess_for_deletion(fcport);
3918
3919                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3920                         continue;
3921
3922                 /*
3923                  * No point in marking the device as lost, if the device is
3924                  * already DEAD.
3925                  */
3926                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3927                         continue;
3928                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3929                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3930                         if (defer)
3931                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3932                         else if (vha->vp_idx == fcport->vha->vp_idx)
3933                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3934                 }
3935         }
3936 }
3937
3938 static void qla2x00_set_reserved_loop_ids(struct qla_hw_data *ha)
3939 {
3940         int i;
3941
3942         if (IS_FWI2_CAPABLE(ha))
3943                 return;
3944
3945         for (i = 0; i < SNS_FIRST_LOOP_ID; i++)
3946                 set_bit(i, ha->loop_id_map);
3947         set_bit(MANAGEMENT_SERVER, ha->loop_id_map);
3948         set_bit(BROADCAST, ha->loop_id_map);
3949 }
3950
3951 /*
3952 * qla2x00_mem_alloc
3953 *      Allocates adapter memory.
3954 *
3955 * Returns:
3956 *      0  = success.
3957 *      !0  = failure.
3958 */
3959 static int
3960 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3961         struct req_que **req, struct rsp_que **rsp)
3962 {
3963         char    name[16];
3964
3965         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3966                 &ha->init_cb_dma, GFP_KERNEL);
3967         if (!ha->init_cb)
3968                 goto fail;
3969
3970         if (qlt_mem_alloc(ha) < 0)
3971                 goto fail_free_init_cb;
3972
3973         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3974                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3975         if (!ha->gid_list)
3976                 goto fail_free_tgt_mem;
3977
3978         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3979         if (!ha->srb_mempool)
3980                 goto fail_free_gid_list;
3981
3982         if (IS_P3P_TYPE(ha)) {
3983                 /* Allocate cache for CT6 Ctx. */
3984                 if (!ctx_cachep) {
3985                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3986                                 sizeof(struct ct6_dsd), 0,
3987                                 SLAB_HWCACHE_ALIGN, NULL);
3988                         if (!ctx_cachep)
3989                                 goto fail_free_srb_mempool;
3990                 }
3991                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3992                         ctx_cachep);
3993                 if (!ha->ctx_mempool)
3994                         goto fail_free_srb_mempool;
3995                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3996                     "ctx_cachep=%p ctx_mempool=%p.\n",
3997                     ctx_cachep, ha->ctx_mempool);
3998         }
3999
4000         /* Get memory for cached NVRAM */
4001         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
4002         if (!ha->nvram)
4003                 goto fail_free_ctx_mempool;
4004
4005         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
4006                 ha->pdev->device);
4007         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4008                 DMA_POOL_SIZE, 8, 0);
4009         if (!ha->s_dma_pool)
4010                 goto fail_free_nvram;
4011
4012         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
4013             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
4014             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
4015
4016         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
4017                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4018                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
4019                 if (!ha->dl_dma_pool) {
4020                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
4021                             "Failed to allocate memory for dl_dma_pool.\n");
4022                         goto fail_s_dma_pool;
4023                 }
4024
4025                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4026                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
4027                 if (!ha->fcp_cmnd_dma_pool) {
4028                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
4029                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
4030                         goto fail_dl_dma_pool;
4031                 }
4032
4033                 if (ql2xenabledif) {
4034                         u64 bufsize = DIF_BUNDLING_DMA_POOL_SIZE;
4035                         struct dsd_dma *dsd, *nxt;
4036                         uint i;
4037                         /* Creata a DMA pool of buffers for DIF bundling */
4038                         ha->dif_bundl_pool = dma_pool_create(name,
4039                             &ha->pdev->dev, DIF_BUNDLING_DMA_POOL_SIZE, 8, 0);
4040                         if (!ha->dif_bundl_pool) {
4041                                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4042                                     "%s: failed create dif_bundl_pool\n",
4043                                     __func__);
4044                                 goto fail_dif_bundl_dma_pool;
4045                         }
4046
4047                         INIT_LIST_HEAD(&ha->pool.good.head);
4048                         INIT_LIST_HEAD(&ha->pool.unusable.head);
4049                         ha->pool.good.count = 0;
4050                         ha->pool.unusable.count = 0;
4051                         for (i = 0; i < 128; i++) {
4052                                 dsd = kzalloc(sizeof(*dsd), GFP_ATOMIC);
4053                                 if (!dsd) {
4054                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4055                                             0xe0ee, "%s: failed alloc dsd\n",
4056                                             __func__);
4057                                         return 1;
4058                                 }
4059                                 ha->dif_bundle_kallocs++;
4060
4061                                 dsd->dsd_addr = dma_pool_alloc(
4062                                     ha->dif_bundl_pool, GFP_ATOMIC,
4063                                     &dsd->dsd_list_dma);
4064                                 if (!dsd->dsd_addr) {
4065                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4066                                             0xe0ee,
4067                                             "%s: failed alloc ->dsd_addr\n",
4068                                             __func__);
4069                                         kfree(dsd);
4070                                         ha->dif_bundle_kallocs--;
4071                                         continue;
4072                                 }
4073                                 ha->dif_bundle_dma_allocs++;
4074
4075                                 /*
4076                                  * if DMA buffer crosses 4G boundary,
4077                                  * put it on bad list
4078                                  */
4079                                 if (MSD(dsd->dsd_list_dma) ^
4080                                     MSD(dsd->dsd_list_dma + bufsize)) {
4081                                         list_add_tail(&dsd->list,
4082                                             &ha->pool.unusable.head);
4083                                         ha->pool.unusable.count++;
4084                                 } else {
4085                                         list_add_tail(&dsd->list,
4086                                             &ha->pool.good.head);
4087                                         ha->pool.good.count++;
4088                                 }
4089                         }
4090
4091                         /* return the good ones back to the pool */
4092                         list_for_each_entry_safe(dsd, nxt,
4093                             &ha->pool.good.head, list) {
4094                                 list_del(&dsd->list);
4095                                 dma_pool_free(ha->dif_bundl_pool,
4096                                     dsd->dsd_addr, dsd->dsd_list_dma);
4097                                 ha->dif_bundle_dma_allocs--;
4098                                 kfree(dsd);
4099                                 ha->dif_bundle_kallocs--;
4100                         }
4101
4102                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4103                             "%s: dif dma pool (good=%u unusable=%u)\n",
4104                             __func__, ha->pool.good.count,
4105                             ha->pool.unusable.count);
4106                 }
4107
4108                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
4109                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p dif_bundl_pool=%p.\n",
4110                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool,
4111                     ha->dif_bundl_pool);
4112         }
4113
4114         /* Allocate memory for SNS commands */
4115         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4116         /* Get consistent memory allocated for SNS commands */
4117                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
4118                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
4119                 if (!ha->sns_cmd)
4120                         goto fail_dma_pool;
4121                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
4122                     "sns_cmd: %p.\n", ha->sns_cmd);
4123         } else {
4124         /* Get consistent memory allocated for MS IOCB */
4125                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4126                         &ha->ms_iocb_dma);
4127                 if (!ha->ms_iocb)
4128                         goto fail_dma_pool;
4129         /* Get consistent memory allocated for CT SNS commands */
4130                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
4131                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
4132                 if (!ha->ct_sns)
4133                         goto fail_free_ms_iocb;
4134                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
4135                     "ms_iocb=%p ct_sns=%p.\n",
4136                     ha->ms_iocb, ha->ct_sns);
4137         }
4138
4139         /* Allocate memory for request ring */
4140         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
4141         if (!*req) {
4142                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
4143                     "Failed to allocate memory for req.\n");
4144                 goto fail_req;
4145         }
4146         (*req)->length = req_len;
4147         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
4148                 ((*req)->length + 1) * sizeof(request_t),
4149                 &(*req)->dma, GFP_KERNEL);
4150         if (!(*req)->ring) {
4151                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
4152                     "Failed to allocate memory for req_ring.\n");
4153                 goto fail_req_ring;
4154         }
4155         /* Allocate memory for response ring */
4156         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
4157         if (!*rsp) {
4158                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
4159                     "Failed to allocate memory for rsp.\n");
4160                 goto fail_rsp;
4161         }
4162         (*rsp)->hw = ha;
4163         (*rsp)->length = rsp_len;
4164         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
4165                 ((*rsp)->length + 1) * sizeof(response_t),
4166                 &(*rsp)->dma, GFP_KERNEL);
4167         if (!(*rsp)->ring) {
4168                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
4169                     "Failed to allocate memory for rsp_ring.\n");
4170                 goto fail_rsp_ring;
4171         }
4172         (*req)->rsp = *rsp;
4173         (*rsp)->req = *req;
4174         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
4175             "req=%p req->length=%d req->ring=%p rsp=%p "
4176             "rsp->length=%d rsp->ring=%p.\n",
4177             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
4178             (*rsp)->ring);
4179         /* Allocate memory for NVRAM data for vports */
4180         if (ha->nvram_npiv_size) {
4181                 ha->npiv_info = kcalloc(ha->nvram_npiv_size,
4182                                         sizeof(struct qla_npiv_entry),
4183                                         GFP_KERNEL);
4184                 if (!ha->npiv_info) {
4185                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
4186                             "Failed to allocate memory for npiv_info.\n");
4187                         goto fail_npiv_info;
4188                 }
4189         } else
4190                 ha->npiv_info = NULL;
4191
4192         /* Get consistent memory allocated for EX-INIT-CB. */
4193         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
4194             IS_QLA28XX(ha)) {
4195                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4196                     &ha->ex_init_cb_dma);
4197                 if (!ha->ex_init_cb)
4198                         goto fail_ex_init_cb;
4199                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4200                     "ex_init_cb=%p.\n", ha->ex_init_cb);
4201         }
4202
4203         INIT_LIST_HEAD(&ha->gbl_dsd_list);
4204
4205         /* Get consistent memory allocated for Async Port-Database. */
4206         if (!IS_FWI2_CAPABLE(ha)) {
4207                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4208                         &ha->async_pd_dma);
4209                 if (!ha->async_pd)
4210                         goto fail_async_pd;
4211                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4212                     "async_pd=%p.\n", ha->async_pd);
4213         }
4214
4215         INIT_LIST_HEAD(&ha->vp_list);
4216
4217         /* Allocate memory for our loop_id bitmap */
4218         ha->loop_id_map = kcalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE),
4219                                   sizeof(long),
4220                                   GFP_KERNEL);
4221         if (!ha->loop_id_map)
4222                 goto fail_loop_id_map;
4223         else {
4224                 qla2x00_set_reserved_loop_ids(ha);
4225                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4226                     "loop_id_map=%p.\n", ha->loop_id_map);
4227         }
4228
4229         ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4230             SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4231         if (!ha->sfp_data) {
4232                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4233                     "Unable to allocate memory for SFP read-data.\n");
4234                 goto fail_sfp_data;
4235         }
4236
4237         ha->flt = dma_alloc_coherent(&ha->pdev->dev,
4238             sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE, &ha->flt_dma,
4239             GFP_KERNEL);
4240         if (!ha->flt) {
4241                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4242                     "Unable to allocate memory for FLT.\n");
4243                 goto fail_flt_buffer;
4244         }
4245
4246         return 0;
4247
4248 fail_flt_buffer:
4249         dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE,
4250             ha->sfp_data, ha->sfp_data_dma);
4251 fail_sfp_data:
4252         kfree(ha->loop_id_map);
4253 fail_loop_id_map:
4254         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4255 fail_async_pd:
4256         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4257 fail_ex_init_cb:
4258         kfree(ha->npiv_info);
4259 fail_npiv_info:
4260         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4261                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4262         (*rsp)->ring = NULL;
4263         (*rsp)->dma = 0;
4264 fail_rsp_ring:
4265         kfree(*rsp);
4266         *rsp = NULL;
4267 fail_rsp:
4268         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4269                 sizeof(request_t), (*req)->ring, (*req)->dma);
4270         (*req)->ring = NULL;
4271         (*req)->dma = 0;
4272 fail_req_ring:
4273         kfree(*req);
4274         *req = NULL;
4275 fail_req:
4276         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4277                 ha->ct_sns, ha->ct_sns_dma);
4278         ha->ct_sns = NULL;
4279         ha->ct_sns_dma = 0;
4280 fail_free_ms_iocb:
4281         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4282         ha->ms_iocb = NULL;
4283         ha->ms_iocb_dma = 0;
4284
4285         if (ha->sns_cmd)
4286                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4287                     ha->sns_cmd, ha->sns_cmd_dma);
4288 fail_dma_pool:
4289         if (ql2xenabledif) {
4290                 struct dsd_dma *dsd, *nxt;
4291
4292                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4293                     list) {
4294                         list_del(&dsd->list);
4295                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4296                             dsd->dsd_list_dma);
4297                         ha->dif_bundle_dma_allocs--;
4298                         kfree(dsd);
4299                         ha->dif_bundle_kallocs--;
4300                         ha->pool.unusable.count--;
4301                 }
4302                 dma_pool_destroy(ha->dif_bundl_pool);
4303                 ha->dif_bundl_pool = NULL;
4304         }
4305
4306 fail_dif_bundl_dma_pool:
4307         if (IS_QLA82XX(ha) || ql2xenabledif) {
4308                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4309                 ha->fcp_cmnd_dma_pool = NULL;
4310         }
4311 fail_dl_dma_pool:
4312         if (IS_QLA82XX(ha) || ql2xenabledif) {
4313                 dma_pool_destroy(ha->dl_dma_pool);
4314                 ha->dl_dma_pool = NULL;
4315         }
4316 fail_s_dma_pool:
4317         dma_pool_destroy(ha->s_dma_pool);
4318         ha->s_dma_pool = NULL;
4319 fail_free_nvram:
4320         kfree(ha->nvram);
4321         ha->nvram = NULL;
4322 fail_free_ctx_mempool:
4323         mempool_destroy(ha->ctx_mempool);
4324         ha->ctx_mempool = NULL;
4325 fail_free_srb_mempool:
4326         mempool_destroy(ha->srb_mempool);
4327         ha->srb_mempool = NULL;
4328 fail_free_gid_list:
4329         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4330         ha->gid_list,
4331         ha->gid_list_dma);
4332         ha->gid_list = NULL;
4333         ha->gid_list_dma = 0;
4334 fail_free_tgt_mem:
4335         qlt_mem_free(ha);
4336 fail_free_init_cb:
4337         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4338         ha->init_cb_dma);
4339         ha->init_cb = NULL;
4340         ha->init_cb_dma = 0;
4341 fail:
4342         ql_log(ql_log_fatal, NULL, 0x0030,
4343             "Memory allocation failure.\n");
4344         return -ENOMEM;
4345 }
4346
4347 int
4348 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4349 {
4350         int rval;
4351         uint16_t        size, max_cnt, temp;
4352         struct qla_hw_data *ha = vha->hw;
4353
4354         /* Return if we don't need to alloacate any extended logins */
4355         if (!ql2xexlogins)
4356                 return QLA_SUCCESS;
4357
4358         if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4359                 return QLA_SUCCESS;
4360
4361         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4362         max_cnt = 0;
4363         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4364         if (rval != QLA_SUCCESS) {
4365                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4366                     "Failed to get exlogin status.\n");
4367                 return rval;
4368         }
4369
4370         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4371         temp *= size;
4372
4373         if (temp != ha->exlogin_size) {
4374                 qla2x00_free_exlogin_buffer(ha);
4375                 ha->exlogin_size = temp;
4376
4377                 ql_log(ql_log_info, vha, 0xd024,
4378                     "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4379                     max_cnt, size, temp);
4380
4381                 ql_log(ql_log_info, vha, 0xd025,
4382                     "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4383
4384                 /* Get consistent memory for extended logins */
4385                 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4386                         ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4387                 if (!ha->exlogin_buf) {
4388                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4389                     "Failed to allocate memory for exlogin_buf_dma.\n");
4390                         return -ENOMEM;
4391                 }
4392         }
4393
4394         /* Now configure the dma buffer */
4395         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4396         if (rval) {
4397                 ql_log(ql_log_fatal, vha, 0xd033,
4398                     "Setup extended login buffer  ****FAILED****.\n");
4399                 qla2x00_free_exlogin_buffer(ha);
4400         }
4401
4402         return rval;
4403 }
4404
4405 /*
4406 * qla2x00_free_exlogin_buffer
4407 *
4408 * Input:
4409 *       ha = adapter block pointer
4410 */
4411 void
4412 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4413 {
4414         if (ha->exlogin_buf) {
4415                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4416                     ha->exlogin_buf, ha->exlogin_buf_dma);
4417                 ha->exlogin_buf = NULL;
4418                 ha->exlogin_size = 0;
4419         }
4420 }
4421
4422 static void
4423 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4424 {
4425         u32 temp;
4426         struct init_cb_81xx *icb = (struct init_cb_81xx *)&vha->hw->init_cb;
4427         *ret_cnt = FW_DEF_EXCHANGES_CNT;
4428
4429         if (max_cnt > vha->hw->max_exchg)
4430                 max_cnt = vha->hw->max_exchg;
4431
4432         if (qla_ini_mode_enabled(vha)) {
4433                 if (vha->ql2xiniexchg > max_cnt)
4434                         vha->ql2xiniexchg = max_cnt;
4435
4436                 if (vha->ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4437                         *ret_cnt = vha->ql2xiniexchg;
4438
4439         } else if (qla_tgt_mode_enabled(vha)) {
4440                 if (vha->ql2xexchoffld > max_cnt) {
4441                         vha->ql2xexchoffld = max_cnt;
4442                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4443                 }
4444
4445                 if (vha->ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4446                         *ret_cnt = vha->ql2xexchoffld;
4447         } else if (qla_dual_mode_enabled(vha)) {
4448                 temp = vha->ql2xiniexchg + vha->ql2xexchoffld;
4449                 if (temp > max_cnt) {
4450                         vha->ql2xiniexchg -= (temp - max_cnt)/2;
4451                         vha->ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4452                         temp = max_cnt;
4453                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4454                 }
4455
4456                 if (temp > FW_DEF_EXCHANGES_CNT)
4457                         *ret_cnt = temp;
4458         }
4459 }
4460
4461 int
4462 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4463 {
4464         int rval;
4465         u16     size, max_cnt;
4466         u32 actual_cnt, totsz;
4467         struct qla_hw_data *ha = vha->hw;
4468
4469         if (!ha->flags.exchoffld_enabled)
4470                 return QLA_SUCCESS;
4471
4472         if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4473                 return QLA_SUCCESS;
4474
4475         max_cnt = 0;
4476         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4477         if (rval != QLA_SUCCESS) {
4478                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4479                     "Failed to get exlogin status.\n");
4480                 return rval;
4481         }
4482
4483         qla2x00_number_of_exch(vha, &actual_cnt, max_cnt);
4484         ql_log(ql_log_info, vha, 0xd014,
4485             "Actual exchange offload count: %d.\n", actual_cnt);
4486
4487         totsz = actual_cnt * size;
4488
4489         if (totsz != ha->exchoffld_size) {
4490                 qla2x00_free_exchoffld_buffer(ha);
4491                 if (actual_cnt <= FW_DEF_EXCHANGES_CNT) {
4492                         ha->exchoffld_size = 0;
4493                         ha->flags.exchoffld_enabled = 0;
4494                         return QLA_SUCCESS;
4495                 }
4496
4497                 ha->exchoffld_size = totsz;
4498
4499                 ql_log(ql_log_info, vha, 0xd016,
4500                     "Exchange offload: max_count=%d, actual count=%d entry sz=0x%x, total sz=0x%x\n",
4501                     max_cnt, actual_cnt, size, totsz);
4502
4503                 ql_log(ql_log_info, vha, 0xd017,
4504                     "Exchange Buffers requested size = 0x%x\n",
4505                     ha->exchoffld_size);
4506
4507                 /* Get consistent memory for extended logins */
4508                 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4509                         ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4510                 if (!ha->exchoffld_buf) {
4511                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4512                         "Failed to allocate memory for Exchange Offload.\n");
4513
4514                         if (ha->max_exchg >
4515                             (FW_DEF_EXCHANGES_CNT + REDUCE_EXCHANGES_CNT)) {
4516                                 ha->max_exchg -= REDUCE_EXCHANGES_CNT;
4517                         } else if (ha->max_exchg >
4518                             (FW_DEF_EXCHANGES_CNT + 512)) {
4519                                 ha->max_exchg -= 512;
4520                         } else {
4521                                 ha->flags.exchoffld_enabled = 0;
4522                                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4523                                     "Disabling Exchange offload due to lack of memory\n");
4524                         }
4525                         ha->exchoffld_size = 0;
4526
4527                         return -ENOMEM;
4528                 }
4529         } else if (!ha->exchoffld_buf || (actual_cnt <= FW_DEF_EXCHANGES_CNT)) {
4530                 /* pathological case */
4531                 qla2x00_free_exchoffld_buffer(ha);
4532                 ha->exchoffld_size = 0;
4533                 ha->flags.exchoffld_enabled = 0;
4534                 ql_log(ql_log_info, vha, 0xd016,
4535                     "Exchange offload not enable: offld size=%d, actual count=%d entry sz=0x%x, total sz=0x%x.\n",
4536                     ha->exchoffld_size, actual_cnt, size, totsz);
4537                 return 0;
4538         }
4539
4540         /* Now configure the dma buffer */
4541         rval = qla_set_exchoffld_mem_cfg(vha);
4542         if (rval) {
4543                 ql_log(ql_log_fatal, vha, 0xd02e,
4544                     "Setup exchange offload buffer ****FAILED****.\n");
4545                 qla2x00_free_exchoffld_buffer(ha);
4546         } else {
4547                 /* re-adjust number of target exchange */
4548                 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4549
4550                 if (qla_ini_mode_enabled(vha))
4551                         icb->exchange_count = 0;
4552                 else
4553                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4554         }
4555
4556         return rval;
4557 }
4558
4559 /*
4560 * qla2x00_free_exchoffld_buffer
4561 *
4562 * Input:
4563 *       ha = adapter block pointer
4564 */
4565 void
4566 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4567 {
4568         if (ha->exchoffld_buf) {
4569                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4570                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4571                 ha->exchoffld_buf = NULL;
4572                 ha->exchoffld_size = 0;
4573         }
4574 }
4575
4576 /*
4577 * qla2x00_free_fw_dump
4578 *       Frees fw dump stuff.
4579 *
4580 * Input:
4581 *       ha = adapter block pointer
4582 */
4583 static void
4584 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4585 {
4586         struct fwdt *fwdt = ha->fwdt;
4587         uint j;
4588
4589         if (ha->fce)
4590                 dma_free_coherent(&ha->pdev->dev,
4591                     FCE_SIZE, ha->fce, ha->fce_dma);
4592
4593         if (ha->eft)
4594                 dma_free_coherent(&ha->pdev->dev,
4595                     EFT_SIZE, ha->eft, ha->eft_dma);
4596
4597         if (ha->fw_dump)
4598                 vfree(ha->fw_dump);
4599
4600         ha->fce = NULL;
4601         ha->fce_dma = 0;
4602         ha->flags.fce_enabled = 0;
4603         ha->eft = NULL;
4604         ha->eft_dma = 0;
4605         ha->fw_dumped = 0;
4606         ha->fw_dump_cap_flags = 0;
4607         ha->fw_dump_reading = 0;
4608         ha->fw_dump = NULL;
4609         ha->fw_dump_len = 0;
4610
4611         for (j = 0; j < 2; j++, fwdt++) {
4612                 if (fwdt->template)
4613                         vfree(fwdt->template);
4614                 fwdt->template = NULL;
4615                 fwdt->length = 0;
4616         }
4617 }
4618
4619 /*
4620 * qla2x00_mem_free
4621 *      Frees all adapter allocated memory.
4622 *
4623 * Input:
4624 *      ha = adapter block pointer.
4625 */
4626 static void
4627 qla2x00_mem_free(struct qla_hw_data *ha)
4628 {
4629         qla2x00_free_fw_dump(ha);
4630
4631         if (ha->mctp_dump)
4632                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4633                     ha->mctp_dump_dma);
4634         ha->mctp_dump = NULL;
4635
4636         mempool_destroy(ha->srb_mempool);
4637         ha->srb_mempool = NULL;
4638
4639         if (ha->dcbx_tlv)
4640                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4641                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4642         ha->dcbx_tlv = NULL;
4643
4644         if (ha->xgmac_data)
4645                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4646                     ha->xgmac_data, ha->xgmac_data_dma);
4647         ha->xgmac_data = NULL;
4648
4649         if (ha->sns_cmd)
4650                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4651                 ha->sns_cmd, ha->sns_cmd_dma);
4652         ha->sns_cmd = NULL;
4653         ha->sns_cmd_dma = 0;
4654
4655         if (ha->ct_sns)
4656                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4657                 ha->ct_sns, ha->ct_sns_dma);
4658         ha->ct_sns = NULL;
4659         ha->ct_sns_dma = 0;
4660
4661         if (ha->sfp_data)
4662                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4663                     ha->sfp_data_dma);
4664         ha->sfp_data = NULL;
4665
4666         if (ha->flt)
4667                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE,
4668                     ha->flt, ha->flt_dma);
4669         ha->flt = NULL;
4670         ha->flt_dma = 0;
4671
4672         if (ha->ms_iocb)
4673                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4674         ha->ms_iocb = NULL;
4675         ha->ms_iocb_dma = 0;
4676
4677         if (ha->ex_init_cb)
4678                 dma_pool_free(ha->s_dma_pool,
4679                         ha->ex_init_cb, ha->ex_init_cb_dma);
4680         ha->ex_init_cb = NULL;
4681         ha->ex_init_cb_dma = 0;
4682
4683         if (ha->async_pd)
4684                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4685         ha->async_pd = NULL;
4686         ha->async_pd_dma = 0;
4687
4688         dma_pool_destroy(ha->s_dma_pool);
4689         ha->s_dma_pool = NULL;
4690
4691         if (ha->gid_list)
4692                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4693                 ha->gid_list, ha->gid_list_dma);
4694         ha->gid_list = NULL;
4695         ha->gid_list_dma = 0;
4696
4697         if (IS_QLA82XX(ha)) {
4698                 if (!list_empty(&ha->gbl_dsd_list)) {
4699                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4700
4701                         /* clean up allocated prev pool */
4702                         list_for_each_entry_safe(dsd_ptr,
4703                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4704                                 dma_pool_free(ha->dl_dma_pool,
4705                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4706                                 list_del(&dsd_ptr->list);
4707                                 kfree(dsd_ptr);
4708                         }
4709                 }
4710         }
4711
4712         dma_pool_destroy(ha->dl_dma_pool);
4713         ha->dl_dma_pool = NULL;
4714
4715         dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4716         ha->fcp_cmnd_dma_pool = NULL;
4717
4718         mempool_destroy(ha->ctx_mempool);
4719         ha->ctx_mempool = NULL;
4720
4721         if (ql2xenabledif && ha->dif_bundl_pool) {
4722                 struct dsd_dma *dsd, *nxt;
4723
4724                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4725                                          list) {
4726                         list_del(&dsd->list);
4727                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4728                                       dsd->dsd_list_dma);
4729                         ha->dif_bundle_dma_allocs--;
4730                         kfree(dsd);
4731                         ha->dif_bundle_kallocs--;
4732                         ha->pool.unusable.count--;
4733                 }
4734                 list_for_each_entry_safe(dsd, nxt, &ha->pool.good.head, list) {
4735                         list_del(&dsd->list);
4736                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4737                                       dsd->dsd_list_dma);
4738                         ha->dif_bundle_dma_allocs--;
4739                         kfree(dsd);
4740                         ha->dif_bundle_kallocs--;
4741                 }
4742         }
4743
4744         dma_pool_destroy(ha->dif_bundl_pool);
4745         ha->dif_bundl_pool = NULL;
4746
4747         qlt_mem_free(ha);
4748
4749         if (ha->init_cb)
4750                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4751                         ha->init_cb, ha->init_cb_dma);
4752         ha->init_cb = NULL;
4753         ha->init_cb_dma = 0;
4754
4755         vfree(ha->optrom_buffer);
4756         ha->optrom_buffer = NULL;
4757         kfree(ha->nvram);
4758         ha->nvram = NULL;
4759         kfree(ha->npiv_info);
4760         ha->npiv_info = NULL;
4761         kfree(ha->swl);
4762         ha->swl = NULL;
4763         kfree(ha->loop_id_map);
4764         ha->loop_id_map = NULL;
4765 }
4766
4767 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4768                                                 struct qla_hw_data *ha)
4769 {
4770         struct Scsi_Host *host;
4771         struct scsi_qla_host *vha = NULL;
4772
4773         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4774         if (!host) {
4775                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4776                     "Failed to allocate host from the scsi layer, aborting.\n");
4777                 return NULL;
4778         }
4779
4780         /* Clear our data area */
4781         vha = shost_priv(host);
4782         memset(vha, 0, sizeof(scsi_qla_host_t));
4783
4784         vha->host = host;
4785         vha->host_no = host->host_no;
4786         vha->hw = ha;
4787
4788         vha->qlini_mode = ql2x_ini_mode;
4789         vha->ql2xexchoffld = ql2xexchoffld;
4790         vha->ql2xiniexchg = ql2xiniexchg;
4791
4792         INIT_LIST_HEAD(&vha->vp_fcports);
4793         INIT_LIST_HEAD(&vha->work_list);
4794         INIT_LIST_HEAD(&vha->list);
4795         INIT_LIST_HEAD(&vha->qla_cmd_list);
4796         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4797         INIT_LIST_HEAD(&vha->logo_list);
4798         INIT_LIST_HEAD(&vha->plogi_ack_list);
4799         INIT_LIST_HEAD(&vha->qp_list);
4800         INIT_LIST_HEAD(&vha->gnl.fcports);
4801         INIT_LIST_HEAD(&vha->gpnid_list);
4802         INIT_WORK(&vha->iocb_work, qla2x00_iocb_work_fn);
4803
4804         spin_lock_init(&vha->work_lock);
4805         spin_lock_init(&vha->cmd_list_lock);
4806         init_waitqueue_head(&vha->fcport_waitQ);
4807         init_waitqueue_head(&vha->vref_waitq);
4808
4809         vha->gnl.size = sizeof(struct get_name_list_extended) *
4810                         (ha->max_loop_id + 1);
4811         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4812             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4813         if (!vha->gnl.l) {
4814                 ql_log(ql_log_fatal, vha, 0xd04a,
4815                     "Alloc failed for name list.\n");
4816                 scsi_host_put(vha->host);
4817                 return NULL;
4818         }
4819
4820         /* todo: what about ext login? */
4821         vha->scan.size = ha->max_fibre_devices * sizeof(struct fab_scan_rp);
4822         vha->scan.l = vmalloc(vha->scan.size);
4823         if (!vha->scan.l) {
4824                 ql_log(ql_log_fatal, vha, 0xd04a,
4825                     "Alloc failed for scan database.\n");
4826                 dma_free_coherent(&ha->pdev->dev, vha->gnl.size,
4827                     vha->gnl.l, vha->gnl.ldma);
4828                 vha->gnl.l = NULL;
4829                 scsi_host_put(vha->host);
4830                 return NULL;
4831         }
4832         INIT_DELAYED_WORK(&vha->scan.scan_work, qla_scan_work_fn);
4833
4834         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4835         ql_dbg(ql_dbg_init, vha, 0x0041,
4836             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4837             vha->host, vha->hw, vha,
4838             dev_name(&(ha->pdev->dev)));
4839
4840         return vha;
4841 }
4842
4843 struct qla_work_evt *
4844 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4845 {
4846         struct qla_work_evt *e;
4847         uint8_t bail;
4848
4849         QLA_VHA_MARK_BUSY(vha, bail);
4850         if (bail)
4851                 return NULL;
4852
4853         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4854         if (!e) {
4855                 QLA_VHA_MARK_NOT_BUSY(vha);
4856                 return NULL;
4857         }
4858
4859         INIT_LIST_HEAD(&e->list);
4860         e->type = type;
4861         e->flags = QLA_EVT_FLAG_FREE;
4862         return e;
4863 }
4864
4865 int
4866 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4867 {
4868         unsigned long flags;
4869         bool q = false;
4870
4871         spin_lock_irqsave(&vha->work_lock, flags);
4872         list_add_tail(&e->list, &vha->work_list);
4873
4874         if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
4875                 q = true;
4876
4877         spin_unlock_irqrestore(&vha->work_lock, flags);
4878
4879         if (q)
4880                 queue_work(vha->hw->wq, &vha->iocb_work);
4881
4882         return QLA_SUCCESS;
4883 }
4884
4885 int
4886 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4887     u32 data)
4888 {
4889         struct qla_work_evt *e;
4890
4891         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4892         if (!e)
4893                 return QLA_FUNCTION_FAILED;
4894
4895         e->u.aen.code = code;
4896         e->u.aen.data = data;
4897         return qla2x00_post_work(vha, e);
4898 }
4899
4900 int
4901 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4902 {
4903         struct qla_work_evt *e;
4904
4905         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4906         if (!e)
4907                 return QLA_FUNCTION_FAILED;
4908
4909         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4910         return qla2x00_post_work(vha, e);
4911 }
4912
4913 #define qla2x00_post_async_work(name, type)     \
4914 int qla2x00_post_async_##name##_work(           \
4915     struct scsi_qla_host *vha,                  \
4916     fc_port_t *fcport, uint16_t *data)          \
4917 {                                               \
4918         struct qla_work_evt *e;                 \
4919                                                 \
4920         e = qla2x00_alloc_work(vha, type);      \
4921         if (!e)                                 \
4922                 return QLA_FUNCTION_FAILED;     \
4923                                                 \
4924         e->u.logio.fcport = fcport;             \
4925         if (data) {                             \
4926                 e->u.logio.data[0] = data[0];   \
4927                 e->u.logio.data[1] = data[1];   \
4928         }                                       \
4929         fcport->flags |= FCF_ASYNC_ACTIVE;      \
4930         return qla2x00_post_work(vha, e);       \
4931 }
4932
4933 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4934 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4935 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4936 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4937 qla2x00_post_async_work(prlo, QLA_EVT_ASYNC_PRLO);
4938 qla2x00_post_async_work(prlo_done, QLA_EVT_ASYNC_PRLO_DONE);
4939
4940 int
4941 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4942 {
4943         struct qla_work_evt *e;
4944
4945         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4946         if (!e)
4947                 return QLA_FUNCTION_FAILED;
4948
4949         e->u.uevent.code = code;
4950         return qla2x00_post_work(vha, e);
4951 }
4952
4953 static void
4954 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4955 {
4956         char event_string[40];
4957         char *envp[] = { event_string, NULL };
4958
4959         switch (code) {
4960         case QLA_UEVENT_CODE_FW_DUMP:
4961                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
4962                     vha->host_no);
4963                 break;
4964         default:
4965                 /* do nothing */
4966                 break;
4967         }
4968         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4969 }
4970
4971 int
4972 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
4973                         uint32_t *data, int cnt)
4974 {
4975         struct qla_work_evt *e;
4976
4977         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
4978         if (!e)
4979                 return QLA_FUNCTION_FAILED;
4980
4981         e->u.aenfx.evtcode = evtcode;
4982         e->u.aenfx.count = cnt;
4983         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
4984         return qla2x00_post_work(vha, e);
4985 }
4986
4987 void qla24xx_sched_upd_fcport(fc_port_t *fcport)
4988 {
4989         unsigned long flags;
4990
4991         if (IS_SW_RESV_ADDR(fcport->d_id))
4992                 return;
4993
4994         spin_lock_irqsave(&fcport->vha->work_lock, flags);
4995         if (fcport->disc_state == DSC_UPD_FCPORT) {
4996                 spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
4997                 return;
4998         }
4999         fcport->jiffies_at_registration = jiffies;
5000         fcport->sec_since_registration = 0;
5001         fcport->next_disc_state = DSC_DELETED;
5002         fcport->disc_state = DSC_UPD_FCPORT;
5003         spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
5004
5005         queue_work(system_unbound_wq, &fcport->reg_work);
5006 }
5007
5008 static
5009 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
5010 {
5011         unsigned long flags;
5012         fc_port_t *fcport =  NULL, *tfcp;
5013         struct qlt_plogi_ack_t *pla =
5014             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
5015         uint8_t free_fcport = 0;
5016
5017         ql_dbg(ql_dbg_disc, vha, 0xffff,
5018             "%s %d %8phC enter\n",
5019             __func__, __LINE__, e->u.new_sess.port_name);
5020
5021         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5022         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
5023         if (fcport) {
5024                 fcport->d_id = e->u.new_sess.id;
5025                 if (pla) {
5026                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5027                         memcpy(fcport->node_name,
5028                             pla->iocb.u.isp24.u.plogi.node_name,
5029                             WWN_SIZE);
5030                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
5031                         /* we took an extra ref_count to prevent PLOGI ACK when
5032                          * fcport/sess has not been created.
5033                          */
5034                         pla->ref_count--;
5035                 }
5036         } else {
5037                 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5038                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5039                 if (fcport) {
5040                         fcport->d_id = e->u.new_sess.id;
5041                         fcport->flags |= FCF_FABRIC_DEVICE;
5042                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5043                         if (e->u.new_sess.fc4_type == FS_FC4TYPE_FCP)
5044                                 fcport->fc4_type = FC4_TYPE_FCP_SCSI;
5045
5046                         if (e->u.new_sess.fc4_type == FS_FC4TYPE_NVME) {
5047                                 fcport->fc4_type = FC4_TYPE_OTHER;
5048                                 fcport->fc4f_nvme = FC4_TYPE_NVME;
5049                         }
5050
5051                         memcpy(fcport->port_name, e->u.new_sess.port_name,
5052                             WWN_SIZE);
5053
5054                         if (e->u.new_sess.fc4_type & FS_FCP_IS_N2N)
5055                                 fcport->n2n_flag = 1;
5056
5057                 } else {
5058                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5059                                    "%s %8phC mem alloc fail.\n",
5060                                    __func__, e->u.new_sess.port_name);
5061
5062                         if (pla) {
5063                                 list_del(&pla->list);
5064                                 kmem_cache_free(qla_tgt_plogi_cachep, pla);
5065                         }
5066                         return;
5067                 }
5068
5069                 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5070                 /* search again to make sure no one else got ahead */
5071                 tfcp = qla2x00_find_fcport_by_wwpn(vha,
5072                     e->u.new_sess.port_name, 1);
5073                 if (tfcp) {
5074                         /* should rarily happen */
5075                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5076                             "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
5077                             __func__, tfcp->port_name, tfcp->disc_state,
5078                             tfcp->fw_login_state);
5079
5080                         free_fcport = 1;
5081                 } else {
5082                         list_add_tail(&fcport->list, &vha->vp_fcports);
5083
5084                 }
5085                 if (pla) {
5086                         qlt_plogi_ack_link(vha, pla, fcport,
5087                             QLT_PLOGI_LINK_SAME_WWN);
5088                         pla->ref_count--;
5089                 }
5090         }
5091         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5092
5093         if (fcport) {
5094                 fcport->id_changed = 1;
5095                 fcport->scan_state = QLA_FCPORT_FOUND;
5096                 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
5097                 memcpy(fcport->node_name, e->u.new_sess.node_name, WWN_SIZE);
5098
5099                 if (pla) {
5100                         if (pla->iocb.u.isp24.status_subcode == ELS_PRLI) {
5101                                 u16 wd3_lo;
5102
5103                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5104                                 fcport->local = 0;
5105                                 fcport->loop_id =
5106                                         le16_to_cpu(
5107                                             pla->iocb.u.isp24.nport_handle);
5108                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5109                                 wd3_lo =
5110                                     le16_to_cpu(
5111                                         pla->iocb.u.isp24.u.prli.wd3_lo);
5112
5113                                 if (wd3_lo & BIT_7)
5114                                         fcport->conf_compl_supported = 1;
5115
5116                                 if ((wd3_lo & BIT_4) == 0)
5117                                         fcport->port_type = FCT_INITIATOR;
5118                                 else
5119                                         fcport->port_type = FCT_TARGET;
5120                         }
5121                         qlt_plogi_ack_unref(vha, pla);
5122                 } else {
5123                         fc_port_t *dfcp = NULL;
5124
5125                         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5126                         tfcp = qla2x00_find_fcport_by_nportid(vha,
5127                             &e->u.new_sess.id, 1);
5128                         if (tfcp && (tfcp != fcport)) {
5129                                 /*
5130                                  * We have a conflict fcport with same NportID.
5131                                  */
5132                                 ql_dbg(ql_dbg_disc, vha, 0xffff,
5133                                     "%s %8phC found conflict b4 add. DS %d LS %d\n",
5134                                     __func__, tfcp->port_name, tfcp->disc_state,
5135                                     tfcp->fw_login_state);
5136
5137                                 switch (tfcp->disc_state) {
5138                                 case DSC_DELETED:
5139                                         break;
5140                                 case DSC_DELETE_PEND:
5141                                         fcport->login_pause = 1;
5142                                         tfcp->conflict = fcport;
5143                                         break;
5144                                 default:
5145                                         fcport->login_pause = 1;
5146                                         tfcp->conflict = fcport;
5147                                         dfcp = tfcp;
5148                                         break;
5149                                 }
5150                         }
5151                         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5152                         if (dfcp)
5153                                 qlt_schedule_sess_for_deletion(tfcp);
5154
5155                         if (N2N_TOPO(vha->hw)) {
5156                                 fcport->flags &= ~FCF_FABRIC_DEVICE;
5157                                 fcport->keep_nport_handle = 1;
5158                                 if (vha->flags.nvme_enabled) {
5159                                         fcport->fc4f_nvme = 1;
5160                                         fcport->n2n_flag = 1;
5161                                 }
5162                                 fcport->fw_login_state = 0;
5163                                 /*
5164                                  * wait link init done before sending login
5165                                  */
5166                         } else {
5167                                 qla24xx_fcport_handle_login(vha, fcport);
5168                         }
5169                 }
5170         }
5171
5172         if (free_fcport) {
5173                 qla2x00_free_fcport(fcport);
5174                 if (pla) {
5175                         list_del(&pla->list);
5176                         kmem_cache_free(qla_tgt_plogi_cachep, pla);
5177                 }
5178         }
5179 }
5180
5181 static void qla_sp_retry(struct scsi_qla_host *vha, struct qla_work_evt *e)
5182 {
5183         struct srb *sp = e->u.iosb.sp;
5184         int rval;
5185
5186         rval = qla2x00_start_sp(sp);
5187         if (rval != QLA_SUCCESS) {
5188                 ql_dbg(ql_dbg_disc, vha, 0x2043,
5189                     "%s: %s: Re-issue IOCB failed (%d).\n",
5190                     __func__, sp->name, rval);
5191                 qla24xx_sp_unmap(vha, sp);
5192         }
5193 }
5194
5195 void
5196 qla2x00_do_work(struct scsi_qla_host *vha)
5197 {
5198         struct qla_work_evt *e, *tmp;
5199         unsigned long flags;
5200         LIST_HEAD(work);
5201         int rc;
5202
5203         spin_lock_irqsave(&vha->work_lock, flags);
5204         list_splice_init(&vha->work_list, &work);
5205         spin_unlock_irqrestore(&vha->work_lock, flags);
5206
5207         list_for_each_entry_safe(e, tmp, &work, list) {
5208                 rc = QLA_SUCCESS;
5209                 switch (e->type) {
5210                 case QLA_EVT_AEN:
5211                         fc_host_post_event(vha->host, fc_get_event_number(),
5212                             e->u.aen.code, e->u.aen.data);
5213                         break;
5214                 case QLA_EVT_IDC_ACK:
5215                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
5216                         break;
5217                 case QLA_EVT_ASYNC_LOGIN:
5218                         qla2x00_async_login(vha, e->u.logio.fcport,
5219                             e->u.logio.data);
5220                         break;
5221                 case QLA_EVT_ASYNC_LOGOUT:
5222                         rc = qla2x00_async_logout(vha, e->u.logio.fcport);
5223                         break;
5224                 case QLA_EVT_ASYNC_LOGOUT_DONE:
5225                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
5226                             e->u.logio.data);
5227                         break;
5228                 case QLA_EVT_ASYNC_ADISC:
5229                         qla2x00_async_adisc(vha, e->u.logio.fcport,
5230                             e->u.logio.data);
5231                         break;
5232                 case QLA_EVT_UEVENT:
5233                         qla2x00_uevent_emit(vha, e->u.uevent.code);
5234                         break;
5235                 case QLA_EVT_AENFX:
5236                         qlafx00_process_aen(vha, e);
5237                         break;
5238                 case QLA_EVT_GPNID:
5239                         qla24xx_async_gpnid(vha, &e->u.gpnid.id);
5240                         break;
5241                 case QLA_EVT_UNMAP:
5242                         qla24xx_sp_unmap(vha, e->u.iosb.sp);
5243                         break;
5244                 case QLA_EVT_RELOGIN:
5245                         qla2x00_relogin(vha);
5246                         break;
5247                 case QLA_EVT_NEW_SESS:
5248                         qla24xx_create_new_sess(vha, e);
5249                         break;
5250                 case QLA_EVT_GPDB:
5251                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
5252                             e->u.fcport.opt);
5253                         break;
5254                 case QLA_EVT_PRLI:
5255                         qla24xx_async_prli(vha, e->u.fcport.fcport);
5256                         break;
5257                 case QLA_EVT_GPSC:
5258                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
5259                         break;
5260                 case QLA_EVT_GNL:
5261                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
5262                         break;
5263                 case QLA_EVT_NACK:
5264                         qla24xx_do_nack_work(vha, e);
5265                         break;
5266                 case QLA_EVT_ASYNC_PRLO:
5267                         rc = qla2x00_async_prlo(vha, e->u.logio.fcport);
5268                         break;
5269                 case QLA_EVT_ASYNC_PRLO_DONE:
5270                         qla2x00_async_prlo_done(vha, e->u.logio.fcport,
5271                             e->u.logio.data);
5272                         break;
5273                 case QLA_EVT_GPNFT:
5274                         qla24xx_async_gpnft(vha, e->u.gpnft.fc4_type,
5275                             e->u.gpnft.sp);
5276                         break;
5277                 case QLA_EVT_GPNFT_DONE:
5278                         qla24xx_async_gpnft_done(vha, e->u.iosb.sp);
5279                         break;
5280                 case QLA_EVT_GNNFT_DONE:
5281                         qla24xx_async_gnnft_done(vha, e->u.iosb.sp);
5282                         break;
5283                 case QLA_EVT_GNNID:
5284                         qla24xx_async_gnnid(vha, e->u.fcport.fcport);
5285                         break;
5286                 case QLA_EVT_GFPNID:
5287                         qla24xx_async_gfpnid(vha, e->u.fcport.fcport);
5288                         break;
5289                 case QLA_EVT_SP_RETRY:
5290                         qla_sp_retry(vha, e);
5291                         break;
5292                 case QLA_EVT_IIDMA:
5293                         qla_do_iidma_work(vha, e->u.fcport.fcport);
5294                         break;
5295                 case QLA_EVT_ELS_PLOGI:
5296                         qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI,
5297                             e->u.fcport.fcport, false);
5298                         break;
5299                 }
5300
5301                 if (rc == EAGAIN) {
5302                         /* put 'work' at head of 'vha->work_list' */
5303                         spin_lock_irqsave(&vha->work_lock, flags);
5304                         list_splice(&work, &vha->work_list);
5305                         spin_unlock_irqrestore(&vha->work_lock, flags);
5306                         break;
5307                 }
5308                 list_del_init(&e->list);
5309                 if (e->flags & QLA_EVT_FLAG_FREE)
5310                         kfree(e);
5311
5312                 /* For each work completed decrement vha ref count */
5313                 QLA_VHA_MARK_NOT_BUSY(vha);
5314         }
5315 }
5316
5317 int qla24xx_post_relogin_work(struct scsi_qla_host *vha)
5318 {
5319         struct qla_work_evt *e;
5320
5321         e = qla2x00_alloc_work(vha, QLA_EVT_RELOGIN);
5322
5323         if (!e) {
5324                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5325                 return QLA_FUNCTION_FAILED;
5326         }
5327
5328         return qla2x00_post_work(vha, e);
5329 }
5330
5331 /* Relogins all the fcports of a vport
5332  * Context: dpc thread
5333  */
5334 void qla2x00_relogin(struct scsi_qla_host *vha)
5335 {
5336         fc_port_t       *fcport;
5337         int status, relogin_needed = 0;
5338         struct event_arg ea;
5339
5340         list_for_each_entry(fcport, &vha->vp_fcports, list) {
5341                 /*
5342                  * If the port is not ONLINE then try to login
5343                  * to it if we haven't run out of retries.
5344                  */
5345                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
5346                     fcport->login_retry) {
5347                         if (fcport->scan_state != QLA_FCPORT_FOUND ||
5348                             fcport->disc_state == DSC_LOGIN_COMPLETE)
5349                                 continue;
5350
5351                         if (fcport->flags & (FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE) ||
5352                                 fcport->disc_state == DSC_DELETE_PEND) {
5353                                 relogin_needed = 1;
5354                         } else {
5355                                 if (vha->hw->current_topology != ISP_CFG_NL) {
5356                                         memset(&ea, 0, sizeof(ea));
5357                                         ea.fcport = fcport;
5358                                         qla24xx_handle_relogin_event(vha, &ea);
5359                                 } else if (vha->hw->current_topology ==
5360                                     ISP_CFG_NL) {
5361                                         fcport->login_retry--;
5362                                         status =
5363                                             qla2x00_local_device_login(vha,
5364                                                 fcport);
5365                                         if (status == QLA_SUCCESS) {
5366                                                 fcport->old_loop_id =
5367                                                     fcport->loop_id;
5368                                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
5369                                                     "Port login OK: logged in ID 0x%x.\n",
5370                                                     fcport->loop_id);
5371                                                 qla2x00_update_fcport
5372                                                         (vha, fcport);
5373                                         } else if (status == 1) {
5374                                                 set_bit(RELOGIN_NEEDED,
5375                                                     &vha->dpc_flags);
5376                                                 /* retry the login again */
5377                                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
5378                                                     "Retrying %d login again loop_id 0x%x.\n",
5379                                                     fcport->login_retry,
5380                                                     fcport->loop_id);
5381                                         } else {
5382                                                 fcport->login_retry = 0;
5383                                         }
5384
5385                                         if (fcport->login_retry == 0 &&
5386                                             status != QLA_SUCCESS)
5387                                                 qla2x00_clear_loop_id(fcport);
5388                                 }
5389                         }
5390                 }
5391                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5392                         break;
5393         }
5394
5395         if (relogin_needed)
5396                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5397
5398         ql_dbg(ql_dbg_disc, vha, 0x400e,
5399             "Relogin end.\n");
5400 }
5401
5402 /* Schedule work on any of the dpc-workqueues */
5403 void
5404 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
5405 {
5406         struct qla_hw_data *ha = base_vha->hw;
5407
5408         switch (work_code) {
5409         case MBA_IDC_AEN: /* 0x8200 */
5410                 if (ha->dpc_lp_wq)
5411                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
5412                 break;
5413
5414         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
5415                 if (!ha->flags.nic_core_reset_hdlr_active) {
5416                         if (ha->dpc_hp_wq)
5417                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
5418                 } else
5419                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
5420                             "NIC Core reset is already active. Skip "
5421                             "scheduling it again.\n");
5422                 break;
5423         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
5424                 if (ha->dpc_hp_wq)
5425                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
5426                 break;
5427         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
5428                 if (ha->dpc_hp_wq)
5429                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
5430                 break;
5431         default:
5432                 ql_log(ql_log_warn, base_vha, 0xb05f,
5433                     "Unknown work-code=0x%x.\n", work_code);
5434         }
5435
5436         return;
5437 }
5438
5439 /* Work: Perform NIC Core Unrecoverable state handling */
5440 void
5441 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
5442 {
5443         struct qla_hw_data *ha =
5444                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
5445         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5446         uint32_t dev_state = 0;
5447
5448         qla83xx_idc_lock(base_vha, 0);
5449         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5450         qla83xx_reset_ownership(base_vha);
5451         if (ha->flags.nic_core_reset_owner) {
5452                 ha->flags.nic_core_reset_owner = 0;
5453                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5454                     QLA8XXX_DEV_FAILED);
5455                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
5456                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5457         }
5458         qla83xx_idc_unlock(base_vha, 0);
5459 }
5460
5461 /* Work: Execute IDC state handler */
5462 void
5463 qla83xx_idc_state_handler_work(struct work_struct *work)
5464 {
5465         struct qla_hw_data *ha =
5466                 container_of(work, struct qla_hw_data, idc_state_handler);
5467         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5468         uint32_t dev_state = 0;
5469
5470         qla83xx_idc_lock(base_vha, 0);
5471         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5472         if (dev_state == QLA8XXX_DEV_FAILED ||
5473                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
5474                 qla83xx_idc_state_handler(base_vha);
5475         qla83xx_idc_unlock(base_vha, 0);
5476 }
5477
5478 static int
5479 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
5480 {
5481         int rval = QLA_SUCCESS;
5482         unsigned long heart_beat_wait = jiffies + (1 * HZ);
5483         uint32_t heart_beat_counter1, heart_beat_counter2;
5484
5485         do {
5486                 if (time_after(jiffies, heart_beat_wait)) {
5487                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
5488                             "Nic Core f/w is not alive.\n");
5489                         rval = QLA_FUNCTION_FAILED;
5490                         break;
5491                 }
5492
5493                 qla83xx_idc_lock(base_vha, 0);
5494                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5495                     &heart_beat_counter1);
5496                 qla83xx_idc_unlock(base_vha, 0);
5497                 msleep(100);
5498                 qla83xx_idc_lock(base_vha, 0);
5499                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5500                     &heart_beat_counter2);
5501                 qla83xx_idc_unlock(base_vha, 0);
5502         } while (heart_beat_counter1 == heart_beat_counter2);
5503
5504         return rval;
5505 }
5506
5507 /* Work: Perform NIC Core Reset handling */
5508 void
5509 qla83xx_nic_core_reset_work(struct work_struct *work)
5510 {
5511         struct qla_hw_data *ha =
5512                 container_of(work, struct qla_hw_data, nic_core_reset);
5513         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5514         uint32_t dev_state = 0;
5515
5516         if (IS_QLA2031(ha)) {
5517                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
5518                         ql_log(ql_log_warn, base_vha, 0xb081,
5519                             "Failed to dump mctp\n");
5520                 return;
5521         }
5522
5523         if (!ha->flags.nic_core_reset_hdlr_active) {
5524                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
5525                         qla83xx_idc_lock(base_vha, 0);
5526                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5527                             &dev_state);
5528                         qla83xx_idc_unlock(base_vha, 0);
5529                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
5530                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
5531                                     "Nic Core f/w is alive.\n");
5532                                 return;
5533                         }
5534                 }
5535
5536                 ha->flags.nic_core_reset_hdlr_active = 1;
5537                 if (qla83xx_nic_core_reset(base_vha)) {
5538                         /* NIC Core reset failed. */
5539                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5540                             "NIC Core reset failed.\n");
5541                 }
5542                 ha->flags.nic_core_reset_hdlr_active = 0;
5543         }
5544 }
5545
5546 /* Work: Handle 8200 IDC aens */
5547 void
5548 qla83xx_service_idc_aen(struct work_struct *work)
5549 {
5550         struct qla_hw_data *ha =
5551                 container_of(work, struct qla_hw_data, idc_aen);
5552         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5553         uint32_t dev_state, idc_control;
5554
5555         qla83xx_idc_lock(base_vha, 0);
5556         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5557         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5558         qla83xx_idc_unlock(base_vha, 0);
5559         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5560                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5561                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5562                             "Application requested NIC Core Reset.\n");
5563                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5564                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5565                     QLA_SUCCESS) {
5566                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5567                             "Other protocol driver requested NIC Core Reset.\n");
5568                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5569                 }
5570         } else if (dev_state == QLA8XXX_DEV_FAILED ||
5571                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5572                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5573         }
5574 }
5575
5576 static void
5577 qla83xx_wait_logic(void)
5578 {
5579         int i;
5580
5581         /* Yield CPU */
5582         if (!in_interrupt()) {
5583                 /*
5584                  * Wait about 200ms before retrying again.
5585                  * This controls the number of retries for single
5586                  * lock operation.
5587                  */
5588                 msleep(100);
5589                 schedule();
5590         } else {
5591                 for (i = 0; i < 20; i++)
5592                         cpu_relax(); /* This a nop instr on i386 */
5593         }
5594 }
5595
5596 static int
5597 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5598 {
5599         int rval;
5600         uint32_t data;
5601         uint32_t idc_lck_rcvry_stage_mask = 0x3;
5602         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5603         struct qla_hw_data *ha = base_vha->hw;
5604
5605         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5606             "Trying force recovery of the IDC lock.\n");
5607
5608         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5609         if (rval)
5610                 return rval;
5611
5612         if ((data & idc_lck_rcvry_stage_mask) > 0) {
5613                 return QLA_SUCCESS;
5614         } else {
5615                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5616                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5617                     data);
5618                 if (rval)
5619                         return rval;
5620
5621                 msleep(200);
5622
5623                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5624                     &data);
5625                 if (rval)
5626                         return rval;
5627
5628                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5629                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
5630                                         ~(idc_lck_rcvry_stage_mask));
5631                         rval = qla83xx_wr_reg(base_vha,
5632                             QLA83XX_IDC_LOCK_RECOVERY, data);
5633                         if (rval)
5634                                 return rval;
5635
5636                         /* Forcefully perform IDC UnLock */
5637                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5638                             &data);
5639                         if (rval)
5640                                 return rval;
5641                         /* Clear lock-id by setting 0xff */
5642                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5643                             0xff);
5644                         if (rval)
5645                                 return rval;
5646                         /* Clear lock-recovery by setting 0x0 */
5647                         rval = qla83xx_wr_reg(base_vha,
5648                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5649                         if (rval)
5650                                 return rval;
5651                 } else
5652                         return QLA_SUCCESS;
5653         }
5654
5655         return rval;
5656 }
5657
5658 static int
5659 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5660 {
5661         int rval = QLA_SUCCESS;
5662         uint32_t o_drv_lockid, n_drv_lockid;
5663         unsigned long lock_recovery_timeout;
5664
5665         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5666 retry_lockid:
5667         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5668         if (rval)
5669                 goto exit;
5670
5671         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5672         if (time_after_eq(jiffies, lock_recovery_timeout)) {
5673                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5674                         return QLA_SUCCESS;
5675                 else
5676                         return QLA_FUNCTION_FAILED;
5677         }
5678
5679         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5680         if (rval)
5681                 goto exit;
5682
5683         if (o_drv_lockid == n_drv_lockid) {
5684                 qla83xx_wait_logic();
5685                 goto retry_lockid;
5686         } else
5687                 return QLA_SUCCESS;
5688
5689 exit:
5690         return rval;
5691 }
5692
5693 void
5694 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5695 {
5696         uint32_t data;
5697         uint32_t lock_owner;
5698         struct qla_hw_data *ha = base_vha->hw;
5699
5700         /* IDC-lock implementation using driver-lock/lock-id remote registers */
5701 retry_lock:
5702         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5703             == QLA_SUCCESS) {
5704                 if (data) {
5705                         /* Setting lock-id to our function-number */
5706                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5707                             ha->portnum);
5708                 } else {
5709                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5710                             &lock_owner);
5711                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5712                             "Failed to acquire IDC lock, acquired by %d, "
5713                             "retrying...\n", lock_owner);
5714
5715                         /* Retry/Perform IDC-Lock recovery */
5716                         if (qla83xx_idc_lock_recovery(base_vha)
5717                             == QLA_SUCCESS) {
5718                                 qla83xx_wait_logic();
5719                                 goto retry_lock;
5720                         } else
5721                                 ql_log(ql_log_warn, base_vha, 0xb075,
5722                                     "IDC Lock recovery FAILED.\n");
5723                 }
5724
5725         }
5726
5727         return;
5728 }
5729
5730 void
5731 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5732 {
5733 #if 0
5734         uint16_t options = (requester_id << 15) | BIT_7;
5735 #endif
5736         uint16_t retry;
5737         uint32_t data;
5738         struct qla_hw_data *ha = base_vha->hw;
5739
5740         /* IDC-unlock implementation using driver-unlock/lock-id
5741          * remote registers
5742          */
5743         retry = 0;
5744 retry_unlock:
5745         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
5746             == QLA_SUCCESS) {
5747                 if (data == ha->portnum) {
5748                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
5749                         /* Clearing lock-id by setting 0xff */
5750                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
5751                 } else if (retry < 10) {
5752                         /* SV: XXX: IDC unlock retrying needed here? */
5753
5754                         /* Retry for IDC-unlock */
5755                         qla83xx_wait_logic();
5756                         retry++;
5757                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
5758                             "Failed to release IDC lock, retrying=%d\n", retry);
5759                         goto retry_unlock;
5760                 }
5761         } else if (retry < 10) {
5762                 /* Retry for IDC-unlock */
5763                 qla83xx_wait_logic();
5764                 retry++;
5765                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
5766                     "Failed to read drv-lockid, retrying=%d\n", retry);
5767                 goto retry_unlock;
5768         }
5769
5770         return;
5771
5772 #if 0
5773         /* XXX: IDC-unlock implementation using access-control mbx */
5774         retry = 0;
5775 retry_unlock2:
5776         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5777                 if (retry < 10) {
5778                         /* Retry for IDC-unlock */
5779                         qla83xx_wait_logic();
5780                         retry++;
5781                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
5782                             "Failed to release IDC lock, retrying=%d\n", retry);
5783                         goto retry_unlock2;
5784                 }
5785         }
5786
5787         return;
5788 #endif
5789 }
5790
5791 int
5792 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5793 {
5794         int rval = QLA_SUCCESS;
5795         struct qla_hw_data *ha = vha->hw;
5796         uint32_t drv_presence;
5797
5798         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5799         if (rval == QLA_SUCCESS) {
5800                 drv_presence |= (1 << ha->portnum);
5801                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5802                     drv_presence);
5803         }
5804
5805         return rval;
5806 }
5807
5808 int
5809 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5810 {
5811         int rval = QLA_SUCCESS;
5812
5813         qla83xx_idc_lock(vha, 0);
5814         rval = __qla83xx_set_drv_presence(vha);
5815         qla83xx_idc_unlock(vha, 0);
5816
5817         return rval;
5818 }
5819
5820 int
5821 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5822 {
5823         int rval = QLA_SUCCESS;
5824         struct qla_hw_data *ha = vha->hw;
5825         uint32_t drv_presence;
5826
5827         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5828         if (rval == QLA_SUCCESS) {
5829                 drv_presence &= ~(1 << ha->portnum);
5830                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5831                     drv_presence);
5832         }
5833
5834         return rval;
5835 }
5836
5837 int
5838 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5839 {
5840         int rval = QLA_SUCCESS;
5841
5842         qla83xx_idc_lock(vha, 0);
5843         rval = __qla83xx_clear_drv_presence(vha);
5844         qla83xx_idc_unlock(vha, 0);
5845
5846         return rval;
5847 }
5848
5849 static void
5850 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
5851 {
5852         struct qla_hw_data *ha = vha->hw;
5853         uint32_t drv_ack, drv_presence;
5854         unsigned long ack_timeout;
5855
5856         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
5857         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
5858         while (1) {
5859                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5860                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5861                 if ((drv_ack & drv_presence) == drv_presence)
5862                         break;
5863
5864                 if (time_after_eq(jiffies, ack_timeout)) {
5865                         ql_log(ql_log_warn, vha, 0xb067,
5866                             "RESET ACK TIMEOUT! drv_presence=0x%x "
5867                             "drv_ack=0x%x\n", drv_presence, drv_ack);
5868                         /*
5869                          * The function(s) which did not ack in time are forced
5870                          * to withdraw any further participation in the IDC
5871                          * reset.
5872                          */
5873                         if (drv_ack != drv_presence)
5874                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5875                                     drv_ack);
5876                         break;
5877                 }
5878
5879                 qla83xx_idc_unlock(vha, 0);
5880                 msleep(1000);
5881                 qla83xx_idc_lock(vha, 0);
5882         }
5883
5884         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
5885         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
5886 }
5887
5888 static int
5889 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
5890 {
5891         int rval = QLA_SUCCESS;
5892         uint32_t idc_control;
5893
5894         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
5895         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
5896
5897         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
5898         __qla83xx_get_idc_control(vha, &idc_control);
5899         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
5900         __qla83xx_set_idc_control(vha, 0);
5901
5902         qla83xx_idc_unlock(vha, 0);
5903         rval = qla83xx_restart_nic_firmware(vha);
5904         qla83xx_idc_lock(vha, 0);
5905
5906         if (rval != QLA_SUCCESS) {
5907                 ql_log(ql_log_fatal, vha, 0xb06a,
5908                     "Failed to restart NIC f/w.\n");
5909                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
5910                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
5911         } else {
5912                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
5913                     "Success in restarting nic f/w.\n");
5914                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
5915                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
5916         }
5917
5918         return rval;
5919 }
5920
5921 /* Assumes idc_lock always held on entry */
5922 int
5923 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
5924 {
5925         struct qla_hw_data *ha = base_vha->hw;
5926         int rval = QLA_SUCCESS;
5927         unsigned long dev_init_timeout;
5928         uint32_t dev_state;
5929
5930         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
5931         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
5932
5933         while (1) {
5934
5935                 if (time_after_eq(jiffies, dev_init_timeout)) {
5936                         ql_log(ql_log_warn, base_vha, 0xb06e,
5937                             "Initialization TIMEOUT!\n");
5938                         /* Init timeout. Disable further NIC Core
5939                          * communication.
5940                          */
5941                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5942                                 QLA8XXX_DEV_FAILED);
5943                         ql_log(ql_log_info, base_vha, 0xb06f,
5944                             "HW State: FAILED.\n");
5945                 }
5946
5947                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5948                 switch (dev_state) {
5949                 case QLA8XXX_DEV_READY:
5950                         if (ha->flags.nic_core_reset_owner)
5951                                 qla83xx_idc_audit(base_vha,
5952                                     IDC_AUDIT_COMPLETION);
5953                         ha->flags.nic_core_reset_owner = 0;
5954                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
5955                             "Reset_owner reset by 0x%x.\n",
5956                             ha->portnum);
5957                         goto exit;
5958                 case QLA8XXX_DEV_COLD:
5959                         if (ha->flags.nic_core_reset_owner)
5960                                 rval = qla83xx_device_bootstrap(base_vha);
5961                         else {
5962                         /* Wait for AEN to change device-state */
5963                                 qla83xx_idc_unlock(base_vha, 0);
5964                                 msleep(1000);
5965                                 qla83xx_idc_lock(base_vha, 0);
5966                         }
5967                         break;
5968                 case QLA8XXX_DEV_INITIALIZING:
5969                         /* Wait for AEN to change device-state */
5970                         qla83xx_idc_unlock(base_vha, 0);
5971                         msleep(1000);
5972                         qla83xx_idc_lock(base_vha, 0);
5973                         break;
5974                 case QLA8XXX_DEV_NEED_RESET:
5975                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
5976                                 qla83xx_need_reset_handler(base_vha);
5977                         else {
5978                                 /* Wait for AEN to change device-state */
5979                                 qla83xx_idc_unlock(base_vha, 0);
5980                                 msleep(1000);
5981                                 qla83xx_idc_lock(base_vha, 0);
5982                         }
5983                         /* reset timeout value after need reset handler */
5984                         dev_init_timeout = jiffies +
5985                             (ha->fcoe_dev_init_timeout * HZ);
5986                         break;
5987                 case QLA8XXX_DEV_NEED_QUIESCENT:
5988                         /* XXX: DEBUG for now */
5989                         qla83xx_idc_unlock(base_vha, 0);
5990                         msleep(1000);
5991                         qla83xx_idc_lock(base_vha, 0);
5992                         break;
5993                 case QLA8XXX_DEV_QUIESCENT:
5994                         /* XXX: DEBUG for now */
5995                         if (ha->flags.quiesce_owner)
5996                                 goto exit;
5997
5998                         qla83xx_idc_unlock(base_vha, 0);
5999                         msleep(1000);
6000                         qla83xx_idc_lock(base_vha, 0);
6001                         dev_init_timeout = jiffies +
6002                             (ha->fcoe_dev_init_timeout * HZ);
6003                         break;
6004                 case QLA8XXX_DEV_FAILED:
6005                         if (ha->flags.nic_core_reset_owner)
6006                                 qla83xx_idc_audit(base_vha,
6007                                     IDC_AUDIT_COMPLETION);
6008                         ha->flags.nic_core_reset_owner = 0;
6009                         __qla83xx_clear_drv_presence(base_vha);
6010                         qla83xx_idc_unlock(base_vha, 0);
6011                         qla8xxx_dev_failed_handler(base_vha);
6012                         rval = QLA_FUNCTION_FAILED;
6013                         qla83xx_idc_lock(base_vha, 0);
6014                         goto exit;
6015                 case QLA8XXX_BAD_VALUE:
6016                         qla83xx_idc_unlock(base_vha, 0);
6017                         msleep(1000);
6018                         qla83xx_idc_lock(base_vha, 0);
6019                         break;
6020                 default:
6021                         ql_log(ql_log_warn, base_vha, 0xb071,
6022                             "Unknown Device State: %x.\n", dev_state);
6023                         qla83xx_idc_unlock(base_vha, 0);
6024                         qla8xxx_dev_failed_handler(base_vha);
6025                         rval = QLA_FUNCTION_FAILED;
6026                         qla83xx_idc_lock(base_vha, 0);
6027                         goto exit;
6028                 }
6029         }
6030
6031 exit:
6032         return rval;
6033 }
6034
6035 void
6036 qla2x00_disable_board_on_pci_error(struct work_struct *work)
6037 {
6038         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
6039             board_disable);
6040         struct pci_dev *pdev = ha->pdev;
6041         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
6042
6043         /*
6044          * if UNLOAD flag is already set, then continue unload,
6045          * where it was set first.
6046          */
6047         if (test_bit(UNLOADING, &base_vha->dpc_flags))
6048                 return;
6049
6050         ql_log(ql_log_warn, base_vha, 0x015b,
6051             "Disabling adapter.\n");
6052
6053         if (!atomic_read(&pdev->enable_cnt)) {
6054                 ql_log(ql_log_info, base_vha, 0xfffc,
6055                     "PCI device disabled, no action req for PCI error=%lx\n",
6056                     base_vha->pci_flags);
6057                 return;
6058         }
6059
6060         qla2x00_wait_for_sess_deletion(base_vha);
6061
6062         set_bit(UNLOADING, &base_vha->dpc_flags);
6063
6064         qla2x00_delete_all_vps(ha, base_vha);
6065
6066         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6067
6068         qla2x00_dfs_remove(base_vha);
6069
6070         qla84xx_put_chip(base_vha);
6071
6072         if (base_vha->timer_active)
6073                 qla2x00_stop_timer(base_vha);
6074
6075         base_vha->flags.online = 0;
6076
6077         qla2x00_destroy_deferred_work(ha);
6078
6079         /*
6080          * Do not try to stop beacon blink as it will issue a mailbox
6081          * command.
6082          */
6083         qla2x00_free_sysfs_attr(base_vha, false);
6084
6085         fc_remove_host(base_vha->host);
6086
6087         scsi_remove_host(base_vha->host);
6088
6089         base_vha->flags.init_done = 0;
6090         qla25xx_delete_queues(base_vha);
6091         qla2x00_free_fcports(base_vha);
6092         qla2x00_free_irqs(base_vha);
6093         qla2x00_mem_free(ha);
6094         qla82xx_md_free(base_vha);
6095         qla2x00_free_queues(ha);
6096
6097         qla2x00_unmap_iobases(ha);
6098
6099         pci_release_selected_regions(ha->pdev, ha->bars);
6100         pci_disable_pcie_error_reporting(pdev);
6101         pci_disable_device(pdev);
6102
6103         /*
6104          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
6105          */
6106 }
6107
6108 /**************************************************************************
6109 * qla2x00_do_dpc
6110 *   This kernel thread is a task that is schedule by the interrupt handler
6111 *   to perform the background processing for interrupts.
6112 *
6113 * Notes:
6114 * This task always run in the context of a kernel thread.  It
6115 * is kick-off by the driver's detect code and starts up
6116 * up one per adapter. It immediately goes to sleep and waits for
6117 * some fibre event.  When either the interrupt handler or
6118 * the timer routine detects a event it will one of the task
6119 * bits then wake us up.
6120 **************************************************************************/
6121 static int
6122 qla2x00_do_dpc(void *data)
6123 {
6124         scsi_qla_host_t *base_vha;
6125         struct qla_hw_data *ha;
6126         uint32_t online;
6127         struct qla_qpair *qpair;
6128
6129         ha = (struct qla_hw_data *)data;
6130         base_vha = pci_get_drvdata(ha->pdev);
6131
6132         set_user_nice(current, MIN_NICE);
6133
6134         set_current_state(TASK_INTERRUPTIBLE);
6135         while (!kthread_should_stop()) {
6136                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
6137                     "DPC handler sleeping.\n");
6138
6139                 schedule();
6140
6141                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
6142                         goto end_loop;
6143
6144                 if (ha->flags.eeh_busy) {
6145                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
6146                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
6147                         goto end_loop;
6148                 }
6149
6150                 ha->dpc_active = 1;
6151
6152                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
6153                     "DPC handler waking up, dpc_flags=0x%lx.\n",
6154                     base_vha->dpc_flags);
6155
6156                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
6157                         break;
6158
6159                 if (IS_P3P_TYPE(ha)) {
6160                         if (IS_QLA8044(ha)) {
6161                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6162                                         &base_vha->dpc_flags)) {
6163                                         qla8044_idc_lock(ha);
6164                                         qla8044_wr_direct(base_vha,
6165                                                 QLA8044_CRB_DEV_STATE_INDEX,
6166                                                 QLA8XXX_DEV_FAILED);
6167                                         qla8044_idc_unlock(ha);
6168                                         ql_log(ql_log_info, base_vha, 0x4004,
6169                                                 "HW State: FAILED.\n");
6170                                         qla8044_device_state_handler(base_vha);
6171                                         continue;
6172                                 }
6173
6174                         } else {
6175                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6176                                         &base_vha->dpc_flags)) {
6177                                         qla82xx_idc_lock(ha);
6178                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6179                                                 QLA8XXX_DEV_FAILED);
6180                                         qla82xx_idc_unlock(ha);
6181                                         ql_log(ql_log_info, base_vha, 0x0151,
6182                                                 "HW State: FAILED.\n");
6183                                         qla82xx_device_state_handler(base_vha);
6184                                         continue;
6185                                 }
6186                         }
6187
6188                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
6189                                 &base_vha->dpc_flags)) {
6190
6191                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
6192                                     "FCoE context reset scheduled.\n");
6193                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
6194                                         &base_vha->dpc_flags))) {
6195                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
6196                                                 /* FCoE-ctx reset failed.
6197                                                  * Escalate to chip-reset
6198                                                  */
6199                                                 set_bit(ISP_ABORT_NEEDED,
6200                                                         &base_vha->dpc_flags);
6201                                         }
6202                                         clear_bit(ABORT_ISP_ACTIVE,
6203                                                 &base_vha->dpc_flags);
6204                                 }
6205
6206                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
6207                                     "FCoE context reset end.\n");
6208                         }
6209                 } else if (IS_QLAFX00(ha)) {
6210                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
6211                                 &base_vha->dpc_flags)) {
6212                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
6213                                     "Firmware Reset Recovery\n");
6214                                 if (qlafx00_reset_initialize(base_vha)) {
6215                                         /* Failed. Abort isp later. */
6216                                         if (!test_bit(UNLOADING,
6217                                             &base_vha->dpc_flags)) {
6218                                                 set_bit(ISP_UNRECOVERABLE,
6219                                                     &base_vha->dpc_flags);
6220                                                 ql_dbg(ql_dbg_dpc, base_vha,
6221                                                     0x4021,
6222                                                     "Reset Recovery Failed\n");
6223                                         }
6224                                 }
6225                         }
6226
6227                         if (test_and_clear_bit(FX00_TARGET_SCAN,
6228                                 &base_vha->dpc_flags)) {
6229                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
6230                                     "ISPFx00 Target Scan scheduled\n");
6231                                 if (qlafx00_rescan_isp(base_vha)) {
6232                                         if (!test_bit(UNLOADING,
6233                                             &base_vha->dpc_flags))
6234                                                 set_bit(ISP_UNRECOVERABLE,
6235                                                     &base_vha->dpc_flags);
6236                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
6237                                             "ISPFx00 Target Scan Failed\n");
6238                                 }
6239                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
6240                                     "ISPFx00 Target Scan End\n");
6241                         }
6242                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
6243                                 &base_vha->dpc_flags)) {
6244                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
6245                                     "ISPFx00 Host Info resend scheduled\n");
6246                                 qlafx00_fx_disc(base_vha,
6247                                     &base_vha->hw->mr.fcport,
6248                                     FXDISC_REG_HOST_INFO);
6249                         }
6250                 }
6251
6252                 if (test_and_clear_bit(DETECT_SFP_CHANGE,
6253                         &base_vha->dpc_flags) &&
6254                     !test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) {
6255                         qla24xx_detect_sfp(base_vha);
6256
6257                         if (ha->flags.detected_lr_sfp !=
6258                             ha->flags.using_lr_setting)
6259                                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
6260                 }
6261
6262                 if (test_and_clear_bit
6263                     (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
6264                     !test_bit(UNLOADING, &base_vha->dpc_flags)) {
6265                         bool do_reset = true;
6266
6267                         switch (base_vha->qlini_mode) {
6268                         case QLA2XXX_INI_MODE_ENABLED:
6269                                 break;
6270                         case QLA2XXX_INI_MODE_DISABLED:
6271                                 if (!qla_tgt_mode_enabled(base_vha) &&
6272                                     !ha->flags.fw_started)
6273                                         do_reset = false;
6274                                 break;
6275                         case QLA2XXX_INI_MODE_DUAL:
6276                                 if (!qla_dual_mode_enabled(base_vha) &&
6277                                     !ha->flags.fw_started)
6278                                         do_reset = false;
6279                                 break;
6280                         default:
6281                                 break;
6282                         }
6283
6284                         if (do_reset && !(test_and_set_bit(ABORT_ISP_ACTIVE,
6285                             &base_vha->dpc_flags))) {
6286                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
6287                                     "ISP abort scheduled.\n");
6288                                 if (ha->isp_ops->abort_isp(base_vha)) {
6289                                         /* failed. retry later */
6290                                         set_bit(ISP_ABORT_NEEDED,
6291                                             &base_vha->dpc_flags);
6292                                 }
6293                                 clear_bit(ABORT_ISP_ACTIVE,
6294                                                 &base_vha->dpc_flags);
6295                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
6296                                     "ISP abort end.\n");
6297                         }
6298                 }
6299
6300                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
6301                     &base_vha->dpc_flags)) {
6302                         qla2x00_update_fcports(base_vha);
6303                 }
6304
6305                 if (IS_QLAFX00(ha))
6306                         goto loop_resync_check;
6307
6308                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
6309                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
6310                             "Quiescence mode scheduled.\n");
6311                         if (IS_P3P_TYPE(ha)) {
6312                                 if (IS_QLA82XX(ha))
6313                                         qla82xx_device_state_handler(base_vha);
6314                                 if (IS_QLA8044(ha))
6315                                         qla8044_device_state_handler(base_vha);
6316                                 clear_bit(ISP_QUIESCE_NEEDED,
6317                                     &base_vha->dpc_flags);
6318                                 if (!ha->flags.quiesce_owner) {
6319                                         qla2x00_perform_loop_resync(base_vha);
6320                                         if (IS_QLA82XX(ha)) {
6321                                                 qla82xx_idc_lock(ha);
6322                                                 qla82xx_clear_qsnt_ready(
6323                                                     base_vha);
6324                                                 qla82xx_idc_unlock(ha);
6325                                         } else if (IS_QLA8044(ha)) {
6326                                                 qla8044_idc_lock(ha);
6327                                                 qla8044_clear_qsnt_ready(
6328                                                     base_vha);
6329                                                 qla8044_idc_unlock(ha);
6330                                         }
6331                                 }
6332                         } else {
6333                                 clear_bit(ISP_QUIESCE_NEEDED,
6334                                     &base_vha->dpc_flags);
6335                                 qla2x00_quiesce_io(base_vha);
6336                         }
6337                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
6338                             "Quiescence mode end.\n");
6339                 }
6340
6341                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
6342                                 &base_vha->dpc_flags) &&
6343                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
6344
6345                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
6346                             "Reset marker scheduled.\n");
6347                         qla2x00_rst_aen(base_vha);
6348                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
6349                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
6350                             "Reset marker end.\n");
6351                 }
6352
6353                 /* Retry each device up to login retry count */
6354                 if (test_bit(RELOGIN_NEEDED, &base_vha->dpc_flags) &&
6355                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
6356                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
6357
6358                         if (!base_vha->relogin_jif ||
6359                             time_after_eq(jiffies, base_vha->relogin_jif)) {
6360                                 base_vha->relogin_jif = jiffies + HZ;
6361                                 clear_bit(RELOGIN_NEEDED, &base_vha->dpc_flags);
6362
6363                                 ql_dbg(ql_dbg_disc, base_vha, 0x400d,
6364                                     "Relogin scheduled.\n");
6365                                 qla24xx_post_relogin_work(base_vha);
6366                         }
6367                 }
6368 loop_resync_check:
6369                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
6370                     &base_vha->dpc_flags)) {
6371
6372                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
6373                             "Loop resync scheduled.\n");
6374
6375                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
6376                             &base_vha->dpc_flags))) {
6377
6378                                 qla2x00_loop_resync(base_vha);
6379
6380                                 clear_bit(LOOP_RESYNC_ACTIVE,
6381                                                 &base_vha->dpc_flags);
6382                         }
6383
6384                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
6385                             "Loop resync end.\n");
6386                 }
6387
6388                 if (IS_QLAFX00(ha))
6389                         goto intr_on_check;
6390
6391                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
6392                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
6393                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
6394                         qla2xxx_flash_npiv_conf(base_vha);
6395                 }
6396
6397 intr_on_check:
6398                 if (!ha->interrupts_on)
6399                         ha->isp_ops->enable_intrs(ha);
6400
6401                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
6402                                         &base_vha->dpc_flags)) {
6403                         if (ha->beacon_blink_led == 1)
6404                                 ha->isp_ops->beacon_blink(base_vha);
6405                 }
6406
6407                 /* qpair online check */
6408                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
6409                     &base_vha->dpc_flags)) {
6410                         if (ha->flags.eeh_busy ||
6411                             ha->flags.pci_channel_io_perm_failure)
6412                                 online = 0;
6413                         else
6414                                 online = 1;
6415
6416                         mutex_lock(&ha->mq_lock);
6417                         list_for_each_entry(qpair, &base_vha->qp_list,
6418                             qp_list_elem)
6419                         qpair->online = online;
6420                         mutex_unlock(&ha->mq_lock);
6421                 }
6422
6423                 if (test_and_clear_bit(SET_NVME_ZIO_THRESHOLD_NEEDED,
6424                     &base_vha->dpc_flags)) {
6425                         ql_log(ql_log_info, base_vha, 0xffffff,
6426                                 "nvme: SET ZIO Activity exchange threshold to %d.\n",
6427                                                 ha->nvme_last_rptd_aen);
6428                         if (qla27xx_set_zio_threshold(base_vha,
6429                             ha->nvme_last_rptd_aen)) {
6430                                 ql_log(ql_log_info, base_vha, 0xffffff,
6431                                     "nvme: Unable to SET ZIO Activity exchange threshold to %d.\n",
6432                                     ha->nvme_last_rptd_aen);
6433                         }
6434                 }
6435
6436                 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED,
6437                     &base_vha->dpc_flags)) {
6438                         ql_log(ql_log_info, base_vha, 0xffffff,
6439                             "SET ZIO Activity exchange threshold to %d.\n",
6440                             ha->last_zio_threshold);
6441                         qla27xx_set_zio_threshold(base_vha,
6442                             ha->last_zio_threshold);
6443                 }
6444
6445                 if (!IS_QLAFX00(ha))
6446                         qla2x00_do_dpc_all_vps(base_vha);
6447
6448                 if (test_and_clear_bit(N2N_LINK_RESET,
6449                         &base_vha->dpc_flags)) {
6450                         qla2x00_lip_reset(base_vha);
6451                 }
6452
6453                 ha->dpc_active = 0;
6454 end_loop:
6455                 set_current_state(TASK_INTERRUPTIBLE);
6456         } /* End of while(1) */
6457         __set_current_state(TASK_RUNNING);
6458
6459         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
6460             "DPC handler exiting.\n");
6461
6462         /*
6463          * Make sure that nobody tries to wake us up again.
6464          */
6465         ha->dpc_active = 0;
6466
6467         /* Cleanup any residual CTX SRBs. */
6468         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6469
6470         return 0;
6471 }
6472
6473 void
6474 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
6475 {
6476         struct qla_hw_data *ha = vha->hw;
6477         struct task_struct *t = ha->dpc_thread;
6478
6479         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
6480                 wake_up_process(t);
6481 }
6482
6483 /*
6484 *  qla2x00_rst_aen
6485 *      Processes asynchronous reset.
6486 *
6487 * Input:
6488 *      ha  = adapter block pointer.
6489 */
6490 static void
6491 qla2x00_rst_aen(scsi_qla_host_t *vha)
6492 {
6493         if (vha->flags.online && !vha->flags.reset_active &&
6494             !atomic_read(&vha->loop_down_timer) &&
6495             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
6496                 do {
6497                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6498
6499                         /*
6500                          * Issue marker command only when we are going to start
6501                          * the I/O.
6502                          */
6503                         vha->marker_needed = 1;
6504                 } while (!atomic_read(&vha->loop_down_timer) &&
6505                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
6506         }
6507 }
6508
6509 /**************************************************************************
6510 *   qla2x00_timer
6511 *
6512 * Description:
6513 *   One second timer
6514 *
6515 * Context: Interrupt
6516 ***************************************************************************/
6517 void
6518 qla2x00_timer(struct timer_list *t)
6519 {
6520         scsi_qla_host_t *vha = from_timer(vha, t, timer);
6521         unsigned long   cpu_flags = 0;
6522         int             start_dpc = 0;
6523         int             index;
6524         srb_t           *sp;
6525         uint16_t        w;
6526         struct qla_hw_data *ha = vha->hw;
6527         struct req_que *req;
6528
6529         if (ha->flags.eeh_busy) {
6530                 ql_dbg(ql_dbg_timer, vha, 0x6000,
6531                     "EEH = %d, restarting timer.\n",
6532                     ha->flags.eeh_busy);
6533                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
6534                 return;
6535         }
6536
6537         /*
6538          * Hardware read to raise pending EEH errors during mailbox waits. If
6539          * the read returns -1 then disable the board.
6540          */
6541         if (!pci_channel_offline(ha->pdev)) {
6542                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
6543                 qla2x00_check_reg16_for_disconnect(vha, w);
6544         }
6545
6546         /* Make sure qla82xx_watchdog is run only for physical port */
6547         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
6548                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
6549                         start_dpc++;
6550                 if (IS_QLA82XX(ha))
6551                         qla82xx_watchdog(vha);
6552                 else if (IS_QLA8044(ha))
6553                         qla8044_watchdog(vha);
6554         }
6555
6556         if (!vha->vp_idx && IS_QLAFX00(ha))
6557                 qlafx00_timer_routine(vha);
6558
6559         /* Loop down handler. */
6560         if (atomic_read(&vha->loop_down_timer) > 0 &&
6561             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
6562             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
6563                 && vha->flags.online) {
6564
6565                 if (atomic_read(&vha->loop_down_timer) ==
6566                     vha->loop_down_abort_time) {
6567
6568                         ql_log(ql_log_info, vha, 0x6008,
6569                             "Loop down - aborting the queues before time expires.\n");
6570
6571                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
6572                                 atomic_set(&vha->loop_state, LOOP_DEAD);
6573
6574                         /*
6575                          * Schedule an ISP abort to return any FCP2-device
6576                          * commands.
6577                          */
6578                         /* NPIV - scan physical port only */
6579                         if (!vha->vp_idx) {
6580                                 spin_lock_irqsave(&ha->hardware_lock,
6581                                     cpu_flags);
6582                                 req = ha->req_q_map[0];
6583                                 for (index = 1;
6584                                     index < req->num_outstanding_cmds;
6585                                     index++) {
6586                                         fc_port_t *sfcp;
6587
6588                                         sp = req->outstanding_cmds[index];
6589                                         if (!sp)
6590                                                 continue;
6591                                         if (sp->cmd_type != TYPE_SRB)
6592                                                 continue;
6593                                         if (sp->type != SRB_SCSI_CMD)
6594                                                 continue;
6595                                         sfcp = sp->fcport;
6596                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
6597                                                 continue;
6598
6599                                         if (IS_QLA82XX(ha))
6600                                                 set_bit(FCOE_CTX_RESET_NEEDED,
6601                                                         &vha->dpc_flags);
6602                                         else
6603                                                 set_bit(ISP_ABORT_NEEDED,
6604                                                         &vha->dpc_flags);
6605                                         break;
6606                                 }
6607                                 spin_unlock_irqrestore(&ha->hardware_lock,
6608                                                                 cpu_flags);
6609                         }
6610                         start_dpc++;
6611                 }
6612
6613                 /* if the loop has been down for 4 minutes, reinit adapter */
6614                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
6615                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
6616                                 ql_log(ql_log_warn, vha, 0x6009,
6617                                     "Loop down - aborting ISP.\n");
6618
6619                                 if (IS_QLA82XX(ha))
6620                                         set_bit(FCOE_CTX_RESET_NEEDED,
6621                                                 &vha->dpc_flags);
6622                                 else
6623                                         set_bit(ISP_ABORT_NEEDED,
6624                                                 &vha->dpc_flags);
6625                         }
6626                 }
6627                 ql_dbg(ql_dbg_timer, vha, 0x600a,
6628                     "Loop down - seconds remaining %d.\n",
6629                     atomic_read(&vha->loop_down_timer));
6630         }
6631         /* Check if beacon LED needs to be blinked for physical host only */
6632         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
6633                 /* There is no beacon_blink function for ISP82xx */
6634                 if (!IS_P3P_TYPE(ha)) {
6635                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
6636                         start_dpc++;
6637                 }
6638         }
6639
6640         /* Process any deferred work. */
6641         if (!list_empty(&vha->work_list)) {
6642                 unsigned long flags;
6643                 bool q = false;
6644
6645                 spin_lock_irqsave(&vha->work_lock, flags);
6646                 if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
6647                         q = true;
6648                 spin_unlock_irqrestore(&vha->work_lock, flags);
6649                 if (q)
6650                         queue_work(vha->hw->wq, &vha->iocb_work);
6651         }
6652
6653         /*
6654          * FC-NVME
6655          * see if the active AEN count has changed from what was last reported.
6656          */
6657         if (!vha->vp_idx &&
6658             (atomic_read(&ha->nvme_active_aen_cnt) != ha->nvme_last_rptd_aen) &&
6659             ha->zio_mode == QLA_ZIO_MODE_6 &&
6660             !ha->flags.host_shutting_down) {
6661                 ql_log(ql_log_info, vha, 0x3002,
6662                     "nvme: Sched: Set ZIO exchange threshold to %d.\n",
6663                     ha->nvme_last_rptd_aen);
6664                 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
6665                 set_bit(SET_NVME_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6666                 start_dpc++;
6667         }
6668
6669         if (!vha->vp_idx &&
6670             (atomic_read(&ha->zio_threshold) != ha->last_zio_threshold) &&
6671             (ha->zio_mode == QLA_ZIO_MODE_6) &&
6672             (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
6673                 ql_log(ql_log_info, vha, 0x3002,
6674                     "Sched: Set ZIO exchange threshold to %d.\n",
6675                     ha->last_zio_threshold);
6676                 ha->last_zio_threshold = atomic_read(&ha->zio_threshold);
6677                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6678                 start_dpc++;
6679         }
6680
6681         /* Schedule the DPC routine if needed */
6682         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
6683             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
6684             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
6685             start_dpc ||
6686             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
6687             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
6688             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
6689             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
6690             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
6691             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
6692                 ql_dbg(ql_dbg_timer, vha, 0x600b,
6693                     "isp_abort_needed=%d loop_resync_needed=%d "
6694                     "fcport_update_needed=%d start_dpc=%d "
6695                     "reset_marker_needed=%d",
6696                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
6697                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
6698                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
6699                     start_dpc,
6700                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
6701                 ql_dbg(ql_dbg_timer, vha, 0x600c,
6702                     "beacon_blink_needed=%d isp_unrecoverable=%d "
6703                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
6704                     "relogin_needed=%d.\n",
6705                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
6706                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
6707                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
6708                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
6709                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
6710                 qla2xxx_wake_dpc(vha);
6711         }
6712
6713         qla2x00_restart_timer(vha, WATCH_INTERVAL);
6714 }
6715
6716 /* Firmware interface routines. */
6717
6718 #define FW_ISP21XX      0
6719 #define FW_ISP22XX      1
6720 #define FW_ISP2300      2
6721 #define FW_ISP2322      3
6722 #define FW_ISP24XX      4
6723 #define FW_ISP25XX      5
6724 #define FW_ISP81XX      6
6725 #define FW_ISP82XX      7
6726 #define FW_ISP2031      8
6727 #define FW_ISP8031      9
6728 #define FW_ISP27XX      10
6729 #define FW_ISP28XX      11
6730
6731 #define FW_FILE_ISP21XX "ql2100_fw.bin"
6732 #define FW_FILE_ISP22XX "ql2200_fw.bin"
6733 #define FW_FILE_ISP2300 "ql2300_fw.bin"
6734 #define FW_FILE_ISP2322 "ql2322_fw.bin"
6735 #define FW_FILE_ISP24XX "ql2400_fw.bin"
6736 #define FW_FILE_ISP25XX "ql2500_fw.bin"
6737 #define FW_FILE_ISP81XX "ql8100_fw.bin"
6738 #define FW_FILE_ISP82XX "ql8200_fw.bin"
6739 #define FW_FILE_ISP2031 "ql2600_fw.bin"
6740 #define FW_FILE_ISP8031 "ql8300_fw.bin"
6741 #define FW_FILE_ISP27XX "ql2700_fw.bin"
6742 #define FW_FILE_ISP28XX "ql2800_fw.bin"
6743
6744
6745 static DEFINE_MUTEX(qla_fw_lock);
6746
6747 static struct fw_blob qla_fw_blobs[] = {
6748         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
6749         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
6750         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
6751         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
6752         { .name = FW_FILE_ISP24XX, },
6753         { .name = FW_FILE_ISP25XX, },
6754         { .name = FW_FILE_ISP81XX, },
6755         { .name = FW_FILE_ISP82XX, },
6756         { .name = FW_FILE_ISP2031, },
6757         { .name = FW_FILE_ISP8031, },
6758         { .name = FW_FILE_ISP27XX, },
6759         { .name = FW_FILE_ISP28XX, },
6760         { .name = NULL, },
6761 };
6762
6763 struct fw_blob *
6764 qla2x00_request_firmware(scsi_qla_host_t *vha)
6765 {
6766         struct qla_hw_data *ha = vha->hw;
6767         struct fw_blob *blob;
6768
6769         if (IS_QLA2100(ha)) {
6770                 blob = &qla_fw_blobs[FW_ISP21XX];
6771         } else if (IS_QLA2200(ha)) {
6772                 blob = &qla_fw_blobs[FW_ISP22XX];
6773         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
6774                 blob = &qla_fw_blobs[FW_ISP2300];
6775         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
6776                 blob = &qla_fw_blobs[FW_ISP2322];
6777         } else if (IS_QLA24XX_TYPE(ha)) {
6778                 blob = &qla_fw_blobs[FW_ISP24XX];
6779         } else if (IS_QLA25XX(ha)) {
6780                 blob = &qla_fw_blobs[FW_ISP25XX];
6781         } else if (IS_QLA81XX(ha)) {
6782                 blob = &qla_fw_blobs[FW_ISP81XX];
6783         } else if (IS_QLA82XX(ha)) {
6784                 blob = &qla_fw_blobs[FW_ISP82XX];
6785         } else if (IS_QLA2031(ha)) {
6786                 blob = &qla_fw_blobs[FW_ISP2031];
6787         } else if (IS_QLA8031(ha)) {
6788                 blob = &qla_fw_blobs[FW_ISP8031];
6789         } else if (IS_QLA27XX(ha)) {
6790                 blob = &qla_fw_blobs[FW_ISP27XX];
6791         } else if (IS_QLA28XX(ha)) {
6792                 blob = &qla_fw_blobs[FW_ISP28XX];
6793         } else {
6794                 return NULL;
6795         }
6796
6797         if (!blob->name)
6798                 return NULL;
6799
6800         mutex_lock(&qla_fw_lock);
6801         if (blob->fw)
6802                 goto out;
6803
6804         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
6805                 ql_log(ql_log_warn, vha, 0x0063,
6806                     "Failed to load firmware image (%s).\n", blob->name);
6807                 blob->fw = NULL;
6808                 blob = NULL;
6809         }
6810
6811 out:
6812         mutex_unlock(&qla_fw_lock);
6813         return blob;
6814 }
6815
6816 static void
6817 qla2x00_release_firmware(void)
6818 {
6819         struct fw_blob *blob;
6820
6821         mutex_lock(&qla_fw_lock);
6822         for (blob = qla_fw_blobs; blob->name; blob++)
6823                 release_firmware(blob->fw);
6824         mutex_unlock(&qla_fw_lock);
6825 }
6826
6827 static void qla_pci_error_cleanup(scsi_qla_host_t *vha)
6828 {
6829         struct qla_hw_data *ha = vha->hw;
6830         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
6831         struct qla_qpair *qpair = NULL;
6832         struct scsi_qla_host *vp;
6833         fc_port_t *fcport;
6834         int i;
6835         unsigned long flags;
6836
6837         ha->chip_reset++;
6838
6839         ha->base_qpair->chip_reset = ha->chip_reset;
6840         for (i = 0; i < ha->max_qpairs; i++) {
6841                 if (ha->queue_pair_map[i])
6842                         ha->queue_pair_map[i]->chip_reset =
6843                             ha->base_qpair->chip_reset;
6844         }
6845
6846         /* purge MBox commands */
6847         if (atomic_read(&ha->num_pend_mbx_stage3)) {
6848                 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
6849                 complete(&ha->mbx_intr_comp);
6850         }
6851
6852         i = 0;
6853
6854         while (atomic_read(&ha->num_pend_mbx_stage3) ||
6855             atomic_read(&ha->num_pend_mbx_stage2) ||
6856             atomic_read(&ha->num_pend_mbx_stage1)) {
6857                 msleep(20);
6858                 i++;
6859                 if (i > 50)
6860                         break;
6861         }
6862
6863         ha->flags.purge_mbox = 0;
6864
6865         mutex_lock(&ha->mq_lock);
6866         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
6867                 qpair->online = 0;
6868         mutex_unlock(&ha->mq_lock);
6869
6870         qla2x00_mark_all_devices_lost(vha, 0);
6871
6872         spin_lock_irqsave(&ha->vport_slock, flags);
6873         list_for_each_entry(vp, &ha->vp_list, list) {
6874                 atomic_inc(&vp->vref_count);
6875                 spin_unlock_irqrestore(&ha->vport_slock, flags);
6876                 qla2x00_mark_all_devices_lost(vp, 0);
6877                 spin_lock_irqsave(&ha->vport_slock, flags);
6878                 atomic_dec(&vp->vref_count);
6879         }
6880         spin_unlock_irqrestore(&ha->vport_slock, flags);
6881
6882         /* Clear all async request states across all VPs. */
6883         list_for_each_entry(fcport, &vha->vp_fcports, list)
6884                 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6885
6886         spin_lock_irqsave(&ha->vport_slock, flags);
6887         list_for_each_entry(vp, &ha->vp_list, list) {
6888                 atomic_inc(&vp->vref_count);
6889                 spin_unlock_irqrestore(&ha->vport_slock, flags);
6890                 list_for_each_entry(fcport, &vp->vp_fcports, list)
6891                         fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6892                 spin_lock_irqsave(&ha->vport_slock, flags);
6893                 atomic_dec(&vp->vref_count);
6894         }
6895         spin_unlock_irqrestore(&ha->vport_slock, flags);
6896 }
6897
6898
6899 static pci_ers_result_t
6900 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
6901 {
6902         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
6903         struct qla_hw_data *ha = vha->hw;
6904
6905         ql_dbg(ql_dbg_aer, vha, 0x9000,
6906             "PCI error detected, state %x.\n", state);
6907
6908         if (!atomic_read(&pdev->enable_cnt)) {
6909                 ql_log(ql_log_info, vha, 0xffff,
6910                         "PCI device is disabled,state %x\n", state);
6911                 return PCI_ERS_RESULT_NEED_RESET;
6912         }
6913
6914         switch (state) {
6915         case pci_channel_io_normal:
6916                 ha->flags.eeh_busy = 0;
6917                 if (ql2xmqsupport || ql2xnvmeenable) {
6918                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6919                         qla2xxx_wake_dpc(vha);
6920                 }
6921                 return PCI_ERS_RESULT_CAN_RECOVER;
6922         case pci_channel_io_frozen:
6923                 ha->flags.eeh_busy = 1;
6924                 qla_pci_error_cleanup(vha);
6925                 return PCI_ERS_RESULT_NEED_RESET;
6926         case pci_channel_io_perm_failure:
6927                 ha->flags.pci_channel_io_perm_failure = 1;
6928                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
6929                 if (ql2xmqsupport || ql2xnvmeenable) {
6930                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6931                         qla2xxx_wake_dpc(vha);
6932                 }
6933                 return PCI_ERS_RESULT_DISCONNECT;
6934         }
6935         return PCI_ERS_RESULT_NEED_RESET;
6936 }
6937
6938 static pci_ers_result_t
6939 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
6940 {
6941         int risc_paused = 0;
6942         uint32_t stat;
6943         unsigned long flags;
6944         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6945         struct qla_hw_data *ha = base_vha->hw;
6946         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6947         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
6948
6949         if (IS_QLA82XX(ha))
6950                 return PCI_ERS_RESULT_RECOVERED;
6951
6952         spin_lock_irqsave(&ha->hardware_lock, flags);
6953         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
6954                 stat = RD_REG_DWORD(&reg->hccr);
6955                 if (stat & HCCR_RISC_PAUSE)
6956                         risc_paused = 1;
6957         } else if (IS_QLA23XX(ha)) {
6958                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
6959                 if (stat & HSR_RISC_PAUSED)
6960                         risc_paused = 1;
6961         } else if (IS_FWI2_CAPABLE(ha)) {
6962                 stat = RD_REG_DWORD(&reg24->host_status);
6963                 if (stat & HSRX_RISC_PAUSED)
6964                         risc_paused = 1;
6965         }
6966         spin_unlock_irqrestore(&ha->hardware_lock, flags);
6967
6968         if (risc_paused) {
6969                 ql_log(ql_log_info, base_vha, 0x9003,
6970                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
6971                 ha->isp_ops->fw_dump(base_vha, 0);
6972
6973                 return PCI_ERS_RESULT_NEED_RESET;
6974         } else
6975                 return PCI_ERS_RESULT_RECOVERED;
6976 }
6977
6978 static pci_ers_result_t
6979 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
6980 {
6981         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
6982         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6983         struct qla_hw_data *ha = base_vha->hw;
6984         int rc;
6985         struct qla_qpair *qpair = NULL;
6986
6987         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
6988             "Slot Reset.\n");
6989
6990         /* Workaround: qla2xxx driver which access hardware earlier
6991          * needs error state to be pci_channel_io_online.
6992          * Otherwise mailbox command timesout.
6993          */
6994         pdev->error_state = pci_channel_io_normal;
6995
6996         pci_restore_state(pdev);
6997
6998         /* pci_restore_state() clears the saved_state flag of the device
6999          * save restored state which resets saved_state flag
7000          */
7001         pci_save_state(pdev);
7002
7003         if (ha->mem_only)
7004                 rc = pci_enable_device_mem(pdev);
7005         else
7006                 rc = pci_enable_device(pdev);
7007
7008         if (rc) {
7009                 ql_log(ql_log_warn, base_vha, 0x9005,
7010                     "Can't re-enable PCI device after reset.\n");
7011                 goto exit_slot_reset;
7012         }
7013
7014
7015         if (ha->isp_ops->pci_config(base_vha))
7016                 goto exit_slot_reset;
7017
7018         mutex_lock(&ha->mq_lock);
7019         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7020                 qpair->online = 1;
7021         mutex_unlock(&ha->mq_lock);
7022
7023         base_vha->flags.online = 1;
7024         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7025         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
7026                 ret =  PCI_ERS_RESULT_RECOVERED;
7027         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7028
7029
7030 exit_slot_reset:
7031         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
7032             "slot_reset return %x.\n", ret);
7033
7034         return ret;
7035 }
7036
7037 static void
7038 qla2xxx_pci_resume(struct pci_dev *pdev)
7039 {
7040         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7041         struct qla_hw_data *ha = base_vha->hw;
7042         int ret;
7043
7044         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
7045             "pci_resume.\n");
7046
7047         ha->flags.eeh_busy = 0;
7048
7049         ret = qla2x00_wait_for_hba_online(base_vha);
7050         if (ret != QLA_SUCCESS) {
7051                 ql_log(ql_log_fatal, base_vha, 0x9002,
7052                     "The device failed to resume I/O from slot/link_reset.\n");
7053         }
7054 }
7055
7056 static void
7057 qla_pci_reset_prepare(struct pci_dev *pdev)
7058 {
7059         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7060         struct qla_hw_data *ha = base_vha->hw;
7061         struct qla_qpair *qpair;
7062
7063         ql_log(ql_log_warn, base_vha, 0xffff,
7064             "%s.\n", __func__);
7065
7066         /*
7067          * PCI FLR/function reset is about to reset the
7068          * slot. Stop the chip to stop all DMA access.
7069          * It is assumed that pci_reset_done will be called
7070          * after FLR to resume Chip operation.
7071          */
7072         ha->flags.eeh_busy = 1;
7073         mutex_lock(&ha->mq_lock);
7074         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7075                 qpair->online = 0;
7076         mutex_unlock(&ha->mq_lock);
7077
7078         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7079         qla2x00_abort_isp_cleanup(base_vha);
7080         qla2x00_abort_all_cmds(base_vha, DID_RESET << 16);
7081 }
7082
7083 static void
7084 qla_pci_reset_done(struct pci_dev *pdev)
7085 {
7086         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7087         struct qla_hw_data *ha = base_vha->hw;
7088         struct qla_qpair *qpair;
7089
7090         ql_log(ql_log_warn, base_vha, 0xffff,
7091             "%s.\n", __func__);
7092
7093         /*
7094          * FLR just completed by PCI layer. Resume adapter
7095          */
7096         ha->flags.eeh_busy = 0;
7097         mutex_lock(&ha->mq_lock);
7098         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7099                 qpair->online = 1;
7100         mutex_unlock(&ha->mq_lock);
7101
7102         base_vha->flags.online = 1;
7103         ha->isp_ops->abort_isp(base_vha);
7104         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7105 }
7106
7107 static int qla2xxx_map_queues(struct Scsi_Host *shost)
7108 {
7109         int rc;
7110         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
7111         struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT];
7112
7113         if (USER_CTRL_IRQ(vha->hw) || !vha->hw->mqiobase)
7114                 rc = blk_mq_map_queues(qmap);
7115         else
7116                 rc = blk_mq_pci_map_queues(qmap, vha->hw->pdev, vha->irq_offset);
7117         return rc;
7118 }
7119
7120 struct scsi_host_template qla2xxx_driver_template = {
7121         .module                 = THIS_MODULE,
7122         .name                   = QLA2XXX_DRIVER_NAME,
7123         .queuecommand           = qla2xxx_queuecommand,
7124
7125         .eh_timed_out           = fc_eh_timed_out,
7126         .eh_abort_handler       = qla2xxx_eh_abort,
7127         .eh_device_reset_handler = qla2xxx_eh_device_reset,
7128         .eh_target_reset_handler = qla2xxx_eh_target_reset,
7129         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
7130         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
7131
7132         .slave_configure        = qla2xxx_slave_configure,
7133
7134         .slave_alloc            = qla2xxx_slave_alloc,
7135         .slave_destroy          = qla2xxx_slave_destroy,
7136         .scan_finished          = qla2xxx_scan_finished,
7137         .scan_start             = qla2xxx_scan_start,
7138         .change_queue_depth     = scsi_change_queue_depth,
7139         .map_queues             = qla2xxx_map_queues,
7140         .this_id                = -1,
7141         .cmd_per_lun            = 3,
7142         .sg_tablesize           = SG_ALL,
7143
7144         .max_sectors            = 0xFFFF,
7145         .shost_attrs            = qla2x00_host_attrs,
7146
7147         .supported_mode         = MODE_INITIATOR,
7148         .track_queue_depth      = 1,
7149         .cmd_size               = sizeof(srb_t),
7150 };
7151
7152 static const struct pci_error_handlers qla2xxx_err_handler = {
7153         .error_detected = qla2xxx_pci_error_detected,
7154         .mmio_enabled = qla2xxx_pci_mmio_enabled,
7155         .slot_reset = qla2xxx_pci_slot_reset,
7156         .resume = qla2xxx_pci_resume,
7157         .reset_prepare = qla_pci_reset_prepare,
7158         .reset_done = qla_pci_reset_done,
7159 };
7160
7161 static struct pci_device_id qla2xxx_pci_tbl[] = {
7162         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
7163         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
7164         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
7165         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
7166         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
7167         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
7168         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
7169         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
7170         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
7171         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
7172         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
7173         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
7174         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
7175         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
7176         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
7177         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
7178         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
7179         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
7180         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
7181         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
7182         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
7183         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
7184         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2061) },
7185         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2081) },
7186         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2281) },
7187         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2089) },
7188         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2289) },
7189         { 0 },
7190 };
7191 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
7192
7193 static struct pci_driver qla2xxx_pci_driver = {
7194         .name           = QLA2XXX_DRIVER_NAME,
7195         .driver         = {
7196                 .owner          = THIS_MODULE,
7197         },
7198         .id_table       = qla2xxx_pci_tbl,
7199         .probe          = qla2x00_probe_one,
7200         .remove         = qla2x00_remove_one,
7201         .shutdown       = qla2x00_shutdown,
7202         .err_handler    = &qla2xxx_err_handler,
7203 };
7204
7205 static const struct file_operations apidev_fops = {
7206         .owner = THIS_MODULE,
7207         .llseek = noop_llseek,
7208 };
7209
7210 /**
7211  * qla2x00_module_init - Module initialization.
7212  **/
7213 static int __init
7214 qla2x00_module_init(void)
7215 {
7216         int ret = 0;
7217
7218         BUILD_BUG_ON(sizeof(cmd_entry_t) != 64);
7219         BUILD_BUG_ON(sizeof(cont_a64_entry_t) != 64);
7220         BUILD_BUG_ON(sizeof(cont_entry_t) != 64);
7221         BUILD_BUG_ON(sizeof(init_cb_t) != 96);
7222         BUILD_BUG_ON(sizeof(ms_iocb_entry_t) != 64);
7223         BUILD_BUG_ON(sizeof(request_t) != 64);
7224         BUILD_BUG_ON(sizeof(struct access_chip_84xx) != 64);
7225         BUILD_BUG_ON(sizeof(struct cmd_bidir) != 64);
7226         BUILD_BUG_ON(sizeof(struct cmd_nvme) != 64);
7227         BUILD_BUG_ON(sizeof(struct cmd_type_6) != 64);
7228         BUILD_BUG_ON(sizeof(struct cmd_type_7) != 64);
7229         BUILD_BUG_ON(sizeof(struct cmd_type_7_fx00) != 64);
7230         BUILD_BUG_ON(sizeof(struct cmd_type_crc_2) != 64);
7231         BUILD_BUG_ON(sizeof(struct ct_entry_24xx) != 64);
7232         BUILD_BUG_ON(sizeof(struct ctio_crc2_to_fw) != 64);
7233         BUILD_BUG_ON(sizeof(struct els_entry_24xx) != 64);
7234         BUILD_BUG_ON(sizeof(struct fxdisc_entry_fx00) != 64);
7235         BUILD_BUG_ON(sizeof(struct init_cb_24xx) != 128);
7236         BUILD_BUG_ON(sizeof(struct init_cb_81xx) != 128);
7237         BUILD_BUG_ON(sizeof(struct pt_ls4_request) != 64);
7238         BUILD_BUG_ON(sizeof(struct sns_cmd_pkt) != 2064);
7239         BUILD_BUG_ON(sizeof(struct verify_chip_entry_84xx) != 64);
7240         BUILD_BUG_ON(sizeof(struct vf_evfp_entry_24xx) != 56);
7241
7242         /* Allocate cache for SRBs. */
7243         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
7244             SLAB_HWCACHE_ALIGN, NULL);
7245         if (srb_cachep == NULL) {
7246                 ql_log(ql_log_fatal, NULL, 0x0001,
7247                     "Unable to allocate SRB cache...Failing load!.\n");
7248                 return -ENOMEM;
7249         }
7250
7251         /* Initialize target kmem_cache and mem_pools */
7252         ret = qlt_init();
7253         if (ret < 0) {
7254                 goto destroy_cache;
7255         } else if (ret > 0) {
7256                 /*
7257                  * If initiator mode is explictly disabled by qlt_init(),
7258                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
7259                  * performing scsi_scan_target() during LOOP UP event.
7260                  */
7261                 qla2xxx_transport_functions.disable_target_scan = 1;
7262                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
7263         }
7264
7265         /* Derive version string. */
7266         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
7267         if (ql2xextended_error_logging)
7268                 strcat(qla2x00_version_str, "-debug");
7269         if (ql2xextended_error_logging == 1)
7270                 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
7271
7272         if (ql2x_ini_mode == QLA2XXX_INI_MODE_DUAL)
7273                 qla_insert_tgt_attrs();
7274
7275         qla2xxx_transport_template =
7276             fc_attach_transport(&qla2xxx_transport_functions);
7277         if (!qla2xxx_transport_template) {
7278                 ql_log(ql_log_fatal, NULL, 0x0002,
7279                     "fc_attach_transport failed...Failing load!.\n");
7280                 ret = -ENODEV;
7281                 goto qlt_exit;
7282         }
7283
7284         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
7285         if (apidev_major < 0) {
7286                 ql_log(ql_log_fatal, NULL, 0x0003,
7287                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
7288         }
7289
7290         qla2xxx_transport_vport_template =
7291             fc_attach_transport(&qla2xxx_transport_vport_functions);
7292         if (!qla2xxx_transport_vport_template) {
7293                 ql_log(ql_log_fatal, NULL, 0x0004,
7294                     "fc_attach_transport vport failed...Failing load!.\n");
7295                 ret = -ENODEV;
7296                 goto unreg_chrdev;
7297         }
7298         ql_log(ql_log_info, NULL, 0x0005,
7299             "QLogic Fibre Channel HBA Driver: %s.\n",
7300             qla2x00_version_str);
7301         ret = pci_register_driver(&qla2xxx_pci_driver);
7302         if (ret) {
7303                 ql_log(ql_log_fatal, NULL, 0x0006,
7304                     "pci_register_driver failed...ret=%d Failing load!.\n",
7305                     ret);
7306                 goto release_vport_transport;
7307         }
7308         return ret;
7309
7310 release_vport_transport:
7311         fc_release_transport(qla2xxx_transport_vport_template);
7312
7313 unreg_chrdev:
7314         if (apidev_major >= 0)
7315                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7316         fc_release_transport(qla2xxx_transport_template);
7317
7318 qlt_exit:
7319         qlt_exit();
7320
7321 destroy_cache:
7322         kmem_cache_destroy(srb_cachep);
7323         return ret;
7324 }
7325
7326 /**
7327  * qla2x00_module_exit - Module cleanup.
7328  **/
7329 static void __exit
7330 qla2x00_module_exit(void)
7331 {
7332         pci_unregister_driver(&qla2xxx_pci_driver);
7333         qla2x00_release_firmware();
7334         kmem_cache_destroy(ctx_cachep);
7335         fc_release_transport(qla2xxx_transport_vport_template);
7336         if (apidev_major >= 0)
7337                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7338         fc_release_transport(qla2xxx_transport_template);
7339         qlt_exit();
7340         kmem_cache_destroy(srb_cachep);
7341 }
7342
7343 module_init(qla2x00_module_init);
7344 module_exit(qla2x00_module_exit);
7345
7346 MODULE_AUTHOR("QLogic Corporation");
7347 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
7348 MODULE_LICENSE("GPL");
7349 MODULE_VERSION(QLA2XXX_VERSION);
7350 MODULE_FIRMWARE(FW_FILE_ISP21XX);
7351 MODULE_FIRMWARE(FW_FILE_ISP22XX);
7352 MODULE_FIRMWARE(FW_FILE_ISP2300);
7353 MODULE_FIRMWARE(FW_FILE_ISP2322);
7354 MODULE_FIRMWARE(FW_FILE_ISP24XX);
7355 MODULE_FIRMWARE(FW_FILE_ISP25XX);