drivers/scsi/gdth.c

   1 /************************************************************************
   2  * Linux driver for                                                     *
   3  * ICP vortex GmbH:    GDT ISA/EISA/PCI Disk Array Controllers          *
   4  * Intel Corporation:  Storage RAID Controllers                         *
   5  *                                                                      *
   6  * gdth.c                                                               *
   7  * Copyright (C) 1995-06 ICP vortex GmbH, Achim Leubner                 *
   8  * Copyright (C) 2002-04 Intel Corporation                              *
   9  * Copyright (C) 2003-06 Adaptec Inc.                                   *
  10  * <achim_leubner@adaptec.com>                                          *
  11  *                                                                      *
  12  * Additions/Fixes:                                                     *
  13  * Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com>               *
  14  * Johannes Dinner <johannes_dinner@adaptec.com>                        *
  15  *                                                                      *
  16  * This program is free software; you can redistribute it and/or modify *
  17  * it under the terms of the GNU General Public License as published    *
  18  * by the Free Software Foundation; either version 2 of the License,    *
  19  * or (at your option) any later version.                               *
  20  *                                                                      *
  21  * This program is distributed in the hope that it will be useful,      *
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of       *
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the         *
  24  * GNU General Public License for more details.                         *
  25  *                                                                      *
  26  * You should have received a copy of the GNU General Public License    *
  27  * along with this kernel; if not, write to the Free Software           *
  28  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.            *
  29  *                                                                      *
  30  * Linux kernel 2.6.x supported                                         *
  31  *                                                                      *
  32  ************************************************************************/
  33
  34 /* All GDT Disk Array Controllers are fully supported by this driver.
  35  * This includes the PCI/EISA/ISA SCSI Disk Array Controllers and the
  36  * PCI Fibre Channel Disk Array Controllers. See gdth.h for a complete
  37  * list of all controller types.
  38  *
  39  * If you have one or more GDT3000/3020 EISA controllers with
  40  * controller BIOS disabled, you have to set the IRQ values with the
  41  * command line option "gdth=irq1,irq2,...", where the irq1,irq2,... are
  42  * the IRQ values for the EISA controllers.
  43  *
  44  * After the optional list of IRQ values, other possible
  45  * command line options are:
  46  * disable:Y                    disable driver
  47  * disable:N                    enable driver
  48  * reserve_mode:0               reserve no drives for the raw service
  49  * reserve_mode:1               reserve all not init., removable drives
  50  * reserve_mode:2               reserve all not init. drives
  51  * reserve_list:h,b,t,l,h,b,t,l,...     reserve particular drive(s) with
  52  *                              h- controller no., b- channel no.,
  53  *                              t- target ID, l- LUN
  54  * reverse_scan:Y               reverse scan order for PCI controllers
  55  * reverse_scan:N               scan PCI controllers like BIOS
  56  * max_ids:x                    x - target ID count per channel (1..MAXID)
  57  * rescan:Y                     rescan all channels/IDs
  58  * rescan:N                     use all devices found until now
  59  * virt_ctr:Y                   map every channel to a virtual controller
  60  * virt_ctr:N                   use multi channel support
  61  * hdr_channel:x                x - number of virtual bus for host drives
  62  * shared_access:Y              disable driver reserve/release protocol to
  63  *                              access a shared resource from several nodes,
  64  *                              appropriate controller firmware required
  65  * shared_access:N              enable driver reserve/release protocol
  66  * probe_eisa_isa:Y             scan for EISA/ISA controllers
  67  * probe_eisa_isa:N             do not scan for EISA/ISA controllers
  68  * force_dma32:Y                use only 32 bit DMA mode
  69  * force_dma32:N                use 64 bit DMA mode, if supported
  70  *
  71  * The default values are: "gdth=disable:N,reserve_mode:1,reverse_scan:N,
  72  *                          max_ids:127,rescan:N,virt_ctr:N,hdr_channel:0,
  73  *                          shared_access:Y,probe_eisa_isa:N,force_dma32:N".
  74  * Here is another example: "gdth=reserve_list:0,1,2,0,0,1,3,0,rescan:Y".
  75  *
  76  * When loading the gdth driver as a module, the same options are available.
  77  * You can set the IRQs with "IRQ=...". However, the syntax to specify the
  78  * options changes slightly. You must replace all ',' between options
  79  * with ' ' and all ':' with '=' and you must use
  80  * '1' in place of 'Y' and '0' in place of 'N'.
  81  *
  82  * Default: "modprobe gdth disable=0 reserve_mode=1 reverse_scan=0
  83  *           max_ids=127 rescan=0 virt_ctr=0 hdr_channel=0 shared_access=0
  84  *           probe_eisa_isa=0 force_dma32=0"
  85  * The other example: "modprobe gdth reserve_list=0,1,2,0,0,1,3,0 rescan=1".
  86  */
  87
  88 /* The meaning of the Scsi_Pointer members in this driver is as follows:
  89  * ptr:                     Chaining
  90  * this_residual:           Command priority
  91  * buffer:                  phys. DMA sense buffer
  92  * dma_handle:              phys. DMA buffer (kernel >= 2.4.0)
  93  * buffers_residual:        Timeout value
  94  * Status:                  Command status (gdth_do_cmd()), DMA mem. mappings
  95  * Message:                 Additional info (gdth_do_cmd()), DMA direction
  96  * have_data_in:            Flag for gdth_wait_completion()
  97  * sent_command:            Opcode special command
  98  * phase:                   Service/parameter/return code special command
  99  */
 100
 101
 102 /* interrupt coalescing */
 103 /* #define INT_COAL */
 104
 105 /* statistics */
 106 #define GDTH_STATISTICS
 107
 108 #include <linux/module.h>
 109
 110 #include <linux/version.h>
 111 #include <linux/kernel.h>
 112 #include <linux/types.h>
 113 #include <linux/pci.h>
 114 #include <linux/string.h>
 115 #include <linux/ctype.h>
 116 #include <linux/ioport.h>
 117 #include <linux/delay.h>
 118 #include <linux/interrupt.h>
 119 #include <linux/in.h>
 120 #include <linux/proc_fs.h>
 121 #include <linux/time.h>
 122 #include <linux/timer.h>
 123 #include <linux/dma-mapping.h>
 124
 125 #ifdef GDTH_RTC
 126 #include <linux/mc146818rtc.h>
 127 #endif
 128 #include <linux/reboot.h>
 129
 130 #include <asm/dma.h>
 131 #include <asm/system.h>
 132 #include <asm/io.h>
 133 #include <asm/uaccess.h>
 134 #include <linux/spinlock.h>
 135 #include <linux/blkdev.h>
 136
 137 #include "scsi.h"
 138 #include <scsi/scsi_host.h>
 139 #include "gdth.h"
 140
 141 static void gdth_delay(int milliseconds);
 142 static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs);
 143 static irqreturn_t gdth_interrupt(int irq, void *dev_id);
 144 static int gdth_sync_event(int hanum,int service,unchar index,Scsi_Cmnd *scp);
 145 static int gdth_async_event(int hanum);
 146 static void gdth_log_event(gdth_evt_data *dvr, char *buffer);
 147
 148 static void gdth_putq(int hanum,Scsi_Cmnd *scp,unchar priority);
 149 static void gdth_next(int hanum);
 150 static int gdth_fill_raw_cmd(int hanum,Scsi_Cmnd *scp,unchar b);
 151 static int gdth_special_cmd(int hanum,Scsi_Cmnd *scp);
 152 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
 153                                       ushort idx, gdth_evt_data *evt);
 154 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr);
 155 static void gdth_readapp_event(gdth_ha_str *ha, unchar application,
 156                                gdth_evt_str *estr);
 157 static void gdth_clear_events(void);
 158
 159 static void gdth_copy_internal_data(int hanum,Scsi_Cmnd *scp,
 160                                     char *buffer,ushort count);
 161 static int gdth_internal_cache_cmd(int hanum,Scsi_Cmnd *scp);
 162 static int gdth_fill_cache_cmd(int hanum,Scsi_Cmnd *scp,ushort hdrive);
 163
 164 static void gdth_enable_int(int hanum);
 165 static int gdth_get_status(unchar *pIStatus,int irq);
 166 static int gdth_test_busy(int hanum);
 167 static int gdth_get_cmd_index(int hanum);
 168 static void gdth_release_event(int hanum);
 169 static int gdth_wait(int hanum,int index,ulong32 time);
 170 static int gdth_internal_cmd(int hanum,unchar service,ushort opcode,ulong32 p1,
 171                              ulong64 p2,ulong64 p3);
 172 static int gdth_search_drives(int hanum);
 173 static int gdth_analyse_hdrive(int hanum, ushort hdrive);
 174
 175 static const char *gdth_ctr_name(int hanum);
 176
 177 static int gdth_open(struct inode *inode, struct file *filep);
 178 static int gdth_close(struct inode *inode, struct file *filep);
 179 static int gdth_ioctl(struct inode *inode, struct file *filep,
 180                       unsigned int cmd, unsigned long arg);
 181
 182 static void gdth_flush(int hanum);
 183 static int gdth_halt(struct notifier_block *nb, ulong event, void *buf);
 184 static int gdth_queuecommand(Scsi_Cmnd *scp,void (*done)(Scsi_Cmnd *));
 185 static void gdth_scsi_done(struct scsi_cmnd *scp);
 186 #ifdef CONFIG_ISA
 187 static int gdth_isa_probe_one(struct scsi_host_template *, ulong32);
 188 #endif
 189 #ifdef CONFIG_EISA
 190 static int gdth_eisa_probe_one(struct scsi_host_template *, ushort);
 191 #endif
 192 #ifdef CONFIG_PCI
 193 static int gdth_pci_probe_one(struct scsi_host_template *, gdth_pci_str *, int);
 194 #endif
 195
 196 #ifdef DEBUG_GDTH
 197 static unchar   DebugState = DEBUG_GDTH;
 198
 199 #ifdef __SERIAL__
 200 #define MAX_SERBUF 160
 201 static void ser_init(void);
 202 static void ser_puts(char *str);
 203 static void ser_putc(char c);
 204 static int  ser_printk(const char *fmt, ...);
 205 static char strbuf[MAX_SERBUF+1];
 206 #ifdef __COM2__
 207 #define COM_BASE 0x2f8
 208 #else
 209 #define COM_BASE 0x3f8
 210 #endif
 211 static void ser_init()
 212 {
 213     unsigned port=COM_BASE;
 214
 215     outb(0x80,port+3);
 216     outb(0,port+1);
 217     /* 19200 Baud, if 9600: outb(12,port) */
 218     outb(6, port);
 219     outb(3,port+3);
 220     outb(0,port+1);
 221     /*
 222     ser_putc('I');
 223     ser_putc(' ');
 224     */
 225 }
 226
 227 static void ser_puts(char *str)
 228 {
 229     char *ptr;
 230
 231     ser_init();
 232     for (ptr=str;*ptr;++ptr)
 233         ser_putc(*ptr);
 234 }
 235
 236 static void ser_putc(char c)
 237 {
 238     unsigned port=COM_BASE;
 239
 240     while ((inb(port+5) & 0x20)==0);
 241     outb(c,port);
 242     if (c==0x0a)
 243     {
 244         while ((inb(port+5) & 0x20)==0);
 245         outb(0x0d,port);
 246     }
 247 }
 248
 249 static int ser_printk(const char *fmt, ...)
 250 {
 251     va_list args;
 252     int i;
 253
 254     va_start(args,fmt);
 255     i = vsprintf(strbuf,fmt,args);
 256     ser_puts(strbuf);
 257     va_end(args);
 258     return i;
 259 }
 260
 261 #define TRACE(a)    {if (DebugState==1) {ser_printk a;}}
 262 #define TRACE2(a)   {if (DebugState==1 || DebugState==2) {ser_printk a;}}
 263 #define TRACE3(a)   {if (DebugState!=0) {ser_printk a;}}
 264
 265 #else /* !__SERIAL__ */
 266 #define TRACE(a)    {if (DebugState==1) {printk a;}}
 267 #define TRACE2(a)   {if (DebugState==1 || DebugState==2) {printk a;}}
 268 #define TRACE3(a)   {if (DebugState!=0) {printk a;}}
 269 #endif
 270
 271 #else /* !DEBUG */
 272 #define TRACE(a)
 273 #define TRACE2(a)
 274 #define TRACE3(a)
 275 #endif
 276
 277 #ifdef GDTH_STATISTICS
 278 static ulong32 max_rq=0, max_index=0, max_sg=0;
 279 #ifdef INT_COAL
 280 static ulong32 max_int_coal=0;
 281 #endif
 282 static ulong32 act_ints=0, act_ios=0, act_stats=0, act_rq=0;
 283 static struct timer_list gdth_timer;
 284 #endif
 285
 286 #define PTR2USHORT(a)   (ushort)(ulong)(a)
 287 #define GDTOFFSOF(a,b)  (size_t)&(((a*)0)->b)
 288 #define INDEX_OK(i,t)   ((i)<ARRAY_SIZE(t))
 289
 290 #define NUMDATA(a)      ( (gdth_num_str  *)((a)->hostdata))
 291 #define HADATA(a)       (&((gdth_ext_str *)((a)->hostdata))->haext)
 292 #define CMDDATA(a)      (&((gdth_ext_str *)((a)->hostdata))->cmdext)
 293
 294 #define BUS_L2P(a,b)    ((b)>(a)->virt_bus ? (b-1):(b))
 295
 296 #ifdef CONFIG_ISA
 297 static unchar   gdth_drq_tab[4] = {5,6,7,7};            /* DRQ table */
 298 #endif
 299 #ifdef CONFIG_EISA
 300 static unchar   gdth_irq_tab[6] = {0,10,11,12,14,0};    /* IRQ table */
 301 #endif
 302 static unchar   gdth_polling;                           /* polling if TRUE */
 303 static unchar   gdth_from_wait  = FALSE;                /* gdth_wait() */
 304 static int      wait_index,wait_hanum;                  /* gdth_wait() */
 305 static int      gdth_ctr_count  = 0;                    /* controller count */
 306 static int      gdth_ctr_vcount = 0;                    /* virt. ctr. count */
 307 static int      gdth_ctr_released = 0;                  /* gdth_release() */
 308 static struct Scsi_Host *gdth_ctr_tab[MAXHA];           /* controller table */
 309 static struct Scsi_Host *gdth_ctr_vtab[MAXHA*MAXBUS];   /* virt. ctr. table */
 310 static unchar   gdth_write_through = FALSE;             /* write through */
 311 static gdth_evt_str ebuffer[MAX_EVENTS];                /* event buffer */
 312 static int elastidx;
 313 static int eoldidx;
 314 static int major;
 315
 316 #define DIN     1                               /* IN data direction */
 317 #define DOU     2                               /* OUT data direction */
 318 #define DNO     DIN                             /* no data transfer */
 319 #define DUN     DIN                             /* unknown data direction */
 320 static unchar gdth_direction_tab[0x100] = {
 321     DNO,DNO,DIN,DIN,DOU,DIN,DIN,DOU,DIN,DUN,DOU,DOU,DUN,DUN,DUN,DIN,
 322     DNO,DIN,DIN,DOU,DIN,DOU,DNO,DNO,DOU,DNO,DIN,DNO,DIN,DOU,DNO,DUN,
 323     DIN,DUN,DIN,DUN,DOU,DIN,DUN,DUN,DIN,DIN,DOU,DNO,DUN,DIN,DOU,DOU,
 324     DOU,DOU,DOU,DNO,DIN,DNO,DNO,DIN,DOU,DOU,DOU,DOU,DIN,DOU,DIN,DOU,
 325     DOU,DOU,DIN,DIN,DIN,DNO,DUN,DNO,DNO,DNO,DUN,DNO,DOU,DIN,DUN,DUN,
 326     DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DIN,DUN,DUN,DUN,DUN,DUN,
 327     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 328     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 329     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
 330     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,
 331     DUN,DUN,DUN,DUN,DUN,DNO,DNO,DUN,DIN,DNO,DOU,DUN,DNO,DUN,DOU,DOU,
 332     DOU,DOU,DOU,DNO,DUN,DIN,DOU,DIN,DIN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 333     DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 334     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 335     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
 336     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN
 337 };
 338
 339 /* LILO and modprobe/insmod parameters */
 340 /* IRQ list for GDT3000/3020 EISA controllers */
 341 static int irq[MAXHA] __initdata =
 342 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 343  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
 344 /* disable driver flag */
 345 static int disable __initdata = 0;
 346 /* reserve flag */
 347 static int reserve_mode = 1;
 348 /* reserve list */
 349 static int reserve_list[MAX_RES_ARGS] =
 350 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 351  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 352  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
 353 /* scan order for PCI controllers */
 354 static int reverse_scan = 0;
 355 /* virtual channel for the host drives */
 356 static int hdr_channel = 0;
 357 /* max. IDs per channel */
 358 static int max_ids = MAXID;
 359 /* rescan all IDs */
 360 static int rescan = 0;
 361 /* map channels to virtual controllers */
 362 static int virt_ctr = 0;
 363 /* shared access */
 364 static int shared_access = 1;
 365 /* enable support for EISA and ISA controllers */
 366 static int probe_eisa_isa = 0;
 367 /* 64 bit DMA mode, support for drives > 2 TB, if force_dma32 = 0 */
 368 static int force_dma32 = 0;
 369
 370 /* parameters for modprobe/insmod */
 371 module_param_array(irq, int, NULL, 0);
 372 module_param(disable, int, 0);
 373 module_param(reserve_mode, int, 0);
 374 module_param_array(reserve_list, int, NULL, 0);
 375 module_param(reverse_scan, int, 0);
 376 module_param(hdr_channel, int, 0);
 377 module_param(max_ids, int, 0);
 378 module_param(rescan, int, 0);
 379 module_param(virt_ctr, int, 0);
 380 module_param(shared_access, int, 0);
 381 module_param(probe_eisa_isa, int, 0);
 382 module_param(force_dma32, int, 0);
 383 MODULE_AUTHOR("Achim Leubner");
 384 MODULE_LICENSE("GPL");
 385
 386 /* ioctl interface */
 387 static const struct file_operations gdth_fops = {
 388     .ioctl   = gdth_ioctl,
 389     .open    = gdth_open,
 390     .release = gdth_close,
 391 };
 392
 393 #define GDTH_MAGIC      0xc2e7c389      /* I got it from /dev/urandom */
 394 #define IS_GDTH_INTERNAL_CMD(scp)       (scp->underflow == GDTH_MAGIC)
 395
 396 #include "gdth_proc.h"
 397 #include "gdth_proc.c"
 398
 399 /* notifier block to get a notify on system shutdown/halt/reboot */
 400 static struct notifier_block gdth_notifier = {
 401     gdth_halt, NULL, 0
 402 };
 403 static int notifier_disabled = 0;
 404
 405 static void gdth_delay(int milliseconds)
 406 {
 407     if (milliseconds == 0) {
 408         udelay(1);
 409     } else {
 410         mdelay(milliseconds);
 411     }
 412 }
 413
 414 static void gdth_scsi_done(struct scsi_cmnd *scp)
 415 {
 416         TRACE2(("gdth_scsi_done()\n"));
 417
 418         if (IS_GDTH_INTERNAL_CMD(scp))
 419                 complete((struct completion *)scp->request);
 420         else
 421                 scp->scsi_done(scp);
 422 }
 423
 424 int __gdth_execute(struct scsi_device *sdev, gdth_cmd_str *gdtcmd, char *cmnd,
 425                    int timeout, u32 *info)
 426 {
 427     Scsi_Cmnd *scp;
 428     DECLARE_COMPLETION_ONSTACK(wait);
 429     int rval;
 430
 431     scp = kzalloc(sizeof(*scp), GFP_KERNEL);
 432     if (!scp)
 433         return -ENOMEM;
 434
 435     scp->device = sdev;
 436     /* use request field to save the ptr. to completion struct. */
 437     scp->request = (struct request *)&wait;
 438     scp->timeout_per_command = timeout*HZ;
 439     scp->request_buffer = gdtcmd;
 440     scp->cmd_len = 12;
 441     memcpy(scp->cmnd, cmnd, 12);
 442     scp->SCp.this_residual = IOCTL_PRI;   /* priority */
 443     scp->underflow = GDTH_MAGIC;
 444     gdth_queuecommand(scp, NULL);
 445     wait_for_completion(&wait);
 446
 447     rval = scp->SCp.Status;
 448     if (info)
 449         *info = scp->SCp.Message;
 450     kfree(scp);
 451     return rval;
 452 }
 453
 454 int gdth_execute(struct Scsi_Host *shost, gdth_cmd_str *gdtcmd, char *cmnd,
 455                  int timeout, u32 *info)
 456 {
 457     struct scsi_device *sdev = scsi_get_host_dev(shost);
 458     int rval = __gdth_execute(sdev, gdtcmd, cmnd, timeout, info);
 459
 460     scsi_free_host_dev(sdev);
 461     return rval;
 462 }
 463
 464 static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs)
 465 {
 466     *cyls = size /HEADS/SECS;
 467     if (*cyls <= MAXCYLS) {
 468         *heads = HEADS;
 469         *secs = SECS;
 470     } else {                                        /* too high for 64*32 */
 471         *cyls = size /MEDHEADS/MEDSECS;
 472         if (*cyls <= MAXCYLS) {
 473             *heads = MEDHEADS;
 474             *secs = MEDSECS;
 475         } else {                                    /* too high for 127*63 */
 476             *cyls = size /BIGHEADS/BIGSECS;
 477             *heads = BIGHEADS;
 478             *secs = BIGSECS;
 479         }
 480     }
 481 }
 482
 483 /* controller search and initialization functions */
 484 #ifdef CONFIG_EISA
 485 static int __init gdth_search_eisa(ushort eisa_adr)
 486 {
 487     ulong32 id;
 488
 489     TRACE(("gdth_search_eisa() adr. %x\n",eisa_adr));
 490     id = inl(eisa_adr+ID0REG);
 491     if (id == GDT3A_ID || id == GDT3B_ID) {     /* GDT3000A or GDT3000B */
 492         if ((inb(eisa_adr+EISAREG) & 8) == 0)
 493             return 0;                           /* not EISA configured */
 494         return 1;
 495     }
 496     if (id == GDT3_ID)                          /* GDT3000 */
 497         return 1;
 498
 499     return 0;
 500 }
 501 #endif /* CONFIG_EISA */
 502
 503 #ifdef CONFIG_ISA
 504 static int __init gdth_search_isa(ulong32 bios_adr)
 505 {
 506     void __iomem *addr;
 507     ulong32 id;
 508
 509     TRACE(("gdth_search_isa() bios adr. %x\n",bios_adr));
 510     if ((addr = ioremap(bios_adr+BIOS_ID_OFFS, sizeof(ulong32))) != NULL) {
 511         id = readl(addr);
 512         iounmap(addr);
 513         if (id == GDT2_ID)                          /* GDT2000 */
 514             return 1;
 515     }
 516     return 0;
 517 }
 518 #endif /* CONFIG_ISA */
 519
 520 #ifdef CONFIG_PCI
 521 static void gdth_search_dev(gdth_pci_str *pcistr, ushort *cnt,
 522                             ushort vendor, ushort dev);
 523
 524 static int __init gdth_search_pci(gdth_pci_str *pcistr)
 525 {
 526     ushort device, cnt;
 527
 528     TRACE(("gdth_search_pci()\n"));
 529
 530     cnt = 0;
 531     for (device = 0; device <= PCI_DEVICE_ID_VORTEX_GDT6555; ++device)
 532         gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX, device);
 533     for (device = PCI_DEVICE_ID_VORTEX_GDT6x17RP;
 534          device <= PCI_DEVICE_ID_VORTEX_GDTMAXRP; ++device)
 535         gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX, device);
 536     gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX,
 537                     PCI_DEVICE_ID_VORTEX_GDTNEWRX);
 538     gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX,
 539                     PCI_DEVICE_ID_VORTEX_GDTNEWRX2);
 540     gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_INTEL,
 541                     PCI_DEVICE_ID_INTEL_SRC);
 542     gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_INTEL,
 543                     PCI_DEVICE_ID_INTEL_SRC_XSCALE);
 544     return cnt;
 545 }
 546
 547 /* Vortex only makes RAID controllers.
 548  * We do not really want to specify all 550 ids here, so wildcard match.
 549  */
 550 static struct pci_device_id gdthtable[] __maybe_unused = {
 551     {PCI_VENDOR_ID_VORTEX,PCI_ANY_ID,PCI_ANY_ID, PCI_ANY_ID},
 552     {PCI_VENDOR_ID_INTEL,PCI_DEVICE_ID_INTEL_SRC,PCI_ANY_ID,PCI_ANY_ID},
 553     {PCI_VENDOR_ID_INTEL,PCI_DEVICE_ID_INTEL_SRC_XSCALE,PCI_ANY_ID,PCI_ANY_ID},
 554     {0}
 555 };
 556 MODULE_DEVICE_TABLE(pci,gdthtable);
 557
 558 static void __init gdth_search_dev(gdth_pci_str *pcistr, ushort *cnt,
 559                                    ushort vendor, ushort device)
 560 {
 561     ulong base0, base1, base2;
 562     struct pci_dev *pdev;
 563
 564     TRACE(("gdth_search_dev() cnt %d vendor %x device %x\n",
 565           *cnt, vendor, device));
 566
 567     pdev = NULL;
 568     while ((pdev = pci_find_device(vendor, device, pdev))
 569            != NULL) {
 570         if (pci_enable_device(pdev))
 571             continue;
 572         if (*cnt >= MAXHA)
 573             return;
 574         /* GDT PCI controller found, resources are already in pdev */
 575         pcistr[*cnt].pdev = pdev;
 576         pcistr[*cnt].irq = pdev->irq;
 577         base0 = pci_resource_flags(pdev, 0);
 578         base1 = pci_resource_flags(pdev, 1);
 579         base2 = pci_resource_flags(pdev, 2);
 580         if (device <= PCI_DEVICE_ID_VORTEX_GDT6000B ||   /* GDT6000/B */
 581             device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP) {  /* MPR */
 582             if (!(base0 & IORESOURCE_MEM))
 583                 continue;
 584             pcistr[*cnt].dpmem = pci_resource_start(pdev, 0);
 585         } else {                                  /* GDT6110, GDT6120, .. */
 586             if (!(base0 & IORESOURCE_MEM) ||
 587                 !(base2 & IORESOURCE_MEM) ||
 588                 !(base1 & IORESOURCE_IO))
 589                 continue;
 590             pcistr[*cnt].dpmem = pci_resource_start(pdev, 2);
 591             pcistr[*cnt].io_mm = pci_resource_start(pdev, 0);
 592             pcistr[*cnt].io    = pci_resource_start(pdev, 1);
 593         }
 594         TRACE2(("Controller found at %d/%d, irq %d, dpmem 0x%lx\n",
 595                 pcistr[*cnt].pdev->bus->number,
 596                 PCI_SLOT(pcistr[*cnt].pdev->devfn),
 597                 pcistr[*cnt].irq, pcistr[*cnt].dpmem));
 598         (*cnt)++;
 599     }
 600 }
 601
 602 static void __init gdth_sort_pci(gdth_pci_str *pcistr, int cnt)
 603 {
 604     gdth_pci_str temp;
 605     int i, changed;
 606
 607     TRACE(("gdth_sort_pci() cnt %d\n",cnt));
 608     if (cnt == 0)
 609         return;
 610
 611     do {
 612         changed = FALSE;
 613         for (i = 0; i < cnt-1; ++i) {
 614             if (!reverse_scan) {
 615                 if ((pcistr[i].pdev->bus->number > pcistr[i+1].pdev->bus->number) ||
 616                     (pcistr[i].pdev->bus->number == pcistr[i+1].pdev->bus->number &&
 617                      PCI_SLOT(pcistr[i].pdev->devfn) >
 618                      PCI_SLOT(pcistr[i+1].pdev->devfn))) {
 619                     temp = pcistr[i];
 620                     pcistr[i] = pcistr[i+1];
 621                     pcistr[i+1] = temp;
 622                     changed = TRUE;
 623                 }
 624             } else {
 625                 if ((pcistr[i].pdev->bus->number < pcistr[i+1].pdev->bus->number) ||
 626                     (pcistr[i].pdev->bus->number == pcistr[i+1].pdev->bus->number &&
 627                      PCI_SLOT(pcistr[i].pdev->devfn) <
 628                      PCI_SLOT(pcistr[i+1].pdev->devfn))) {
 629                     temp = pcistr[i];
 630                     pcistr[i] = pcistr[i+1];
 631                     pcistr[i+1] = temp;
 632                     changed = TRUE;
 633                 }
 634             }
 635         }
 636     } while (changed);
 637 }
 638 #endif /* CONFIG_PCI */
 639
 640 #ifdef CONFIG_EISA
 641 static int __init gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha)
 642 {
 643     ulong32 retries,id;
 644     unchar prot_ver,eisacf,i,irq_found;
 645
 646     TRACE(("gdth_init_eisa() adr. %x\n",eisa_adr));
 647
 648     /* disable board interrupts, deinitialize services */
 649     outb(0xff,eisa_adr+EDOORREG);
 650     outb(0x00,eisa_adr+EDENABREG);
 651     outb(0x00,eisa_adr+EINTENABREG);
 652
 653     outb(0xff,eisa_adr+LDOORREG);
 654     retries = INIT_RETRIES;
 655     gdth_delay(20);
 656     while (inb(eisa_adr+EDOORREG) != 0xff) {
 657         if (--retries == 0) {
 658             printk("GDT-EISA: Initialization error (DEINIT failed)\n");
 659             return 0;
 660         }
 661         gdth_delay(1);
 662         TRACE2(("wait for DEINIT: retries=%d\n",retries));
 663     }
 664     prot_ver = inb(eisa_adr+MAILBOXREG);
 665     outb(0xff,eisa_adr+EDOORREG);
 666     if (prot_ver != PROTOCOL_VERSION) {
 667         printk("GDT-EISA: Illegal protocol version\n");
 668         return 0;
 669     }
 670     ha->bmic = eisa_adr;
 671     ha->brd_phys = (ulong32)eisa_adr >> 12;
 672
 673     outl(0,eisa_adr+MAILBOXREG);
 674     outl(0,eisa_adr+MAILBOXREG+4);
 675     outl(0,eisa_adr+MAILBOXREG+8);
 676     outl(0,eisa_adr+MAILBOXREG+12);
 677
 678     /* detect IRQ */
 679     if ((id = inl(eisa_adr+ID0REG)) == GDT3_ID) {
 680         ha->oem_id = OEM_ID_ICP;
 681         ha->type = GDT_EISA;
 682         ha->stype = id;
 683         outl(1,eisa_adr+MAILBOXREG+8);
 684         outb(0xfe,eisa_adr+LDOORREG);
 685         retries = INIT_RETRIES;
 686         gdth_delay(20);
 687         while (inb(eisa_adr+EDOORREG) != 0xfe) {
 688             if (--retries == 0) {
 689                 printk("GDT-EISA: Initialization error (get IRQ failed)\n");
 690                 return 0;
 691             }
 692             gdth_delay(1);
 693         }
 694         ha->irq = inb(eisa_adr+MAILBOXREG);
 695         outb(0xff,eisa_adr+EDOORREG);
 696         TRACE2(("GDT3000/3020: IRQ=%d\n",ha->irq));
 697         /* check the result */
 698         if (ha->irq == 0) {
 699                 TRACE2(("Unknown IRQ, use IRQ table from cmd line !\n"));
 700                 for (i = 0, irq_found = FALSE;
 701                      i < MAXHA && irq[i] != 0xff; ++i) {
 702                 if (irq[i]==10 || irq[i]==11 || irq[i]==12 || irq[i]==14) {
 703                     irq_found = TRUE;
 704                     break;
 705                 }
 706                 }
 707             if (irq_found) {
 708                 ha->irq = irq[i];
 709                 irq[i] = 0;
 710                 printk("GDT-EISA: Can not detect controller IRQ,\n");
 711                 printk("Use IRQ setting from command line (IRQ = %d)\n",
 712                        ha->irq);
 713             } else {
 714                 printk("GDT-EISA: Initialization error (unknown IRQ), Enable\n");
 715                 printk("the controller BIOS or use command line parameters\n");
 716                 return 0;
 717             }
 718         }
 719     } else {
 720         eisacf = inb(eisa_adr+EISAREG) & 7;
 721         if (eisacf > 4)                         /* level triggered */
 722             eisacf -= 4;
 723         ha->irq = gdth_irq_tab[eisacf];
 724         ha->oem_id = OEM_ID_ICP;
 725         ha->type = GDT_EISA;
 726         ha->stype = id;
 727     }
 728
 729     ha->dma64_support = 0;
 730     return 1;
 731 }
 732 #endif /* CONFIG_EISA */
 733
 734 #ifdef CONFIG_ISA
 735 static int __init gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha)
 736 {
 737     register gdt2_dpram_str __iomem *dp2_ptr;
 738     int i;
 739     unchar irq_drq,prot_ver;
 740     ulong32 retries;
 741
 742     TRACE(("gdth_init_isa() bios adr. %x\n",bios_adr));
 743
 744     ha->brd = ioremap(bios_adr, sizeof(gdt2_dpram_str));
 745     if (ha->brd == NULL) {
 746         printk("GDT-ISA: Initialization error (DPMEM remap error)\n");
 747         return 0;
 748     }
 749     dp2_ptr = ha->brd;
 750     writeb(1, &dp2_ptr->io.memlock); /* switch off write protection */
 751     /* reset interface area */
 752     memset_io(&dp2_ptr->u, 0, sizeof(dp2_ptr->u));
 753     if (readl(&dp2_ptr->u) != 0) {
 754         printk("GDT-ISA: Initialization error (DPMEM write error)\n");
 755         iounmap(ha->brd);
 756         return 0;
 757     }
 758
 759     /* disable board interrupts, read DRQ and IRQ */
 760     writeb(0xff, &dp2_ptr->io.irqdel);
 761     writeb(0x00, &dp2_ptr->io.irqen);
 762     writeb(0x00, &dp2_ptr->u.ic.S_Status);
 763     writeb(0x00, &dp2_ptr->u.ic.Cmd_Index);
 764
 765     irq_drq = readb(&dp2_ptr->io.rq);
 766     for (i=0; i<3; ++i) {
 767         if ((irq_drq & 1)==0)
 768             break;
 769         irq_drq >>= 1;
 770     }
 771     ha->drq = gdth_drq_tab[i];
 772
 773     irq_drq = readb(&dp2_ptr->io.rq) >> 3;
 774     for (i=1; i<5; ++i) {
 775         if ((irq_drq & 1)==0)
 776             break;
 777         irq_drq >>= 1;
 778     }
 779     ha->irq = gdth_irq_tab[i];
 780
 781     /* deinitialize services */
 782     writel(bios_adr, &dp2_ptr->u.ic.S_Info[0]);
 783     writeb(0xff, &dp2_ptr->u.ic.S_Cmd_Indx);
 784     writeb(0, &dp2_ptr->io.event);
 785     retries = INIT_RETRIES;
 786     gdth_delay(20);
 787     while (readb(&dp2_ptr->u.ic.S_Status) != 0xff) {
 788         if (--retries == 0) {
 789             printk("GDT-ISA: Initialization error (DEINIT failed)\n");
 790             iounmap(ha->brd);
 791             return 0;
 792         }
 793         gdth_delay(1);
 794     }
 795     prot_ver = (unchar)readl(&dp2_ptr->u.ic.S_Info[0]);
 796     writeb(0, &dp2_ptr->u.ic.Status);
 797     writeb(0xff, &dp2_ptr->io.irqdel);
 798     if (prot_ver != PROTOCOL_VERSION) {
 799         printk("GDT-ISA: Illegal protocol version\n");
 800         iounmap(ha->brd);
 801         return 0;
 802     }
 803
 804     ha->oem_id = OEM_ID_ICP;
 805     ha->type = GDT_ISA;
 806     ha->ic_all_size = sizeof(dp2_ptr->u);
 807     ha->stype= GDT2_ID;
 808     ha->brd_phys = bios_adr >> 4;
 809
 810     /* special request to controller BIOS */
 811     writel(0x00, &dp2_ptr->u.ic.S_Info[0]);
 812     writel(0x00, &dp2_ptr->u.ic.S_Info[1]);
 813     writel(0x01, &dp2_ptr->u.ic.S_Info[2]);
 814     writel(0x00, &dp2_ptr->u.ic.S_Info[3]);
 815     writeb(0xfe, &dp2_ptr->u.ic.S_Cmd_Indx);
 816     writeb(0, &dp2_ptr->io.event);
 817     retries = INIT_RETRIES;
 818     gdth_delay(20);
 819     while (readb(&dp2_ptr->u.ic.S_Status) != 0xfe) {
 820         if (--retries == 0) {
 821             printk("GDT-ISA: Initialization error\n");
 822             iounmap(ha->brd);
 823             return 0;
 824         }
 825         gdth_delay(1);
 826     }
 827     writeb(0, &dp2_ptr->u.ic.Status);
 828     writeb(0xff, &dp2_ptr->io.irqdel);
 829
 830     ha->dma64_support = 0;
 831     return 1;
 832 }
 833 #endif /* CONFIG_ISA */
 834
 835 #ifdef CONFIG_PCI
 836 static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha)
 837 {
 838     register gdt6_dpram_str __iomem *dp6_ptr;
 839     register gdt6c_dpram_str __iomem *dp6c_ptr;
 840     register gdt6m_dpram_str __iomem *dp6m_ptr;
 841     ulong32 retries;
 842     unchar prot_ver;
 843     ushort command;
 844     int i, found = FALSE;
 845
 846     TRACE(("gdth_init_pci()\n"));
 847
 848     if (pcistr->pdev->vendor == PCI_VENDOR_ID_INTEL)
 849         ha->oem_id = OEM_ID_INTEL;
 850     else
 851         ha->oem_id = OEM_ID_ICP;
 852     ha->brd_phys = (pcistr->pdev->bus->number << 8) | (pcistr->pdev->devfn & 0xf8);
 853     ha->stype = (ulong32)pcistr->pdev->device;
 854     ha->irq = pcistr->irq;
 855     ha->pdev = pcistr->pdev;
 856
 857     if (ha->pdev->device <= PCI_DEVICE_ID_VORTEX_GDT6000B) {  /* GDT6000/B */
 858         TRACE2(("init_pci() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
 859         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6_dpram_str));
 860         if (ha->brd == NULL) {
 861             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 862             return 0;
 863         }
 864         /* check and reset interface area */
 865         dp6_ptr = ha->brd;
 866         writel(DPMEM_MAGIC, &dp6_ptr->u);
 867         if (readl(&dp6_ptr->u) != DPMEM_MAGIC) {
 868             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
 869                    pcistr->dpmem);
 870             found = FALSE;
 871             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
 872                 iounmap(ha->brd);
 873                 ha->brd = ioremap(i, sizeof(ushort));
 874                 if (ha->brd == NULL) {
 875                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 876                     return 0;
 877                 }
 878                 if (readw(ha->brd) != 0xffff) {
 879                     TRACE2(("init_pci_old() address 0x%x busy\n", i));
 880                     continue;
 881                 }
 882                 iounmap(ha->brd);
 883                 pci_write_config_dword(pcistr->pdev,
 884                                        PCI_BASE_ADDRESS_0, i);
 885                 ha->brd = ioremap(i, sizeof(gdt6_dpram_str));
 886                 if (ha->brd == NULL) {
 887                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 888                     return 0;
 889                 }
 890                 dp6_ptr = ha->brd;
 891                 writel(DPMEM_MAGIC, &dp6_ptr->u);
 892                 if (readl(&dp6_ptr->u) == DPMEM_MAGIC) {
 893                     printk("GDT-PCI: Use free address at 0x%x\n", i);
 894                     found = TRUE;
 895                     break;
 896                 }
 897             }
 898             if (!found) {
 899                 printk("GDT-PCI: No free address found!\n");
 900                 iounmap(ha->brd);
 901                 return 0;
 902             }
 903         }
 904         memset_io(&dp6_ptr->u, 0, sizeof(dp6_ptr->u));
 905         if (readl(&dp6_ptr->u) != 0) {
 906             printk("GDT-PCI: Initialization error (DPMEM write error)\n");
 907             iounmap(ha->brd);
 908             return 0;
 909         }
 910
 911         /* disable board interrupts, deinit services */
 912         writeb(0xff, &dp6_ptr->io.irqdel);
 913         writeb(0x00, &dp6_ptr->io.irqen);
 914         writeb(0x00, &dp6_ptr->u.ic.S_Status);
 915         writeb(0x00, &dp6_ptr->u.ic.Cmd_Index);
 916
 917         writel(pcistr->dpmem, &dp6_ptr->u.ic.S_Info[0]);
 918         writeb(0xff, &dp6_ptr->u.ic.S_Cmd_Indx);
 919         writeb(0, &dp6_ptr->io.event);
 920         retries = INIT_RETRIES;
 921         gdth_delay(20);
 922         while (readb(&dp6_ptr->u.ic.S_Status) != 0xff) {
 923             if (--retries == 0) {
 924                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
 925                 iounmap(ha->brd);
 926                 return 0;
 927             }
 928             gdth_delay(1);
 929         }
 930         prot_ver = (unchar)readl(&dp6_ptr->u.ic.S_Info[0]);
 931         writeb(0, &dp6_ptr->u.ic.S_Status);
 932         writeb(0xff, &dp6_ptr->io.irqdel);
 933         if (prot_ver != PROTOCOL_VERSION) {
 934             printk("GDT-PCI: Illegal protocol version\n");
 935             iounmap(ha->brd);
 936             return 0;
 937         }
 938
 939         ha->type = GDT_PCI;
 940         ha->ic_all_size = sizeof(dp6_ptr->u);
 941
 942         /* special command to controller BIOS */
 943         writel(0x00, &dp6_ptr->u.ic.S_Info[0]);
 944         writel(0x00, &dp6_ptr->u.ic.S_Info[1]);
 945         writel(0x00, &dp6_ptr->u.ic.S_Info[2]);
 946         writel(0x00, &dp6_ptr->u.ic.S_Info[3]);
 947         writeb(0xfe, &dp6_ptr->u.ic.S_Cmd_Indx);
 948         writeb(0, &dp6_ptr->io.event);
 949         retries = INIT_RETRIES;
 950         gdth_delay(20);
 951         while (readb(&dp6_ptr->u.ic.S_Status) != 0xfe) {
 952             if (--retries == 0) {
 953                 printk("GDT-PCI: Initialization error\n");
 954                 iounmap(ha->brd);
 955                 return 0;
 956             }
 957             gdth_delay(1);
 958         }
 959         writeb(0, &dp6_ptr->u.ic.S_Status);
 960         writeb(0xff, &dp6_ptr->io.irqdel);
 961
 962         ha->dma64_support = 0;
 963
 964     } else if (ha->pdev->device <= PCI_DEVICE_ID_VORTEX_GDT6555) { /* GDT6110, ... */
 965         ha->plx = (gdt6c_plx_regs *)pcistr->io;
 966         TRACE2(("init_pci_new() dpmem %lx irq %d\n",
 967             pcistr->dpmem,ha->irq));
 968         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6c_dpram_str));
 969         if (ha->brd == NULL) {
 970             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 971             iounmap(ha->brd);
 972             return 0;
 973         }
 974         /* check and reset interface area */
 975         dp6c_ptr = ha->brd;
 976         writel(DPMEM_MAGIC, &dp6c_ptr->u);
 977         if (readl(&dp6c_ptr->u) != DPMEM_MAGIC) {
 978             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
 979                    pcistr->dpmem);
 980             found = FALSE;
 981             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
 982                 iounmap(ha->brd);
 983                 ha->brd = ioremap(i, sizeof(ushort));
 984                 if (ha->brd == NULL) {
 985                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 986                     return 0;
 987                 }
 988                 if (readw(ha->brd) != 0xffff) {
 989                     TRACE2(("init_pci_plx() address 0x%x busy\n", i));
 990                     continue;
 991                 }
 992                 iounmap(ha->brd);
 993                 pci_write_config_dword(pcistr->pdev,
 994                                        PCI_BASE_ADDRESS_2, i);
 995                 ha->brd = ioremap(i, sizeof(gdt6c_dpram_str));
 996                 if (ha->brd == NULL) {
 997                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 998                     return 0;
 999                 }
1000                 dp6c_ptr = ha->brd;
1001                 writel(DPMEM_MAGIC, &dp6c_ptr->u);
1002                 if (readl(&dp6c_ptr->u) == DPMEM_MAGIC) {
1003                     printk("GDT-PCI: Use free address at 0x%x\n", i);
1004                     found = TRUE;
1005                     break;
1006                 }
1007             }
1008             if (!found) {
1009                 printk("GDT-PCI: No free address found!\n");
1010                 iounmap(ha->brd);
1011                 return 0;
1012             }
1013         }
1014         memset_io(&dp6c_ptr->u, 0, sizeof(dp6c_ptr->u));
1015         if (readl(&dp6c_ptr->u) != 0) {
1016             printk("GDT-PCI: Initialization error (DPMEM write error)\n");
1017             iounmap(ha->brd);
1018             return 0;
1019         }
1020
1021         /* disable board interrupts, deinit services */
1022         outb(0x00,PTR2USHORT(&ha->plx->control1));
1023         outb(0xff,PTR2USHORT(&ha->plx->edoor_reg));
1024
1025         writeb(0x00, &dp6c_ptr->u.ic.S_Status);
1026         writeb(0x00, &dp6c_ptr->u.ic.Cmd_Index);
1027
1028         writel(pcistr->dpmem, &dp6c_ptr->u.ic.S_Info[0]);
1029         writeb(0xff, &dp6c_ptr->u.ic.S_Cmd_Indx);
1030
1031         outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1032
1033         retries = INIT_RETRIES;
1034         gdth_delay(20);
1035         while (readb(&dp6c_ptr->u.ic.S_Status) != 0xff) {
1036             if (--retries == 0) {
1037                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1038                 iounmap(ha->brd);
1039                 return 0;
1040             }
1041             gdth_delay(1);
1042         }
1043         prot_ver = (unchar)readl(&dp6c_ptr->u.ic.S_Info[0]);
1044         writeb(0, &dp6c_ptr->u.ic.Status);
1045         if (prot_ver != PROTOCOL_VERSION) {
1046             printk("GDT-PCI: Illegal protocol version\n");
1047             iounmap(ha->brd);
1048             return 0;
1049         }
1050
1051         ha->type = GDT_PCINEW;
1052         ha->ic_all_size = sizeof(dp6c_ptr->u);
1053
1054         /* special command to controller BIOS */
1055         writel(0x00, &dp6c_ptr->u.ic.S_Info[0]);
1056         writel(0x00, &dp6c_ptr->u.ic.S_Info[1]);
1057         writel(0x00, &dp6c_ptr->u.ic.S_Info[2]);
1058         writel(0x00, &dp6c_ptr->u.ic.S_Info[3]);
1059         writeb(0xfe, &dp6c_ptr->u.ic.S_Cmd_Indx);
1060
1061         outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1062
1063         retries = INIT_RETRIES;
1064         gdth_delay(20);
1065         while (readb(&dp6c_ptr->u.ic.S_Status) != 0xfe) {
1066             if (--retries == 0) {
1067                 printk("GDT-PCI: Initialization error\n");
1068                 iounmap(ha->brd);
1069                 return 0;
1070             }
1071             gdth_delay(1);
1072         }
1073         writeb(0, &dp6c_ptr->u.ic.S_Status);
1074
1075         ha->dma64_support = 0;
1076
1077     } else {                                            /* MPR */
1078         TRACE2(("init_pci_mpr() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
1079         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6m_dpram_str));
1080         if (ha->brd == NULL) {
1081             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1082             return 0;
1083         }
1084
1085         /* manipulate config. space to enable DPMEM, start RP controller */
1086         pci_read_config_word(pcistr->pdev, PCI_COMMAND, &command);
1087         command |= 6;
1088         pci_write_config_word(pcistr->pdev, PCI_COMMAND, command);
1089         if (pci_resource_start(pcistr->pdev, 8) == 1UL)
1090             pci_resource_start(pcistr->pdev, 8) = 0UL;
1091         i = 0xFEFF0001UL;
1092         pci_write_config_dword(pcistr->pdev, PCI_ROM_ADDRESS, i);
1093         gdth_delay(1);
1094         pci_write_config_dword(pcistr->pdev, PCI_ROM_ADDRESS,
1095                                pci_resource_start(pcistr->pdev, 8));
1096
1097         dp6m_ptr = ha->brd;
1098
1099         /* Ensure that it is safe to access the non HW portions of DPMEM.
1100          * Aditional check needed for Xscale based RAID controllers */
1101         while( ((int)readb(&dp6m_ptr->i960r.sema0_reg) ) & 3 )
1102             gdth_delay(1);
1103
1104         /* check and reset interface area */
1105         writel(DPMEM_MAGIC, &dp6m_ptr->u);
1106         if (readl(&dp6m_ptr->u) != DPMEM_MAGIC) {
1107             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1108                    pcistr->dpmem);
1109             found = FALSE;
1110             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1111                 iounmap(ha->brd);
1112                 ha->brd = ioremap(i, sizeof(ushort));
1113                 if (ha->brd == NULL) {
1114                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1115                     return 0;
1116                 }
1117                 if (readw(ha->brd) != 0xffff) {
1118                     TRACE2(("init_pci_mpr() address 0x%x busy\n", i));
1119                     continue;
1120                 }
1121                 iounmap(ha->brd);
1122                 pci_write_config_dword(pcistr->pdev,
1123                                        PCI_BASE_ADDRESS_0, i);
1124                 ha->brd = ioremap(i, sizeof(gdt6m_dpram_str));
1125                 if (ha->brd == NULL) {
1126                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1127                     return 0;
1128                 }
1129                 dp6m_ptr = ha->brd;
1130                 writel(DPMEM_MAGIC, &dp6m_ptr->u);
1131                 if (readl(&dp6m_ptr->u) == DPMEM_MAGIC) {
1132                     printk("GDT-PCI: Use free address at 0x%x\n", i);
1133                     found = TRUE;
1134                     break;
1135                 }
1136             }
1137             if (!found) {
1138                 printk("GDT-PCI: No free address found!\n");
1139                 iounmap(ha->brd);
1140                 return 0;
1141             }
1142         }
1143         memset_io(&dp6m_ptr->u, 0, sizeof(dp6m_ptr->u));
1144
1145         /* disable board interrupts, deinit services */
1146         writeb(readb(&dp6m_ptr->i960r.edoor_en_reg) | 4,
1147                     &dp6m_ptr->i960r.edoor_en_reg);
1148         writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1149         writeb(0x00, &dp6m_ptr->u.ic.S_Status);
1150         writeb(0x00, &dp6m_ptr->u.ic.Cmd_Index);
1151
1152         writel(pcistr->dpmem, &dp6m_ptr->u.ic.S_Info[0]);
1153         writeb(0xff, &dp6m_ptr->u.ic.S_Cmd_Indx);
1154         writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1155         retries = INIT_RETRIES;
1156         gdth_delay(20);
1157         while (readb(&dp6m_ptr->u.ic.S_Status) != 0xff) {
1158             if (--retries == 0) {
1159                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1160                 iounmap(ha->brd);
1161                 return 0;
1162             }
1163             gdth_delay(1);
1164         }
1165         prot_ver = (unchar)readl(&dp6m_ptr->u.ic.S_Info[0]);
1166         writeb(0, &dp6m_ptr->u.ic.S_Status);
1167         if (prot_ver != PROTOCOL_VERSION) {
1168             printk("GDT-PCI: Illegal protocol version\n");
1169             iounmap(ha->brd);
1170             return 0;
1171         }
1172
1173         ha->type = GDT_PCIMPR;
1174         ha->ic_all_size = sizeof(dp6m_ptr->u);
1175
1176         /* special command to controller BIOS */
1177         writel(0x00, &dp6m_ptr->u.ic.S_Info[0]);
1178         writel(0x00, &dp6m_ptr->u.ic.S_Info[1]);
1179         writel(0x00, &dp6m_ptr->u.ic.S_Info[2]);
1180         writel(0x00, &dp6m_ptr->u.ic.S_Info[3]);
1181         writeb(0xfe, &dp6m_ptr->u.ic.S_Cmd_Indx);
1182         writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1183         retries = INIT_RETRIES;
1184         gdth_delay(20);
1185         while (readb(&dp6m_ptr->u.ic.S_Status) != 0xfe) {
1186             if (--retries == 0) {
1187                 printk("GDT-PCI: Initialization error\n");
1188                 iounmap(ha->brd);
1189                 return 0;
1190             }
1191             gdth_delay(1);
1192         }
1193         writeb(0, &dp6m_ptr->u.ic.S_Status);
1194
1195         /* read FW version to detect 64-bit DMA support */
1196         writeb(0xfd, &dp6m_ptr->u.ic.S_Cmd_Indx);
1197         writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1198         retries = INIT_RETRIES;
1199         gdth_delay(20);
1200         while (readb(&dp6m_ptr->u.ic.S_Status) != 0xfd) {
1201             if (--retries == 0) {
1202                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1203                 iounmap(ha->brd);
1204                 return 0;
1205             }
1206             gdth_delay(1);
1207         }
1208         prot_ver = (unchar)(readl(&dp6m_ptr->u.ic.S_Info[0]) >> 16);
1209         writeb(0, &dp6m_ptr->u.ic.S_Status);
1210         if (prot_ver < 0x2b)      /* FW < x.43: no 64-bit DMA support */
1211             ha->dma64_support = 0;
1212         else
1213             ha->dma64_support = 1;
1214     }
1215
1216     return 1;
1217 }
1218 #endif /* CONFIG_PCI */
1219
1220 /* controller protocol functions */
1221
1222 static void __init gdth_enable_int(int hanum)
1223 {
1224     gdth_ha_str *ha;
1225     ulong flags;
1226     gdt2_dpram_str __iomem *dp2_ptr;
1227     gdt6_dpram_str __iomem *dp6_ptr;
1228     gdt6m_dpram_str __iomem *dp6m_ptr;
1229
1230     TRACE(("gdth_enable_int() hanum %d\n",hanum));
1231     ha = HADATA(gdth_ctr_tab[hanum]);
1232     spin_lock_irqsave(&ha->smp_lock, flags);
1233
1234     if (ha->type == GDT_EISA) {
1235         outb(0xff, ha->bmic + EDOORREG);
1236         outb(0xff, ha->bmic + EDENABREG);
1237         outb(0x01, ha->bmic + EINTENABREG);
1238     } else if (ha->type == GDT_ISA) {
1239         dp2_ptr = ha->brd;
1240         writeb(1, &dp2_ptr->io.irqdel);
1241         writeb(0, &dp2_ptr->u.ic.Cmd_Index);
1242         writeb(1, &dp2_ptr->io.irqen);
1243     } else if (ha->type == GDT_PCI) {
1244         dp6_ptr = ha->brd;
1245         writeb(1, &dp6_ptr->io.irqdel);
1246         writeb(0, &dp6_ptr->u.ic.Cmd_Index);
1247         writeb(1, &dp6_ptr->io.irqen);
1248     } else if (ha->type == GDT_PCINEW) {
1249         outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
1250         outb(0x03, PTR2USHORT(&ha->plx->control1));
1251     } else if (ha->type == GDT_PCIMPR) {
1252         dp6m_ptr = ha->brd;
1253         writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1254         writeb(readb(&dp6m_ptr->i960r.edoor_en_reg) & ~4,
1255                     &dp6m_ptr->i960r.edoor_en_reg);
1256     }
1257     spin_unlock_irqrestore(&ha->smp_lock, flags);
1258 }
1259
1260
1261 static int gdth_get_status(unchar *pIStatus,int irq)
1262 {
1263     register gdth_ha_str *ha;
1264     int i;
1265
1266     TRACE(("gdth_get_status() irq %d ctr_count %d\n",
1267            irq,gdth_ctr_count));
1268
1269     *pIStatus = 0;
1270     for (i=0; i<gdth_ctr_count; ++i) {
1271         ha = HADATA(gdth_ctr_tab[i]);
1272         if (ha->irq != (unchar)irq)             /* check IRQ */
1273             continue;
1274         if (ha->type == GDT_EISA)
1275             *pIStatus = inb((ushort)ha->bmic + EDOORREG);
1276         else if (ha->type == GDT_ISA)
1277             *pIStatus =
1278                 readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1279         else if (ha->type == GDT_PCI)
1280             *pIStatus =
1281                 readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1282         else if (ha->type == GDT_PCINEW)
1283             *pIStatus = inb(PTR2USHORT(&ha->plx->edoor_reg));
1284         else if (ha->type == GDT_PCIMPR)
1285             *pIStatus =
1286                 readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.edoor_reg);
1287
1288         if (*pIStatus)
1289             return i;                           /* board found */
1290     }
1291     return -1;
1292 }
1293
1294
1295 static int gdth_test_busy(int hanum)
1296 {
1297     register gdth_ha_str *ha;
1298     register int gdtsema0 = 0;
1299
1300     TRACE(("gdth_test_busy() hanum %d\n",hanum));
1301
1302     ha = HADATA(gdth_ctr_tab[hanum]);
1303     if (ha->type == GDT_EISA)
1304         gdtsema0 = (int)inb(ha->bmic + SEMA0REG);
1305     else if (ha->type == GDT_ISA)
1306         gdtsema0 = (int)readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1307     else if (ha->type == GDT_PCI)
1308         gdtsema0 = (int)readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1309     else if (ha->type == GDT_PCINEW)
1310         gdtsema0 = (int)inb(PTR2USHORT(&ha->plx->sema0_reg));
1311     else if (ha->type == GDT_PCIMPR)
1312         gdtsema0 =
1313             (int)readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1314
1315     return (gdtsema0 & 1);
1316 }
1317
1318
1319 static int gdth_get_cmd_index(int hanum)
1320 {
1321     register gdth_ha_str *ha;
1322     int i;
1323
1324     TRACE(("gdth_get_cmd_index() hanum %d\n",hanum));
1325
1326     ha = HADATA(gdth_ctr_tab[hanum]);
1327     for (i=0; i<GDTH_MAXCMDS; ++i) {
1328         if (ha->cmd_tab[i].cmnd == UNUSED_CMND) {
1329             ha->cmd_tab[i].cmnd = ha->pccb->RequestBuffer;
1330             ha->cmd_tab[i].service = ha->pccb->Service;
1331             ha->pccb->CommandIndex = (ulong32)i+2;
1332             return (i+2);
1333         }
1334     }
1335     return 0;
1336 }
1337
1338
1339 static void gdth_set_sema0(int hanum)
1340 {
1341     register gdth_ha_str *ha;
1342
1343     TRACE(("gdth_set_sema0() hanum %d\n",hanum));
1344
1345     ha = HADATA(gdth_ctr_tab[hanum]);
1346     if (ha->type == GDT_EISA) {
1347         outb(1, ha->bmic + SEMA0REG);
1348     } else if (ha->type == GDT_ISA) {
1349         writeb(1, &((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1350     } else if (ha->type == GDT_PCI) {
1351         writeb(1, &((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1352     } else if (ha->type == GDT_PCINEW) {
1353         outb(1, PTR2USHORT(&ha->plx->sema0_reg));
1354     } else if (ha->type == GDT_PCIMPR) {
1355         writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1356     }
1357 }
1358
1359
1360 static void gdth_copy_command(int hanum)
1361 {
1362     register gdth_ha_str *ha;
1363     register gdth_cmd_str *cmd_ptr;
1364     register gdt6m_dpram_str __iomem *dp6m_ptr;
1365     register gdt6c_dpram_str __iomem *dp6c_ptr;
1366     gdt6_dpram_str __iomem *dp6_ptr;
1367     gdt2_dpram_str __iomem *dp2_ptr;
1368     ushort cp_count,dp_offset,cmd_no;
1369
1370     TRACE(("gdth_copy_command() hanum %d\n",hanum));
1371
1372     ha = HADATA(gdth_ctr_tab[hanum]);
1373     cp_count = ha->cmd_len;
1374     dp_offset= ha->cmd_offs_dpmem;
1375     cmd_no   = ha->cmd_cnt;
1376     cmd_ptr  = ha->pccb;
1377
1378     ++ha->cmd_cnt;
1379     if (ha->type == GDT_EISA)
1380         return;                                 /* no DPMEM, no copy */
1381
1382     /* set cpcount dword aligned */
1383     if (cp_count & 3)
1384         cp_count += (4 - (cp_count & 3));
1385
1386     ha->cmd_offs_dpmem += cp_count;
1387
1388     /* set offset and service, copy command to DPMEM */
1389     if (ha->type == GDT_ISA) {
1390         dp2_ptr = ha->brd;
1391         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1392                     &dp2_ptr->u.ic.comm_queue[cmd_no].offset);
1393         writew((ushort)cmd_ptr->Service,
1394                     &dp2_ptr->u.ic.comm_queue[cmd_no].serv_id);
1395         memcpy_toio(&dp2_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1396     } else if (ha->type == GDT_PCI) {
1397         dp6_ptr = ha->brd;
1398         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1399                     &dp6_ptr->u.ic.comm_queue[cmd_no].offset);
1400         writew((ushort)cmd_ptr->Service,
1401                     &dp6_ptr->u.ic.comm_queue[cmd_no].serv_id);
1402         memcpy_toio(&dp6_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1403     } else if (ha->type == GDT_PCINEW) {
1404         dp6c_ptr = ha->brd;
1405         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1406                     &dp6c_ptr->u.ic.comm_queue[cmd_no].offset);
1407         writew((ushort)cmd_ptr->Service,
1408                     &dp6c_ptr->u.ic.comm_queue[cmd_no].serv_id);
1409         memcpy_toio(&dp6c_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1410     } else if (ha->type == GDT_PCIMPR) {
1411         dp6m_ptr = ha->brd;
1412         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1413                     &dp6m_ptr->u.ic.comm_queue[cmd_no].offset);
1414         writew((ushort)cmd_ptr->Service,
1415                     &dp6m_ptr->u.ic.comm_queue[cmd_no].serv_id);
1416         memcpy_toio(&dp6m_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1417     }
1418 }
1419
1420
1421 static void gdth_release_event(int hanum)
1422 {
1423     register gdth_ha_str *ha;
1424
1425     TRACE(("gdth_release_event() hanum %d\n",hanum));
1426     ha = HADATA(gdth_ctr_tab[hanum]);
1427
1428 #ifdef GDTH_STATISTICS
1429     {
1430         ulong32 i,j;
1431         for (i=0,j=0; j<GDTH_MAXCMDS; ++j) {
1432             if (ha->cmd_tab[j].cmnd != UNUSED_CMND)
1433                 ++i;
1434         }
1435         if (max_index < i) {
1436             max_index = i;
1437             TRACE3(("GDT: max_index = %d\n",(ushort)i));
1438         }
1439     }
1440 #endif
1441
1442     if (ha->pccb->OpCode == GDT_INIT)
1443         ha->pccb->Service |= 0x80;
1444
1445     if (ha->type == GDT_EISA) {
1446         if (ha->pccb->OpCode == GDT_INIT)               /* store DMA buffer */
1447             outl(ha->ccb_phys, ha->bmic + MAILBOXREG);
1448         outb(ha->pccb->Service, ha->bmic + LDOORREG);
1449     } else if (ha->type == GDT_ISA) {
1450         writeb(0, &((gdt2_dpram_str __iomem *)ha->brd)->io.event);
1451     } else if (ha->type == GDT_PCI) {
1452         writeb(0, &((gdt6_dpram_str __iomem *)ha->brd)->io.event);
1453     } else if (ha->type == GDT_PCINEW) {
1454         outb(1, PTR2USHORT(&ha->plx->ldoor_reg));
1455     } else if (ha->type == GDT_PCIMPR) {
1456         writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.ldoor_reg);
1457     }
1458 }
1459
1460
1461 static int gdth_wait(int hanum,int index,ulong32 time)
1462 {
1463     gdth_ha_str *ha;
1464     int answer_found = FALSE;
1465
1466     TRACE(("gdth_wait() hanum %d index %d time %d\n",hanum,index,time));
1467
1468     ha = HADATA(gdth_ctr_tab[hanum]);
1469     if (index == 0)
1470         return 1;                               /* no wait required */
1471
1472     gdth_from_wait = TRUE;
1473     do {
1474         gdth_interrupt((int)ha->irq,ha);
1475         if (wait_hanum==hanum && wait_index==index) {
1476             answer_found = TRUE;
1477             break;
1478         }
1479         gdth_delay(1);
1480     } while (--time);
1481     gdth_from_wait = FALSE;
1482
1483     while (gdth_test_busy(hanum))
1484         gdth_delay(0);
1485
1486     return (answer_found);
1487 }
1488
1489
1490 static int gdth_internal_cmd(int hanum,unchar service,ushort opcode,ulong32 p1,
1491                              ulong64 p2,ulong64 p3)
1492 {
1493     register gdth_ha_str *ha;
1494     register gdth_cmd_str *cmd_ptr;
1495     int retries,index;
1496
1497     TRACE2(("gdth_internal_cmd() service %d opcode %d\n",service,opcode));
1498
1499     ha = HADATA(gdth_ctr_tab[hanum]);
1500     cmd_ptr = ha->pccb;
1501     memset((char*)cmd_ptr,0,sizeof(gdth_cmd_str));
1502
1503     /* make command  */
1504     for (retries = INIT_RETRIES;;) {
1505         cmd_ptr->Service          = service;
1506         cmd_ptr->RequestBuffer    = INTERNAL_CMND;
1507         if (!(index=gdth_get_cmd_index(hanum))) {
1508             TRACE(("GDT: No free command index found\n"));
1509             return 0;
1510         }
1511         gdth_set_sema0(hanum);
1512         cmd_ptr->OpCode           = opcode;
1513         cmd_ptr->BoardNode        = LOCALBOARD;
1514         if (service == CACHESERVICE) {
1515             if (opcode == GDT_IOCTL) {
1516                 cmd_ptr->u.ioctl.subfunc = p1;
1517                 cmd_ptr->u.ioctl.channel = (ulong32)p2;
1518                 cmd_ptr->u.ioctl.param_size = (ushort)p3;
1519                 cmd_ptr->u.ioctl.p_param = ha->scratch_phys;
1520             } else {
1521                 if (ha->cache_feat & GDT_64BIT) {
1522                     cmd_ptr->u.cache64.DeviceNo = (ushort)p1;
1523                     cmd_ptr->u.cache64.BlockNo  = p2;
1524                 } else {
1525                     cmd_ptr->u.cache.DeviceNo = (ushort)p1;
1526                     cmd_ptr->u.cache.BlockNo  = (ulong32)p2;
1527                 }
1528             }
1529         } else if (service == SCSIRAWSERVICE) {
1530             if (ha->raw_feat & GDT_64BIT) {
1531                 cmd_ptr->u.raw64.direction  = p1;
1532                 cmd_ptr->u.raw64.bus        = (unchar)p2;
1533                 cmd_ptr->u.raw64.target     = (unchar)p3;
1534                 cmd_ptr->u.raw64.lun        = (unchar)(p3 >> 8);
1535             } else {
1536                 cmd_ptr->u.raw.direction  = p1;
1537                 cmd_ptr->u.raw.bus        = (unchar)p2;
1538                 cmd_ptr->u.raw.target     = (unchar)p3;
1539                 cmd_ptr->u.raw.lun        = (unchar)(p3 >> 8);
1540             }
1541         } else if (service == SCREENSERVICE) {
1542             if (opcode == GDT_REALTIME) {
1543                 *(ulong32 *)&cmd_ptr->u.screen.su.data[0] = p1;
1544                 *(ulong32 *)&cmd_ptr->u.screen.su.data[4] = (ulong32)p2;
1545                 *(ulong32 *)&cmd_ptr->u.screen.su.data[8] = (ulong32)p3;
1546             }
1547         }
1548         ha->cmd_len          = sizeof(gdth_cmd_str);
1549         ha->cmd_offs_dpmem   = 0;
1550         ha->cmd_cnt          = 0;
1551         gdth_copy_command(hanum);
1552         gdth_release_event(hanum);
1553         gdth_delay(20);
1554         if (!gdth_wait(hanum,index,INIT_TIMEOUT)) {
1555             printk("GDT: Initialization error (timeout service %d)\n",service);
1556             return 0;
1557         }
1558         if (ha->status != S_BSY || --retries == 0)
1559             break;
1560         gdth_delay(1);
1561     }
1562
1563     return (ha->status != S_OK ? 0:1);
1564 }
1565
1566
1567 /* search for devices */
1568
1569 static int __init gdth_search_drives(int hanum)
1570 {
1571     register gdth_ha_str *ha;
1572     ushort cdev_cnt, i;
1573     int ok;
1574     ulong32 bus_no, drv_cnt, drv_no, j;
1575     gdth_getch_str *chn;
1576     gdth_drlist_str *drl;
1577     gdth_iochan_str *ioc;
1578     gdth_raw_iochan_str *iocr;
1579     gdth_arcdl_str *alst;
1580     gdth_alist_str *alst2;
1581     gdth_oem_str_ioctl *oemstr;
1582 #ifdef INT_COAL
1583     gdth_perf_modes *pmod;
1584 #endif
1585
1586 #ifdef GDTH_RTC
1587     unchar rtc[12];
1588     ulong flags;
1589 #endif
1590
1591     TRACE(("gdth_search_drives() hanum %d\n",hanum));
1592     ha = HADATA(gdth_ctr_tab[hanum]);
1593     ok = 0;
1594
1595     /* initialize controller services, at first: screen service */
1596     ha->screen_feat = 0;
1597     if (!force_dma32) {
1598         ok = gdth_internal_cmd(hanum,SCREENSERVICE,GDT_X_INIT_SCR,0,0,0);
1599         if (ok)
1600             ha->screen_feat = GDT_64BIT;
1601     }
1602     if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1603         ok = gdth_internal_cmd(hanum,SCREENSERVICE,GDT_INIT,0,0,0);
1604     if (!ok) {
1605         printk("GDT-HA %d: Initialization error screen service (code %d)\n",
1606                hanum, ha->status);
1607         return 0;
1608     }
1609     TRACE2(("gdth_search_drives(): SCREENSERVICE initialized\n"));
1610
1611 #ifdef GDTH_RTC
1612     /* read realtime clock info, send to controller */
1613     /* 1. wait for the falling edge of update flag */
1614     spin_lock_irqsave(&rtc_lock, flags);
1615     for (j = 0; j < 1000000; ++j)
1616         if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
1617             break;
1618     for (j = 0; j < 1000000; ++j)
1619         if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
1620             break;
1621     /* 2. read info */
1622     do {
1623         for (j = 0; j < 12; ++j)
1624             rtc[j] = CMOS_READ(j);
1625     } while (rtc[0] != CMOS_READ(0));
1626     spin_unlock_irqrestore(&rtc_lock, flags);
1627     TRACE2(("gdth_search_drives(): RTC: %x/%x/%x\n",*(ulong32 *)&rtc[0],
1628             *(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]));
1629     /* 3. send to controller firmware */
1630     gdth_internal_cmd(hanum,SCREENSERVICE,GDT_REALTIME, *(ulong32 *)&rtc[0],
1631                       *(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]);
1632 #endif
1633
1634     /* unfreeze all IOs */
1635     gdth_internal_cmd(hanum,CACHESERVICE,GDT_UNFREEZE_IO,0,0,0);
1636
1637     /* initialize cache service */
1638     ha->cache_feat = 0;
1639     if (!force_dma32) {
1640         ok = gdth_internal_cmd(hanum,CACHESERVICE,GDT_X_INIT_HOST,LINUX_OS,0,0);
1641         if (ok)
1642             ha->cache_feat = GDT_64BIT;
1643     }
1644     if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1645         ok = gdth_internal_cmd(hanum,CACHESERVICE,GDT_INIT,LINUX_OS,0,0);
1646     if (!ok) {
1647         printk("GDT-HA %d: Initialization error cache service (code %d)\n",
1648                hanum, ha->status);
1649         return 0;
1650     }
1651     TRACE2(("gdth_search_drives(): CACHESERVICE initialized\n"));
1652     cdev_cnt = (ushort)ha->info;
1653     ha->fw_vers = ha->service;
1654
1655 #ifdef INT_COAL
1656     if (ha->type == GDT_PCIMPR) {
1657         /* set perf. modes */
1658         pmod = (gdth_perf_modes *)ha->pscratch;
1659         pmod->version          = 1;
1660         pmod->st_mode          = 1;    /* enable one status buffer */
1661         *((ulong64 *)&pmod->st_buff_addr1) = ha->coal_stat_phys;
1662         pmod->st_buff_indx1    = COALINDEX;
1663         pmod->st_buff_addr2    = 0;
1664         pmod->st_buff_u_addr2  = 0;
1665         pmod->st_buff_indx2    = 0;
1666         pmod->st_buff_size     = sizeof(gdth_coal_status) * MAXOFFSETS;
1667         pmod->cmd_mode         = 0;    // disable all cmd buffers
1668         pmod->cmd_buff_addr1   = 0;
1669         pmod->cmd_buff_u_addr1 = 0;
1670         pmod->cmd_buff_indx1   = 0;
1671         pmod->cmd_buff_addr2   = 0;
1672         pmod->cmd_buff_u_addr2 = 0;
1673         pmod->cmd_buff_indx2   = 0;
1674         pmod->cmd_buff_size    = 0;
1675         pmod->reserved1        = 0;
1676         pmod->reserved2        = 0;
1677         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,SET_PERF_MODES,
1678                               INVALID_CHANNEL,sizeof(gdth_perf_modes))) {
1679             printk("GDT-HA %d: Interrupt coalescing activated\n", hanum);
1680         }
1681     }
1682 #endif
1683
1684     /* detect number of buses - try new IOCTL */
1685     iocr = (gdth_raw_iochan_str *)ha->pscratch;
1686     iocr->hdr.version        = 0xffffffff;
1687     iocr->hdr.list_entries   = MAXBUS;
1688     iocr->hdr.first_chan     = 0;
1689     iocr->hdr.last_chan      = MAXBUS-1;
1690     iocr->hdr.list_offset    = GDTOFFSOF(gdth_raw_iochan_str, list[0]);
1691     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,IOCHAN_RAW_DESC,
1692                           INVALID_CHANNEL,sizeof(gdth_raw_iochan_str))) {
1693         TRACE2(("IOCHAN_RAW_DESC supported!\n"));
1694         ha->bus_cnt = iocr->hdr.chan_count;
1695         for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1696             if (iocr->list[bus_no].proc_id < MAXID)
1697                 ha->bus_id[bus_no] = iocr->list[bus_no].proc_id;
1698             else
1699                 ha->bus_id[bus_no] = 0xff;
1700         }
1701     } else {
1702         /* old method */
1703         chn = (gdth_getch_str *)ha->pscratch;
1704         for (bus_no = 0; bus_no < MAXBUS; ++bus_no) {
1705             chn->channel_no = bus_no;
1706             if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
1707                                    SCSI_CHAN_CNT | L_CTRL_PATTERN,
1708                                    IO_CHANNEL | INVALID_CHANNEL,
1709                                    sizeof(gdth_getch_str))) {
1710                 if (bus_no == 0) {
1711                     printk("GDT-HA %d: Error detecting channel count (0x%x)\n",
1712                            hanum, ha->status);
1713                     return 0;
1714                 }
1715                 break;
1716             }
1717             if (chn->siop_id < MAXID)
1718                 ha->bus_id[bus_no] = chn->siop_id;
1719             else
1720                 ha->bus_id[bus_no] = 0xff;
1721         }
1722         ha->bus_cnt = (unchar)bus_no;
1723     }
1724     TRACE2(("gdth_search_drives() %d channels\n",ha->bus_cnt));
1725
1726     /* read cache configuration */
1727     if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_INFO,
1728                            INVALID_CHANNEL,sizeof(gdth_cinfo_str))) {
1729         printk("GDT-HA %d: Initialization error cache service (code %d)\n",
1730                hanum, ha->status);
1731         return 0;
1732     }
1733     ha->cpar = ((gdth_cinfo_str *)ha->pscratch)->cpar;
1734     TRACE2(("gdth_search_drives() cinfo: vs %x sta %d str %d dw %d b %d\n",
1735             ha->cpar.version,ha->cpar.state,ha->cpar.strategy,
1736             ha->cpar.write_back,ha->cpar.block_size));
1737
1738     /* read board info and features */
1739     ha->more_proc = FALSE;
1740     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,BOARD_INFO,
1741                           INVALID_CHANNEL,sizeof(gdth_binfo_str))) {
1742         memcpy(&ha->binfo, (gdth_binfo_str *)ha->pscratch,
1743                sizeof(gdth_binfo_str));
1744         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,BOARD_FEATURES,
1745                               INVALID_CHANNEL,sizeof(gdth_bfeat_str))) {
1746             TRACE2(("BOARD_INFO/BOARD_FEATURES supported\n"));
1747             ha->bfeat = *(gdth_bfeat_str *)ha->pscratch;
1748             ha->more_proc = TRUE;
1749         }
1750     } else {
1751         TRACE2(("BOARD_INFO requires firmware >= 1.10/2.08\n"));
1752         strcpy(ha->binfo.type_string, gdth_ctr_name(hanum));
1753     }
1754     TRACE2(("Controller name: %s\n",ha->binfo.type_string));
1755
1756     /* read more informations */
1757     if (ha->more_proc) {
1758         /* physical drives, channel addresses */
1759         ioc = (gdth_iochan_str *)ha->pscratch;
1760         ioc->hdr.version        = 0xffffffff;
1761         ioc->hdr.list_entries   = MAXBUS;
1762         ioc->hdr.first_chan     = 0;
1763         ioc->hdr.last_chan      = MAXBUS-1;
1764         ioc->hdr.list_offset    = GDTOFFSOF(gdth_iochan_str, list[0]);
1765         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,IOCHAN_DESC,
1766                               INVALID_CHANNEL,sizeof(gdth_iochan_str))) {
1767             for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1768                 ha->raw[bus_no].address = ioc->list[bus_no].address;
1769                 ha->raw[bus_no].local_no = ioc->list[bus_no].local_no;
1770             }
1771         } else {
1772             for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1773                 ha->raw[bus_no].address = IO_CHANNEL;
1774                 ha->raw[bus_no].local_no = bus_no;
1775             }
1776         }
1777         for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1778             chn = (gdth_getch_str *)ha->pscratch;
1779             chn->channel_no = ha->raw[bus_no].local_no;
1780             if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
1781                                   SCSI_CHAN_CNT | L_CTRL_PATTERN,
1782                                   ha->raw[bus_no].address | INVALID_CHANNEL,
1783                                   sizeof(gdth_getch_str))) {
1784                 ha->raw[bus_no].pdev_cnt = chn->drive_cnt;
1785                 TRACE2(("Channel %d: %d phys. drives\n",
1786                         bus_no,chn->drive_cnt));
1787             }
1788             if (ha->raw[bus_no].pdev_cnt > 0) {
1789                 drl = (gdth_drlist_str *)ha->pscratch;
1790                 drl->sc_no = ha->raw[bus_no].local_no;
1791                 drl->sc_cnt = ha->raw[bus_no].pdev_cnt;
1792                 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
1793                                       SCSI_DR_LIST | L_CTRL_PATTERN,
1794                                       ha->raw[bus_no].address | INVALID_CHANNEL,
1795                                       sizeof(gdth_drlist_str))) {
1796                     for (j = 0; j < ha->raw[bus_no].pdev_cnt; ++j)
1797                         ha->raw[bus_no].id_list[j] = drl->sc_list[j];
1798                 } else {
1799                     ha->raw[bus_no].pdev_cnt = 0;
1800                 }
1801             }
1802         }
1803
1804         /* logical drives */
1805         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_DRV_CNT,
1806                               INVALID_CHANNEL,sizeof(ulong32))) {
1807             drv_cnt = *(ulong32 *)ha->pscratch;
1808             if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_DRV_LIST,
1809                                   INVALID_CHANNEL,drv_cnt * sizeof(ulong32))) {
1810                 for (j = 0; j < drv_cnt; ++j) {
1811                     drv_no = ((ulong32 *)ha->pscratch)[j];
1812                     if (drv_no < MAX_LDRIVES) {
1813                         ha->hdr[drv_no].is_logdrv = TRUE;
1814                         TRACE2(("Drive %d is log. drive\n",drv_no));
1815                     }
1816                 }
1817             }
1818             alst = (gdth_arcdl_str *)ha->pscratch;
1819             alst->entries_avail = MAX_LDRIVES;
1820             alst->first_entry = 0;
1821             alst->list_offset = GDTOFFSOF(gdth_arcdl_str, list[0]);
1822             if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
1823                                   ARRAY_DRV_LIST2 | LA_CTRL_PATTERN,
1824                                   INVALID_CHANNEL, sizeof(gdth_arcdl_str) +
1825                                   (alst->entries_avail-1) * sizeof(gdth_alist_str))) {
1826                 for (j = 0; j < alst->entries_init; ++j) {
1827                     ha->hdr[j].is_arraydrv = alst->list[j].is_arrayd;
1828                     ha->hdr[j].is_master = alst->list[j].is_master;
1829                     ha->hdr[j].is_parity = alst->list[j].is_parity;
1830                     ha->hdr[j].is_hotfix = alst->list[j].is_hotfix;
1831                     ha->hdr[j].master_no = alst->list[j].cd_handle;
1832                 }
1833             } else if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
1834                                          ARRAY_DRV_LIST | LA_CTRL_PATTERN,
1835                                          0, 35 * sizeof(gdth_alist_str))) {
1836                 for (j = 0; j < 35; ++j) {
1837                     alst2 = &((gdth_alist_str *)ha->pscratch)[j];
1838                     ha->hdr[j].is_arraydrv = alst2->is_arrayd;
1839                     ha->hdr[j].is_master = alst2->is_master;
1840                     ha->hdr[j].is_parity = alst2->is_parity;
1841                     ha->hdr[j].is_hotfix = alst2->is_hotfix;
1842                     ha->hdr[j].master_no = alst2->cd_handle;
1843                 }
1844             }
1845         }
1846     }
1847
1848     /* initialize raw service */
1849     ha->raw_feat = 0;
1850     if (!force_dma32) {
1851         ok = gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_X_INIT_RAW,0,0,0);
1852         if (ok)
1853             ha->raw_feat = GDT_64BIT;
1854     }
1855     if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1856         ok = gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_INIT,0,0,0);
1857     if (!ok) {
1858         printk("GDT-HA %d: Initialization error raw service (code %d)\n",
1859                hanum, ha->status);
1860         return 0;
1861     }
1862     TRACE2(("gdth_search_drives(): RAWSERVICE initialized\n"));
1863
1864     /* set/get features raw service (scatter/gather) */
1865     if (gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_SET_FEAT,SCATTER_GATHER,
1866                           0,0)) {
1867         TRACE2(("gdth_search_drives(): set features RAWSERVICE OK\n"));
1868         if (gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_GET_FEAT,0,0,0)) {
1869             TRACE2(("gdth_search_dr(): get feat RAWSERVICE %d\n",
1870                     ha->info));
1871             ha->raw_feat |= (ushort)ha->info;
1872         }
1873     }
1874
1875     /* set/get features cache service (equal to raw service) */
1876     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_SET_FEAT,0,
1877                           SCATTER_GATHER,0)) {
1878         TRACE2(("gdth_search_drives(): set features CACHESERVICE OK\n"));
1879         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_GET_FEAT,0,0,0)) {
1880             TRACE2(("gdth_search_dr(): get feat CACHESERV. %d\n",
1881                     ha->info));
1882             ha->cache_feat |= (ushort)ha->info;
1883         }
1884     }
1885
1886     /* reserve drives for raw service */
1887     if (reserve_mode != 0) {
1888         gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_RESERVE_ALL,
1889                           reserve_mode == 1 ? 1 : 3, 0, 0);
1890         TRACE2(("gdth_search_drives(): RESERVE_ALL code %d\n",
1891                 ha->status));
1892     }
1893     for (i = 0; i < MAX_RES_ARGS; i += 4) {
1894         if (reserve_list[i] == hanum && reserve_list[i+1] < ha->bus_cnt &&
1895             reserve_list[i+2] < ha->tid_cnt && reserve_list[i+3] < MAXLUN) {
1896             TRACE2(("gdth_search_drives(): reserve ha %d bus %d id %d lun %d\n",
1897                     reserve_list[i], reserve_list[i+1],
1898                     reserve_list[i+2], reserve_list[i+3]));
1899             if (!gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_RESERVE,0,
1900                                    reserve_list[i+1], reserve_list[i+2] |
1901                                    (reserve_list[i+3] << 8))) {
1902                 printk("GDT-HA %d: Error raw service (RESERVE, code %d)\n",
1903                        hanum, ha->status);
1904              }
1905         }
1906     }
1907
1908     /* Determine OEM string using IOCTL */
1909     oemstr = (gdth_oem_str_ioctl *)ha->pscratch;
1910     oemstr->params.ctl_version = 0x01;
1911     oemstr->params.buffer_size = sizeof(oemstr->text);
1912     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
1913                           CACHE_READ_OEM_STRING_RECORD,INVALID_CHANNEL,
1914                           sizeof(gdth_oem_str_ioctl))) {
1915         TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD OK\n"));
1916         printk("GDT-HA %d: Vendor: %s Name: %s\n",
1917                hanum,oemstr->text.oem_company_name,ha->binfo.type_string);
1918         /* Save the Host Drive inquiry data */
1919         strlcpy(ha->oem_name,oemstr->text.scsi_host_drive_inquiry_vendor_id,
1920                 sizeof(ha->oem_name));
1921     } else {
1922         /* Old method, based on PCI ID */
1923         TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD failed\n"));
1924         printk("GDT-HA %d: Name: %s\n",
1925                hanum,ha->binfo.type_string);
1926         if (ha->oem_id == OEM_ID_INTEL)
1927             strlcpy(ha->oem_name,"Intel  ", sizeof(ha->oem_name));
1928         else
1929             strlcpy(ha->oem_name,"ICP    ", sizeof(ha->oem_name));
1930     }
1931
1932     /* scanning for host drives */
1933     for (i = 0; i < cdev_cnt; ++i)
1934         gdth_analyse_hdrive(hanum,i);
1935
1936     TRACE(("gdth_search_drives() OK\n"));
1937     return 1;
1938 }
1939
1940 static int gdth_analyse_hdrive(int hanum,ushort hdrive)
1941 {
1942     register gdth_ha_str *ha;
1943     ulong32 drv_cyls;
1944     int drv_hds, drv_secs;
1945
1946     TRACE(("gdth_analyse_hdrive() hanum %d drive %d\n",hanum,hdrive));
1947     if (hdrive >= MAX_HDRIVES)
1948         return 0;
1949     ha = HADATA(gdth_ctr_tab[hanum]);
1950
1951     if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_INFO,hdrive,0,0))
1952         return 0;
1953     ha->hdr[hdrive].present = TRUE;
1954     ha->hdr[hdrive].size = ha->info;
1955
1956     /* evaluate mapping (sectors per head, heads per cylinder) */
1957     ha->hdr[hdrive].size &= ~SECS32;
1958     if (ha->info2 == 0) {
1959         gdth_eval_mapping(ha->hdr[hdrive].size,&drv_cyls,&drv_hds,&drv_secs);
1960     } else {
1961         drv_hds = ha->info2 & 0xff;
1962         drv_secs = (ha->info2 >> 8) & 0xff;
1963         drv_cyls = (ulong32)ha->hdr[hdrive].size / drv_hds / drv_secs;
1964     }
1965     ha->hdr[hdrive].heads = (unchar)drv_hds;
1966     ha->hdr[hdrive].secs  = (unchar)drv_secs;
1967     /* round size */
1968     ha->hdr[hdrive].size  = drv_cyls * drv_hds * drv_secs;
1969
1970     if (ha->cache_feat & GDT_64BIT) {
1971         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_X_INFO,hdrive,0,0)
1972             && ha->info2 != 0) {
1973             ha->hdr[hdrive].size = ((ulong64)ha->info2 << 32) | ha->info;
1974         }
1975     }
1976     TRACE2(("gdth_search_dr() cdr. %d size %d hds %d scs %d\n",
1977             hdrive,ha->hdr[hdrive].size,drv_hds,drv_secs));
1978
1979     /* get informations about device */
1980     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_DEVTYPE,hdrive,0,0)) {
1981         TRACE2(("gdth_search_dr() cache drive %d devtype %d\n",
1982                 hdrive,ha->info));
1983         ha->hdr[hdrive].devtype = (ushort)ha->info;
1984     }
1985
1986     /* cluster info */
1987     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_CLUST_INFO,hdrive,0,0)) {
1988         TRACE2(("gdth_search_dr() cache drive %d cluster info %d\n",
1989                 hdrive,ha->info));
1990         if (!shared_access)
1991             ha->hdr[hdrive].cluster_type = (unchar)ha->info;
1992     }
1993
1994     /* R/W attributes */
1995     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_RW_ATTRIBS,hdrive,0,0)) {
1996         TRACE2(("gdth_search_dr() cache drive %d r/w attrib. %d\n",
1997                 hdrive,ha->info));
1998         ha->hdr[hdrive].rw_attribs = (unchar)ha->info;
1999     }
2000
2001     return 1;
2002 }
2003
2004
2005 /* command queueing/sending functions */
2006
2007 static void gdth_putq(int hanum,Scsi_Cmnd *scp,unchar priority)
2008 {
2009     register gdth_ha_str *ha;
2010     register Scsi_Cmnd *pscp;
2011     register Scsi_Cmnd *nscp;
2012     ulong flags;
2013     unchar b, t;
2014
2015     TRACE(("gdth_putq() priority %d\n",priority));
2016     ha = HADATA(gdth_ctr_tab[hanum]);
2017     spin_lock_irqsave(&ha->smp_lock, flags);
2018
2019     if (!IS_GDTH_INTERNAL_CMD(scp)) {
2020         scp->SCp.this_residual = (int)priority;
2021         b = virt_ctr ? NUMDATA(scp->device->host)->busnum:scp->device->channel;
2022         t = scp->device->id;
2023         if (priority >= DEFAULT_PRI) {
2024             if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2025                 (b==ha->virt_bus && t<MAX_HDRIVES && ha->hdr[t].lock)) {
2026                 TRACE2(("gdth_putq(): locked IO ->update_timeout()\n"));
2027                 scp->SCp.buffers_residual = gdth_update_timeout(hanum, scp, 0);
2028             }
2029         }
2030     }
2031
2032     if (ha->req_first==NULL) {
2033         ha->req_first = scp;                    /* queue was empty */
2034         scp->SCp.ptr = NULL;
2035     } else {                                    /* queue not empty */
2036         pscp = ha->req_first;
2037         nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2038         /* priority: 0-highest,..,0xff-lowest */
2039         while (nscp && (unchar)nscp->SCp.this_residual <= priority) {
2040             pscp = nscp;
2041             nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2042         }
2043         pscp->SCp.ptr = (char *)scp;
2044         scp->SCp.ptr  = (char *)nscp;
2045     }
2046     spin_unlock_irqrestore(&ha->smp_lock, flags);
2047
2048 #ifdef GDTH_STATISTICS
2049     flags = 0;
2050     for (nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
2051         ++flags;
2052     if (max_rq < flags) {
2053         max_rq = flags;
2054         TRACE3(("GDT: max_rq = %d\n",(ushort)max_rq));
2055     }
2056 #endif
2057 }
2058
2059 static void gdth_next(int hanum)
2060 {
2061     register gdth_ha_str *ha;
2062     register Scsi_Cmnd *pscp;
2063     register Scsi_Cmnd *nscp;
2064     unchar b, t, l, firsttime;
2065     unchar this_cmd, next_cmd;
2066     ulong flags = 0;
2067     int cmd_index;
2068
2069     TRACE(("gdth_next() hanum %d\n",hanum));
2070     ha = HADATA(gdth_ctr_tab[hanum]);
2071     if (!gdth_polling)
2072         spin_lock_irqsave(&ha->smp_lock, flags);
2073
2074     ha->cmd_cnt = ha->cmd_offs_dpmem = 0;
2075     this_cmd = firsttime = TRUE;
2076     next_cmd = gdth_polling ? FALSE:TRUE;
2077     cmd_index = 0;
2078
2079     for (nscp = pscp = ha->req_first; nscp; nscp = (Scsi_Cmnd *)nscp->SCp.ptr) {
2080         if (nscp != pscp && nscp != (Scsi_Cmnd *)pscp->SCp.ptr)
2081             pscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2082         if (!IS_GDTH_INTERNAL_CMD(nscp)) {
2083             b = virt_ctr ?
2084                 NUMDATA(nscp->device->host)->busnum : nscp->device->channel;
2085             t = nscp->device->id;
2086             l = nscp->device->lun;
2087             if (nscp->SCp.this_residual >= DEFAULT_PRI) {
2088                 if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2089                     (b == ha->virt_bus && t < MAX_HDRIVES && ha->hdr[t].lock))
2090                     continue;
2091             }
2092         } else
2093             b = t = l = 0;
2094
2095         if (firsttime) {
2096             if (gdth_test_busy(hanum)) {        /* controller busy ? */
2097                 TRACE(("gdth_next() controller %d busy !\n",hanum));
2098                 if (!gdth_polling) {
2099                     spin_unlock_irqrestore(&ha->smp_lock, flags);
2100                     return;
2101                 }
2102                 while (gdth_test_busy(hanum))
2103                     gdth_delay(1);
2104             }
2105             firsttime = FALSE;
2106         }
2107
2108         if (!IS_GDTH_INTERNAL_CMD(nscp)) {
2109         if (nscp->SCp.phase == -1) {
2110             nscp->SCp.phase = CACHESERVICE;           /* default: cache svc. */
2111             if (nscp->cmnd[0] == TEST_UNIT_READY) {
2112                 TRACE2(("TEST_UNIT_READY Bus %d Id %d LUN %d\n",
2113                         b, t, l));
2114                 /* TEST_UNIT_READY -> set scan mode */
2115                 if ((ha->scan_mode & 0x0f) == 0) {
2116                     if (b == 0 && t == 0 && l == 0) {
2117                         ha->scan_mode |= 1;
2118                         TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2119                     }
2120                 } else if ((ha->scan_mode & 0x0f) == 1) {
2121                     if (b == 0 && ((t == 0 && l == 1) ||
2122                          (t == 1 && l == 0))) {
2123                         nscp->SCp.sent_command = GDT_SCAN_START;
2124                         nscp->SCp.phase = ((ha->scan_mode & 0x10 ? 1:0) << 8)
2125                             | SCSIRAWSERVICE;
2126                         ha->scan_mode = 0x12;
2127                         TRACE2(("Scan mode: 0x%x (SCAN_START)\n",
2128                                 ha->scan_mode));
2129                     } else {
2130                         ha->scan_mode &= 0x10;
2131                         TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2132                     }
2133                 } else if (ha->scan_mode == 0x12) {
2134                     if (b == ha->bus_cnt && t == ha->tid_cnt-1) {
2135                         nscp->SCp.phase = SCSIRAWSERVICE;
2136                         nscp->SCp.sent_command = GDT_SCAN_END;
2137                         ha->scan_mode &= 0x10;
2138                         TRACE2(("Scan mode: 0x%x (SCAN_END)\n",
2139                                 ha->scan_mode));
2140                     }
2141                 }
2142             }
2143             if (b == ha->virt_bus && nscp->cmnd[0] != INQUIRY &&
2144                 nscp->cmnd[0] != READ_CAPACITY && nscp->cmnd[0] != MODE_SENSE &&
2145                 (ha->hdr[t].cluster_type & CLUSTER_DRIVE)) {
2146                 /* always GDT_CLUST_INFO! */
2147                 nscp->SCp.sent_command = GDT_CLUST_INFO;
2148             }
2149         }
2150         }
2151
2152         if (nscp->SCp.sent_command != -1) {
2153             if ((nscp->SCp.phase & 0xff) == CACHESERVICE) {
2154                 if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2155                     this_cmd = FALSE;
2156                 next_cmd = FALSE;
2157             } else if ((nscp->SCp.phase & 0xff) == SCSIRAWSERVICE) {
2158                 if (!(cmd_index=gdth_fill_raw_cmd(hanum,nscp,BUS_L2P(ha,b))))
2159                     this_cmd = FALSE;
2160                 next_cmd = FALSE;
2161             } else {
2162                 memset((char*)nscp->sense_buffer,0,16);
2163                 nscp->sense_buffer[0] = 0x70;
2164                 nscp->sense_buffer[2] = NOT_READY;
2165                 nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2166                 if (!nscp->SCp.have_data_in)
2167                     nscp->SCp.have_data_in++;
2168                 else
2169                     gdth_scsi_done(nscp);
2170             }
2171         } else if (IS_GDTH_INTERNAL_CMD(nscp)) {
2172             if (!(cmd_index=gdth_special_cmd(hanum,nscp)))
2173                 this_cmd = FALSE;
2174             next_cmd = FALSE;
2175         } else if (b != ha->virt_bus) {
2176             if (ha->raw[BUS_L2P(ha,b)].io_cnt[t] >= GDTH_MAX_RAW ||
2177                 !(cmd_index=gdth_fill_raw_cmd(hanum,nscp,BUS_L2P(ha,b))))
2178                 this_cmd = FALSE;
2179             else
2180                 ha->raw[BUS_L2P(ha,b)].io_cnt[t]++;
2181         } else if (t >= MAX_HDRIVES || !ha->hdr[t].present || l != 0) {
2182             TRACE2(("Command 0x%x to bus %d id %d lun %d -> IGNORE\n",
2183                     nscp->cmnd[0], b, t, l));
2184             nscp->result = DID_BAD_TARGET << 16;
2185             if (!nscp->SCp.have_data_in)
2186                 nscp->SCp.have_data_in++;
2187             else
2188                 gdth_scsi_done(nscp);
2189         } else {
2190             switch (nscp->cmnd[0]) {
2191               case TEST_UNIT_READY:
2192               case INQUIRY:
2193               case REQUEST_SENSE:
2194               case READ_CAPACITY:
2195               case VERIFY:
2196               case START_STOP:
2197               case MODE_SENSE:
2198               case SERVICE_ACTION_IN:
2199                 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2200                        nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2201                        nscp->cmnd[4],nscp->cmnd[5]));
2202                 if (ha->hdr[t].media_changed && nscp->cmnd[0] != INQUIRY) {
2203                     /* return UNIT_ATTENTION */
2204                     TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2205                              nscp->cmnd[0], t));
2206                     ha->hdr[t].media_changed = FALSE;
2207                     memset((char*)nscp->sense_buffer,0,16);
2208                     nscp->sense_buffer[0] = 0x70;
2209                     nscp->sense_buffer[2] = UNIT_ATTENTION;
2210                     nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2211                     if (!nscp->SCp.have_data_in)
2212                         nscp->SCp.have_data_in++;
2213                     else
2214                         gdth_scsi_done(nscp);
2215                 } else if (gdth_internal_cache_cmd(hanum, nscp))
2216                     gdth_scsi_done(nscp);
2217                 break;
2218
2219               case ALLOW_MEDIUM_REMOVAL:
2220                 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2221                        nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2222                        nscp->cmnd[4],nscp->cmnd[5]));
2223                 if ( (nscp->cmnd[4]&1) && !(ha->hdr[t].devtype&1) ) {
2224                     TRACE(("Prevent r. nonremov. drive->do nothing\n"));
2225                     nscp->result = DID_OK << 16;
2226                     nscp->sense_buffer[0] = 0;
2227                     if (!nscp->SCp.have_data_in)
2228                         nscp->SCp.have_data_in++;
2229                     else
2230                         gdth_scsi_done(nscp);
2231                 } else {
2232                     nscp->cmnd[3] = (ha->hdr[t].devtype&1) ? 1:0;
2233                     TRACE(("Prevent/allow r. %d rem. drive %d\n",
2234                            nscp->cmnd[4],nscp->cmnd[3]));
2235                     if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2236                         this_cmd = FALSE;
2237                 }
2238                 break;
2239
2240               case RESERVE:
2241               case RELEASE:
2242                 TRACE2(("cache cmd %s\n",nscp->cmnd[0] == RESERVE ?
2243                         "RESERVE" : "RELEASE"));
2244                 if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2245                     this_cmd = FALSE;
2246                 break;
2247
2248               case READ_6:
2249               case WRITE_6:
2250               case READ_10:
2251               case WRITE_10:
2252               case READ_16:
2253               case WRITE_16:
2254                 if (ha->hdr[t].media_changed) {
2255                     /* return UNIT_ATTENTION */
2256                     TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2257                              nscp->cmnd[0], t));
2258                     ha->hdr[t].media_changed = FALSE;
2259                     memset((char*)nscp->sense_buffer,0,16);
2260                     nscp->sense_buffer[0] = 0x70;
2261                     nscp->sense_buffer[2] = UNIT_ATTENTION;
2262                     nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2263                     if (!nscp->SCp.have_data_in)
2264                         nscp->SCp.have_data_in++;
2265                     else
2266                         gdth_scsi_done(nscp);
2267                 } else if (!(cmd_index=gdth_fill_cache_cmd(hanum, nscp, t)))
2268                     this_cmd = FALSE;
2269                 break;
2270
2271               default:
2272                 TRACE2(("cache cmd %x/%x/%x/%x/%x/%x unknown\n",nscp->cmnd[0],
2273                         nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2274                         nscp->cmnd[4],nscp->cmnd[5]));
2275                 printk("GDT-HA %d: Unknown SCSI command 0x%x to cache service !\n",
2276                        hanum, nscp->cmnd[0]);
2277                 nscp->result = DID_ABORT << 16;
2278                 if (!nscp->SCp.have_data_in)
2279                     nscp->SCp.have_data_in++;
2280                 else
2281                     gdth_scsi_done(nscp);
2282                 break;
2283             }
2284         }
2285
2286         if (!this_cmd)
2287             break;
2288         if (nscp == ha->req_first)
2289             ha->req_first = pscp = (Scsi_Cmnd *)nscp->SCp.ptr;
2290         else
2291             pscp->SCp.ptr = nscp->SCp.ptr;
2292         if (!next_cmd)
2293             break;
2294     }
2295
2296     if (ha->cmd_cnt > 0) {
2297         gdth_release_event(hanum);
2298     }
2299
2300     if (!gdth_polling)
2301         spin_unlock_irqrestore(&ha->smp_lock, flags);
2302
2303     if (gdth_polling && ha->cmd_cnt > 0) {
2304         if (!gdth_wait(hanum,cmd_index,POLL_TIMEOUT))
2305             printk("GDT-HA %d: Command %d timed out !\n",
2306                    hanum,cmd_index);
2307     }
2308 }
2309
2310 static void gdth_copy_internal_data(int hanum,Scsi_Cmnd *scp,
2311                                     char *buffer,ushort count)
2312 {
2313     ushort cpcount,i;
2314     ushort cpsum,cpnow;
2315     struct scatterlist *sl;
2316     gdth_ha_str *ha;
2317     char *address;
2318
2319     cpcount = count<=(ushort)scp->request_bufflen ? count:(ushort)scp->request_bufflen;
2320     ha = HADATA(gdth_ctr_tab[hanum]);
2321
2322     if (scp->use_sg) {
2323         sl = (struct scatterlist *)scp->request_buffer;
2324         for (i=0,cpsum=0; i<scp->use_sg; ++i,++sl) {
2325             unsigned long flags;
2326             cpnow = (ushort)sl->length;
2327             TRACE(("copy_internal() now %d sum %d count %d %d\n",
2328                           cpnow,cpsum,cpcount,(ushort)scp->bufflen));
2329             if (cpsum+cpnow > cpcount)
2330                 cpnow = cpcount - cpsum;
2331             cpsum += cpnow;
2332             if (!sl->page) {
2333                 printk("GDT-HA %d: invalid sc/gt element in gdth_copy_internal_data()\n",
2334                        hanum);
2335                 return;
2336             }
2337             local_irq_save(flags);
2338             address = kmap_atomic(sl->page, KM_BIO_SRC_IRQ) + sl->offset;
2339             memcpy(address,buffer,cpnow);
2340             flush_dcache_page(sl->page);
2341             kunmap_atomic(address, KM_BIO_SRC_IRQ);
2342             local_irq_restore(flags);
2343             if (cpsum == cpcount)
2344                 break;
2345             buffer += cpnow;
2346         }
2347     } else {
2348         TRACE(("copy_internal() count %d\n",cpcount));
2349         memcpy((char*)scp->request_buffer,buffer,cpcount);
2350     }
2351 }
2352
2353 static int gdth_internal_cache_cmd(int hanum,Scsi_Cmnd *scp)
2354 {
2355     register gdth_ha_str *ha;
2356     unchar t;
2357     gdth_inq_data inq;
2358     gdth_rdcap_data rdc;
2359     gdth_sense_data sd;
2360     gdth_modep_data mpd;
2361
2362     ha = HADATA(gdth_ctr_tab[hanum]);
2363     t  = scp->device->id;
2364     TRACE(("gdth_internal_cache_cmd() cmd 0x%x hdrive %d\n",
2365            scp->cmnd[0],t));
2366
2367     scp->result = DID_OK << 16;
2368     scp->sense_buffer[0] = 0;
2369
2370     switch (scp->cmnd[0]) {
2371       case TEST_UNIT_READY:
2372       case VERIFY:
2373       case START_STOP:
2374         TRACE2(("Test/Verify/Start hdrive %d\n",t));
2375         break;
2376
2377       case INQUIRY:
2378         TRACE2(("Inquiry hdrive %d devtype %d\n",
2379                 t,ha->hdr[t].devtype));
2380         inq.type_qual = (ha->hdr[t].devtype&4) ? TYPE_ROM:TYPE_DISK;
2381         /* you can here set all disks to removable, if you want to do
2382            a flush using the ALLOW_MEDIUM_REMOVAL command */
2383         inq.modif_rmb = 0x00;
2384         if ((ha->hdr[t].devtype & 1) ||
2385             (ha->hdr[t].cluster_type & CLUSTER_DRIVE))
2386             inq.modif_rmb = 0x80;
2387         inq.version   = 2;
2388         inq.resp_aenc = 2;
2389         inq.add_length= 32;
2390         strcpy(inq.vendor,ha->oem_name);
2391         sprintf(inq.product,"Host Drive  #%02d",t);
2392         strcpy(inq.revision,"   ");
2393         gdth_copy_internal_data(hanum,scp,(char*)&inq,sizeof(gdth_inq_data));
2394         break;
2395
2396       case REQUEST_SENSE:
2397         TRACE2(("Request sense hdrive %d\n",t));
2398         sd.errorcode = 0x70;
2399         sd.segno     = 0x00;
2400         sd.key       = NO_SENSE;
2401         sd.info      = 0;
2402         sd.add_length= 0;
2403         gdth_copy_internal_data(hanum,scp,(char*)&sd,sizeof(gdth_sense_data));
2404         break;
2405
2406       case MODE_SENSE:
2407         TRACE2(("Mode sense hdrive %d\n",t));
2408         memset((char*)&mpd,0,sizeof(gdth_modep_data));
2409         mpd.hd.data_length = sizeof(gdth_modep_data);
2410         mpd.hd.dev_par     = (ha->hdr[t].devtype&2) ? 0x80:0;
2411         mpd.hd.bd_length   = sizeof(mpd.bd);
2412         mpd.bd.block_length[0] = (SECTOR_SIZE & 0x00ff0000) >> 16;
2413         mpd.bd.block_length[1] = (SECTOR_SIZE & 0x0000ff00) >> 8;
2414         mpd.bd.block_length[2] = (SECTOR_SIZE & 0x000000ff);
2415         gdth_copy_internal_data(hanum,scp,(char*)&mpd,sizeof(gdth_modep_data));
2416         break;
2417
2418       case READ_CAPACITY:
2419         TRACE2(("Read capacity hdrive %d\n",t));
2420         if (ha->hdr[t].size > (ulong64)0xffffffff)
2421             rdc.last_block_no = 0xffffffff;
2422         else
2423             rdc.last_block_no = cpu_to_be32(ha->hdr[t].size-1);
2424         rdc.block_length  = cpu_to_be32(SECTOR_SIZE);
2425         gdth_copy_internal_data(hanum,scp,(char*)&rdc,sizeof(gdth_rdcap_data));
2426         break;
2427
2428       case SERVICE_ACTION_IN:
2429         if ((scp->cmnd[1] & 0x1f) == SAI_READ_CAPACITY_16 &&
2430             (ha->cache_feat & GDT_64BIT)) {
2431             gdth_rdcap16_data rdc16;
2432
2433             TRACE2(("Read capacity (16) hdrive %d\n",t));
2434             rdc16.last_block_no = cpu_to_be64(ha->hdr[t].size-1);
2435             rdc16.block_length  = cpu_to_be32(SECTOR_SIZE);
2436             gdth_copy_internal_data(hanum,scp,(char*)&rdc16,sizeof(gdth_rdcap16_data));
2437         } else {
2438             scp->result = DID_ABORT << 16;
2439         }
2440         break;
2441
2442       default:
2443         TRACE2(("Internal cache cmd 0x%x unknown\n",scp->cmnd[0]));
2444         break;
2445     }
2446
2447     if (!scp->SCp.have_data_in)
2448         scp->SCp.have_data_in++;
2449     else
2450         return 1;
2451
2452     return 0;
2453 }
2454
2455 static int gdth_fill_cache_cmd(int hanum,Scsi_Cmnd *scp,ushort hdrive)
2456 {
2457     register gdth_ha_str *ha;
2458     register gdth_cmd_str *cmdp;
2459     struct scatterlist *sl;
2460     ulong32 cnt, blockcnt;
2461     ulong64 no, blockno;
2462     dma_addr_t phys_addr;
2463     int i, cmd_index, read_write, sgcnt, mode64;
2464     struct page *page;
2465     ulong offset;
2466
2467     ha = HADATA(gdth_ctr_tab[hanum]);
2468     cmdp = ha->pccb;
2469     TRACE(("gdth_fill_cache_cmd() cmd 0x%x cmdsize %d hdrive %d\n",
2470                  scp->cmnd[0],scp->cmd_len,hdrive));
2471
2472     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2473         return 0;
2474
2475     mode64 = (ha->cache_feat & GDT_64BIT) ? TRUE : FALSE;
2476     /* test for READ_16, WRITE_16 if !mode64 ? ---
2477        not required, should not occur due to error return on
2478        READ_CAPACITY_16 */
2479
2480     cmdp->Service = CACHESERVICE;
2481     cmdp->RequestBuffer = scp;
2482     /* search free command index */
2483     if (!(cmd_index=gdth_get_cmd_index(hanum))) {
2484         TRACE(("GDT: No free command index found\n"));
2485         return 0;
2486     }
2487     /* if it's the first command, set command semaphore */
2488     if (ha->cmd_cnt == 0)
2489         gdth_set_sema0(hanum);
2490
2491     /* fill command */
2492     read_write = 0;
2493     if (scp->SCp.sent_command != -1)
2494         cmdp->OpCode = scp->SCp.sent_command;   /* special cache cmd. */
2495     else if (scp->cmnd[0] == RESERVE)
2496         cmdp->OpCode = GDT_RESERVE_DRV;
2497     else if (scp->cmnd[0] == RELEASE)
2498         cmdp->OpCode = GDT_RELEASE_DRV;
2499     else if (scp->cmnd[0] == ALLOW_MEDIUM_REMOVAL) {
2500         if (scp->cmnd[4] & 1)                   /* prevent ? */
2501             cmdp->OpCode = GDT_MOUNT;
2502         else if (scp->cmnd[3] & 1)              /* removable drive ? */
2503             cmdp->OpCode = GDT_UNMOUNT;
2504         else
2505             cmdp->OpCode = GDT_FLUSH;
2506     } else if (scp->cmnd[0] == WRITE_6 || scp->cmnd[0] == WRITE_10 ||
2507                scp->cmnd[0] == WRITE_12 || scp->cmnd[0] == WRITE_16
2508     ) {
2509         read_write = 1;
2510         if (gdth_write_through || ((ha->hdr[hdrive].rw_attribs & 1) &&
2511                                    (ha->cache_feat & GDT_WR_THROUGH)))
2512             cmdp->OpCode = GDT_WRITE_THR;
2513         else
2514             cmdp->OpCode = GDT_WRITE;
2515     } else {
2516         read_write = 2;
2517         cmdp->OpCode = GDT_READ;
2518     }
2519
2520     cmdp->BoardNode = LOCALBOARD;
2521     if (mode64) {
2522         cmdp->u.cache64.DeviceNo = hdrive;
2523         cmdp->u.cache64.BlockNo  = 1;
2524         cmdp->u.cache64.sg_canz  = 0;
2525     } else {
2526         cmdp->u.cache.DeviceNo = hdrive;
2527         cmdp->u.cache.BlockNo  = 1;
2528         cmdp->u.cache.sg_canz  = 0;
2529     }
2530
2531     if (read_write) {
2532         if (scp->cmd_len == 16) {
2533             memcpy(&no, &scp->cmnd[2], sizeof(ulong64));
2534             blockno = be64_to_cpu(no);
2535             memcpy(&cnt, &scp->cmnd[10], sizeof(ulong32));
2536             blockcnt = be32_to_cpu(cnt);
2537         } else if (scp->cmd_len == 10) {
2538             memcpy(&no, &scp->cmnd[2], sizeof(ulong32));
2539             blockno = be32_to_cpu(no);
2540             memcpy(&cnt, &scp->cmnd[7], sizeof(ushort));
2541             blockcnt = be16_to_cpu(cnt);
2542         } else {
2543             memcpy(&no, &scp->cmnd[0], sizeof(ulong32));
2544             blockno = be32_to_cpu(no) & 0x001fffffUL;
2545             blockcnt= scp->cmnd[4]==0 ? 0x100 : scp->cmnd[4];
2546         }
2547         if (mode64) {
2548             cmdp->u.cache64.BlockNo = blockno;
2549             cmdp->u.cache64.BlockCnt = blockcnt;
2550         } else {
2551             cmdp->u.cache.BlockNo = (ulong32)blockno;
2552             cmdp->u.cache.BlockCnt = blockcnt;
2553         }
2554
2555         if (scp->use_sg) {
2556             sl = (struct scatterlist *)scp->request_buffer;
2557             sgcnt = scp->use_sg;
2558             scp->SCp.Status = GDTH_MAP_SG;
2559             scp->SCp.Message = (read_write == 1 ?
2560                 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
2561             sgcnt = pci_map_sg(ha->pdev,sl,scp->use_sg,scp->SCp.Message);
2562             if (mode64) {
2563                 cmdp->u.cache64.DestAddr= (ulong64)-1;
2564                 cmdp->u.cache64.sg_canz = sgcnt;
2565                 for (i=0; i<sgcnt; ++i,++sl) {
2566                     cmdp->u.cache64.sg_lst[i].sg_ptr = sg_dma_address(sl);
2567 #ifdef GDTH_DMA_STATISTICS
2568                     if (cmdp->u.cache64.sg_lst[i].sg_ptr > (ulong64)0xffffffff)
2569                         ha->dma64_cnt++;
2570                     else
2571                         ha->dma32_cnt++;
2572 #endif
2573                     cmdp->u.cache64.sg_lst[i].sg_len = sg_dma_len(sl);
2574                 }
2575             } else {
2576                 cmdp->u.cache.DestAddr= 0xffffffff;
2577                 cmdp->u.cache.sg_canz = sgcnt;
2578                 for (i=0; i<sgcnt; ++i,++sl) {
2579                     cmdp->u.cache.sg_lst[i].sg_ptr = sg_dma_address(sl);
2580 #ifdef GDTH_DMA_STATISTICS
2581                     ha->dma32_cnt++;
2582 #endif
2583                     cmdp->u.cache.sg_lst[i].sg_len = sg_dma_len(sl);
2584                 }
2585             }
2586
2587 #ifdef GDTH_STATISTICS
2588             if (max_sg < (ulong32)sgcnt) {
2589                 max_sg = (ulong32)sgcnt;
2590                 TRACE3(("GDT: max_sg = %d\n",max_sg));
2591             }
2592 #endif
2593
2594         } else if (scp->request_bufflen) {
2595             scp->SCp.Status = GDTH_MAP_SINGLE;
2596             scp->SCp.Message = (read_write == 1 ?
2597                 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
2598             page = virt_to_page(scp->request_buffer);
2599             offset = (ulong)scp->request_buffer & ~PAGE_MASK;
2600             phys_addr = pci_map_page(ha->pdev,page,offset,
2601                                      scp->request_bufflen,scp->SCp.Message);
2602             scp->SCp.dma_handle = phys_addr;
2603             if (mode64) {
2604                 if (ha->cache_feat & SCATTER_GATHER) {
2605                     cmdp->u.cache64.DestAddr = (ulong64)-1;
2606                     cmdp->u.cache64.sg_canz = 1;
2607                     cmdp->u.cache64.sg_lst[0].sg_ptr = phys_addr;
2608                     cmdp->u.cache64.sg_lst[0].sg_len = scp->request_bufflen;
2609                     cmdp->u.cache64.sg_lst[1].sg_len = 0;
2610                 } else {
2611                     cmdp->u.cache64.DestAddr  = phys_addr;
2612                     cmdp->u.cache64.sg_canz= 0;
2613                 }
2614             } else {
2615                 if (ha->cache_feat & SCATTER_GATHER) {
2616                     cmdp->u.cache.DestAddr = 0xffffffff;
2617                     cmdp->u.cache.sg_canz = 1;
2618                     cmdp->u.cache.sg_lst[0].sg_ptr = phys_addr;
2619                     cmdp->u.cache.sg_lst[0].sg_len = scp->request_bufflen;
2620                     cmdp->u.cache.sg_lst[1].sg_len = 0;
2621                 } else {
2622                     cmdp->u.cache.DestAddr  = phys_addr;
2623                     cmdp->u.cache.sg_canz= 0;
2624                 }
2625             }
2626         }
2627     }
2628     /* evaluate command size, check space */
2629     if (mode64) {
2630         TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2631                cmdp->u.cache64.DestAddr,cmdp->u.cache64.sg_canz,
2632                cmdp->u.cache64.sg_lst[0].sg_ptr,
2633                cmdp->u.cache64.sg_lst[0].sg_len));
2634         TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2635                cmdp->OpCode,cmdp->u.cache64.BlockNo,cmdp->u.cache64.BlockCnt));
2636         ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) +
2637             (ushort)cmdp->u.cache64.sg_canz * sizeof(gdth_sg64_str);
2638     } else {
2639         TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2640                cmdp->u.cache.DestAddr,cmdp->u.cache.sg_canz,
2641                cmdp->u.cache.sg_lst[0].sg_ptr,
2642                cmdp->u.cache.sg_lst[0].sg_len));
2643         TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2644                cmdp->OpCode,cmdp->u.cache.BlockNo,cmdp->u.cache.BlockCnt));
2645         ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) +
2646             (ushort)cmdp->u.cache.sg_canz * sizeof(gdth_sg_str);
2647     }
2648     if (ha->cmd_len & 3)
2649         ha->cmd_len += (4 - (ha->cmd_len & 3));
2650
2651     if (ha->cmd_cnt > 0) {
2652         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2653             ha->ic_all_size) {
2654             TRACE2(("gdth_fill_cache() DPMEM overflow\n"));
2655             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2656             return 0;
2657         }
2658     }
2659
2660     /* copy command */
2661     gdth_copy_command(hanum);
2662     return cmd_index;
2663 }
2664
2665 static int gdth_fill_raw_cmd(int hanum,Scsi_Cmnd *scp,unchar b)
2666 {
2667     register gdth_ha_str *ha;
2668     register gdth_cmd_str *cmdp;
2669     struct scatterlist *sl;
2670     ushort i;
2671     dma_addr_t phys_addr, sense_paddr;
2672     int cmd_index, sgcnt, mode64;
2673     unchar t,l;
2674     struct page *page;
2675     ulong offset;
2676
2677     ha = HADATA(gdth_ctr_tab[hanum]);
2678     t = scp->device->id;
2679     l = scp->device->lun;
2680     cmdp = ha->pccb;
2681     TRACE(("gdth_fill_raw_cmd() cmd 0x%x bus %d ID %d LUN %d\n",
2682            scp->cmnd[0],b,t,l));
2683
2684     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2685         return 0;
2686
2687     mode64 = (ha->raw_feat & GDT_64BIT) ? TRUE : FALSE;
2688
2689     cmdp->Service = SCSIRAWSERVICE;
2690     cmdp->RequestBuffer = scp;
2691     /* search free command index */
2692     if (!(cmd_index=gdth_get_cmd_index(hanum))) {
2693         TRACE(("GDT: No free command index found\n"));
2694         return 0;
2695     }
2696     /* if it's the first command, set command semaphore */
2697     if (ha->cmd_cnt == 0)
2698         gdth_set_sema0(hanum);
2699
2700     /* fill command */
2701     if (scp->SCp.sent_command != -1) {
2702         cmdp->OpCode           = scp->SCp.sent_command; /* special raw cmd. */
2703         cmdp->BoardNode        = LOCALBOARD;
2704         if (mode64) {
2705             cmdp->u.raw64.direction = (scp->SCp.phase >> 8);
2706             TRACE2(("special raw cmd 0x%x param 0x%x\n",
2707                     cmdp->OpCode, cmdp->u.raw64.direction));
2708             /* evaluate command size */
2709             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst);
2710         } else {
2711             cmdp->u.raw.direction  = (scp->SCp.phase >> 8);
2712             TRACE2(("special raw cmd 0x%x param 0x%x\n",
2713                     cmdp->OpCode, cmdp->u.raw.direction));
2714             /* evaluate command size */
2715             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst);
2716         }
2717
2718     } else {
2719         page = virt_to_page(scp->sense_buffer);
2720         offset = (ulong)scp->sense_buffer & ~PAGE_MASK;
2721         sense_paddr = pci_map_page(ha->pdev,page,offset,
2722                                    16,PCI_DMA_FROMDEVICE);
2723         *(ulong32 *)&scp->SCp.buffer = (ulong32)sense_paddr;
2724         /* high part, if 64bit */
2725         *(ulong32 *)&scp->host_scribble = (ulong32)((ulong64)sense_paddr >> 32);
2726         cmdp->OpCode           = GDT_WRITE;             /* always */
2727         cmdp->BoardNode        = LOCALBOARD;
2728         if (mode64) {
2729             cmdp->u.raw64.reserved   = 0;
2730             cmdp->u.raw64.mdisc_time = 0;
2731             cmdp->u.raw64.mcon_time  = 0;
2732             cmdp->u.raw64.clen       = scp->cmd_len;
2733             cmdp->u.raw64.target     = t;
2734             cmdp->u.raw64.lun        = l;
2735             cmdp->u.raw64.bus        = b;
2736             cmdp->u.raw64.priority   = 0;
2737             cmdp->u.raw64.sdlen      = scp->request_bufflen;
2738             cmdp->u.raw64.sense_len  = 16;
2739             cmdp->u.raw64.sense_data = sense_paddr;
2740             cmdp->u.raw64.direction  =
2741                 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
2742             memcpy(cmdp->u.raw64.cmd,scp->cmnd,16);
2743             cmdp->u.raw64.sg_ranz    = 0;
2744         } else {
2745             cmdp->u.raw.reserved   = 0;
2746             cmdp->u.raw.mdisc_time = 0;
2747             cmdp->u.raw.mcon_time  = 0;
2748             cmdp->u.raw.clen       = scp->cmd_len;
2749             cmdp->u.raw.target     = t;
2750             cmdp->u.raw.lun        = l;
2751             cmdp->u.raw.bus        = b;
2752             cmdp->u.raw.priority   = 0;
2753             cmdp->u.raw.link_p     = 0;
2754             cmdp->u.raw.sdlen      = scp->request_bufflen;
2755             cmdp->u.raw.sense_len  = 16;
2756             cmdp->u.raw.sense_data = sense_paddr;
2757             cmdp->u.raw.direction  =
2758                 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
2759             memcpy(cmdp->u.raw.cmd,scp->cmnd,12);
2760             cmdp->u.raw.sg_ranz    = 0;
2761         }
2762
2763         if (scp->use_sg) {
2764             sl = (struct scatterlist *)scp->request_buffer;
2765             sgcnt = scp->use_sg;
2766             scp->SCp.Status = GDTH_MAP_SG;
2767             scp->SCp.Message = PCI_DMA_BIDIRECTIONAL;
2768             sgcnt = pci_map_sg(ha->pdev,sl,scp->use_sg,scp->SCp.Message);
2769             if (mode64) {
2770                 cmdp->u.raw64.sdata = (ulong64)-1;
2771                 cmdp->u.raw64.sg_ranz = sgcnt;
2772                 for (i=0; i<sgcnt; ++i,++sl) {
2773                     cmdp->u.raw64.sg_lst[i].sg_ptr = sg_dma_address(sl);
2774 #ifdef GDTH_DMA_STATISTICS
2775                     if (cmdp->u.raw64.sg_lst[i].sg_ptr > (ulong64)0xffffffff)
2776                         ha->dma64_cnt++;
2777                     else
2778                         ha->dma32_cnt++;
2779 #endif
2780                     cmdp->u.raw64.sg_lst[i].sg_len = sg_dma_len(sl);
2781                 }
2782             } else {
2783                 cmdp->u.raw.sdata = 0xffffffff;
2784                 cmdp->u.raw.sg_ranz = sgcnt;
2785                 for (i=0; i<sgcnt; ++i,++sl) {
2786                     cmdp->u.raw.sg_lst[i].sg_ptr = sg_dma_address(sl);
2787 #ifdef GDTH_DMA_STATISTICS
2788                     ha->dma32_cnt++;
2789 #endif
2790                     cmdp->u.raw.sg_lst[i].sg_len = sg_dma_len(sl);
2791                 }
2792             }
2793
2794 #ifdef GDTH_STATISTICS
2795             if (max_sg < sgcnt) {
2796                 max_sg = sgcnt;
2797                 TRACE3(("GDT: max_sg = %d\n",sgcnt));
2798             }
2799 #endif
2800
2801         } else if (scp->request_bufflen) {
2802             scp->SCp.Status = GDTH_MAP_SINGLE;
2803             scp->SCp.Message = PCI_DMA_BIDIRECTIONAL;
2804             page = virt_to_page(scp->request_buffer);
2805             offset = (ulong)scp->request_buffer & ~PAGE_MASK;
2806             phys_addr = pci_map_page(ha->pdev,page,offset,
2807                                      scp->request_bufflen,scp->SCp.Message);
2808             scp->SCp.dma_handle = phys_addr;
2809
2810             if (mode64) {
2811                 if (ha->raw_feat & SCATTER_GATHER) {
2812                     cmdp->u.raw64.sdata  = (ulong64)-1;
2813                     cmdp->u.raw64.sg_ranz= 1;
2814                     cmdp->u.raw64.sg_lst[0].sg_ptr = phys_addr;
2815                     cmdp->u.raw64.sg_lst[0].sg_len = scp->request_bufflen;
2816                     cmdp->u.raw64.sg_lst[1].sg_len = 0;
2817                 } else {
2818                     cmdp->u.raw64.sdata  = phys_addr;
2819                     cmdp->u.raw64.sg_ranz= 0;
2820                 }
2821             } else {
2822                 if (ha->raw_feat & SCATTER_GATHER) {
2823                     cmdp->u.raw.sdata  = 0xffffffff;
2824                     cmdp->u.raw.sg_ranz= 1;
2825                     cmdp->u.raw.sg_lst[0].sg_ptr = phys_addr;
2826                     cmdp->u.raw.sg_lst[0].sg_len = scp->request_bufflen;
2827                     cmdp->u.raw.sg_lst[1].sg_len = 0;
2828                 } else {
2829                     cmdp->u.raw.sdata  = phys_addr;
2830                     cmdp->u.raw.sg_ranz= 0;
2831                 }
2832             }
2833         }
2834         if (mode64) {
2835             TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2836                    cmdp->u.raw64.sdata,cmdp->u.raw64.sg_ranz,
2837                    cmdp->u.raw64.sg_lst[0].sg_ptr,
2838                    cmdp->u.raw64.sg_lst[0].sg_len));
2839             /* evaluate command size */
2840             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) +
2841                 (ushort)cmdp->u.raw64.sg_ranz * sizeof(gdth_sg64_str);
2842         } else {
2843             TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2844                    cmdp->u.raw.sdata,cmdp->u.raw.sg_ranz,
2845                    cmdp->u.raw.sg_lst[0].sg_ptr,
2846                    cmdp->u.raw.sg_lst[0].sg_len));
2847             /* evaluate command size */
2848             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) +
2849                 (ushort)cmdp->u.raw.sg_ranz * sizeof(gdth_sg_str);
2850         }
2851     }
2852     /* check space */
2853     if (ha->cmd_len & 3)
2854         ha->cmd_len += (4 - (ha->cmd_len & 3));
2855
2856     if (ha->cmd_cnt > 0) {
2857         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2858             ha->ic_all_size) {
2859             TRACE2(("gdth_fill_raw() DPMEM overflow\n"));
2860             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2861             return 0;
2862         }
2863     }
2864
2865     /* copy command */
2866     gdth_copy_command(hanum);
2867     return cmd_index;
2868 }
2869
2870 static int gdth_special_cmd(int hanum,Scsi_Cmnd *scp)
2871 {
2872     register gdth_ha_str *ha;
2873     register gdth_cmd_str *cmdp;
2874     int cmd_index;
2875
2876     ha  = HADATA(gdth_ctr_tab[hanum]);
2877     cmdp= ha->pccb;
2878     TRACE2(("gdth_special_cmd(): "));
2879
2880     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2881         return 0;
2882
2883     memcpy( cmdp, scp->request_buffer, sizeof(gdth_cmd_str));
2884     cmdp->RequestBuffer = scp;
2885
2886     /* search free command index */
2887     if (!(cmd_index=gdth_get_cmd_index(hanum))) {
2888         TRACE(("GDT: No free command index found\n"));
2889         return 0;
2890     }
2891
2892     /* if it's the first command, set command semaphore */
2893     if (ha->cmd_cnt == 0)
2894        gdth_set_sema0(hanum);
2895
2896     /* evaluate command size, check space */
2897     if (cmdp->OpCode == GDT_IOCTL) {
2898         TRACE2(("IOCTL\n"));
2899         ha->cmd_len =
2900             GDTOFFSOF(gdth_cmd_str,u.ioctl.p_param) + sizeof(ulong64);
2901     } else if (cmdp->Service == CACHESERVICE) {
2902         TRACE2(("cache command %d\n",cmdp->OpCode));
2903         if (ha->cache_feat & GDT_64BIT)
2904             ha->cmd_len =
2905                 GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) + sizeof(gdth_sg64_str);
2906         else
2907             ha->cmd_len =
2908                 GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) + sizeof(gdth_sg_str);
2909     } else if (cmdp->Service == SCSIRAWSERVICE) {
2910         TRACE2(("raw command %d\n",cmdp->OpCode));
2911         if (ha->raw_feat & GDT_64BIT)
2912             ha->cmd_len =
2913                 GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) + sizeof(gdth_sg64_str);
2914         else
2915             ha->cmd_len =
2916                 GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) + sizeof(gdth_sg_str);
2917     }
2918
2919     if (ha->cmd_len & 3)
2920         ha->cmd_len += (4 - (ha->cmd_len & 3));
2921
2922     if (ha->cmd_cnt > 0) {
2923         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2924             ha->ic_all_size) {
2925             TRACE2(("gdth_special_cmd() DPMEM overflow\n"));
2926             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2927             return 0;
2928         }
2929     }
2930
2931     /* copy command */
2932     gdth_copy_command(hanum);
2933     return cmd_index;
2934 }
2935
2936
2937 /* Controller event handling functions */
2938 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
2939                                       ushort idx, gdth_evt_data *evt)
2940 {
2941     gdth_evt_str *e;
2942     struct timeval tv;
2943
2944     /* no GDTH_LOCK_HA() ! */
2945     TRACE2(("gdth_store_event() source %d idx %d\n", source, idx));
2946     if (source == 0)                        /* no source -> no event */
2947         return NULL;
2948
2949     if (ebuffer[elastidx].event_source == source &&
2950         ebuffer[elastidx].event_idx == idx &&
2951         ((evt->size != 0 && ebuffer[elastidx].event_data.size != 0 &&
2952             !memcmp((char *)&ebuffer[elastidx].event_data.eu,
2953             (char *)&evt->eu, evt->size)) ||
2954         (evt->size == 0 && ebuffer[elastidx].event_data.size == 0 &&
2955             !strcmp((char *)&ebuffer[elastidx].event_data.event_string,
2956             (char *)&evt->event_string)))) {
2957         e = &ebuffer[elastidx];
2958         do_gettimeofday(&tv);
2959         e->last_stamp = tv.tv_sec;
2960         ++e->same_count;
2961     } else {
2962         if (ebuffer[elastidx].event_source != 0) {  /* entry not free ? */
2963             ++elastidx;
2964             if (elastidx == MAX_EVENTS)
2965                 elastidx = 0;
2966             if (elastidx == eoldidx) {              /* reached mark ? */
2967                 ++eoldidx;
2968                 if (eoldidx == MAX_EVENTS)
2969                     eoldidx = 0;
2970             }
2971         }
2972         e = &ebuffer[elastidx];
2973         e->event_source = source;
2974         e->event_idx = idx;
2975         do_gettimeofday(&tv);
2976         e->first_stamp = e->last_stamp = tv.tv_sec;
2977         e->same_count = 1;
2978         e->event_data = *evt;
2979         e->application = 0;
2980     }
2981     return e;
2982 }
2983
2984 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr)
2985 {
2986     gdth_evt_str *e;
2987     int eindex;
2988     ulong flags;
2989
2990     TRACE2(("gdth_read_event() handle %d\n", handle));
2991     spin_lock_irqsave(&ha->smp_lock, flags);
2992     if (handle == -1)
2993         eindex = eoldidx;
2994     else
2995         eindex = handle;
2996     estr->event_source = 0;
2997
2998     if (eindex >= MAX_EVENTS) {
2999         spin_unlock_irqrestore(&ha->smp_lock, flags);
3000         return eindex;
3001     }
3002     e = &ebuffer[eindex];
3003     if (e->event_source != 0) {
3004         if (eindex != elastidx) {
3005             if (++eindex == MAX_EVENTS)
3006                 eindex = 0;
3007         } else {
3008             eindex = -1;
3009         }
3010         memcpy(estr, e, sizeof(gdth_evt_str));
3011     }
3012     spin_unlock_irqrestore(&ha->smp_lock, flags);
3013     return eindex;
3014 }
3015
3016 static void gdth_readapp_event(gdth_ha_str *ha,
3017                                unchar application, gdth_evt_str *estr)
3018 {
3019     gdth_evt_str *e;
3020     int eindex;
3021     ulong flags;
3022     unchar found = FALSE;
3023
3024     TRACE2(("gdth_readapp_event() app. %d\n", application));
3025     spin_lock_irqsave(&ha->smp_lock, flags);
3026     eindex = eoldidx;
3027     for (;;) {
3028         e = &ebuffer[eindex];
3029         if (e->event_source == 0)
3030             break;
3031         if ((e->application & application) == 0) {
3032             e->application |= application;
3033             found = TRUE;
3034             break;
3035         }
3036         if (eindex == elastidx)
3037             break;
3038         if (++eindex == MAX_EVENTS)
3039             eindex = 0;
3040     }
3041     if (found)
3042         memcpy(estr, e, sizeof(gdth_evt_str));
3043     else
3044         estr->event_source = 0;
3045     spin_unlock_irqrestore(&ha->smp_lock, flags);
3046 }
3047
3048 static void gdth_clear_events(void)
3049 {
3050     TRACE(("gdth_clear_events()"));
3051
3052     eoldidx = elastidx = 0;
3053     ebuffer[0].event_source = 0;
3054 }
3055
3056
3057 /* SCSI interface functions */
3058
3059 static irqreturn_t gdth_interrupt(int irq,void *dev_id)
3060 {
3061     gdth_ha_str *ha2 = (gdth_ha_str *)dev_id;
3062     register gdth_ha_str *ha;
3063     gdt6m_dpram_str __iomem *dp6m_ptr = NULL;
3064     gdt6_dpram_str __iomem *dp6_ptr;
3065     gdt2_dpram_str __iomem *dp2_ptr;
3066     Scsi_Cmnd *scp;
3067     int hanum, rval, i;
3068     unchar IStatus;
3069     ushort Service;
3070     ulong flags = 0;
3071 #ifdef INT_COAL
3072     int coalesced = FALSE;
3073     int next = FALSE;
3074     gdth_coal_status *pcs = NULL;
3075     int act_int_coal = 0;
3076 #endif
3077
3078     TRACE(("gdth_interrupt() IRQ %d\n",irq));
3079
3080     /* if polling and not from gdth_wait() -> return */
3081     if (gdth_polling) {
3082         if (!gdth_from_wait) {
3083             return IRQ_HANDLED;
3084         }
3085     }
3086
3087     if (!gdth_polling)
3088         spin_lock_irqsave(&ha2->smp_lock, flags);
3089     wait_index = 0;
3090
3091     /* search controller */
3092     if ((hanum = gdth_get_status(&IStatus,irq)) == -1) {
3093         /* spurious interrupt */
3094         if (!gdth_polling)
3095             spin_unlock_irqrestore(&ha2->smp_lock, flags);
3096             return IRQ_HANDLED;
3097     }
3098     ha = HADATA(gdth_ctr_tab[hanum]);
3099
3100 #ifdef GDTH_STATISTICS
3101     ++act_ints;
3102 #endif
3103
3104 #ifdef INT_COAL
3105     /* See if the fw is returning coalesced status */
3106     if (IStatus == COALINDEX) {
3107         /* Coalesced status.  Setup the initial status
3108            buffer pointer and flags */
3109         pcs = ha->coal_stat;
3110         coalesced = TRUE;
3111         next = TRUE;
3112     }
3113
3114     do {
3115         if (coalesced) {
3116             /* For coalesced requests all status
3117                information is found in the status buffer */
3118             IStatus = (unchar)(pcs->status & 0xff);
3119         }
3120 #endif
3121
3122         if (ha->type == GDT_EISA) {
3123             if (IStatus & 0x80) {                       /* error flag */
3124                 IStatus &= ~0x80;
3125                 ha->status = inw(ha->bmic + MAILBOXREG+8);
3126                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3127             } else                                      /* no error */
3128                 ha->status = S_OK;
3129             ha->info = inl(ha->bmic + MAILBOXREG+12);
3130             ha->service = inw(ha->bmic + MAILBOXREG+10);
3131             ha->info2 = inl(ha->bmic + MAILBOXREG+4);
3132
3133             outb(0xff, ha->bmic + EDOORREG);    /* acknowledge interrupt */
3134             outb(0x00, ha->bmic + SEMA1REG);    /* reset status semaphore */
3135         } else if (ha->type == GDT_ISA) {
3136             dp2_ptr = ha->brd;
3137             if (IStatus & 0x80) {                       /* error flag */
3138                 IStatus &= ~0x80;
3139                 ha->status = readw(&dp2_ptr->u.ic.Status);
3140                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3141             } else                                      /* no error */
3142                 ha->status = S_OK;
3143             ha->info = readl(&dp2_ptr->u.ic.Info[0]);
3144             ha->service = readw(&dp2_ptr->u.ic.Service);
3145             ha->info2 = readl(&dp2_ptr->u.ic.Info[1]);
3146
3147             writeb(0xff, &dp2_ptr->io.irqdel); /* acknowledge interrupt */
3148             writeb(0, &dp2_ptr->u.ic.Cmd_Index);/* reset command index */
3149             writeb(0, &dp2_ptr->io.Sema1);     /* reset status semaphore */
3150         } else if (ha->type == GDT_PCI) {
3151             dp6_ptr = ha->brd;
3152             if (IStatus & 0x80) {                       /* error flag */
3153                 IStatus &= ~0x80;
3154                 ha->status = readw(&dp6_ptr->u.ic.Status);
3155                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3156             } else                                      /* no error */
3157                 ha->status = S_OK;
3158             ha->info = readl(&dp6_ptr->u.ic.Info[0]);
3159             ha->service = readw(&dp6_ptr->u.ic.Service);
3160             ha->info2 = readl(&dp6_ptr->u.ic.Info[1]);
3161
3162             writeb(0xff, &dp6_ptr->io.irqdel); /* acknowledge interrupt */
3163             writeb(0, &dp6_ptr->u.ic.Cmd_Index);/* reset command index */
3164             writeb(0, &dp6_ptr->io.Sema1);     /* reset status semaphore */
3165         } else if (ha->type == GDT_PCINEW) {
3166             if (IStatus & 0x80) {                       /* error flag */
3167                 IStatus &= ~0x80;
3168                 ha->status = inw(PTR2USHORT(&ha->plx->status));
3169                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3170             } else
3171                 ha->status = S_OK;
3172             ha->info = inl(PTR2USHORT(&ha->plx->info[0]));
3173             ha->service = inw(PTR2USHORT(&ha->plx->service));
3174             ha->info2 = inl(PTR2USHORT(&ha->plx->info[1]));
3175
3176             outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
3177             outb(0x00, PTR2USHORT(&ha->plx->sema1_reg));
3178         } else if (ha->type == GDT_PCIMPR) {
3179             dp6m_ptr = ha->brd;
3180             if (IStatus & 0x80) {                       /* error flag */
3181                 IStatus &= ~0x80;
3182 #ifdef INT_COAL
3183                 if (coalesced)
3184                     ha->status = pcs->ext_status & 0xffff;
3185                 else
3186 #endif
3187                     ha->status = readw(&dp6m_ptr->i960r.status);
3188                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3189             } else                                      /* no error */
3190                 ha->status = S_OK;
3191 #ifdef INT_COAL
3192             /* get information */
3193             if (coalesced) {
3194                 ha->info = pcs->info0;
3195                 ha->info2 = pcs->info1;
3196                 ha->service = (pcs->ext_status >> 16) & 0xffff;
3197             } else
3198 #endif
3199             {
3200                 ha->info = readl(&dp6m_ptr->i960r.info[0]);
3201                 ha->service = readw(&dp6m_ptr->i960r.service);
3202                 ha->info2 = readl(&dp6m_ptr->i960r.info[1]);
3203             }
3204             /* event string */
3205             if (IStatus == ASYNCINDEX) {
3206                 if (ha->service != SCREENSERVICE &&
3207                     (ha->fw_vers & 0xff) >= 0x1a) {
3208                     ha->dvr.severity = readb
3209                         (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.severity);
3210                     for (i = 0; i < 256; ++i) {
3211                         ha->dvr.event_string[i] = readb
3212                             (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.evt_str[i]);
3213                         if (ha->dvr.event_string[i] == 0)
3214                             break;
3215                     }
3216                 }
3217             }
3218 #ifdef INT_COAL
3219             /* Make sure that non coalesced interrupts get cleared
3220                before being handled by gdth_async_event/gdth_sync_event */
3221             if (!coalesced)
3222 #endif
3223             {
3224                 writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3225                 writeb(0, &dp6m_ptr->i960r.sema1_reg);
3226             }
3227         } else {
3228             TRACE2(("gdth_interrupt() unknown controller type\n"));
3229             if (!gdth_polling)
3230                 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3231             return IRQ_HANDLED;
3232         }
3233
3234         TRACE(("gdth_interrupt() index %d stat %d info %d\n",
3235                IStatus,ha->status,ha->info));
3236
3237         if (gdth_from_wait) {
3238             wait_hanum = hanum;
3239             wait_index = (int)IStatus;
3240         }
3241
3242         if (IStatus == ASYNCINDEX) {
3243             TRACE2(("gdth_interrupt() async. event\n"));
3244             gdth_async_event(hanum);
3245             if (!gdth_polling)
3246                 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3247             gdth_next(hanum);
3248             return IRQ_HANDLED;
3249         }
3250
3251         if (IStatus == SPEZINDEX) {
3252             TRACE2(("Service unknown or not initialized !\n"));
3253             ha->dvr.size = sizeof(ha->dvr.eu.driver);
3254             ha->dvr.eu.driver.ionode = hanum;
3255             gdth_store_event(ha, ES_DRIVER, 4, &ha->dvr);
3256             if (!gdth_polling)
3257                 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3258             return IRQ_HANDLED;
3259         }
3260         scp     = ha->cmd_tab[IStatus-2].cmnd;
3261         Service = ha->cmd_tab[IStatus-2].service;
3262         ha->cmd_tab[IStatus-2].cmnd = UNUSED_CMND;
3263         if (scp == UNUSED_CMND) {
3264             TRACE2(("gdth_interrupt() index to unused command (%d)\n",IStatus));
3265             ha->dvr.size = sizeof(ha->dvr.eu.driver);
3266             ha->dvr.eu.driver.ionode = hanum;
3267             ha->dvr.eu.driver.index = IStatus;
3268             gdth_store_event(ha, ES_DRIVER, 1, &ha->dvr);
3269             if (!gdth_polling)
3270                 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3271             return IRQ_HANDLED;
3272         }
3273         if (scp == INTERNAL_CMND) {
3274             TRACE(("gdth_interrupt() answer to internal command\n"));
3275             if (!gdth_polling)
3276                 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3277             return IRQ_HANDLED;
3278         }
3279
3280         TRACE(("gdth_interrupt() sync. status\n"));
3281         rval = gdth_sync_event(hanum,Service,IStatus,scp);
3282         if (!gdth_polling)
3283             spin_unlock_irqrestore(&ha2->smp_lock, flags);
3284         if (rval == 2) {
3285             gdth_putq(hanum,scp,scp->SCp.this_residual);
3286         } else if (rval == 1) {
3287             gdth_scsi_done(scp);
3288         }
3289
3290 #ifdef INT_COAL
3291         if (coalesced) {
3292             /* go to the next status in the status buffer */
3293             ++pcs;
3294 #ifdef GDTH_STATISTICS
3295             ++act_int_coal;
3296             if (act_int_coal > max_int_coal) {
3297                 max_int_coal = act_int_coal;
3298                 printk("GDT: max_int_coal = %d\n",(ushort)max_int_coal);
3299             }
3300 #endif
3301             /* see if there is another status */
3302             if (pcs->status == 0)
3303                 /* Stop the coalesce loop */
3304                 next = FALSE;
3305         }
3306     } while (next);
3307
3308     /* coalescing only for new GDT_PCIMPR controllers available */
3309     if (ha->type == GDT_PCIMPR && coalesced) {
3310         writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3311         writeb(0, &dp6m_ptr->i960r.sema1_reg);
3312     }
3313 #endif
3314
3315     gdth_next(hanum);
3316     return IRQ_HANDLED;
3317 }
3318
3319 static int gdth_sync_event(int hanum,int service,unchar index,Scsi_Cmnd *scp)
3320 {
3321     register gdth_ha_str *ha;
3322     gdth_msg_str *msg;
3323     gdth_cmd_str *cmdp;
3324     unchar b, t;
3325
3326     ha   = HADATA(gdth_ctr_tab[hanum]);
3327     cmdp = ha->pccb;
3328     TRACE(("gdth_sync_event() serv %d status %d\n",
3329            service,ha->status));
3330
3331     if (service == SCREENSERVICE) {
3332         msg  = ha->pmsg;
3333         TRACE(("len: %d, answer: %d, ext: %d, alen: %d\n",
3334                msg->msg_len,msg->msg_answer,msg->msg_ext,msg->msg_alen));
3335         if (msg->msg_len > MSGLEN+1)
3336             msg->msg_len = MSGLEN+1;
3337         if (msg->msg_len)
3338             if (!(msg->msg_answer && msg->msg_ext)) {
3339                 msg->msg_text[msg->msg_len] = '\0';
3340                 printk("%s",msg->msg_text);
3341             }
3342
3343         if (msg->msg_ext && !msg->msg_answer) {
3344             while (gdth_test_busy(hanum))
3345                 gdth_delay(0);
3346             cmdp->Service       = SCREENSERVICE;
3347             cmdp->RequestBuffer = SCREEN_CMND;
3348             gdth_get_cmd_index(hanum);
3349             gdth_set_sema0(hanum);
3350             cmdp->OpCode        = GDT_READ;
3351             cmdp->BoardNode     = LOCALBOARD;
3352             cmdp->u.screen.reserved  = 0;
3353             cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3354             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3355             ha->cmd_offs_dpmem = 0;
3356             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3357                 + sizeof(ulong64);
3358             ha->cmd_cnt = 0;
3359             gdth_copy_command(hanum);
3360             gdth_release_event(hanum);
3361             return 0;
3362         }
3363
3364         if (msg->msg_answer && msg->msg_alen) {
3365             /* default answers (getchar() not possible) */
3366             if (msg->msg_alen == 1) {
3367                 msg->msg_alen = 0;
3368                 msg->msg_len = 1;
3369                 msg->msg_text[0] = 0;
3370             } else {
3371                 msg->msg_alen -= 2;
3372                 msg->msg_len = 2;
3373                 msg->msg_text[0] = 1;
3374                 msg->msg_text[1] = 0;
3375             }
3376             msg->msg_ext    = 0;
3377             msg->msg_answer = 0;
3378             while (gdth_test_busy(hanum))
3379                 gdth_delay(0);
3380             cmdp->Service       = SCREENSERVICE;
3381             cmdp->RequestBuffer = SCREEN_CMND;
3382             gdth_get_cmd_index(hanum);
3383             gdth_set_sema0(hanum);
3384             cmdp->OpCode        = GDT_WRITE;
3385             cmdp->BoardNode     = LOCALBOARD;
3386             cmdp->u.screen.reserved  = 0;
3387             cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3388             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3389             ha->cmd_offs_dpmem = 0;
3390             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3391                 + sizeof(ulong64);
3392             ha->cmd_cnt = 0;
3393             gdth_copy_command(hanum);
3394             gdth_release_event(hanum);
3395             return 0;
3396         }
3397         printk("\n");
3398
3399     } else {
3400         b = virt_ctr ? NUMDATA(scp->device->host)->busnum : scp->device->channel;
3401         t = scp->device->id;
3402         if (scp->SCp.sent_command == -1 && b != ha->virt_bus) {
3403             ha->raw[BUS_L2P(ha,b)].io_cnt[t]--;
3404         }
3405         /* cache or raw service */
3406         if (ha->status == S_BSY) {
3407             TRACE2(("Controller busy -> retry !\n"));
3408             if (scp->SCp.sent_command == GDT_MOUNT)
3409                 scp->SCp.sent_command = GDT_CLUST_INFO;
3410             /* retry */
3411             return 2;
3412         }
3413         if (scp->SCp.Status == GDTH_MAP_SG)
3414             pci_unmap_sg(ha->pdev,scp->request_buffer,
3415                          scp->use_sg,scp->SCp.Message);
3416         else if (scp->SCp.Status == GDTH_MAP_SINGLE)
3417             pci_unmap_page(ha->pdev,scp->SCp.dma_handle,
3418                            scp->request_bufflen,scp->SCp.Message);
3419         if (scp->SCp.buffer) {
3420             dma_addr_t addr;
3421             addr = (dma_addr_t)*(ulong32 *)&scp->SCp.buffer;
3422             if (scp->host_scribble)
3423                 addr += (dma_addr_t)
3424                     ((ulong64)(*(ulong32 *)&scp->host_scribble) << 32);
3425             pci_unmap_page(ha->pdev,addr,16,PCI_DMA_FROMDEVICE);
3426         }
3427
3428         if (ha->status == S_OK) {
3429             scp->SCp.Status = S_OK;
3430             scp->SCp.Message = ha->info;
3431             if (scp->SCp.sent_command != -1) {
3432                 TRACE2(("gdth_sync_event(): special cmd 0x%x OK\n",
3433                         scp->SCp.sent_command));
3434                 /* special commands GDT_CLUST_INFO/GDT_MOUNT ? */
3435                 if (scp->SCp.sent_command == GDT_CLUST_INFO) {
3436                     ha->hdr[t].cluster_type = (unchar)ha->info;
3437                     if (!(ha->hdr[t].cluster_type &
3438                         CLUSTER_MOUNTED)) {
3439                         /* NOT MOUNTED -> MOUNT */
3440                         scp->SCp.sent_command = GDT_MOUNT;
3441                         if (ha->hdr[t].cluster_type &
3442                             CLUSTER_RESERVED) {
3443                             /* cluster drive RESERVED (on the other node) */
3444                             scp->SCp.phase = -2;      /* reservation conflict */
3445                         }
3446                     } else {
3447                         scp->SCp.sent_command = -1;
3448                     }
3449                 } else {
3450                     if (scp->SCp.sent_command == GDT_MOUNT) {
3451                         ha->hdr[t].cluster_type |= CLUSTER_MOUNTED;
3452                         ha->hdr[t].media_changed = TRUE;
3453                     } else if (scp->SCp.sent_command == GDT_UNMOUNT) {
3454                         ha->hdr[t].cluster_type &= ~CLUSTER_MOUNTED;
3455                         ha->hdr[t].media_changed = TRUE;
3456                     }
3457                     scp->SCp.sent_command = -1;
3458                 }
3459                 /* retry */
3460                 scp->SCp.this_residual = HIGH_PRI;
3461                 return 2;
3462             } else {
3463                 /* RESERVE/RELEASE ? */
3464                 if (scp->cmnd[0] == RESERVE) {
3465                     ha->hdr[t].cluster_type |= CLUSTER_RESERVED;
3466                 } else if (scp->cmnd[0] == RELEASE) {
3467                     ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3468                 }
3469                 scp->result = DID_OK << 16;
3470                 scp->sense_buffer[0] = 0;
3471             }
3472         } else {
3473             scp->SCp.Status = ha->status;
3474             scp->SCp.Message = ha->info;
3475
3476             if (scp->SCp.sent_command != -1) {
3477                 TRACE2(("gdth_sync_event(): special cmd 0x%x error 0x%x\n",
3478                         scp->SCp.sent_command, ha->status));
3479                 if (scp->SCp.sent_command == GDT_SCAN_START ||
3480                     scp->SCp.sent_command == GDT_SCAN_END) {
3481                     scp->SCp.sent_command = -1;
3482                     /* retry */
3483                     scp->SCp.this_residual = HIGH_PRI;
3484                     return 2;
3485                 }
3486                 memset((char*)scp->sense_buffer,0,16);
3487                 scp->sense_buffer[0] = 0x70;
3488                 scp->sense_buffer[2] = NOT_READY;
3489                 scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3490             } else if (service == CACHESERVICE) {
3491                 if (ha->status == S_CACHE_UNKNOWN &&
3492                     (ha->hdr[t].cluster_type &
3493                      CLUSTER_RESERVE_STATE) == CLUSTER_RESERVE_STATE) {
3494                     /* bus reset -> force GDT_CLUST_INFO */
3495                     ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3496                 }
3497                 memset((char*)scp->sense_buffer,0,16);
3498                 if (ha->status == (ushort)S_CACHE_RESERV) {
3499                     scp->result = (DID_OK << 16) | (RESERVATION_CONFLICT << 1);
3500                 } else {
3501                     scp->sense_buffer[0] = 0x70;
3502                     scp->sense_buffer[2] = NOT_READY;
3503                     scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3504                 }
3505                 if (!IS_GDTH_INTERNAL_CMD(scp)) {
3506                     ha->dvr.size = sizeof(ha->dvr.eu.sync);
3507                     ha->dvr.eu.sync.ionode  = hanum;
3508                     ha->dvr.eu.sync.service = service;
3509                     ha->dvr.eu.sync.status  = ha->status;
3510                     ha->dvr.eu.sync.info    = ha->info;
3511                     ha->dvr.eu.sync.hostdrive = t;
3512                     if (ha->status >= 0x8000)
3513                         gdth_store_event(ha, ES_SYNC, 0, &ha->dvr);
3514                     else
3515                         gdth_store_event(ha, ES_SYNC, service, &ha->dvr);
3516                 }
3517             } else {
3518                 /* sense buffer filled from controller firmware (DMA) */
3519                 if (ha->status != S_RAW_SCSI || ha->info >= 0x100) {
3520                     scp->result = DID_BAD_TARGET << 16;
3521                 } else {
3522                     scp->result = (DID_OK << 16) | ha->info;
3523                 }
3524             }
3525         }
3526         if (!scp->SCp.have_data_in)
3527             scp->SCp.have_data_in++;
3528         else
3529             return 1;
3530     }
3531
3532     return 0;
3533 }
3534
3535 static char *async_cache_tab[] = {
3536 /* 0*/  "\011\000\002\002\002\004\002\006\004"
3537         "GDT HA %u, service %u, async. status %u/%lu unknown",
3538 /* 1*/  "\011\000\002\002\002\004\002\006\004"
3539         "GDT HA %u, service %u, async. status %u/%lu unknown",
3540 /* 2*/  "\005\000\002\006\004"
3541         "GDT HA %u, Host Drive %lu not ready",
3542 /* 3*/  "\005\000\002\006\004"
3543         "GDT HA %u, Host Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3544 /* 4*/  "\005\000\002\006\004"
3545         "GDT HA %u, mirror update on Host Drive %lu failed",
3546 /* 5*/  "\005\000\002\006\004"
3547         "GDT HA %u, Mirror Drive %lu failed",
3548 /* 6*/  "\005\000\002\006\004"
3549         "GDT HA %u, Mirror Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3550 /* 7*/  "\005\000\002\006\004"
3551         "GDT HA %u, Host Drive %lu write protected",
3552 /* 8*/  "\005\000\002\006\004"
3553         "GDT HA %u, media changed in Host Drive %lu",
3554 /* 9*/  "\005\000\002\006\004"
3555         "GDT HA %u, Host Drive %lu is offline",
3556 /*10*/  "\005\000\002\006\004"
3557         "GDT HA %u, media change of Mirror Drive %lu",
3558 /*11*/  "\005\000\002\006\004"
3559         "GDT HA %u, Mirror Drive %lu is write protected",
3560 /*12*/  "\005\000\002\006\004"
3561         "GDT HA %u, general error on Host Drive %lu. Please check the devices of this drive!",
3562 /*13*/  "\007\000\002\006\002\010\002"
3563         "GDT HA %u, Array Drive %u: Cache Drive %u failed",
3564 /*14*/  "\005\000\002\006\002"
3565         "GDT HA %u, Array Drive %u: FAIL state entered",
3566 /*15*/  "\005\000\002\006\002"
3567         "GDT HA %u, Array Drive %u: error",
3568 /*16*/  "\007\000\002\006\002\010\002"
3569         "GDT HA %u, Array Drive %u: failed drive replaced by Cache Drive %u",
3570 /*17*/  "\005\000\002\006\002"
3571         "GDT HA %u, Array Drive %u: parity build failed",
3572 /*18*/  "\005\000\002\006\002"
3573         "GDT HA %u, Array Drive %u: drive rebuild failed",
3574 /*19*/  "\005\000\002\010\002"
3575         "GDT HA %u, Test of Hot Fix %u failed",
3576 /*20*/  "\005\000\002\006\002"
3577         "GDT HA %u, Array Drive %u: drive build finished successfully",
3578 /*21*/  "\005\000\002\006\002"
3579         "GDT HA %u, Array Drive %u: drive rebuild finished successfully",
3580 /*22*/  "\007\000\002\006\002\010\002"
3581         "GDT HA %u, Array Drive %u: Hot Fix %u activated",
3582 /*23*/  "\005\000\002\006\002"
3583         "GDT HA %u, Host Drive %u: processing of i/o aborted due to serious drive error",
3584 /*24*/  "\005\000\002\010\002"
3585         "GDT HA %u, mirror update on Cache Drive %u completed",
3586 /*25*/  "\005\000\002\010\002"
3587         "GDT HA %u, mirror update on Cache Drive %lu failed",
3588 /*26*/  "\005\000\002\006\002"
3589         "GDT HA %u, Array Drive %u: drive rebuild started",
3590 /*27*/  "\005\000\002\012\001"
3591         "GDT HA %u, Fault bus %u: SHELF OK detected",
3592 /*28*/  "\005\000\002\012\001"
3593         "GDT HA %u, Fault bus %u: SHELF not OK detected",
3594 /*29*/  "\007\000\002\012\001\013\001"
3595         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug started",
3596 /*30*/  "\007\000\002\012\001\013\001"
3597         "GDT HA %u, Fault bus %u, ID %u: new disk detected",
3598 /*31*/  "\007\000\002\012\001\013\001"
3599         "GDT HA %u, Fault bus %u, ID %u: old disk detected",
3600 /*32*/  "\007\000\002\012\001\013\001"
3601         "GDT HA %u, Fault bus %u, ID %u: plugging an active disk is invalid",
3602 /*33*/  "\007\000\002\012\001\013\001"
3603         "GDT HA %u, Fault bus %u, ID %u: invalid device detected",
3604 /*34*/  "\011\000\002\012\001\013\001\006\004"
3605         "GDT HA %u, Fault bus %u, ID %u: insufficient disk capacity (%lu MB required)",
3606 /*35*/  "\007\000\002\012\001\013\001"
3607         "GDT HA %u, Fault bus %u, ID %u: disk write protected",
3608 /*36*/  "\007\000\002\012\001\013\001"
3609         "GDT HA %u, Fault bus %u, ID %u: disk not available",
3610 /*37*/  "\007\000\002\012\001\006\004"
3611         "GDT HA %u, Fault bus %u: swap detected (%lu)",
3612 /*38*/  "\007\000\002\012\001\013\001"
3613         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug finished successfully",
3614 /*39*/  "\007\000\002\012\001\013\001"
3615         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted due to user Hot Plug",
3616 /*40*/  "\007\000\002\012\001\013\001"
3617         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted",
3618 /*41*/  "\007\000\002\012\001\013\001"
3619         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug for Hot Fix started",
3620 /*42*/  "\005\000\002\006\002"
3621         "GDT HA %u, Array Drive %u: drive build started",
3622 /*43*/  "\003\000\002"
3623         "GDT HA %u, DRAM parity error detected",
3624 /*44*/  "\005\000\002\006\002"
3625         "GDT HA %u, Mirror Drive %u: update started",
3626 /*45*/  "\007\000\002\006\002\010\002"
3627         "GDT HA %u, Mirror Drive %u: Hot Fix %u activated",
3628 /*46*/  "\005\000\002\006\002"
3629         "GDT HA %u, Array Drive %u: no matching Pool Hot Fix Drive available",
3630 /*47*/  "\005\000\002\006\002"
3631         "GDT HA %u, Array Drive %u: Pool Hot Fix Drive available",
3632 /*48*/  "\005\000\002\006\002"
3633         "GDT HA %u, Mirror Drive %u: no matching Pool Hot Fix Drive available",
3634 /*49*/  "\005\000\002\006\002"
3635         "GDT HA %u, Mirror Drive %u: Pool Hot Fix Drive available",
3636 /*50*/  "\007\000\002\012\001\013\001"
3637         "GDT HA %u, SCSI bus %u, ID %u: IGNORE_WIDE_RESIDUE message received",
3638 /*51*/  "\005\000\002\006\002"
3639         "GDT HA %u, Array Drive %u: expand started",
3640 /*52*/  "\005\000\002\006\002"
3641         "GDT HA %u, Array Drive %u: expand finished successfully",
3642 /*53*/  "\005\000\002\006\002"
3643         "GDT HA %u, Array Drive %u: expand failed",
3644 /*54*/  "\003\000\002"
3645         "GDT HA %u, CPU temperature critical",
3646 /*55*/  "\003\000\002"
3647         "GDT HA %u, CPU temperature OK",
3648 /*56*/  "\005\000\002\006\004"
3649         "GDT HA %u, Host drive %lu created",
3650 /*57*/  "\005\000\002\006\002"
3651         "GDT HA %u, Array Drive %u: expand restarted",
3652 /*58*/  "\005\000\002\006\002"
3653         "GDT HA %u, Array Drive %u: expand stopped",
3654 /*59*/  "\005\000\002\010\002"
3655         "GDT HA %u, Mirror Drive %u: drive build quited",
3656 /*60*/  "\005\000\002\006\002"
3657         "GDT HA %u, Array Drive %u: parity build quited",
3658 /*61*/  "\005\000\002\006\002"
3659         "GDT HA %u, Array Drive %u: drive rebuild quited",
3660 /*62*/  "\005\000\002\006\002"
3661         "GDT HA %u, Array Drive %u: parity verify started",
3662 /*63*/  "\005\000\002\006\002"
3663         "GDT HA %u, Array Drive %u: parity verify done",
3664 /*64*/  "\005\000\002\006\002"
3665         "GDT HA %u, Array Drive %u: parity verify failed",
3666 /*65*/  "\005\000\002\006\002"
3667         "GDT HA %u, Array Drive %u: parity error detected",
3668 /*66*/  "\005\000\002\006\002"
3669         "GDT HA %u, Array Drive %u: parity verify quited",
3670 /*67*/  "\005\000\002\006\002"
3671         "GDT HA %u, Host Drive %u reserved",
3672 /*68*/  "\005\000\002\006\002"
3673         "GDT HA %u, Host Drive %u mounted and released",
3674 /*69*/  "\005\000\002\006\002"
3675         "GDT HA %u, Host Drive %u released",
3676 /*70*/  "\003\000\002"
3677         "GDT HA %u, DRAM error detected and corrected with ECC",
3678 /*71*/  "\003\000\002"
3679         "GDT HA %u, Uncorrectable DRAM error detected with ECC",
3680 /*72*/  "\011\000\002\012\001\013\001\014\001"
3681         "GDT HA %u, SCSI bus %u, ID %u, LUN %u: reassigning block",
3682 /*73*/  "\005\000\002\006\002"
3683         "GDT HA %u, Host drive %u resetted locally",
3684 /*74*/  "\005\000\002\006\002"
3685         "GDT HA %u, Host drive %u resetted remotely",
3686 /*75*/  "\003\000\002"
3687         "GDT HA %u, async. status 75 unknown",
3688 };
3689
3690
3691 static int gdth_async_event(int hanum)
3692 {
3693     gdth_ha_str *ha;
3694     gdth_cmd_str *cmdp;
3695     int cmd_index;
3696
3697     ha  = HADATA(gdth_ctr_tab[hanum]);
3698     cmdp= ha->pccb;
3699     TRACE2(("gdth_async_event() ha %d serv %d\n",
3700             hanum,ha->service));
3701
3702     if (ha->service == SCREENSERVICE) {
3703         if (ha->status == MSG_REQUEST) {
3704             while (gdth_test_busy(hanum))
3705                 gdth_delay(0);
3706             cmdp->Service       = SCREENSERVICE;
3707             cmdp->RequestBuffer = SCREEN_CMND;
3708             cmd_index = gdth_get_cmd_index(hanum);
3709             gdth_set_sema0(hanum);
3710             cmdp->OpCode        = GDT_READ;
3711             cmdp->BoardNode     = LOCALBOARD;
3712             cmdp->u.screen.reserved  = 0;
3713             cmdp->u.screen.su.msg.msg_handle= MSG_INV_HANDLE;
3714             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3715             ha->cmd_offs_dpmem = 0;
3716             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3717                 + sizeof(ulong64);
3718             ha->cmd_cnt = 0;
3719             gdth_copy_command(hanum);
3720             if (ha->type == GDT_EISA)
3721                 printk("[EISA slot %d] ",(ushort)ha->brd_phys);
3722             else if (ha->type == GDT_ISA)
3723                 printk("[DPMEM 0x%4X] ",(ushort)ha->brd_phys);
3724             else
3725                 printk("[PCI %d/%d] ",(ushort)(ha->brd_phys>>8),
3726                        (ushort)((ha->brd_phys>>3)&0x1f));
3727             gdth_release_event(hanum);
3728         }
3729
3730     } else {
3731         if (ha->type == GDT_PCIMPR &&
3732             (ha->fw_vers & 0xff) >= 0x1a) {
3733             ha->dvr.size = 0;
3734             ha->dvr.eu.async.ionode = hanum;
3735             ha->dvr.eu.async.status  = ha->status;
3736             /* severity and event_string already set! */
3737         } else {
3738             ha->dvr.size = sizeof(ha->dvr.eu.async);
3739             ha->dvr.eu.async.ionode   = hanum;
3740             ha->dvr.eu.async.service = ha->service;
3741             ha->dvr.eu.async.status  = ha->status;
3742             ha->dvr.eu.async.info    = ha->info;
3743             *(ulong32 *)ha->dvr.eu.async.scsi_coord  = ha->info2;
3744         }
3745         gdth_store_event( ha, ES_ASYNC, ha->service, &ha->dvr );
3746         gdth_log_event( &ha->dvr, NULL );
3747
3748         /* new host drive from expand? */
3749         if (ha->service == CACHESERVICE && ha->status == 56) {
3750             TRACE2(("gdth_async_event(): new host drive %d created\n",
3751                     (ushort)ha->info));
3752             /* gdth_analyse_hdrive(hanum, (ushort)ha->info); */
3753         }
3754     }
3755     return 1;
3756 }
3757
3758 static void gdth_log_event(gdth_evt_data *dvr, char *buffer)
3759 {
3760     gdth_stackframe stack;
3761     char *f = NULL;
3762     int i,j;
3763
3764     TRACE2(("gdth_log_event()\n"));
3765     if (dvr->size == 0) {
3766         if (buffer == NULL) {
3767             printk("Adapter %d: %s\n",dvr->eu.async.ionode,dvr->event_string);
3768         } else {
3769             sprintf(buffer,"Adapter %d: %s\n",
3770                 dvr->eu.async.ionode,dvr->event_string);
3771         }
3772     } else if (dvr->eu.async.service == CACHESERVICE &&
3773         INDEX_OK(dvr->eu.async.status, async_cache_tab)) {
3774         TRACE2(("GDT: Async. event cache service, event no.: %d\n",
3775                 dvr->eu.async.status));
3776
3777         f = async_cache_tab[dvr->eu.async.status];
3778
3779         /* i: parameter to push, j: stack element to fill */
3780         for (j=0,i=1; i < f[0]; i+=2) {
3781             switch (f[i+1]) {
3782               case 4:
3783                 stack.b[j++] = *(ulong32*)&dvr->eu.stream[(int)f[i]];
3784                 break;
3785               case 2:
3786                 stack.b[j++] = *(ushort*)&dvr->eu.stream[(int)f[i]];
3787                 break;
3788               case 1:
3789                 stack.b[j++] = *(unchar*)&dvr->eu.stream[(int)f[i]];
3790                 break;
3791               default:
3792                 break;
3793             }
3794         }
3795
3796         if (buffer == NULL) {
3797             printk(&f[(int)f[0]],stack);
3798             printk("\n");
3799         } else {
3800             sprintf(buffer,&f[(int)f[0]],stack);
3801         }
3802
3803     } else {
3804         if (buffer == NULL) {
3805             printk("GDT HA %u, Unknown async. event service %d event no. %d\n",
3806                    dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
3807         } else {
3808             sprintf(buffer,"GDT HA %u, Unknown async. event service %d event no. %d",
3809                     dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
3810         }
3811     }
3812 }
3813
3814 #ifdef GDTH_STATISTICS
3815 static void gdth_timeout(ulong data)
3816 {
3817     ulong32 i;
3818     Scsi_Cmnd *nscp;
3819     gdth_ha_str *ha;
3820     ulong flags;
3821     int hanum = 0;
3822
3823     ha = HADATA(gdth_ctr_tab[hanum]);
3824     spin_lock_irqsave(&ha->smp_lock, flags);
3825
3826     for (act_stats=0,i=0; i<GDTH_MAXCMDS; ++i)
3827         if (ha->cmd_tab[i].cmnd != UNUSED_CMND)
3828             ++act_stats;
3829
3830     for (act_rq=0,nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
3831         ++act_rq;
3832
3833     TRACE2(("gdth_to(): ints %d, ios %d, act_stats %d, act_rq %d\n",
3834             act_ints, act_ios, act_stats, act_rq));
3835     act_ints = act_ios = 0;
3836
3837     gdth_timer.expires = jiffies + 30 * HZ;
3838     add_timer(&gdth_timer);
3839     spin_unlock_irqrestore(&ha->smp_lock, flags);
3840 }
3841 #endif
3842
3843 static void __init internal_setup(char *str,int *ints)
3844 {
3845     int i, argc;
3846     char *cur_str, *argv;
3847
3848     TRACE2(("internal_setup() str %s ints[0] %d\n",
3849             str ? str:"NULL", ints ? ints[0]:0));
3850
3851     /* read irq[] from ints[] */
3852     if (ints) {
3853         argc = ints[0];
3854         if (argc > 0) {
3855             if (argc > MAXHA)
3856                 argc = MAXHA;
3857             for (i = 0; i < argc; ++i)
3858                 irq[i] = ints[i+1];
3859         }
3860     }
3861
3862     /* analyse string */
3863     argv = str;
3864     while (argv && (cur_str = strchr(argv, ':'))) {
3865         int val = 0, c = *++cur_str;
3866
3867         if (c == 'n' || c == 'N')
3868             val = 0;
3869         else if (c == 'y' || c == 'Y')
3870             val = 1;
3871         else
3872             val = (int)simple_strtoul(cur_str, NULL, 0);
3873
3874         if (!strncmp(argv, "disable:", 8))
3875             disable = val;
3876         else if (!strncmp(argv, "reserve_mode:", 13))
3877             reserve_mode = val;
3878         else if (!strncmp(argv, "reverse_scan:", 13))
3879             reverse_scan = val;
3880         else if (!strncmp(argv, "hdr_channel:", 12))
3881             hdr_channel = val;
3882         else if (!strncmp(argv, "max_ids:", 8))
3883             max_ids = val;
3884         else if (!strncmp(argv, "rescan:", 7))
3885             rescan = val;
3886         else if (!strncmp(argv, "virt_ctr:", 9))
3887             virt_ctr = val;
3888         else if (!strncmp(argv, "shared_access:", 14))
3889             shared_access = val;
3890         else if (!strncmp(argv, "probe_eisa_isa:", 15))
3891             probe_eisa_isa = val;
3892         else if (!strncmp(argv, "reserve_list:", 13)) {
3893             reserve_list[0] = val;
3894             for (i = 1; i < MAX_RES_ARGS; i++) {
3895                 cur_str = strchr(cur_str, ',');
3896                 if (!cur_str)
3897                     break;
3898                 if (!isdigit((int)*++cur_str)) {
3899                     --cur_str;
3900                     break;
3901                 }
3902                 reserve_list[i] =
3903                     (int)simple_strtoul(cur_str, NULL, 0);
3904             }
3905             if (!cur_str)
3906                 break;
3907             argv = ++cur_str;
3908             continue;
3909         }
3910
3911         if ((argv = strchr(argv, ',')))
3912             ++argv;
3913     }
3914 }
3915
3916 int __init option_setup(char *str)
3917 {
3918     int ints[MAXHA];
3919     char *cur = str;
3920     int i = 1;
3921
3922     TRACE2(("option_setup() str %s\n", str ? str:"NULL"));
3923
3924     while (cur && isdigit(*cur) && i <= MAXHA) {
3925         ints[i++] = simple_strtoul(cur, NULL, 0);
3926         if ((cur = strchr(cur, ',')) != NULL) cur++;
3927     }
3928
3929     ints[0] = i - 1;
3930     internal_setup(cur, ints);
3931     return 1;
3932 }
3933
3934
3935 static int __init gdth_detect(struct scsi_host_template *shtp)
3936 {
3937 #ifdef DEBUG_GDTH
3938     printk("GDT: This driver contains debugging information !! Trace level = %d\n",
3939         DebugState);
3940     printk("     Destination of debugging information: ");
3941 #ifdef __SERIAL__
3942 #ifdef __COM2__
3943     printk("Serial port COM2\n");
3944 #else
3945     printk("Serial port COM1\n");
3946 #endif
3947 #else
3948     printk("Console\n");
3949 #endif
3950     gdth_delay(3000);
3951 #endif
3952
3953     TRACE(("gdth_detect()\n"));
3954
3955     if (disable) {
3956         printk("GDT-HA: Controller driver disabled from command line !\n");
3957         return 0;
3958     }
3959
3960     printk("GDT-HA: Storage RAID Controller Driver. Version: %s\n",GDTH_VERSION_STR);
3961     /* initializations */
3962     gdth_polling = TRUE;
3963     gdth_clear_events();
3964
3965     /* As default we do not probe for EISA or ISA controllers */
3966     if (probe_eisa_isa) {
3967         /* scanning for controllers, at first: ISA controller */
3968 #ifdef CONFIG_ISA
3969         ulong32 isa_bios;
3970         for (isa_bios = 0xc8000UL; isa_bios <= 0xd8000UL;
3971              isa_bios += 0x8000UL) {
3972             if (gdth_ctr_count >= MAXHA)
3973                 break;
3974             gdth_isa_probe_one(shtp, isa_bios);
3975         }
3976 #endif
3977 #ifdef CONFIG_EISA
3978         {
3979         ushort eisa_slot;
3980         for (eisa_slot = 0x1000; eisa_slot <= 0x8000; eisa_slot += 0x1000) {
3981             if (gdth_ctr_count >= MAXHA)
3982                 break;
3983             gdth_eisa_probe_one(shtp, eisa_slot);
3984         }
3985         }
3986 #endif
3987     }
3988
3989 #ifdef CONFIG_PCI
3990     /* scanning for PCI controllers */
3991     {
3992     gdth_pci_str pcistr[MAXHA];
3993     int cnt,ctr;
3994
3995     cnt = gdth_search_pci(pcistr);
3996     printk("GDT-HA: Found %d PCI Storage RAID Controllers\n",cnt);
3997     gdth_sort_pci(pcistr,cnt);
3998     for (ctr = 0; ctr < cnt; ++ctr) {
3999         if (gdth_ctr_count >= MAXHA)
4000             break;
4001         gdth_pci_probe_one(shtp, pcistr, ctr);
4002     }
4003     }
4004 #endif /* CONFIG_PCI */
4005
4006     TRACE2(("gdth_detect() %d controller detected\n",gdth_ctr_count));
4007     if (gdth_ctr_count > 0) {
4008 #ifdef GDTH_STATISTICS
4009         TRACE2(("gdth_detect(): Initializing timer !\n"));
4010         init_timer(&gdth_timer);
4011         gdth_timer.expires = jiffies + HZ;
4012         gdth_timer.data = 0L;
4013         gdth_timer.function = gdth_timeout;
4014         add_timer(&gdth_timer);
4015 #endif
4016         major = register_chrdev(0,"gdth",&gdth_fops);
4017         notifier_disabled = 0;
4018         register_reboot_notifier(&gdth_notifier);
4019     }
4020     gdth_polling = FALSE;
4021     return gdth_ctr_vcount;
4022 }
4023
4024 static int gdth_release(struct Scsi_Host *shp)
4025 {
4026     int hanum;
4027     gdth_ha_str *ha;
4028
4029     TRACE2(("gdth_release()\n"));
4030     if (NUMDATA(shp)->busnum == 0) {
4031         hanum = NUMDATA(shp)->hanum;
4032         ha    = HADATA(gdth_ctr_tab[hanum]);
4033         if (ha->sdev) {
4034             scsi_free_host_dev(ha->sdev);
4035             ha->sdev = NULL;
4036         }
4037         gdth_flush(hanum);
4038
4039         if (shp->irq) {
4040             free_irq(shp->irq,ha);
4041         }
4042 #ifdef CONFIG_ISA
4043         if (shp->dma_channel != 0xff) {
4044             free_dma(shp->dma_channel);
4045         }
4046 #endif
4047 #ifdef INT_COAL
4048         if (ha->coal_stat)
4049             pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
4050                                 MAXOFFSETS, ha->coal_stat, ha->coal_stat_phys);
4051 #endif
4052         if (ha->pscratch)
4053             pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4054                                 ha->pscratch, ha->scratch_phys);
4055         if (ha->pmsg)
4056             pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4057                                 ha->pmsg, ha->msg_phys);
4058         if (ha->ccb_phys)
4059             pci_unmap_single(ha->pdev,ha->ccb_phys,
4060                              sizeof(gdth_cmd_str),PCI_DMA_BIDIRECTIONAL);
4061         gdth_ctr_released++;
4062         TRACE2(("gdth_release(): HA %d of %d\n",
4063                 gdth_ctr_released, gdth_ctr_count));
4064
4065         if (gdth_ctr_released == gdth_ctr_count) {
4066 #ifdef GDTH_STATISTICS
4067             del_timer(&gdth_timer);
4068 #endif
4069             unregister_chrdev(major,"gdth");
4070             unregister_reboot_notifier(&gdth_notifier);
4071         }
4072     }
4073
4074     scsi_unregister(shp);
4075     return 0;
4076 }
4077
4078
4079 static const char *gdth_ctr_name(int hanum)
4080 {
4081     gdth_ha_str *ha;
4082
4083     TRACE2(("gdth_ctr_name()\n"));
4084
4085     ha    = HADATA(gdth_ctr_tab[hanum]);
4086
4087     if (ha->type == GDT_EISA) {
4088         switch (ha->stype) {
4089           case GDT3_ID:
4090             return("GDT3000/3020");
4091           case GDT3A_ID:
4092             return("GDT3000A/3020A/3050A");
4093           case GDT3B_ID:
4094             return("GDT3000B/3010A");
4095         }
4096     } else if (ha->type == GDT_ISA) {
4097         return("GDT2000/2020");
4098     } else if (ha->type == GDT_PCI) {
4099         switch (ha->pdev->device) {
4100           case PCI_DEVICE_ID_VORTEX_GDT60x0:
4101             return("GDT6000/6020/6050");
4102           case PCI_DEVICE_ID_VORTEX_GDT6000B:
4103             return("GDT6000B/6010");
4104         }
4105     }
4106     /* new controllers (GDT_PCINEW, GDT_PCIMPR, ..) use board_info IOCTL! */
4107
4108     return("");
4109 }
4110
4111 static const char *gdth_info(struct Scsi_Host *shp)
4112 {
4113     int hanum;
4114     gdth_ha_str *ha;
4115
4116     TRACE2(("gdth_info()\n"));
4117     hanum = NUMDATA(shp)->hanum;
4118     ha    = HADATA(gdth_ctr_tab[hanum]);
4119
4120     return ((const char *)ha->binfo.type_string);
4121 }
4122
4123 static int gdth_eh_bus_reset(Scsi_Cmnd *scp)
4124 {
4125     int i, hanum;
4126     gdth_ha_str *ha;
4127     ulong flags;
4128     Scsi_Cmnd *cmnd;
4129     unchar b;
4130
4131     TRACE2(("gdth_eh_bus_reset()\n"));
4132
4133     hanum = NUMDATA(scp->device->host)->hanum;
4134     b = virt_ctr ? NUMDATA(scp->device->host)->busnum : scp->device->channel;
4135     ha    = HADATA(gdth_ctr_tab[hanum]);
4136
4137     /* clear command tab */
4138     spin_lock_irqsave(&ha->smp_lock, flags);
4139     for (i = 0; i < GDTH_MAXCMDS; ++i) {
4140         cmnd = ha->cmd_tab[i].cmnd;
4141         if (!SPECIAL_SCP(cmnd) && cmnd->device->channel == b)
4142             ha->cmd_tab[i].cmnd = UNUSED_CMND;
4143     }
4144     spin_unlock_irqrestore(&ha->smp_lock, flags);
4145
4146     if (b == ha->virt_bus) {
4147         /* host drives */
4148         for (i = 0; i < MAX_HDRIVES; ++i) {
4149             if (ha->hdr[i].present) {
4150                 spin_lock_irqsave(&ha->smp_lock, flags);
4151                 gdth_polling = TRUE;
4152                 while (gdth_test_busy(hanum))
4153                     gdth_delay(0);
4154                 if (gdth_internal_cmd(hanum, CACHESERVICE,
4155                                       GDT_CLUST_RESET, i, 0, 0))
4156                     ha->hdr[i].cluster_type &= ~CLUSTER_RESERVED;
4157                 gdth_polling = FALSE;
4158                 spin_unlock_irqrestore(&ha->smp_lock, flags);
4159             }
4160         }
4161     } else {
4162         /* raw devices */
4163         spin_lock_irqsave(&ha->smp_lock, flags);
4164         for (i = 0; i < MAXID; ++i)
4165             ha->raw[BUS_L2P(ha,b)].io_cnt[i] = 0;
4166         gdth_polling = TRUE;
4167         while (gdth_test_busy(hanum))
4168             gdth_delay(0);
4169         gdth_internal_cmd(hanum, SCSIRAWSERVICE, GDT_RESET_BUS,
4170                           BUS_L2P(ha,b), 0, 0);
4171         gdth_polling = FALSE;
4172         spin_unlock_irqrestore(&ha->smp_lock, flags);
4173     }
4174     return SUCCESS;
4175 }
4176
4177 static int gdth_bios_param(struct scsi_device *sdev,struct block_device *bdev,sector_t cap,int *ip)
4178 {
4179     unchar b, t;
4180     int hanum;
4181     gdth_ha_str *ha;
4182     struct scsi_device *sd;
4183     unsigned capacity;
4184
4185     sd = sdev;
4186     capacity = cap;
4187     hanum = NUMDATA(sd->host)->hanum;
4188     b = virt_ctr ? NUMDATA(sd->host)->busnum : sd->channel;
4189     t = sd->id;
4190     TRACE2(("gdth_bios_param() ha %d bus %d target %d\n", hanum, b, t));
4191     ha = HADATA(gdth_ctr_tab[hanum]);
4192
4193     if (b != ha->virt_bus || ha->hdr[t].heads == 0) {
4194         /* raw device or host drive without mapping information */
4195         TRACE2(("Evaluate mapping\n"));
4196         gdth_eval_mapping(capacity,&ip[2],&ip[0],&ip[1]);
4197     } else {
4198         ip[0] = ha->hdr[t].heads;
4199         ip[1] = ha->hdr[t].secs;
4200         ip[2] = capacity / ip[0] / ip[1];
4201     }
4202
4203     TRACE2(("gdth_bios_param(): %d heads, %d secs, %d cyls\n",
4204             ip[0],ip[1],ip[2]));
4205     return 0;
4206 }
4207
4208
4209 static int gdth_queuecommand(struct scsi_cmnd *scp,
4210                                 void (*done)(struct scsi_cmnd *))
4211 {
4212     int hanum;
4213     int priority;
4214
4215     TRACE(("gdth_queuecommand() cmd 0x%x\n", scp->cmnd[0]));
4216
4217     scp->scsi_done = done;
4218     scp->SCp.have_data_in = 1;
4219     scp->SCp.phase = -1;
4220     scp->SCp.sent_command = -1;
4221     scp->SCp.Status = GDTH_MAP_NONE;
4222     scp->SCp.buffer = (struct scatterlist *)NULL;
4223
4224     hanum = NUMDATA(scp->device->host)->hanum;
4225 #ifdef GDTH_STATISTICS
4226     ++act_ios;
4227 #endif
4228
4229     priority = DEFAULT_PRI;
4230     if (IS_GDTH_INTERNAL_CMD(scp))
4231         priority = scp->SCp.this_residual;
4232     else
4233         gdth_update_timeout(hanum, scp, scp->timeout_per_command * 6);
4234
4235     gdth_putq( hanum, scp, priority );
4236     gdth_next( hanum );
4237     return 0;
4238 }
4239
4240
4241 static int gdth_open(struct inode *inode, struct file *filep)
4242 {
4243     gdth_ha_str *ha;
4244     int i;
4245
4246     for (i = 0; i < gdth_ctr_count; i++) {
4247         ha = HADATA(gdth_ctr_tab[i]);
4248         if (!ha->sdev)
4249             ha->sdev = scsi_get_host_dev(gdth_ctr_tab[i]);
4250     }
4251
4252     TRACE(("gdth_open()\n"));
4253     return 0;
4254 }
4255
4256 static int gdth_close(struct inode *inode, struct file *filep)
4257 {
4258     TRACE(("gdth_close()\n"));
4259     return 0;
4260 }
4261
4262 static int ioc_event(void __user *arg)
4263 {
4264     gdth_ioctl_event evt;
4265     gdth_ha_str *ha;
4266     ulong flags;
4267
4268     if (copy_from_user(&evt, arg, sizeof(gdth_ioctl_event)) ||
4269         evt.ionode >= gdth_ctr_count)
4270         return -EFAULT;
4271     ha = HADATA(gdth_ctr_tab[evt.ionode]);
4272
4273     if (evt.erase == 0xff) {
4274         if (evt.event.event_source == ES_TEST)
4275             evt.event.event_data.size=sizeof(evt.event.event_data.eu.test);
4276         else if (evt.event.event_source == ES_DRIVER)
4277             evt.event.event_data.size=sizeof(evt.event.event_data.eu.driver);
4278         else if (evt.event.event_source == ES_SYNC)
4279             evt.event.event_data.size=sizeof(evt.event.event_data.eu.sync);
4280         else
4281             evt.event.event_data.size=sizeof(evt.event.event_data.eu.async);
4282         spin_lock_irqsave(&ha->smp_lock, flags);
4283         gdth_store_event(ha, evt.event.event_source, evt.event.event_idx,
4284                          &evt.event.event_data);
4285         spin_unlock_irqrestore(&ha->smp_lock, flags);
4286     } else if (evt.erase == 0xfe) {
4287         gdth_clear_events();
4288     } else if (evt.erase == 0) {
4289         evt.handle = gdth_read_event(ha, evt.handle, &evt.event);
4290     } else {
4291         gdth_readapp_event(ha, evt.erase, &evt.event);
4292     }
4293     if (copy_to_user(arg, &evt, sizeof(gdth_ioctl_event)))
4294         return -EFAULT;
4295     return 0;
4296 }
4297
4298 static int ioc_lockdrv(void __user *arg)
4299 {
4300     gdth_ioctl_lockdrv ldrv;
4301     unchar i, j;
4302     ulong flags;
4303     gdth_ha_str *ha;
4304
4305     if (copy_from_user(&ldrv, arg, sizeof(gdth_ioctl_lockdrv)) ||
4306         ldrv.ionode >= gdth_ctr_count)
4307         return -EFAULT;
4308     ha = HADATA(gdth_ctr_tab[ldrv.ionode]);
4309
4310     for (i = 0; i < ldrv.drive_cnt && i < MAX_HDRIVES; ++i) {
4311         j = ldrv.drives[i];
4312         if (j >= MAX_HDRIVES || !ha->hdr[j].present)
4313             continue;
4314         if (ldrv.lock) {
4315             spin_lock_irqsave(&ha->smp_lock, flags);
4316             ha->hdr[j].lock = 1;
4317             spin_unlock_irqrestore(&ha->smp_lock, flags);
4318             gdth_wait_completion(ldrv.ionode, ha->bus_cnt, j);
4319             gdth_stop_timeout(ldrv.ionode, ha->bus_cnt, j);
4320         } else {
4321             spin_lock_irqsave(&ha->smp_lock, flags);
4322             ha->hdr[j].lock = 0;
4323             spin_unlock_irqrestore(&ha->smp_lock, flags);
4324             gdth_start_timeout(ldrv.ionode, ha->bus_cnt, j);
4325             gdth_next(ldrv.ionode);
4326         }
4327     }
4328     return 0;
4329 }
4330
4331 static int ioc_resetdrv(void __user *arg, char *cmnd)
4332 {
4333     gdth_ioctl_reset res;
4334     gdth_cmd_str cmd;
4335     int hanum;
4336     gdth_ha_str *ha;
4337     int rval;
4338
4339     if (copy_from_user(&res, arg, sizeof(gdth_ioctl_reset)) ||
4340         res.ionode >= gdth_ctr_count || res.number >= MAX_HDRIVES)
4341         return -EFAULT;
4342     hanum = res.ionode;
4343     ha = HADATA(gdth_ctr_tab[hanum]);
4344
4345     if (!ha->hdr[res.number].present)
4346         return 0;
4347     memset(&cmd, 0, sizeof(gdth_cmd_str));
4348     cmd.Service = CACHESERVICE;
4349     cmd.OpCode = GDT_CLUST_RESET;
4350     if (ha->cache_feat & GDT_64BIT)
4351         cmd.u.cache64.DeviceNo = res.number;
4352     else
4353         cmd.u.cache.DeviceNo = res.number;
4354
4355     rval = __gdth_execute(ha->sdev, &cmd, cmnd, 30, NULL);
4356     if (rval < 0)
4357         return rval;
4358     res.status = rval;
4359
4360     if (copy_to_user(arg, &res, sizeof(gdth_ioctl_reset)))
4361         return -EFAULT;
4362     return 0;
4363 }
4364
4365 static int ioc_general(void __user *arg, char *cmnd)
4366 {
4367     gdth_ioctl_general gen;
4368     char *buf = NULL;
4369     ulong64 paddr;
4370     int hanum;
4371     gdth_ha_str *ha;
4372     int rval;
4373
4374     if (copy_from_user(&gen, arg, sizeof(gdth_ioctl_general)) ||
4375         gen.ionode >= gdth_ctr_count)
4376         return -EFAULT;
4377     hanum = gen.ionode;
4378     ha = HADATA(gdth_ctr_tab[hanum]);
4379     if (gen.data_len + gen.sense_len != 0) {
4380         if (!(buf = gdth_ioctl_alloc(hanum, gen.data_len + gen.sense_len,
4381                                      FALSE, &paddr)))
4382             return -EFAULT;
4383         if (copy_from_user(buf, arg + sizeof(gdth_ioctl_general),
4384                            gen.data_len + gen.sense_len)) {
4385             gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
4386             return -EFAULT;
4387         }
4388
4389         if (gen.command.OpCode == GDT_IOCTL) {
4390             gen.command.u.ioctl.p_param = paddr;
4391         } else if (gen.command.Service == CACHESERVICE) {
4392             if (ha->cache_feat & GDT_64BIT) {
4393                 /* copy elements from 32-bit IOCTL structure */
4394                 gen.command.u.cache64.BlockCnt = gen.command.u.cache.BlockCnt;
4395                 gen.command.u.cache64.BlockNo = gen.command.u.cache.BlockNo;
4396                 gen.command.u.cache64.DeviceNo = gen.command.u.cache.DeviceNo;
4397                 /* addresses */
4398                 if (ha->cache_feat & SCATTER_GATHER) {
4399                     gen.command.u.cache64.DestAddr = (ulong64)-1;
4400                     gen.command.u.cache64.sg_canz = 1;
4401                     gen.command.u.cache64.sg_lst[0].sg_ptr = paddr;
4402                     gen.command.u.cache64.sg_lst[0].sg_len = gen.data_len;
4403                     gen.command.u.cache64.sg_lst[1].sg_len = 0;
4404                 } else {
4405                     gen.command.u.cache64.DestAddr = paddr;
4406                     gen.command.u.cache64.sg_canz = 0;
4407                 }
4408             } else {
4409                 if (ha->cache_feat & SCATTER_GATHER) {
4410                     gen.command.u.cache.DestAddr = 0xffffffff;
4411                     gen.command.u.cache.sg_canz = 1;
4412                     gen.command.u.cache.sg_lst[0].sg_ptr = (ulong32)paddr;
4413                     gen.command.u.cache.sg_lst[0].sg_len = gen.data_len;
4414                     gen.command.u.cache.sg_lst[1].sg_len = 0;
4415                 } else {
4416                     gen.command.u.cache.DestAddr = paddr;
4417                     gen.command.u.cache.sg_canz = 0;
4418                 }
4419             }
4420         } else if (gen.command.Service == SCSIRAWSERVICE) {
4421             if (ha->raw_feat & GDT_64BIT) {
4422                 /* copy elements from 32-bit IOCTL structure */
4423                 char cmd[16];
4424                 gen.command.u.raw64.sense_len = gen.command.u.raw.sense_len;
4425                 gen.command.u.raw64.bus = gen.command.u.raw.bus;
4426                 gen.command.u.raw64.lun = gen.command.u.raw.lun;
4427                 gen.command.u.raw64.target = gen.command.u.raw.target;
4428                 memcpy(cmd, gen.command.u.raw.cmd, 16);
4429                 memcpy(gen.command.u.raw64.cmd, cmd, 16);
4430                 gen.command.u.raw64.clen = gen.command.u.raw.clen;
4431                 gen.command.u.raw64.sdlen = gen.command.u.raw.sdlen;
4432                 gen.command.u.raw64.direction = gen.command.u.raw.direction;
4433                 /* addresses */
4434                 if (ha->raw_feat & SCATTER_GATHER) {
4435                     gen.command.u.raw64.sdata = (ulong64)-1;
4436                     gen.command.u.raw64.sg_ranz = 1;
4437                     gen.command.u.raw64.sg_lst[0].sg_ptr = paddr;
4438                     gen.command.u.raw64.sg_lst[0].sg_len = gen.data_len;
4439                     gen.command.u.raw64.sg_lst[1].sg_len = 0;
4440                 } else {
4441                     gen.command.u.raw64.sdata = paddr;
4442                     gen.command.u.raw64.sg_ranz = 0;
4443                 }
4444                 gen.command.u.raw64.sense_data = paddr + gen.data_len;
4445             } else {
4446                 if (ha->raw_feat & SCATTER_GATHER) {
4447                     gen.command.u.raw.sdata = 0xffffffff;
4448                     gen.command.u.raw.sg_ranz = 1;
4449                     gen.command.u.raw.sg_lst[0].sg_ptr = (ulong32)paddr;
4450                     gen.command.u.raw.sg_lst[0].sg_len = gen.data_len;
4451                     gen.command.u.raw.sg_lst[1].sg_len = 0;
4452                 } else {
4453                     gen.command.u.raw.sdata = paddr;
4454                     gen.command.u.raw.sg_ranz = 0;
4455                 }
4456                 gen.command.u.raw.sense_data = (ulong32)paddr + gen.data_len;
4457             }
4458         } else {
4459             gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
4460             return -EFAULT;
4461         }
4462     }
4463
4464     rval = __gdth_execute(ha->sdev, &gen.command, cmnd, gen.timeout, &gen.info);
4465     if (rval < 0)
4466         return rval;
4467     gen.status = rval;
4468
4469     if (copy_to_user(arg + sizeof(gdth_ioctl_general), buf,
4470                      gen.data_len + gen.sense_len)) {
4471         gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
4472         return -EFAULT;
4473     }
4474     if (copy_to_user(arg, &gen,
4475         sizeof(gdth_ioctl_general) - sizeof(gdth_cmd_str))) {
4476         gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
4477         return -EFAULT;
4478     }
4479     gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
4480     return 0;
4481 }
4482
4483 static int ioc_hdrlist(void __user *arg, char *cmnd)
4484 {
4485     gdth_ioctl_rescan *rsc;
4486     gdth_cmd_str *cmd;
4487     gdth_ha_str *ha;
4488     unchar i;
4489     int hanum, rc = -ENOMEM;
4490     u32 cluster_type = 0;
4491
4492     rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
4493     cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
4494     if (!rsc || !cmd)
4495         goto free_fail;
4496
4497     if (copy_from_user(rsc, arg, sizeof(gdth_ioctl_rescan)) ||
4498         rsc->ionode >= gdth_ctr_count) {
4499         rc = -EFAULT;
4500         goto free_fail;
4501     }
4502     hanum = rsc->ionode;
4503     ha = HADATA(gdth_ctr_tab[hanum]);
4504     memset(cmd, 0, sizeof(gdth_cmd_str));
4505
4506     for (i = 0; i < MAX_HDRIVES; ++i) {
4507         if (!ha->hdr[i].present) {
4508             rsc->hdr_list[i].bus = 0xff;
4509             continue;
4510         }
4511         rsc->hdr_list[i].bus = ha->virt_bus;
4512         rsc->hdr_list[i].target = i;
4513         rsc->hdr_list[i].lun = 0;
4514         rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
4515         if (ha->hdr[i].cluster_type & CLUSTER_DRIVE) {
4516             cmd->Service = CACHESERVICE;
4517             cmd->OpCode = GDT_CLUST_INFO;
4518             if (ha->cache_feat & GDT_64BIT)
4519                 cmd->u.cache64.DeviceNo = i;
4520             else
4521                 cmd->u.cache.DeviceNo = i;
4522             if (__gdth_execute(ha->sdev, cmd, cmnd, 30, &cluster_type) == S_OK)
4523                 rsc->hdr_list[i].cluster_type = cluster_type;
4524         }
4525     }
4526
4527     if (copy_to_user(arg, rsc, sizeof(gdth_ioctl_rescan)))
4528         rc = -EFAULT;
4529     else
4530         rc = 0;
4531
4532 free_fail:
4533     kfree(rsc);
4534     kfree(cmd);
4535     return rc;
4536 }
4537
4538 static int ioc_rescan(void __user *arg, char *cmnd)
4539 {
4540     gdth_ioctl_rescan *rsc;
4541     gdth_cmd_str *cmd;
4542     ushort i, status, hdr_cnt;
4543     ulong32 info;
4544     int hanum, cyls, hds, secs;
4545     int rc = -ENOMEM;
4546     ulong flags;
4547     gdth_ha_str *ha;
4548
4549     rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
4550     cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
4551     if (!cmd || !rsc)
4552         goto free_fail;
4553
4554     if (copy_from_user(rsc, arg, sizeof(gdth_ioctl_rescan)) ||
4555         rsc->ionode >= gdth_ctr_count) {
4556         rc = -EFAULT;
4557         goto free_fail;
4558     }
4559     hanum = rsc->ionode;
4560     ha = HADATA(gdth_ctr_tab[hanum]);
4561     memset(cmd, 0, sizeof(gdth_cmd_str));
4562
4563     if (rsc->flag == 0) {
4564         /* old method: re-init. cache service */
4565         cmd->Service = CACHESERVICE;
4566         if (ha->cache_feat & GDT_64BIT) {
4567             cmd->OpCode = GDT_X_INIT_HOST;
4568             cmd->u.cache64.DeviceNo = LINUX_OS;
4569         } else {
4570             cmd->OpCode = GDT_INIT;
4571             cmd->u.cache.DeviceNo = LINUX_OS;
4572         }
4573
4574         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4575         i = 0;
4576         hdr_cnt = (status == S_OK ? (ushort)info : 0);
4577     } else {
4578         i = rsc->hdr_no;
4579         hdr_cnt = i + 1;
4580     }
4581
4582     for (; i < hdr_cnt && i < MAX_HDRIVES; ++i) {
4583         cmd->Service = CACHESERVICE;
4584         cmd->OpCode = GDT_INFO;
4585         if (ha->cache_feat & GDT_64BIT)
4586             cmd->u.cache64.DeviceNo = i;
4587         else
4588             cmd->u.cache.DeviceNo = i;
4589
4590         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4591
4592         spin_lock_irqsave(&ha->smp_lock, flags);
4593         rsc->hdr_list[i].bus = ha->virt_bus;
4594         rsc->hdr_list[i].target = i;
4595         rsc->hdr_list[i].lun = 0;
4596         if (status != S_OK) {
4597             ha->hdr[i].present = FALSE;
4598         } else {
4599             ha->hdr[i].present = TRUE;
4600             ha->hdr[i].size = info;
4601             /* evaluate mapping */
4602             ha->hdr[i].size &= ~SECS32;
4603             gdth_eval_mapping(ha->hdr[i].size,&cyls,&hds,&secs);
4604             ha->hdr[i].heads = hds;
4605             ha->hdr[i].secs = secs;
4606             /* round size */
4607             ha->hdr[i].size = cyls * hds * secs;
4608         }
4609         spin_unlock_irqrestore(&ha->smp_lock, flags);
4610         if (status != S_OK)
4611             continue;
4612
4613         /* extended info, if GDT_64BIT, for drives > 2 TB */
4614         /* but we need ha->info2, not yet stored in scp->SCp */
4615
4616         /* devtype, cluster info, R/W attribs */
4617         cmd->Service = CACHESERVICE;
4618         cmd->OpCode = GDT_DEVTYPE;
4619         if (ha->cache_feat & GDT_64BIT)
4620             cmd->u.cache64.DeviceNo = i;
4621         else
4622             cmd->u.cache.DeviceNo = i;
4623
4624         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4625
4626         spin_lock_irqsave(&ha->smp_lock, flags);
4627         ha->hdr[i].devtype = (status == S_OK ? (ushort)info : 0);
4628         spin_unlock_irqrestore(&ha->smp_lock, flags);
4629
4630         cmd->Service = CACHESERVICE;
4631         cmd->OpCode = GDT_CLUST_INFO;
4632         if (ha->cache_feat & GDT_64BIT)
4633             cmd->u.cache64.DeviceNo = i;
4634         else
4635             cmd->u.cache.DeviceNo = i;
4636
4637         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4638
4639         spin_lock_irqsave(&ha->smp_lock, flags);
4640         ha->hdr[i].cluster_type =
4641             ((status == S_OK && !shared_access) ? (ushort)info : 0);
4642         spin_unlock_irqrestore(&ha->smp_lock, flags);
4643         rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
4644
4645         cmd->Service = CACHESERVICE;
4646         cmd->OpCode = GDT_RW_ATTRIBS;
4647         if (ha->cache_feat & GDT_64BIT)
4648             cmd->u.cache64.DeviceNo = i;
4649         else
4650             cmd->u.cache.DeviceNo = i;
4651
4652         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4653
4654         spin_lock_irqsave(&ha->smp_lock, flags);
4655         ha->hdr[i].rw_attribs = (status == S_OK ? (ushort)info : 0);
4656         spin_unlock_irqrestore(&ha->smp_lock, flags);
4657     }
4658
4659     if (copy_to_user(arg, rsc, sizeof(gdth_ioctl_rescan)))
4660         rc = -EFAULT;
4661     else
4662         rc = 0;
4663
4664 free_fail:
4665     kfree(rsc);
4666     kfree(cmd);
4667     return rc;
4668 }
4669
4670 static int gdth_ioctl(struct inode *inode, struct file *filep,
4671                       unsigned int cmd, unsigned long arg)
4672 {
4673     gdth_ha_str *ha;
4674     Scsi_Cmnd *scp;
4675     ulong flags;
4676     char cmnd[MAX_COMMAND_SIZE];
4677     void __user *argp = (void __user *)arg;
4678
4679     memset(cmnd, 0xff, 12);
4680
4681     TRACE(("gdth_ioctl() cmd 0x%x\n", cmd));
4682
4683     switch (cmd) {
4684       case GDTIOCTL_CTRCNT:
4685       {
4686         int cnt = gdth_ctr_count;
4687         if (put_user(cnt, (int __user *)argp))
4688                 return -EFAULT;
4689         break;
4690       }
4691
4692       case GDTIOCTL_DRVERS:
4693       {
4694         int ver = (GDTH_VERSION<<8) | GDTH_SUBVERSION;
4695         if (put_user(ver, (int __user *)argp))
4696                 return -EFAULT;
4697         break;
4698       }
4699
4700       case GDTIOCTL_OSVERS:
4701       {
4702         gdth_ioctl_osvers osv;
4703
4704         osv.version = (unchar)(LINUX_VERSION_CODE >> 16);
4705         osv.subversion = (unchar)(LINUX_VERSION_CODE >> 8);
4706         osv.revision = (ushort)(LINUX_VERSION_CODE & 0xff);
4707         if (copy_to_user(argp, &osv, sizeof(gdth_ioctl_osvers)))
4708                 return -EFAULT;
4709         break;
4710       }
4711
4712       case GDTIOCTL_CTRTYPE:
4713       {
4714         gdth_ioctl_ctrtype ctrt;
4715
4716         if (copy_from_user(&ctrt, argp, sizeof(gdth_ioctl_ctrtype)) ||
4717             ctrt.ionode >= gdth_ctr_count)
4718             return -EFAULT;
4719         ha = HADATA(gdth_ctr_tab[ctrt.ionode]);
4720         if (ha->type == GDT_ISA || ha->type == GDT_EISA) {
4721             ctrt.type = (unchar)((ha->stype>>20) - 0x10);
4722         } else {
4723             if (ha->type != GDT_PCIMPR) {
4724                 ctrt.type = (unchar)((ha->stype<<4) + 6);
4725             } else {
4726                 ctrt.type =
4727                     (ha->oem_id == OEM_ID_INTEL ? 0xfd : 0xfe);
4728                 if (ha->stype >= 0x300)
4729                     ctrt.ext_type = 0x6000 | ha->pdev->subsystem_device;
4730                 else
4731                     ctrt.ext_type = 0x6000 | ha->stype;
4732             }
4733             ctrt.device_id = ha->pdev->device;
4734             ctrt.sub_device_id = ha->pdev->subsystem_device;
4735         }
4736         ctrt.info = ha->brd_phys;
4737         ctrt.oem_id = ha->oem_id;
4738         if (copy_to_user(argp, &ctrt, sizeof(gdth_ioctl_ctrtype)))
4739             return -EFAULT;
4740         break;
4741       }
4742
4743       case GDTIOCTL_GENERAL:
4744         return ioc_general(argp, cmnd);
4745
4746       case GDTIOCTL_EVENT:
4747         return ioc_event(argp);
4748
4749       case GDTIOCTL_LOCKDRV:
4750         return ioc_lockdrv(argp);
4751
4752       case GDTIOCTL_LOCKCHN:
4753       {
4754         gdth_ioctl_lockchn lchn;
4755         unchar i, j;
4756
4757         if (copy_from_user(&lchn, argp, sizeof(gdth_ioctl_lockchn)) ||
4758             lchn.ionode >= gdth_ctr_count)
4759             return -EFAULT;
4760         ha = HADATA(gdth_ctr_tab[lchn.ionode]);
4761
4762         i = lchn.channel;
4763         if (i < ha->bus_cnt) {
4764             if (lchn.lock) {
4765                 spin_lock_irqsave(&ha->smp_lock, flags);
4766                 ha->raw[i].lock = 1;
4767                 spin_unlock_irqrestore(&ha->smp_lock, flags);
4768                 for (j = 0; j < ha->tid_cnt; ++j) {
4769                     gdth_wait_completion(lchn.ionode, i, j);
4770                     gdth_stop_timeout(lchn.ionode, i, j);
4771                 }
4772             } else {
4773                 spin_lock_irqsave(&ha->smp_lock, flags);
4774                 ha->raw[i].lock = 0;
4775                 spin_unlock_irqrestore(&ha->smp_lock, flags);
4776                 for (j = 0; j < ha->tid_cnt; ++j) {
4777                     gdth_start_timeout(lchn.ionode, i, j);
4778                     gdth_next(lchn.ionode);
4779                 }
4780             }
4781         }
4782         break;
4783       }
4784
4785       case GDTIOCTL_RESCAN:
4786         return ioc_rescan(argp, cmnd);
4787
4788       case GDTIOCTL_HDRLIST:
4789         return ioc_hdrlist(argp, cmnd);
4790
4791       case GDTIOCTL_RESET_BUS:
4792       {
4793         gdth_ioctl_reset res;
4794         int hanum, rval;
4795
4796         if (copy_from_user(&res, argp, sizeof(gdth_ioctl_reset)) ||
4797             res.ionode >= gdth_ctr_count)
4798             return -EFAULT;
4799         hanum = res.ionode;
4800         ha = HADATA(gdth_ctr_tab[hanum]);
4801
4802         scp  = kzalloc(sizeof(*scp), GFP_KERNEL);
4803         if (!scp)
4804             return -ENOMEM;
4805         scp->device = ha->sdev;
4806         scp->cmd_len = 12;
4807         scp->use_sg = 0;
4808         scp->device->channel = virt_ctr ? 0 : res.number;
4809         rval = gdth_eh_bus_reset(scp);
4810         res.status = (rval == SUCCESS ? S_OK : S_GENERR);
4811         kfree(scp);
4812
4813         if (copy_to_user(argp, &res, sizeof(gdth_ioctl_reset)))
4814             return -EFAULT;
4815         break;
4816       }
4817
4818       case GDTIOCTL_RESET_DRV:
4819         return ioc_resetdrv(argp, cmnd);
4820
4821       default:
4822         break;
4823     }
4824     return 0;
4825 }
4826
4827
4828 /* flush routine */
4829 static void gdth_flush(int hanum)
4830 {
4831     int             i;
4832     gdth_ha_str     *ha;
4833     gdth_cmd_str    gdtcmd;
4834     char            cmnd[MAX_COMMAND_SIZE];
4835     memset(cmnd, 0xff, MAX_COMMAND_SIZE);
4836
4837     TRACE2(("gdth_flush() hanum %d\n",hanum));
4838     ha = HADATA(gdth_ctr_tab[hanum]);
4839
4840     for (i = 0; i < MAX_HDRIVES; ++i) {
4841         if (ha->hdr[i].present) {
4842             gdtcmd.BoardNode = LOCALBOARD;
4843             gdtcmd.Service = CACHESERVICE;
4844             gdtcmd.OpCode = GDT_FLUSH;
4845             if (ha->cache_feat & GDT_64BIT) {
4846                 gdtcmd.u.cache64.DeviceNo = i;
4847                 gdtcmd.u.cache64.BlockNo = 1;
4848                 gdtcmd.u.cache64.sg_canz = 0;
4849             } else {
4850                 gdtcmd.u.cache.DeviceNo = i;
4851                 gdtcmd.u.cache.BlockNo = 1;
4852                 gdtcmd.u.cache.sg_canz = 0;
4853             }
4854             TRACE2(("gdth_flush(): flush ha %d drive %d\n", hanum, i));
4855
4856             gdth_execute(gdth_ctr_tab[hanum], &gdtcmd, cmnd, 30, NULL);
4857         }
4858     }
4859 }
4860
4861 /* shutdown routine */
4862 static int gdth_halt(struct notifier_block *nb, ulong event, void *buf)
4863 {
4864     int             hanum;
4865 #ifndef __alpha__
4866     gdth_cmd_str    gdtcmd;
4867     char            cmnd[MAX_COMMAND_SIZE];
4868 #endif
4869
4870     if (notifier_disabled)
4871         return NOTIFY_OK;
4872
4873     TRACE2(("gdth_halt() event %d\n",(int)event));
4874     if (event != SYS_RESTART && event != SYS_HALT && event != SYS_POWER_OFF)
4875         return NOTIFY_DONE;
4876
4877     notifier_disabled = 1;
4878     printk("GDT-HA: Flushing all host drives .. ");
4879     for (hanum = 0; hanum < gdth_ctr_count; ++hanum) {
4880         gdth_flush(hanum);
4881
4882 #ifndef __alpha__
4883         /* controller reset */
4884         memset(cmnd, 0xff, MAX_COMMAND_SIZE);
4885         gdtcmd.BoardNode = LOCALBOARD;
4886         gdtcmd.Service = CACHESERVICE;
4887         gdtcmd.OpCode = GDT_RESET;
4888         TRACE2(("gdth_halt(): reset controller %d\n", hanum));
4889         gdth_execute(gdth_ctr_tab[hanum], &gdtcmd, cmnd, 10, NULL);
4890 #endif
4891     }
4892     printk("Done.\n");
4893
4894 #ifdef GDTH_STATISTICS
4895     del_timer(&gdth_timer);
4896 #endif
4897     return NOTIFY_OK;
4898 }
4899
4900 /* configure lun */
4901 static int gdth_slave_configure(struct scsi_device *sdev)
4902 {
4903     scsi_adjust_queue_depth(sdev, 0, sdev->host->cmd_per_lun);
4904     sdev->skip_ms_page_3f = 1;
4905     sdev->skip_ms_page_8 = 1;
4906     return 0;
4907 }
4908
4909 static struct scsi_host_template driver_template = {
4910         .proc_name              = "gdth",
4911         .proc_info              = gdth_proc_info,
4912         .name                   = "GDT SCSI Disk Array Controller",
4913         .detect                 = gdth_detect,
4914         .release                = gdth_release,
4915         .info                   = gdth_info,
4916         .queuecommand           = gdth_queuecommand,
4917         .eh_bus_reset_handler   = gdth_eh_bus_reset,
4918         .bios_param             = gdth_bios_param,
4919         .can_queue              = GDTH_MAXCMDS,
4920         .slave_configure        = gdth_slave_configure,
4921         .this_id                = -1,
4922         .sg_tablesize           = GDTH_MAXSG,
4923         .cmd_per_lun            = GDTH_MAXC_P_L,
4924         .unchecked_isa_dma      = 1,
4925         .use_clustering         = ENABLE_CLUSTERING,
4926 };
4927
4928 #ifdef CONFIG_ISA
4929 static int gdth_isa_probe_one(struct scsi_host_template *shtp, ulong32 isa_bios)
4930 {
4931         struct Scsi_Host *shp;
4932         gdth_ha_str *ha;
4933         dma_addr_t scratch_dma_handle = 0;
4934         int error, hanum, i;
4935         u8 b;
4936
4937         if (!gdth_search_isa(isa_bios))
4938                 return -ENXIO;
4939
4940         shp = scsi_register(shtp, sizeof(gdth_ext_str));
4941         if (!shp)
4942                 return -ENOMEM;
4943         ha = HADATA(shp);
4944
4945         error = -ENODEV;
4946         if (!gdth_init_isa(isa_bios,ha))
4947                 goto out_host_put;
4948
4949         /* controller found and initialized */
4950         printk("Configuring GDT-ISA HA at BIOS 0x%05X IRQ %u DRQ %u\n",
4951                 isa_bios, ha->irq, ha->drq);
4952
4953         error = request_irq(ha->irq, gdth_interrupt, IRQF_DISABLED, "gdth", ha);
4954         if (error) {
4955                 printk("GDT-ISA: Unable to allocate IRQ\n");
4956                 goto out_host_put;
4957         }
4958
4959         error = request_dma(ha->drq, "gdth");
4960         if (error) {
4961                 printk("GDT-ISA: Unable to allocate DMA channel\n");
4962                 goto out_free_irq;
4963         }
4964
4965         set_dma_mode(ha->drq,DMA_MODE_CASCADE);
4966         enable_dma(ha->drq);
4967         shp->unchecked_isa_dma = 1;
4968         shp->irq = ha->irq;
4969         shp->dma_channel = ha->drq;
4970         hanum = gdth_ctr_count;
4971         gdth_ctr_tab[gdth_ctr_count++] = shp;
4972         gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4973
4974         NUMDATA(shp)->hanum = (ushort)hanum;
4975         NUMDATA(shp)->busnum= 0;
4976
4977         ha->pccb = CMDDATA(shp);
4978         ha->ccb_phys = 0L;
4979         ha->pdev = NULL;
4980
4981         error = -ENOMEM;
4982
4983         ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4984                                                 &scratch_dma_handle);
4985         if (!ha->pscratch)
4986                 goto out_dec_counters;
4987         ha->scratch_phys = scratch_dma_handle;
4988
4989         ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4990                                                 &scratch_dma_handle);
4991         if (!ha->pmsg)
4992                 goto out_free_pscratch;
4993         ha->msg_phys = scratch_dma_handle;
4994
4995 #ifdef INT_COAL
4996         ha->coal_stat = pci_alloc_consistent(ha->pdev,
4997                                 sizeof(gdth_coal_status) * MAXOFFSETS,
4998                                 &scratch_dma_handle);
4999         if (!ha->coal_stat)
5000                 goto out_free_pmsg;
5001         ha->coal_stat_phys = scratch_dma_handle;
5002 #endif
5003
5004         ha->scratch_busy = FALSE;
5005         ha->req_first = NULL;
5006         ha->tid_cnt = MAX_HDRIVES;
5007         if (max_ids > 0 && max_ids < ha->tid_cnt)
5008                 ha->tid_cnt = max_ids;
5009         for (i = 0; i < GDTH_MAXCMDS; ++i)
5010                 ha->cmd_tab[i].cmnd = UNUSED_CMND;
5011         ha->scan_mode = rescan ? 0x10 : 0;
5012
5013         error = -ENODEV;
5014         if (!gdth_search_drives(hanum)) {
5015                 printk("GDT-ISA: Error during device scan\n");
5016                 goto out_free_coal_stat;
5017         }
5018
5019         if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
5020                 hdr_channel = ha->bus_cnt;
5021         ha->virt_bus = hdr_channel;
5022
5023         if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
5024                 shp->max_cmd_len = 16;
5025
5026         shp->max_id      = ha->tid_cnt;
5027         shp->max_lun     = MAXLUN;
5028         shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
5029         if (virt_ctr) {
5030                 virt_ctr = 1;
5031                 /* register addit. SCSI channels as virtual controllers */
5032                 for (b = 1; b < ha->bus_cnt + 1; ++b) {
5033                         shp = scsi_register(shtp,sizeof(gdth_num_str));
5034                         shp->unchecked_isa_dma = 1;
5035                         shp->irq = ha->irq;
5036                         shp->dma_channel = ha->drq;
5037                         gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
5038                         NUMDATA(shp)->hanum = (ushort)hanum;
5039                         NUMDATA(shp)->busnum = b;
5040                 }
5041         }
5042
5043         spin_lock_init(&ha->smp_lock);
5044         gdth_enable_int(hanum);
5045
5046         return 0;
5047
5048  out_free_coal_stat:
5049 #ifdef INT_COAL
5050         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
5051                                 ha->coal_stat, ha->coal_stat_phys);
5052  out_free_pmsg:
5053 #endif
5054         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
5055                                 ha->pmsg, ha->msg_phys);
5056  out_free_pscratch:
5057         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
5058                                 ha->pscratch, ha->scratch_phys);
5059  out_dec_counters:
5060         gdth_ctr_count--;
5061         gdth_ctr_vcount--;
5062  out_free_irq:
5063         free_irq(ha->irq, ha);
5064  out_host_put:
5065         scsi_unregister(shp);
5066         return error;
5067 }
5068 #endif /* CONFIG_ISA */
5069
5070 #ifdef CONFIG_EISA
5071 static int gdth_eisa_probe_one(struct scsi_host_template *shtp,
5072                 ushort eisa_slot)
5073 {
5074         struct Scsi_Host *shp;
5075         gdth_ha_str *ha;
5076         dma_addr_t scratch_dma_handle = 0;
5077         int error, hanum, i;
5078         u8 b;
5079
5080         if (!gdth_search_eisa(eisa_slot))
5081                 return -ENXIO;
5082
5083         shp = scsi_register(shtp,sizeof(gdth_ext_str));
5084         if (!shp)
5085                 return -ENOMEM;
5086         ha = HADATA(shp);
5087
5088         error = -ENODEV;
5089         if (!gdth_init_eisa(eisa_slot,ha))
5090                 goto out_host_put;
5091
5092         /* controller found and initialized */
5093         printk("Configuring GDT-EISA HA at Slot %d IRQ %u\n",
5094                 eisa_slot >> 12, ha->irq);
5095
5096         error = request_irq(ha->irq, gdth_interrupt, IRQF_DISABLED, "gdth", ha);
5097         if (error) {
5098                 printk("GDT-EISA: Unable to allocate IRQ\n");
5099                 goto out_host_put;
5100         }
5101
5102         shp->unchecked_isa_dma = 0;
5103         shp->irq = ha->irq;
5104         shp->dma_channel = 0xff;
5105         hanum = gdth_ctr_count;
5106         gdth_ctr_tab[gdth_ctr_count++] = shp;
5107         gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
5108
5109         NUMDATA(shp)->hanum = (ushort)hanum;
5110         NUMDATA(shp)->busnum= 0;
5111         TRACE2(("EISA detect Bus 0: hanum %d\n",
5112                 NUMDATA(shp)->hanum));
5113
5114         ha->pccb = CMDDATA(shp);
5115         ha->ccb_phys = 0L;
5116
5117         error = -ENOMEM;
5118
5119         ha->pdev = NULL;
5120         ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
5121                                                 &scratch_dma_handle);
5122         if (!ha->pscratch)
5123                 goto out_free_irq;
5124         ha->scratch_phys = scratch_dma_handle;
5125
5126         ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
5127                                                 &scratch_dma_handle);
5128         if (!ha->pmsg)
5129                 goto out_free_pscratch;
5130         ha->msg_phys = scratch_dma_handle;
5131
5132 #ifdef INT_COAL
5133         ha->coal_stat = pci_alloc_consistent(ha->pdev,
5134                         sizeof(gdth_coal_status) * MAXOFFSETS,
5135                         &scratch_dma_handle);
5136         if (!ha->coal_stat)
5137                 goto out_free_pmsg;
5138         ha->coal_stat_phys = scratch_dma_handle;
5139 #endif
5140
5141         ha->ccb_phys = pci_map_single(ha->pdev,ha->pccb,
5142                         sizeof(gdth_cmd_str), PCI_DMA_BIDIRECTIONAL);
5143         if (!ha->ccb_phys)
5144                 goto out_free_coal_stat;
5145
5146         ha->scratch_busy = FALSE;
5147         ha->req_first = NULL;
5148         ha->tid_cnt = MAX_HDRIVES;
5149         if (max_ids > 0 && max_ids < ha->tid_cnt)
5150                 ha->tid_cnt = max_ids;
5151         for (i = 0; i < GDTH_MAXCMDS; ++i)
5152                 ha->cmd_tab[i].cmnd = UNUSED_CMND;
5153         ha->scan_mode = rescan ? 0x10 : 0;
5154
5155         if (!gdth_search_drives(hanum)) {
5156                 printk("GDT-EISA: Error during device scan\n");
5157                 error = -ENODEV;
5158                 goto out_free_ccb_phys;
5159         }
5160
5161         if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
5162                 hdr_channel = ha->bus_cnt;
5163         ha->virt_bus = hdr_channel;
5164
5165         if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
5166                 shp->max_cmd_len = 16;
5167
5168         shp->max_id      = ha->tid_cnt;
5169         shp->max_lun     = MAXLUN;
5170         shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
5171         if (virt_ctr) {
5172                 virt_ctr = 1;
5173                 /* register addit. SCSI channels as virtual controllers */
5174                 for (b = 1; b < ha->bus_cnt + 1; ++b) {
5175                         shp = scsi_register(shtp,sizeof(gdth_num_str));
5176                         shp->unchecked_isa_dma = 0;
5177                         shp->irq = ha->irq;
5178                         shp->dma_channel = 0xff;
5179                         gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
5180                         NUMDATA(shp)->hanum = (ushort)hanum;
5181                         NUMDATA(shp)->busnum = b;
5182                 }
5183         }
5184
5185         spin_lock_init(&ha->smp_lock);
5186         gdth_enable_int(hanum);
5187         return 0;
5188
5189  out_free_ccb_phys:
5190         pci_unmap_single(ha->pdev,ha->ccb_phys, sizeof(gdth_cmd_str),
5191                         PCI_DMA_BIDIRECTIONAL);
5192  out_free_coal_stat:
5193 #ifdef INT_COAL
5194         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
5195                                 ha->coal_stat, ha->coal_stat_phys);
5196  out_free_pmsg:
5197 #endif
5198         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
5199                                 ha->pmsg, ha->msg_phys);
5200  out_free_pscratch:
5201         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
5202                                 ha->pscratch, ha->scratch_phys);
5203  out_free_irq:
5204         free_irq(ha->irq, ha);
5205         gdth_ctr_count--;
5206         gdth_ctr_vcount--;
5207  out_host_put:
5208         scsi_unregister(shp);
5209         return error;
5210 }
5211 #endif /* CONFIG_EISA */
5212
5213 #ifdef CONFIG_PCI
5214 static int gdth_pci_probe_one(struct scsi_host_template *shtp,
5215                 gdth_pci_str *pcistr, int ctr)
5216 {
5217         struct Scsi_Host *shp;
5218         gdth_ha_str *ha;
5219         dma_addr_t scratch_dma_handle = 0;
5220         int error, hanum, i;
5221         u8 b;
5222
5223         shp = scsi_register(shtp,sizeof(gdth_ext_str));
5224         if (!shp)
5225                 return -ENOMEM;
5226         ha = HADATA(shp);
5227
5228         error = -ENODEV;
5229         if (!gdth_init_pci(&pcistr[ctr],ha))
5230                 goto out_host_put;
5231
5232         /* controller found and initialized */
5233         printk("Configuring GDT-PCI HA at %d/%d IRQ %u\n",
5234                 pcistr[ctr].pdev->bus->number,
5235                 PCI_SLOT(pcistr[ctr].pdev->devfn),
5236                 ha->irq);
5237
5238         error = request_irq(ha->irq, gdth_interrupt,
5239                                 IRQF_DISABLED|IRQF_SHARED, "gdth", ha);
5240         if (error) {
5241                 printk("GDT-PCI: Unable to allocate IRQ\n");
5242                 goto out_host_put;
5243         }
5244
5245         shp->unchecked_isa_dma = 0;
5246         shp->irq = ha->irq;
5247         shp->dma_channel = 0xff;
5248         hanum = gdth_ctr_count;
5249         gdth_ctr_tab[gdth_ctr_count++] = shp;
5250         gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
5251
5252         NUMDATA(shp)->hanum = (ushort)hanum;
5253         NUMDATA(shp)->busnum= 0;
5254
5255         ha->pccb = CMDDATA(shp);
5256         ha->ccb_phys = 0L;
5257
5258         error = -ENOMEM;
5259
5260         ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
5261                                                 &scratch_dma_handle);
5262         if (!ha->pscratch)
5263                 goto out_free_irq;
5264         ha->scratch_phys = scratch_dma_handle;
5265
5266         ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
5267                                         &scratch_dma_handle);
5268         if (!ha->pmsg)
5269                 goto out_free_pscratch;
5270         ha->msg_phys = scratch_dma_handle;
5271
5272 #ifdef INT_COAL
5273         ha->coal_stat = pci_alloc_consistent(ha->pdev,
5274                         sizeof(gdth_coal_status) * MAXOFFSETS,
5275                         &scratch_dma_handle);
5276         if (!ha->coal_stat)
5277                 goto out_free_pmsg;
5278         ha->coal_stat_phys = scratch_dma_handle;
5279 #endif
5280
5281         ha->scratch_busy = FALSE;
5282         ha->req_first = NULL;
5283         ha->tid_cnt = pcistr[ctr].pdev->device >= 0x200 ? MAXID : MAX_HDRIVES;
5284         if (max_ids > 0 && max_ids < ha->tid_cnt)
5285                 ha->tid_cnt = max_ids;
5286         for (i = 0; i < GDTH_MAXCMDS; ++i)
5287                 ha->cmd_tab[i].cmnd = UNUSED_CMND;
5288         ha->scan_mode = rescan ? 0x10 : 0;
5289
5290         error = -ENODEV;
5291         if (!gdth_search_drives(hanum)) {
5292                 printk("GDT-PCI %d: Error during device scan\n", hanum);
5293                 goto out_free_coal_stat;
5294         }
5295
5296         if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
5297                 hdr_channel = ha->bus_cnt;
5298         ha->virt_bus = hdr_channel;
5299
5300         /* 64-bit DMA only supported from FW >= x.43 */
5301         if (!(ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT) ||
5302             !ha->dma64_support) {
5303                 if (pci_set_dma_mask(pcistr[ctr].pdev, DMA_32BIT_MASK)) {
5304                         printk(KERN_WARNING "GDT-PCI %d: "
5305                                 "Unable to set 32-bit DMA\n", hanum);
5306                                 goto out_free_coal_stat;
5307                 }
5308         } else {
5309                 shp->max_cmd_len = 16;
5310                 if (!pci_set_dma_mask(pcistr[ctr].pdev, DMA_64BIT_MASK)) {
5311                         printk("GDT-PCI %d: 64-bit DMA enabled\n", hanum);
5312                 } else if (pci_set_dma_mask(pcistr[ctr].pdev, DMA_32BIT_MASK)) {
5313                         printk(KERN_WARNING "GDT-PCI %d: "
5314                                 "Unable to set 64/32-bit DMA\n", hanum);
5315                         goto out_free_coal_stat;
5316                 }
5317         }
5318
5319         shp->max_id      = ha->tid_cnt;
5320         shp->max_lun     = MAXLUN;
5321         shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
5322         if (virt_ctr) {
5323                 virt_ctr = 1;
5324                 /* register addit. SCSI channels as virtual controllers */
5325                 for (b = 1; b < ha->bus_cnt + 1; ++b) {
5326                         shp = scsi_register(shtp,sizeof(gdth_num_str));
5327                         shp->unchecked_isa_dma = 0;
5328                         shp->irq = ha->irq;
5329                         shp->dma_channel = 0xff;
5330                         gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
5331                         NUMDATA(shp)->hanum = (ushort)hanum;
5332                         NUMDATA(shp)->busnum = b;
5333                 }
5334         }
5335
5336         spin_lock_init(&ha->smp_lock);
5337         gdth_enable_int(hanum);
5338         return 0;
5339
5340  out_free_coal_stat:
5341 #ifdef INT_COAL
5342         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
5343                                 ha->coal_stat, ha->coal_stat_phys);
5344  out_free_pmsg:
5345 #endif
5346         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
5347                                 ha->pmsg, ha->msg_phys);
5348  out_free_pscratch:
5349         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
5350                                 ha->pscratch, ha->scratch_phys);
5351  out_free_irq:
5352         free_irq(ha->irq, ha);
5353         gdth_ctr_count--;
5354         gdth_ctr_vcount--;
5355  out_host_put:
5356         scsi_unregister(shp);
5357         return error;
5358 }
5359 #endif /* CONFIG_PCI */
5360
5361 #include "scsi_module.c"
5362 #ifndef MODULE
5363 __setup("gdth=", option_setup);
5364 #endif