1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
4 * Copyright (c) 2014- QLogic Corporation.
8 * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
16 #include "bfa_defs_svc.h"
19 BFA_TRC_FILE(CNA, IOC);
22 * IOC local definitions
24 #define BFA_IOC_TOV 3000 /* msecs */
25 #define BFA_IOC_HWSEM_TOV 500 /* msecs */
26 #define BFA_IOC_HB_TOV 500 /* msecs */
27 #define BFA_IOC_TOV_RECOVER BFA_IOC_HB_TOV
28 #define BFA_IOC_POLL_TOV BFA_TIMER_FREQ
30 #define bfa_ioc_timer_start(__ioc) \
31 bfa_timer_begin((__ioc)->timer_mod, &(__ioc)->ioc_timer, \
32 bfa_ioc_timeout, (__ioc), BFA_IOC_TOV)
33 #define bfa_ioc_timer_stop(__ioc) bfa_timer_stop(&(__ioc)->ioc_timer)
35 #define bfa_hb_timer_start(__ioc) \
36 bfa_timer_begin((__ioc)->timer_mod, &(__ioc)->hb_timer, \
37 bfa_ioc_hb_check, (__ioc), BFA_IOC_HB_TOV)
38 #define bfa_hb_timer_stop(__ioc) bfa_timer_stop(&(__ioc)->hb_timer)
40 #define BFA_DBG_FWTRC_OFF(_fn) (BFI_IOC_TRC_OFF + BFA_DBG_FWTRC_LEN * (_fn))
42 #define bfa_ioc_state_disabled(__sm) \
43 (((__sm) == BFI_IOC_UNINIT) || \
44 ((__sm) == BFI_IOC_INITING) || \
45 ((__sm) == BFI_IOC_HWINIT) || \
46 ((__sm) == BFI_IOC_DISABLED) || \
47 ((__sm) == BFI_IOC_FAIL) || \
48 ((__sm) == BFI_IOC_CFG_DISABLED))
51 * Asic specific macros : see bfa_hw_cb.c and bfa_hw_ct.c for details.
54 #define bfa_ioc_firmware_lock(__ioc) \
55 ((__ioc)->ioc_hwif->ioc_firmware_lock(__ioc))
56 #define bfa_ioc_firmware_unlock(__ioc) \
57 ((__ioc)->ioc_hwif->ioc_firmware_unlock(__ioc))
58 #define bfa_ioc_reg_init(__ioc) ((__ioc)->ioc_hwif->ioc_reg_init(__ioc))
59 #define bfa_ioc_map_port(__ioc) ((__ioc)->ioc_hwif->ioc_map_port(__ioc))
60 #define bfa_ioc_notify_fail(__ioc) \
61 ((__ioc)->ioc_hwif->ioc_notify_fail(__ioc))
62 #define bfa_ioc_sync_start(__ioc) \
63 ((__ioc)->ioc_hwif->ioc_sync_start(__ioc))
64 #define bfa_ioc_sync_join(__ioc) \
65 ((__ioc)->ioc_hwif->ioc_sync_join(__ioc))
66 #define bfa_ioc_sync_leave(__ioc) \
67 ((__ioc)->ioc_hwif->ioc_sync_leave(__ioc))
68 #define bfa_ioc_sync_ack(__ioc) \
69 ((__ioc)->ioc_hwif->ioc_sync_ack(__ioc))
70 #define bfa_ioc_sync_complete(__ioc) \
71 ((__ioc)->ioc_hwif->ioc_sync_complete(__ioc))
72 #define bfa_ioc_set_cur_ioc_fwstate(__ioc, __fwstate) \
73 ((__ioc)->ioc_hwif->ioc_set_fwstate(__ioc, __fwstate))
74 #define bfa_ioc_get_cur_ioc_fwstate(__ioc) \
75 ((__ioc)->ioc_hwif->ioc_get_fwstate(__ioc))
76 #define bfa_ioc_set_alt_ioc_fwstate(__ioc, __fwstate) \
77 ((__ioc)->ioc_hwif->ioc_set_alt_fwstate(__ioc, __fwstate))
78 #define bfa_ioc_get_alt_ioc_fwstate(__ioc) \
79 ((__ioc)->ioc_hwif->ioc_get_alt_fwstate(__ioc))
81 #define bfa_ioc_mbox_cmd_pending(__ioc) \
82 (!list_empty(&((__ioc)->mbox_mod.cmd_q)) || \
83 readl((__ioc)->ioc_regs.hfn_mbox_cmd))
85 bfa_boolean_t bfa_auto_recover = BFA_TRUE;
88 * forward declarations
90 static void bfa_ioc_hw_sem_get(struct bfa_ioc_s *ioc);
91 static void bfa_ioc_hwinit(struct bfa_ioc_s *ioc, bfa_boolean_t force);
92 static void bfa_ioc_timeout(void *ioc);
93 static void bfa_ioc_poll_fwinit(struct bfa_ioc_s *ioc);
94 static void bfa_ioc_send_enable(struct bfa_ioc_s *ioc);
95 static void bfa_ioc_send_disable(struct bfa_ioc_s *ioc);
96 static void bfa_ioc_send_getattr(struct bfa_ioc_s *ioc);
97 static void bfa_ioc_hb_monitor(struct bfa_ioc_s *ioc);
98 static void bfa_ioc_mbox_poll(struct bfa_ioc_s *ioc);
99 static void bfa_ioc_mbox_flush(struct bfa_ioc_s *ioc);
100 static void bfa_ioc_recover(struct bfa_ioc_s *ioc);
101 static void bfa_ioc_event_notify(struct bfa_ioc_s *ioc ,
102 enum bfa_ioc_event_e event);
103 static void bfa_ioc_disable_comp(struct bfa_ioc_s *ioc);
104 static void bfa_ioc_lpu_stop(struct bfa_ioc_s *ioc);
105 static void bfa_ioc_fail_notify(struct bfa_ioc_s *ioc);
106 static void bfa_ioc_pf_fwmismatch(struct bfa_ioc_s *ioc);
107 static enum bfi_ioc_img_ver_cmp_e bfa_ioc_fw_ver_patch_cmp(
108 struct bfi_ioc_image_hdr_s *base_fwhdr,
109 struct bfi_ioc_image_hdr_s *fwhdr_to_cmp);
110 static enum bfi_ioc_img_ver_cmp_e bfa_ioc_flash_fwver_cmp(
111 struct bfa_ioc_s *ioc,
112 struct bfi_ioc_image_hdr_s *base_fwhdr);
115 * IOC state machine definitions/declarations
117 bfa_fsm_state_decl(bfa_ioc, uninit, struct bfa_ioc_s, enum ioc_event);
118 bfa_fsm_state_decl(bfa_ioc, reset, struct bfa_ioc_s, enum ioc_event);
119 bfa_fsm_state_decl(bfa_ioc, enabling, struct bfa_ioc_s, enum ioc_event);
120 bfa_fsm_state_decl(bfa_ioc, getattr, struct bfa_ioc_s, enum ioc_event);
121 bfa_fsm_state_decl(bfa_ioc, op, struct bfa_ioc_s, enum ioc_event);
122 bfa_fsm_state_decl(bfa_ioc, fail_retry, struct bfa_ioc_s, enum ioc_event);
123 bfa_fsm_state_decl(bfa_ioc, fail, struct bfa_ioc_s, enum ioc_event);
124 bfa_fsm_state_decl(bfa_ioc, disabling, struct bfa_ioc_s, enum ioc_event);
125 bfa_fsm_state_decl(bfa_ioc, disabled, struct bfa_ioc_s, enum ioc_event);
126 bfa_fsm_state_decl(bfa_ioc, hwfail, struct bfa_ioc_s, enum ioc_event);
128 struct bfa_ioc_sm_table {
129 bfa_ioc_sm_t sm; /* state machine function */
130 enum bfa_ioc_state state; /* state machine encoding */
131 char *name; /* state name for display */
134 static struct bfa_ioc_sm_table ioc_sm_table[] = {
135 {BFA_SM(bfa_ioc_sm_uninit), BFA_IOC_UNINIT},
136 {BFA_SM(bfa_ioc_sm_reset), BFA_IOC_RESET},
137 {BFA_SM(bfa_ioc_sm_enabling), BFA_IOC_ENABLING},
138 {BFA_SM(bfa_ioc_sm_getattr), BFA_IOC_GETATTR},
139 {BFA_SM(bfa_ioc_sm_op), BFA_IOC_OPERATIONAL},
140 {BFA_SM(bfa_ioc_sm_fail_retry), BFA_IOC_INITFAIL},
141 {BFA_SM(bfa_ioc_sm_fail), BFA_IOC_FAIL},
142 {BFA_SM(bfa_ioc_sm_disabling), BFA_IOC_DISABLING},
143 {BFA_SM(bfa_ioc_sm_disabled), BFA_IOC_DISABLED},
144 {BFA_SM(bfa_ioc_sm_hwfail), BFA_IOC_HWFAIL},
147 static inline enum bfa_ioc_state
148 bfa_ioc_sm_to_state(struct bfa_ioc_sm_table *smt, bfa_ioc_sm_t sm)
152 while (smt[i].sm && smt[i].sm != sm)
158 * IOCPF state machine definitions/declarations
161 #define bfa_iocpf_timer_start(__ioc) \
162 bfa_timer_begin((__ioc)->timer_mod, &(__ioc)->ioc_timer, \
163 bfa_iocpf_timeout, (__ioc), BFA_IOC_TOV)
164 #define bfa_iocpf_timer_stop(__ioc) bfa_timer_stop(&(__ioc)->ioc_timer)
166 #define bfa_iocpf_poll_timer_start(__ioc) \
167 bfa_timer_begin((__ioc)->timer_mod, &(__ioc)->ioc_timer, \
168 bfa_iocpf_poll_timeout, (__ioc), BFA_IOC_POLL_TOV)
170 #define bfa_sem_timer_start(__ioc) \
171 bfa_timer_begin((__ioc)->timer_mod, &(__ioc)->sem_timer, \
172 bfa_iocpf_sem_timeout, (__ioc), BFA_IOC_HWSEM_TOV)
173 #define bfa_sem_timer_stop(__ioc) bfa_timer_stop(&(__ioc)->sem_timer)
176 * Forward declareations for iocpf state machine
178 static void bfa_iocpf_timeout(void *ioc_arg);
179 static void bfa_iocpf_sem_timeout(void *ioc_arg);
180 static void bfa_iocpf_poll_timeout(void *ioc_arg);
185 enum bfa_iocpf_state {
186 BFA_IOCPF_RESET = 1, /* IOC is in reset state */
187 BFA_IOCPF_SEMWAIT = 2, /* Waiting for IOC h/w semaphore */
188 BFA_IOCPF_HWINIT = 3, /* IOC h/w is being initialized */
189 BFA_IOCPF_READY = 4, /* IOCPF is initialized */
190 BFA_IOCPF_INITFAIL = 5, /* IOCPF failed */
191 BFA_IOCPF_FAIL = 6, /* IOCPF failed */
192 BFA_IOCPF_DISABLING = 7, /* IOCPF is being disabled */
193 BFA_IOCPF_DISABLED = 8, /* IOCPF is disabled */
194 BFA_IOCPF_FWMISMATCH = 9, /* IOC f/w different from drivers */
197 bfa_fsm_state_decl(bfa_iocpf, reset, struct bfa_iocpf_s, enum iocpf_event);
198 bfa_fsm_state_decl(bfa_iocpf, fwcheck, struct bfa_iocpf_s, enum iocpf_event);
199 bfa_fsm_state_decl(bfa_iocpf, mismatch, struct bfa_iocpf_s, enum iocpf_event);
200 bfa_fsm_state_decl(bfa_iocpf, semwait, struct bfa_iocpf_s, enum iocpf_event);
201 bfa_fsm_state_decl(bfa_iocpf, hwinit, struct bfa_iocpf_s, enum iocpf_event);
202 bfa_fsm_state_decl(bfa_iocpf, enabling, struct bfa_iocpf_s, enum iocpf_event);
203 bfa_fsm_state_decl(bfa_iocpf, ready, struct bfa_iocpf_s, enum iocpf_event);
204 bfa_fsm_state_decl(bfa_iocpf, initfail_sync, struct bfa_iocpf_s,
206 bfa_fsm_state_decl(bfa_iocpf, initfail, struct bfa_iocpf_s, enum iocpf_event);
207 bfa_fsm_state_decl(bfa_iocpf, fail_sync, struct bfa_iocpf_s, enum iocpf_event);
208 bfa_fsm_state_decl(bfa_iocpf, fail, struct bfa_iocpf_s, enum iocpf_event);
209 bfa_fsm_state_decl(bfa_iocpf, disabling, struct bfa_iocpf_s, enum iocpf_event);
210 bfa_fsm_state_decl(bfa_iocpf, disabling_sync, struct bfa_iocpf_s,
212 bfa_fsm_state_decl(bfa_iocpf, disabled, struct bfa_iocpf_s, enum iocpf_event);
214 struct bfa_iocpf_sm_table {
215 bfa_iocpf_sm_t sm; /* state machine function */
216 enum bfa_iocpf_state state; /* state machine encoding */
217 char *name; /* state name for display */
220 static inline enum bfa_iocpf_state
221 bfa_iocpf_sm_to_state(struct bfa_iocpf_sm_table *smt, bfa_iocpf_sm_t sm)
225 while (smt[i].sm && smt[i].sm != sm)
230 static struct bfa_iocpf_sm_table iocpf_sm_table[] = {
231 {BFA_SM(bfa_iocpf_sm_reset), BFA_IOCPF_RESET},
232 {BFA_SM(bfa_iocpf_sm_fwcheck), BFA_IOCPF_FWMISMATCH},
233 {BFA_SM(bfa_iocpf_sm_mismatch), BFA_IOCPF_FWMISMATCH},
234 {BFA_SM(bfa_iocpf_sm_semwait), BFA_IOCPF_SEMWAIT},
235 {BFA_SM(bfa_iocpf_sm_hwinit), BFA_IOCPF_HWINIT},
236 {BFA_SM(bfa_iocpf_sm_enabling), BFA_IOCPF_HWINIT},
237 {BFA_SM(bfa_iocpf_sm_ready), BFA_IOCPF_READY},
238 {BFA_SM(bfa_iocpf_sm_initfail_sync), BFA_IOCPF_INITFAIL},
239 {BFA_SM(bfa_iocpf_sm_initfail), BFA_IOCPF_INITFAIL},
240 {BFA_SM(bfa_iocpf_sm_fail_sync), BFA_IOCPF_FAIL},
241 {BFA_SM(bfa_iocpf_sm_fail), BFA_IOCPF_FAIL},
242 {BFA_SM(bfa_iocpf_sm_disabling), BFA_IOCPF_DISABLING},
243 {BFA_SM(bfa_iocpf_sm_disabling_sync), BFA_IOCPF_DISABLING},
244 {BFA_SM(bfa_iocpf_sm_disabled), BFA_IOCPF_DISABLED},
252 * Beginning state. IOC uninit state.
256 bfa_ioc_sm_uninit_entry(struct bfa_ioc_s *ioc)
261 * IOC is in uninit state.
264 bfa_ioc_sm_uninit(struct bfa_ioc_s *ioc, enum ioc_event event)
270 bfa_fsm_set_state(ioc, bfa_ioc_sm_reset);
274 bfa_sm_fault(ioc, event);
278 * Reset entry actions -- initialize state machine
281 bfa_ioc_sm_reset_entry(struct bfa_ioc_s *ioc)
283 bfa_fsm_set_state(&ioc->iocpf, bfa_iocpf_sm_reset);
287 * IOC is in reset state.
290 bfa_ioc_sm_reset(struct bfa_ioc_s *ioc, enum ioc_event event)
296 bfa_fsm_set_state(ioc, bfa_ioc_sm_enabling);
300 bfa_ioc_disable_comp(ioc);
304 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
308 bfa_sm_fault(ioc, event);
314 bfa_ioc_sm_enabling_entry(struct bfa_ioc_s *ioc)
316 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_ENABLE);
320 * Host IOC function is being enabled, awaiting response from firmware.
321 * Semaphore is acquired.
324 bfa_ioc_sm_enabling(struct bfa_ioc_s *ioc, enum ioc_event event)
330 bfa_fsm_set_state(ioc, bfa_ioc_sm_getattr);
334 /* !!! fall through !!! */
336 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
337 bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);
338 if (event != IOC_E_PFFAILED)
339 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_INITFAIL);
343 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
344 bfa_fsm_set_state(ioc, bfa_ioc_sm_hwfail);
348 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
352 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
353 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_STOP);
360 bfa_sm_fault(ioc, event);
366 bfa_ioc_sm_getattr_entry(struct bfa_ioc_s *ioc)
368 bfa_ioc_timer_start(ioc);
369 bfa_ioc_send_getattr(ioc);
373 * IOC configuration in progress. Timer is active.
376 bfa_ioc_sm_getattr(struct bfa_ioc_s *ioc, enum ioc_event event)
381 case IOC_E_FWRSP_GETATTR:
382 bfa_ioc_timer_stop(ioc);
383 bfa_fsm_set_state(ioc, bfa_ioc_sm_op);
388 bfa_ioc_timer_stop(ioc);
391 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
392 bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);
393 if (event != IOC_E_PFFAILED)
394 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_GETATTRFAIL);
398 bfa_ioc_timer_stop(ioc);
399 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
406 bfa_sm_fault(ioc, event);
411 bfa_ioc_sm_op_entry(struct bfa_ioc_s *ioc)
413 struct bfad_s *bfad = (struct bfad_s *)ioc->bfa->bfad;
415 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_OK);
416 bfa_ioc_event_notify(ioc, BFA_IOC_E_ENABLED);
417 bfa_ioc_hb_monitor(ioc);
418 BFA_LOG(KERN_INFO, bfad, bfa_log_level, "IOC enabled\n");
419 bfa_ioc_aen_post(ioc, BFA_IOC_AEN_ENABLE);
423 bfa_ioc_sm_op(struct bfa_ioc_s *ioc, enum ioc_event event)
432 bfa_hb_timer_stop(ioc);
433 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
438 bfa_hb_timer_stop(ioc);
441 if (ioc->iocpf.auto_recover)
442 bfa_fsm_set_state(ioc, bfa_ioc_sm_fail_retry);
444 bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);
446 bfa_ioc_fail_notify(ioc);
448 if (event != IOC_E_PFFAILED)
449 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_FAIL);
453 bfa_sm_fault(ioc, event);
459 bfa_ioc_sm_disabling_entry(struct bfa_ioc_s *ioc)
461 struct bfad_s *bfad = (struct bfad_s *)ioc->bfa->bfad;
462 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_DISABLE);
463 BFA_LOG(KERN_INFO, bfad, bfa_log_level, "IOC disabled\n");
464 bfa_ioc_aen_post(ioc, BFA_IOC_AEN_DISABLE);
468 * IOC is being disabled
471 bfa_ioc_sm_disabling(struct bfa_ioc_s *ioc, enum ioc_event event)
477 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabled);
482 * No state change. Will move to disabled state
483 * after iocpf sm completes failure processing and
484 * moves to disabled state.
486 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_FAIL);
490 bfa_fsm_set_state(ioc, bfa_ioc_sm_hwfail);
491 bfa_ioc_disable_comp(ioc);
495 bfa_sm_fault(ioc, event);
500 * IOC disable completion entry.
503 bfa_ioc_sm_disabled_entry(struct bfa_ioc_s *ioc)
505 bfa_ioc_disable_comp(ioc);
509 bfa_ioc_sm_disabled(struct bfa_ioc_s *ioc, enum ioc_event event)
515 bfa_fsm_set_state(ioc, bfa_ioc_sm_enabling);
519 ioc->cbfn->disable_cbfn(ioc->bfa);
523 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
524 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_STOP);
528 bfa_sm_fault(ioc, event);
534 bfa_ioc_sm_fail_retry_entry(struct bfa_ioc_s *ioc)
540 * Hardware initialization retry.
543 bfa_ioc_sm_fail_retry(struct bfa_ioc_s *ioc, enum ioc_event event)
549 bfa_fsm_set_state(ioc, bfa_ioc_sm_getattr);
555 * Initialization retry failed.
557 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
558 bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);
559 if (event != IOC_E_PFFAILED)
560 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_INITFAIL);
564 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
565 bfa_fsm_set_state(ioc, bfa_ioc_sm_hwfail);
572 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
576 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
577 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_STOP);
581 bfa_sm_fault(ioc, event);
587 bfa_ioc_sm_fail_entry(struct bfa_ioc_s *ioc)
596 bfa_ioc_sm_fail(struct bfa_ioc_s *ioc, enum ioc_event event)
603 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
607 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
611 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
612 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_STOP);
618 * HB failure / HW error notification, ignore.
622 bfa_sm_fault(ioc, event);
627 bfa_ioc_sm_hwfail_entry(struct bfa_ioc_s *ioc)
633 bfa_ioc_sm_hwfail(struct bfa_ioc_s *ioc, enum ioc_event event)
639 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
643 ioc->cbfn->disable_cbfn(ioc->bfa);
647 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
651 /* Ignore - already in hwfail state */
655 bfa_sm_fault(ioc, event);
660 * IOCPF State Machine
664 * Reset entry actions -- initialize state machine
667 bfa_iocpf_sm_reset_entry(struct bfa_iocpf_s *iocpf)
669 iocpf->fw_mismatch_notified = BFA_FALSE;
670 iocpf->auto_recover = bfa_auto_recover;
674 * Beginning state. IOC is in reset state.
677 bfa_iocpf_sm_reset(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
679 struct bfa_ioc_s *ioc = iocpf->ioc;
685 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fwcheck);
692 bfa_sm_fault(ioc, event);
697 * Semaphore should be acquired for version check.
700 bfa_iocpf_sm_fwcheck_entry(struct bfa_iocpf_s *iocpf)
702 struct bfi_ioc_image_hdr_s fwhdr;
703 u32 r32, fwstate, pgnum, loff = 0;
707 * Spin on init semaphore to serialize.
709 r32 = readl(iocpf->ioc->ioc_regs.ioc_init_sem_reg);
712 r32 = readl(iocpf->ioc->ioc_regs.ioc_init_sem_reg);
716 fwstate = bfa_ioc_get_cur_ioc_fwstate(iocpf->ioc);
717 if (fwstate == BFI_IOC_UNINIT) {
718 writel(1, iocpf->ioc->ioc_regs.ioc_init_sem_reg);
722 bfa_ioc_fwver_get(iocpf->ioc, &fwhdr);
724 if (swab32(fwhdr.exec) == BFI_FWBOOT_TYPE_NORMAL) {
725 writel(1, iocpf->ioc->ioc_regs.ioc_init_sem_reg);
732 pgnum = PSS_SMEM_PGNUM(iocpf->ioc->ioc_regs.smem_pg0, loff);
733 writel(pgnum, iocpf->ioc->ioc_regs.host_page_num_fn);
735 for (i = 0; i < sizeof(struct bfi_ioc_image_hdr_s) / sizeof(u32); i++) {
736 bfa_mem_write(iocpf->ioc->ioc_regs.smem_page_start, loff, 0);
740 bfa_trc(iocpf->ioc, fwstate);
741 bfa_trc(iocpf->ioc, swab32(fwhdr.exec));
742 bfa_ioc_set_cur_ioc_fwstate(iocpf->ioc, BFI_IOC_UNINIT);
743 bfa_ioc_set_alt_ioc_fwstate(iocpf->ioc, BFI_IOC_UNINIT);
746 * Unlock the hw semaphore. Should be here only once per boot.
748 bfa_ioc_ownership_reset(iocpf->ioc);
751 * unlock init semaphore.
753 writel(1, iocpf->ioc->ioc_regs.ioc_init_sem_reg);
756 bfa_ioc_hw_sem_get(iocpf->ioc);
760 * Awaiting h/w semaphore to continue with version check.
763 bfa_iocpf_sm_fwcheck(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
765 struct bfa_ioc_s *ioc = iocpf->ioc;
770 case IOCPF_E_SEMLOCKED:
771 if (bfa_ioc_firmware_lock(ioc)) {
772 if (bfa_ioc_sync_start(ioc)) {
773 bfa_ioc_sync_join(ioc);
774 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
776 bfa_ioc_firmware_unlock(ioc);
777 writel(1, ioc->ioc_regs.ioc_sem_reg);
778 bfa_sem_timer_start(ioc);
781 writel(1, ioc->ioc_regs.ioc_sem_reg);
782 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_mismatch);
786 case IOCPF_E_SEM_ERROR:
787 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
788 bfa_fsm_send_event(ioc, IOC_E_HWFAILED);
791 case IOCPF_E_DISABLE:
792 bfa_sem_timer_stop(ioc);
793 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
794 bfa_fsm_send_event(ioc, IOC_E_DISABLED);
798 bfa_sem_timer_stop(ioc);
799 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
803 bfa_sm_fault(ioc, event);
808 * Notify enable completion callback.
811 bfa_iocpf_sm_mismatch_entry(struct bfa_iocpf_s *iocpf)
814 * Call only the first time sm enters fwmismatch state.
816 if (iocpf->fw_mismatch_notified == BFA_FALSE)
817 bfa_ioc_pf_fwmismatch(iocpf->ioc);
819 iocpf->fw_mismatch_notified = BFA_TRUE;
820 bfa_iocpf_timer_start(iocpf->ioc);
824 * Awaiting firmware version match.
827 bfa_iocpf_sm_mismatch(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
829 struct bfa_ioc_s *ioc = iocpf->ioc;
834 case IOCPF_E_TIMEOUT:
835 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fwcheck);
838 case IOCPF_E_DISABLE:
839 bfa_iocpf_timer_stop(ioc);
840 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
841 bfa_fsm_send_event(ioc, IOC_E_DISABLED);
845 bfa_iocpf_timer_stop(ioc);
846 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
850 bfa_sm_fault(ioc, event);
855 * Request for semaphore.
858 bfa_iocpf_sm_semwait_entry(struct bfa_iocpf_s *iocpf)
860 bfa_ioc_hw_sem_get(iocpf->ioc);
864 * Awaiting semaphore for h/w initialzation.
867 bfa_iocpf_sm_semwait(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
869 struct bfa_ioc_s *ioc = iocpf->ioc;
874 case IOCPF_E_SEMLOCKED:
875 if (bfa_ioc_sync_complete(ioc)) {
876 bfa_ioc_sync_join(ioc);
877 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
879 writel(1, ioc->ioc_regs.ioc_sem_reg);
880 bfa_sem_timer_start(ioc);
884 case IOCPF_E_SEM_ERROR:
885 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
886 bfa_fsm_send_event(ioc, IOC_E_HWFAILED);
889 case IOCPF_E_DISABLE:
890 bfa_sem_timer_stop(ioc);
891 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
895 bfa_sm_fault(ioc, event);
900 bfa_iocpf_sm_hwinit_entry(struct bfa_iocpf_s *iocpf)
902 iocpf->poll_time = 0;
903 bfa_ioc_hwinit(iocpf->ioc, BFA_FALSE);
907 * Hardware is being initialized. Interrupts are enabled.
908 * Holding hardware semaphore lock.
911 bfa_iocpf_sm_hwinit(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
913 struct bfa_ioc_s *ioc = iocpf->ioc;
918 case IOCPF_E_FWREADY:
919 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_enabling);
922 case IOCPF_E_TIMEOUT:
923 writel(1, ioc->ioc_regs.ioc_sem_reg);
924 bfa_fsm_send_event(ioc, IOC_E_PFFAILED);
925 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
928 case IOCPF_E_DISABLE:
929 bfa_iocpf_timer_stop(ioc);
930 bfa_ioc_sync_leave(ioc);
931 writel(1, ioc->ioc_regs.ioc_sem_reg);
932 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
936 bfa_sm_fault(ioc, event);
941 bfa_iocpf_sm_enabling_entry(struct bfa_iocpf_s *iocpf)
943 bfa_iocpf_timer_start(iocpf->ioc);
945 * Enable Interrupts before sending fw IOC ENABLE cmd.
947 iocpf->ioc->cbfn->reset_cbfn(iocpf->ioc->bfa);
948 bfa_ioc_send_enable(iocpf->ioc);
952 * Host IOC function is being enabled, awaiting response from firmware.
953 * Semaphore is acquired.
956 bfa_iocpf_sm_enabling(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
958 struct bfa_ioc_s *ioc = iocpf->ioc;
963 case IOCPF_E_FWRSP_ENABLE:
964 bfa_iocpf_timer_stop(ioc);
965 writel(1, ioc->ioc_regs.ioc_sem_reg);
966 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_ready);
969 case IOCPF_E_INITFAIL:
970 bfa_iocpf_timer_stop(ioc);
973 case IOCPF_E_TIMEOUT:
974 writel(1, ioc->ioc_regs.ioc_sem_reg);
975 if (event == IOCPF_E_TIMEOUT)
976 bfa_fsm_send_event(ioc, IOC_E_PFFAILED);
977 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
980 case IOCPF_E_DISABLE:
981 bfa_iocpf_timer_stop(ioc);
982 writel(1, ioc->ioc_regs.ioc_sem_reg);
983 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling);
987 bfa_sm_fault(ioc, event);
992 bfa_iocpf_sm_ready_entry(struct bfa_iocpf_s *iocpf)
994 bfa_fsm_send_event(iocpf->ioc, IOC_E_ENABLED);
998 bfa_iocpf_sm_ready(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
1000 struct bfa_ioc_s *ioc = iocpf->ioc;
1002 bfa_trc(ioc, event);
1005 case IOCPF_E_DISABLE:
1006 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling);
1009 case IOCPF_E_GETATTRFAIL:
1010 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
1014 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail_sync);
1018 bfa_sm_fault(ioc, event);
1023 bfa_iocpf_sm_disabling_entry(struct bfa_iocpf_s *iocpf)
1025 bfa_iocpf_timer_start(iocpf->ioc);
1026 bfa_ioc_send_disable(iocpf->ioc);
1030 * IOC is being disabled
1033 bfa_iocpf_sm_disabling(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
1035 struct bfa_ioc_s *ioc = iocpf->ioc;
1037 bfa_trc(ioc, event);
1040 case IOCPF_E_FWRSP_DISABLE:
1041 bfa_iocpf_timer_stop(ioc);
1042 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
1046 bfa_iocpf_timer_stop(ioc);
1049 case IOCPF_E_TIMEOUT:
1050 bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_FAIL);
1051 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
1054 case IOCPF_E_FWRSP_ENABLE:
1058 bfa_sm_fault(ioc, event);
1063 bfa_iocpf_sm_disabling_sync_entry(struct bfa_iocpf_s *iocpf)
1065 bfa_ioc_hw_sem_get(iocpf->ioc);
1069 * IOC hb ack request is being removed.
1072 bfa_iocpf_sm_disabling_sync(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
1074 struct bfa_ioc_s *ioc = iocpf->ioc;
1076 bfa_trc(ioc, event);
1079 case IOCPF_E_SEMLOCKED:
1080 bfa_ioc_sync_leave(ioc);
1081 writel(1, ioc->ioc_regs.ioc_sem_reg);
1082 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
1085 case IOCPF_E_SEM_ERROR:
1086 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
1087 bfa_fsm_send_event(ioc, IOC_E_HWFAILED);
1094 bfa_sm_fault(ioc, event);
1099 * IOC disable completion entry.
1102 bfa_iocpf_sm_disabled_entry(struct bfa_iocpf_s *iocpf)
1104 bfa_ioc_mbox_flush(iocpf->ioc);
1105 bfa_fsm_send_event(iocpf->ioc, IOC_E_DISABLED);
1109 bfa_iocpf_sm_disabled(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
1111 struct bfa_ioc_s *ioc = iocpf->ioc;
1113 bfa_trc(ioc, event);
1116 case IOCPF_E_ENABLE:
1117 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_semwait);
1121 bfa_ioc_firmware_unlock(ioc);
1122 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
1126 bfa_sm_fault(ioc, event);
1131 bfa_iocpf_sm_initfail_sync_entry(struct bfa_iocpf_s *iocpf)
1133 bfa_ioc_debug_save_ftrc(iocpf->ioc);
1134 bfa_ioc_hw_sem_get(iocpf->ioc);
1138 * Hardware initialization failed.
1141 bfa_iocpf_sm_initfail_sync(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
1143 struct bfa_ioc_s *ioc = iocpf->ioc;
1145 bfa_trc(ioc, event);
1148 case IOCPF_E_SEMLOCKED:
1149 bfa_ioc_notify_fail(ioc);
1150 bfa_ioc_sync_leave(ioc);
1151 bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_FAIL);
1152 writel(1, ioc->ioc_regs.ioc_sem_reg);
1153 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail);
1156 case IOCPF_E_SEM_ERROR:
1157 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
1158 bfa_fsm_send_event(ioc, IOC_E_HWFAILED);
1161 case IOCPF_E_DISABLE:
1162 bfa_sem_timer_stop(ioc);
1163 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
1167 bfa_sem_timer_stop(ioc);
1168 bfa_ioc_firmware_unlock(ioc);
1169 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
1176 bfa_sm_fault(ioc, event);
1181 bfa_iocpf_sm_initfail_entry(struct bfa_iocpf_s *iocpf)
1183 bfa_trc(iocpf->ioc, 0);
1187 * Hardware initialization failed.
1190 bfa_iocpf_sm_initfail(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
1192 struct bfa_ioc_s *ioc = iocpf->ioc;
1194 bfa_trc(ioc, event);
1197 case IOCPF_E_DISABLE:
1198 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
1202 bfa_ioc_firmware_unlock(ioc);
1203 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
1207 bfa_sm_fault(ioc, event);
1212 bfa_iocpf_sm_fail_sync_entry(struct bfa_iocpf_s *iocpf)
1215 * Mark IOC as failed in hardware and stop firmware.
1217 bfa_ioc_lpu_stop(iocpf->ioc);
1220 * Flush any queued up mailbox requests.
1222 bfa_ioc_mbox_flush(iocpf->ioc);
1224 bfa_ioc_hw_sem_get(iocpf->ioc);
1228 bfa_iocpf_sm_fail_sync(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
1230 struct bfa_ioc_s *ioc = iocpf->ioc;
1232 bfa_trc(ioc, event);
1235 case IOCPF_E_SEMLOCKED:
1236 bfa_ioc_sync_ack(ioc);
1237 bfa_ioc_notify_fail(ioc);
1238 if (!iocpf->auto_recover) {
1239 bfa_ioc_sync_leave(ioc);
1240 bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_FAIL);
1241 writel(1, ioc->ioc_regs.ioc_sem_reg);
1242 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
1244 if (bfa_ioc_sync_complete(ioc))
1245 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
1247 writel(1, ioc->ioc_regs.ioc_sem_reg);
1248 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_semwait);
1253 case IOCPF_E_SEM_ERROR:
1254 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
1255 bfa_fsm_send_event(ioc, IOC_E_HWFAILED);
1258 case IOCPF_E_DISABLE:
1259 bfa_sem_timer_stop(ioc);
1260 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
1267 bfa_sm_fault(ioc, event);
1272 bfa_iocpf_sm_fail_entry(struct bfa_iocpf_s *iocpf)
1274 bfa_trc(iocpf->ioc, 0);
1278 * IOC is in failed state.
1281 bfa_iocpf_sm_fail(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
1283 struct bfa_ioc_s *ioc = iocpf->ioc;
1285 bfa_trc(ioc, event);
1288 case IOCPF_E_DISABLE:
1289 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
1293 bfa_sm_fault(ioc, event);
1298 * BFA IOC private functions
1302 * Notify common modules registered for notification.
1305 bfa_ioc_event_notify(struct bfa_ioc_s *ioc, enum bfa_ioc_event_e event)
1307 struct bfa_ioc_notify_s *notify;
1308 struct list_head *qe;
1310 list_for_each(qe, &ioc->notify_q) {
1311 notify = (struct bfa_ioc_notify_s *)qe;
1312 notify->cbfn(notify->cbarg, event);
1317 bfa_ioc_disable_comp(struct bfa_ioc_s *ioc)
1319 ioc->cbfn->disable_cbfn(ioc->bfa);
1320 bfa_ioc_event_notify(ioc, BFA_IOC_E_DISABLED);
1324 bfa_ioc_sem_get(void __iomem *sem_reg)
1328 #define BFA_SEM_SPINCNT 3000
1330 r32 = readl(sem_reg);
1332 while ((r32 & 1) && (cnt < BFA_SEM_SPINCNT)) {
1335 r32 = readl(sem_reg);
1345 bfa_ioc_hw_sem_get(struct bfa_ioc_s *ioc)
1350 * First read to the semaphore register will return 0, subsequent reads
1351 * will return 1. Semaphore is released by writing 1 to the register
1353 r32 = readl(ioc->ioc_regs.ioc_sem_reg);
1356 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_SEM_ERROR);
1360 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_SEMLOCKED);
1364 bfa_sem_timer_start(ioc);
1368 * Initialize LPU local memory (aka secondary memory / SRAM)
1371 bfa_ioc_lmem_init(struct bfa_ioc_s *ioc)
1375 #define PSS_LMEM_INIT_TIME 10000
1377 pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
1378 pss_ctl &= ~__PSS_LMEM_RESET;
1379 pss_ctl |= __PSS_LMEM_INIT_EN;
1382 * i2c workaround 12.5khz clock
1384 pss_ctl |= __PSS_I2C_CLK_DIV(3UL);
1385 writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
1388 * wait for memory initialization to be complete
1392 pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
1394 } while (!(pss_ctl & __PSS_LMEM_INIT_DONE) && (i < PSS_LMEM_INIT_TIME));
1397 * If memory initialization is not successful, IOC timeout will catch
1400 WARN_ON(!(pss_ctl & __PSS_LMEM_INIT_DONE));
1401 bfa_trc(ioc, pss_ctl);
1403 pss_ctl &= ~(__PSS_LMEM_INIT_DONE | __PSS_LMEM_INIT_EN);
1404 writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
1408 bfa_ioc_lpu_start(struct bfa_ioc_s *ioc)
1413 * Take processor out of reset.
1415 pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
1416 pss_ctl &= ~__PSS_LPU0_RESET;
1418 writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
1422 bfa_ioc_lpu_stop(struct bfa_ioc_s *ioc)
1427 * Put processors in reset.
1429 pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
1430 pss_ctl |= (__PSS_LPU0_RESET | __PSS_LPU1_RESET);
1432 writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
1436 * Get driver and firmware versions.
1439 bfa_ioc_fwver_get(struct bfa_ioc_s *ioc, struct bfi_ioc_image_hdr_s *fwhdr)
1444 u32 *fwsig = (u32 *) fwhdr;
1446 pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, loff);
1447 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
1449 for (i = 0; i < (sizeof(struct bfi_ioc_image_hdr_s) / sizeof(u32));
1452 bfa_mem_read(ioc->ioc_regs.smem_page_start, loff);
1453 loff += sizeof(u32);
1458 * Returns TRUE if driver is willing to work with current smem f/w version.
1461 bfa_ioc_fwver_cmp(struct bfa_ioc_s *ioc,
1462 struct bfi_ioc_image_hdr_s *smem_fwhdr)
1464 struct bfi_ioc_image_hdr_s *drv_fwhdr;
1465 enum bfi_ioc_img_ver_cmp_e smem_flash_cmp, drv_smem_cmp;
1467 drv_fwhdr = (struct bfi_ioc_image_hdr_s *)
1468 bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc), 0);
1471 * If smem is incompatible or old, driver should not work with it.
1473 drv_smem_cmp = bfa_ioc_fw_ver_patch_cmp(drv_fwhdr, smem_fwhdr);
1474 if (drv_smem_cmp == BFI_IOC_IMG_VER_INCOMP ||
1475 drv_smem_cmp == BFI_IOC_IMG_VER_OLD) {
1480 * IF Flash has a better F/W than smem do not work with smem.
1481 * If smem f/w == flash f/w, as smem f/w not old | incmp, work with it.
1482 * If Flash is old or incomp work with smem iff smem f/w == drv f/w.
1484 smem_flash_cmp = bfa_ioc_flash_fwver_cmp(ioc, smem_fwhdr);
1486 if (smem_flash_cmp == BFI_IOC_IMG_VER_BETTER) {
1488 } else if (smem_flash_cmp == BFI_IOC_IMG_VER_SAME) {
1491 return (drv_smem_cmp == BFI_IOC_IMG_VER_SAME) ?
1492 BFA_TRUE : BFA_FALSE;
1497 * Return true if current running version is valid. Firmware signature and
1498 * execution context (driver/bios) must match.
1500 static bfa_boolean_t
1501 bfa_ioc_fwver_valid(struct bfa_ioc_s *ioc, u32 boot_env)
1503 struct bfi_ioc_image_hdr_s fwhdr;
1505 bfa_ioc_fwver_get(ioc, &fwhdr);
1507 if (swab32(fwhdr.bootenv) != boot_env) {
1508 bfa_trc(ioc, fwhdr.bootenv);
1509 bfa_trc(ioc, boot_env);
1513 return bfa_ioc_fwver_cmp(ioc, &fwhdr);
1516 static bfa_boolean_t
1517 bfa_ioc_fwver_md5_check(struct bfi_ioc_image_hdr_s *fwhdr_1,
1518 struct bfi_ioc_image_hdr_s *fwhdr_2)
1522 for (i = 0; i < BFI_IOC_MD5SUM_SZ; i++)
1523 if (fwhdr_1->md5sum[i] != fwhdr_2->md5sum[i])
1530 * Returns TRUE if major minor and maintainence are same.
1531 * If patch versions are same, check for MD5 Checksum to be same.
1533 static bfa_boolean_t
1534 bfa_ioc_fw_ver_compatible(struct bfi_ioc_image_hdr_s *drv_fwhdr,
1535 struct bfi_ioc_image_hdr_s *fwhdr_to_cmp)
1537 if (drv_fwhdr->signature != fwhdr_to_cmp->signature)
1540 if (drv_fwhdr->fwver.major != fwhdr_to_cmp->fwver.major)
1543 if (drv_fwhdr->fwver.minor != fwhdr_to_cmp->fwver.minor)
1546 if (drv_fwhdr->fwver.maint != fwhdr_to_cmp->fwver.maint)
1549 if (drv_fwhdr->fwver.patch == fwhdr_to_cmp->fwver.patch &&
1550 drv_fwhdr->fwver.phase == fwhdr_to_cmp->fwver.phase &&
1551 drv_fwhdr->fwver.build == fwhdr_to_cmp->fwver.build) {
1552 return bfa_ioc_fwver_md5_check(drv_fwhdr, fwhdr_to_cmp);
1558 static bfa_boolean_t
1559 bfa_ioc_flash_fwver_valid(struct bfi_ioc_image_hdr_s *flash_fwhdr)
1561 if (flash_fwhdr->fwver.major == 0 || flash_fwhdr->fwver.major == 0xFF)
1567 static bfa_boolean_t fwhdr_is_ga(struct bfi_ioc_image_hdr_s *fwhdr)
1569 if (fwhdr->fwver.phase == 0 &&
1570 fwhdr->fwver.build == 0)
1577 * Returns TRUE if both are compatible and patch of fwhdr_to_cmp is better.
1579 static enum bfi_ioc_img_ver_cmp_e
1580 bfa_ioc_fw_ver_patch_cmp(struct bfi_ioc_image_hdr_s *base_fwhdr,
1581 struct bfi_ioc_image_hdr_s *fwhdr_to_cmp)
1583 if (bfa_ioc_fw_ver_compatible(base_fwhdr, fwhdr_to_cmp) == BFA_FALSE)
1584 return BFI_IOC_IMG_VER_INCOMP;
1586 if (fwhdr_to_cmp->fwver.patch > base_fwhdr->fwver.patch)
1587 return BFI_IOC_IMG_VER_BETTER;
1589 else if (fwhdr_to_cmp->fwver.patch < base_fwhdr->fwver.patch)
1590 return BFI_IOC_IMG_VER_OLD;
1593 * GA takes priority over internal builds of the same patch stream.
1594 * At this point major minor maint and patch numbers are same.
1597 if (fwhdr_is_ga(base_fwhdr) == BFA_TRUE) {
1598 if (fwhdr_is_ga(fwhdr_to_cmp))
1599 return BFI_IOC_IMG_VER_SAME;
1601 return BFI_IOC_IMG_VER_OLD;
1603 if (fwhdr_is_ga(fwhdr_to_cmp))
1604 return BFI_IOC_IMG_VER_BETTER;
1607 if (fwhdr_to_cmp->fwver.phase > base_fwhdr->fwver.phase)
1608 return BFI_IOC_IMG_VER_BETTER;
1609 else if (fwhdr_to_cmp->fwver.phase < base_fwhdr->fwver.phase)
1610 return BFI_IOC_IMG_VER_OLD;
1612 if (fwhdr_to_cmp->fwver.build > base_fwhdr->fwver.build)
1613 return BFI_IOC_IMG_VER_BETTER;
1614 else if (fwhdr_to_cmp->fwver.build < base_fwhdr->fwver.build)
1615 return BFI_IOC_IMG_VER_OLD;
1618 * All Version Numbers are equal.
1619 * Md5 check to be done as a part of compatibility check.
1621 return BFI_IOC_IMG_VER_SAME;
1624 #define BFA_FLASH_PART_FWIMG_ADDR 0x100000 /* fw image address */
1627 bfa_ioc_flash_img_get_chnk(struct bfa_ioc_s *ioc, u32 off,
1630 return bfa_flash_raw_read(ioc->pcidev.pci_bar_kva,
1631 BFA_FLASH_PART_FWIMG_ADDR + (off * sizeof(u32)),
1632 (char *)fwimg, BFI_FLASH_CHUNK_SZ);
1635 static enum bfi_ioc_img_ver_cmp_e
1636 bfa_ioc_flash_fwver_cmp(struct bfa_ioc_s *ioc,
1637 struct bfi_ioc_image_hdr_s *base_fwhdr)
1639 struct bfi_ioc_image_hdr_s *flash_fwhdr;
1640 bfa_status_t status;
1641 u32 fwimg[BFI_FLASH_CHUNK_SZ_WORDS];
1643 status = bfa_ioc_flash_img_get_chnk(ioc, 0, fwimg);
1644 if (status != BFA_STATUS_OK)
1645 return BFI_IOC_IMG_VER_INCOMP;
1647 flash_fwhdr = (struct bfi_ioc_image_hdr_s *) fwimg;
1648 if (bfa_ioc_flash_fwver_valid(flash_fwhdr) == BFA_TRUE)
1649 return bfa_ioc_fw_ver_patch_cmp(base_fwhdr, flash_fwhdr);
1651 return BFI_IOC_IMG_VER_INCOMP;
1656 * Invalidate fwver signature
1659 bfa_ioc_fwsig_invalidate(struct bfa_ioc_s *ioc)
1664 enum bfi_ioc_state ioc_fwstate;
1666 ioc_fwstate = bfa_ioc_get_cur_ioc_fwstate(ioc);
1667 if (!bfa_ioc_state_disabled(ioc_fwstate))
1668 return BFA_STATUS_ADAPTER_ENABLED;
1670 pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, loff);
1671 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
1672 bfa_mem_write(ioc->ioc_regs.smem_page_start, loff, BFA_IOC_FW_INV_SIGN);
1674 return BFA_STATUS_OK;
1678 * Conditionally flush any pending message from firmware at start.
1681 bfa_ioc_msgflush(struct bfa_ioc_s *ioc)
1685 r32 = readl(ioc->ioc_regs.lpu_mbox_cmd);
1687 writel(1, ioc->ioc_regs.lpu_mbox_cmd);
1691 bfa_ioc_hwinit(struct bfa_ioc_s *ioc, bfa_boolean_t force)
1693 enum bfi_ioc_state ioc_fwstate;
1694 bfa_boolean_t fwvalid;
1698 ioc_fwstate = bfa_ioc_get_cur_ioc_fwstate(ioc);
1701 ioc_fwstate = BFI_IOC_UNINIT;
1703 bfa_trc(ioc, ioc_fwstate);
1705 boot_type = BFI_FWBOOT_TYPE_NORMAL;
1706 boot_env = BFI_FWBOOT_ENV_OS;
1709 * check if firmware is valid
1711 fwvalid = (ioc_fwstate == BFI_IOC_UNINIT) ?
1712 BFA_FALSE : bfa_ioc_fwver_valid(ioc, boot_env);
1715 if (bfa_ioc_boot(ioc, boot_type, boot_env) == BFA_STATUS_OK)
1716 bfa_ioc_poll_fwinit(ioc);
1721 * If hardware initialization is in progress (initialized by other IOC),
1722 * just wait for an initialization completion interrupt.
1724 if (ioc_fwstate == BFI_IOC_INITING) {
1725 bfa_ioc_poll_fwinit(ioc);
1730 * If IOC function is disabled and firmware version is same,
1731 * just re-enable IOC.
1733 * If option rom, IOC must not be in operational state. With
1734 * convergence, IOC will be in operational state when 2nd driver
1737 if (ioc_fwstate == BFI_IOC_DISABLED || ioc_fwstate == BFI_IOC_OP) {
1740 * When using MSI-X any pending firmware ready event should
1741 * be flushed. Otherwise MSI-X interrupts are not delivered.
1743 bfa_ioc_msgflush(ioc);
1744 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_FWREADY);
1749 * Initialize the h/w for any other states.
1751 if (bfa_ioc_boot(ioc, boot_type, boot_env) == BFA_STATUS_OK)
1752 bfa_ioc_poll_fwinit(ioc);
1756 bfa_ioc_timeout(void *ioc_arg)
1758 struct bfa_ioc_s *ioc = (struct bfa_ioc_s *) ioc_arg;
1761 bfa_fsm_send_event(ioc, IOC_E_TIMEOUT);
1765 bfa_ioc_mbox_send(struct bfa_ioc_s *ioc, void *ioc_msg, int len)
1767 u32 *msgp = (u32 *) ioc_msg;
1770 bfa_trc(ioc, msgp[0]);
1773 WARN_ON(len > BFI_IOC_MSGLEN_MAX);
1776 * first write msg to mailbox registers
1778 for (i = 0; i < len / sizeof(u32); i++)
1779 writel(cpu_to_le32(msgp[i]),
1780 ioc->ioc_regs.hfn_mbox + i * sizeof(u32));
1782 for (; i < BFI_IOC_MSGLEN_MAX / sizeof(u32); i++)
1783 writel(0, ioc->ioc_regs.hfn_mbox + i * sizeof(u32));
1786 * write 1 to mailbox CMD to trigger LPU event
1788 writel(1, ioc->ioc_regs.hfn_mbox_cmd);
1789 (void) readl(ioc->ioc_regs.hfn_mbox_cmd);
1793 bfa_ioc_send_enable(struct bfa_ioc_s *ioc)
1795 struct bfi_ioc_ctrl_req_s enable_req;
1797 bfi_h2i_set(enable_req.mh, BFI_MC_IOC, BFI_IOC_H2I_ENABLE_REQ,
1798 bfa_ioc_portid(ioc));
1799 enable_req.clscode = cpu_to_be16(ioc->clscode);
1800 /* unsigned 32-bit time_t overflow in y2106 */
1801 enable_req.tv_sec = be32_to_cpu(ktime_get_real_seconds());
1802 bfa_ioc_mbox_send(ioc, &enable_req, sizeof(struct bfi_ioc_ctrl_req_s));
1806 bfa_ioc_send_disable(struct bfa_ioc_s *ioc)
1808 struct bfi_ioc_ctrl_req_s disable_req;
1810 bfi_h2i_set(disable_req.mh, BFI_MC_IOC, BFI_IOC_H2I_DISABLE_REQ,
1811 bfa_ioc_portid(ioc));
1812 disable_req.clscode = cpu_to_be16(ioc->clscode);
1813 /* unsigned 32-bit time_t overflow in y2106 */
1814 disable_req.tv_sec = be32_to_cpu(ktime_get_real_seconds());
1815 bfa_ioc_mbox_send(ioc, &disable_req, sizeof(struct bfi_ioc_ctrl_req_s));
1819 bfa_ioc_send_getattr(struct bfa_ioc_s *ioc)
1821 struct bfi_ioc_getattr_req_s attr_req;
1823 bfi_h2i_set(attr_req.mh, BFI_MC_IOC, BFI_IOC_H2I_GETATTR_REQ,
1824 bfa_ioc_portid(ioc));
1825 bfa_dma_be_addr_set(attr_req.attr_addr, ioc->attr_dma.pa);
1826 bfa_ioc_mbox_send(ioc, &attr_req, sizeof(attr_req));
1830 bfa_ioc_hb_check(void *cbarg)
1832 struct bfa_ioc_s *ioc = cbarg;
1835 hb_count = readl(ioc->ioc_regs.heartbeat);
1836 if (ioc->hb_count == hb_count) {
1837 bfa_ioc_recover(ioc);
1840 ioc->hb_count = hb_count;
1843 bfa_ioc_mbox_poll(ioc);
1844 bfa_hb_timer_start(ioc);
1848 bfa_ioc_hb_monitor(struct bfa_ioc_s *ioc)
1850 ioc->hb_count = readl(ioc->ioc_regs.heartbeat);
1851 bfa_hb_timer_start(ioc);
1855 * Initiate a full firmware download.
1858 bfa_ioc_download_fw(struct bfa_ioc_s *ioc, u32 boot_type,
1868 u32 fwimg_buf[BFI_FLASH_CHUNK_SZ_WORDS];
1869 bfa_status_t status;
1871 if (boot_env == BFI_FWBOOT_ENV_OS &&
1872 boot_type == BFI_FWBOOT_TYPE_FLASH) {
1873 fwimg_size = BFI_FLASH_IMAGE_SZ/sizeof(u32);
1875 status = bfa_ioc_flash_img_get_chnk(ioc,
1876 BFA_IOC_FLASH_CHUNK_ADDR(chunkno), fwimg_buf);
1877 if (status != BFA_STATUS_OK)
1882 fwimg_size = bfa_cb_image_get_size(bfa_ioc_asic_gen(ioc));
1883 fwimg = bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc),
1884 BFA_IOC_FLASH_CHUNK_ADDR(chunkno));
1887 bfa_trc(ioc, fwimg_size);
1890 pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, loff);
1891 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
1893 for (i = 0; i < fwimg_size; i++) {
1895 if (BFA_IOC_FLASH_CHUNK_NO(i) != chunkno) {
1896 chunkno = BFA_IOC_FLASH_CHUNK_NO(i);
1898 if (boot_env == BFI_FWBOOT_ENV_OS &&
1899 boot_type == BFI_FWBOOT_TYPE_FLASH) {
1900 status = bfa_ioc_flash_img_get_chnk(ioc,
1901 BFA_IOC_FLASH_CHUNK_ADDR(chunkno),
1903 if (status != BFA_STATUS_OK)
1908 fwimg = bfa_cb_image_get_chunk(
1909 bfa_ioc_asic_gen(ioc),
1910 BFA_IOC_FLASH_CHUNK_ADDR(chunkno));
1917 bfa_mem_write(ioc->ioc_regs.smem_page_start, loff,
1918 fwimg[BFA_IOC_FLASH_OFFSET_IN_CHUNK(i)]);
1920 loff += sizeof(u32);
1923 * handle page offset wrap around
1925 loff = PSS_SMEM_PGOFF(loff);
1928 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
1932 writel(PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, 0),
1933 ioc->ioc_regs.host_page_num_fn);
1936 * Set boot type, env and device mode at the end.
1938 if (boot_env == BFI_FWBOOT_ENV_OS &&
1939 boot_type == BFI_FWBOOT_TYPE_FLASH) {
1940 boot_type = BFI_FWBOOT_TYPE_NORMAL;
1942 asicmode = BFI_FWBOOT_DEVMODE(ioc->asic_gen, ioc->asic_mode,
1943 ioc->port0_mode, ioc->port1_mode);
1944 bfa_mem_write(ioc->ioc_regs.smem_page_start, BFI_FWBOOT_DEVMODE_OFF,
1946 bfa_mem_write(ioc->ioc_regs.smem_page_start, BFI_FWBOOT_TYPE_OFF,
1948 bfa_mem_write(ioc->ioc_regs.smem_page_start, BFI_FWBOOT_ENV_OFF,
1950 return BFA_STATUS_OK;
1955 * Update BFA configuration from firmware configuration.
1958 bfa_ioc_getattr_reply(struct bfa_ioc_s *ioc)
1960 struct bfi_ioc_attr_s *attr = ioc->attr;
1962 attr->adapter_prop = be32_to_cpu(attr->adapter_prop);
1963 attr->card_type = be32_to_cpu(attr->card_type);
1964 attr->maxfrsize = be16_to_cpu(attr->maxfrsize);
1965 ioc->fcmode = (attr->port_mode == BFI_PORT_MODE_FC);
1966 attr->mfg_year = be16_to_cpu(attr->mfg_year);
1968 bfa_fsm_send_event(ioc, IOC_E_FWRSP_GETATTR);
1972 * Attach time initialization of mbox logic.
1975 bfa_ioc_mbox_attach(struct bfa_ioc_s *ioc)
1977 struct bfa_ioc_mbox_mod_s *mod = &ioc->mbox_mod;
1980 INIT_LIST_HEAD(&mod->cmd_q);
1981 for (mc = 0; mc < BFI_MC_MAX; mc++) {
1982 mod->mbhdlr[mc].cbfn = NULL;
1983 mod->mbhdlr[mc].cbarg = ioc->bfa;
1988 * Mbox poll timer -- restarts any pending mailbox requests.
1991 bfa_ioc_mbox_poll(struct bfa_ioc_s *ioc)
1993 struct bfa_ioc_mbox_mod_s *mod = &ioc->mbox_mod;
1994 struct bfa_mbox_cmd_s *cmd;
1998 * If no command pending, do nothing
2000 if (list_empty(&mod->cmd_q))
2004 * If previous command is not yet fetched by firmware, do nothing
2006 stat = readl(ioc->ioc_regs.hfn_mbox_cmd);
2011 * Enqueue command to firmware.
2013 bfa_q_deq(&mod->cmd_q, &cmd);
2014 bfa_ioc_mbox_send(ioc, cmd->msg, sizeof(cmd->msg));
2018 * Cleanup any pending requests.
2021 bfa_ioc_mbox_flush(struct bfa_ioc_s *ioc)
2023 struct bfa_ioc_mbox_mod_s *mod = &ioc->mbox_mod;
2024 struct bfa_mbox_cmd_s *cmd;
2026 while (!list_empty(&mod->cmd_q))
2027 bfa_q_deq(&mod->cmd_q, &cmd);
2031 * Read data from SMEM to host through PCI memmap
2033 * @param[in] ioc memory for IOC
2034 * @param[in] tbuf app memory to store data from smem
2035 * @param[in] soff smem offset
2036 * @param[in] sz size of smem in bytes
2039 bfa_ioc_smem_read(struct bfa_ioc_s *ioc, void *tbuf, u32 soff, u32 sz)
2046 pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, soff);
2047 loff = PSS_SMEM_PGOFF(soff);
2048 bfa_trc(ioc, pgnum);
2053 * Hold semaphore to serialize pll init and fwtrc.
2055 if (BFA_FALSE == bfa_ioc_sem_get(ioc->ioc_regs.ioc_init_sem_reg)) {
2057 return BFA_STATUS_FAILED;
2060 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
2062 len = sz/sizeof(u32);
2064 for (i = 0; i < len; i++) {
2065 r32 = bfa_mem_read(ioc->ioc_regs.smem_page_start, loff);
2066 buf[i] = swab32(r32);
2067 loff += sizeof(u32);
2070 * handle page offset wrap around
2072 loff = PSS_SMEM_PGOFF(loff);
2075 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
2078 writel(PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, 0),
2079 ioc->ioc_regs.host_page_num_fn);
2081 * release semaphore.
2083 readl(ioc->ioc_regs.ioc_init_sem_reg);
2084 writel(1, ioc->ioc_regs.ioc_init_sem_reg);
2086 bfa_trc(ioc, pgnum);
2087 return BFA_STATUS_OK;
2091 * Clear SMEM data from host through PCI memmap
2093 * @param[in] ioc memory for IOC
2094 * @param[in] soff smem offset
2095 * @param[in] sz size of smem in bytes
2098 bfa_ioc_smem_clr(struct bfa_ioc_s *ioc, u32 soff, u32 sz)
2103 pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, soff);
2104 loff = PSS_SMEM_PGOFF(soff);
2105 bfa_trc(ioc, pgnum);
2110 * Hold semaphore to serialize pll init and fwtrc.
2112 if (BFA_FALSE == bfa_ioc_sem_get(ioc->ioc_regs.ioc_init_sem_reg)) {
2114 return BFA_STATUS_FAILED;
2117 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
2119 len = sz/sizeof(u32); /* len in words */
2121 for (i = 0; i < len; i++) {
2122 bfa_mem_write(ioc->ioc_regs.smem_page_start, loff, 0);
2123 loff += sizeof(u32);
2126 * handle page offset wrap around
2128 loff = PSS_SMEM_PGOFF(loff);
2131 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
2134 writel(PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, 0),
2135 ioc->ioc_regs.host_page_num_fn);
2138 * release semaphore.
2140 readl(ioc->ioc_regs.ioc_init_sem_reg);
2141 writel(1, ioc->ioc_regs.ioc_init_sem_reg);
2142 bfa_trc(ioc, pgnum);
2143 return BFA_STATUS_OK;
2147 bfa_ioc_fail_notify(struct bfa_ioc_s *ioc)
2149 struct bfad_s *bfad = (struct bfad_s *)ioc->bfa->bfad;
2152 * Notify driver and common modules registered for notification.
2154 ioc->cbfn->hbfail_cbfn(ioc->bfa);
2155 bfa_ioc_event_notify(ioc, BFA_IOC_E_FAILED);
2157 bfa_ioc_debug_save_ftrc(ioc);
2159 BFA_LOG(KERN_CRIT, bfad, bfa_log_level,
2160 "Heart Beat of IOC has failed\n");
2161 bfa_ioc_aen_post(ioc, BFA_IOC_AEN_HBFAIL);
2166 bfa_ioc_pf_fwmismatch(struct bfa_ioc_s *ioc)
2168 struct bfad_s *bfad = (struct bfad_s *)ioc->bfa->bfad;
2170 * Provide enable completion callback.
2172 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
2173 BFA_LOG(KERN_WARNING, bfad, bfa_log_level,
2174 "Running firmware version is incompatible "
2175 "with the driver version\n");
2176 bfa_ioc_aen_post(ioc, BFA_IOC_AEN_FWMISMATCH);
2180 bfa_ioc_pll_init(struct bfa_ioc_s *ioc)
2184 * Hold semaphore so that nobody can access the chip during init.
2186 bfa_ioc_sem_get(ioc->ioc_regs.ioc_init_sem_reg);
2188 bfa_ioc_pll_init_asic(ioc);
2190 ioc->pllinit = BFA_TRUE;
2195 bfa_ioc_lmem_init(ioc);
2198 * release semaphore.
2200 readl(ioc->ioc_regs.ioc_init_sem_reg);
2201 writel(1, ioc->ioc_regs.ioc_init_sem_reg);
2203 return BFA_STATUS_OK;
2207 * Interface used by diag module to do firmware boot with memory test
2208 * as the entry vector.
2211 bfa_ioc_boot(struct bfa_ioc_s *ioc, u32 boot_type, u32 boot_env)
2213 struct bfi_ioc_image_hdr_s *drv_fwhdr;
2214 bfa_status_t status;
2215 bfa_ioc_stats(ioc, ioc_boots);
2217 if (bfa_ioc_pll_init(ioc) != BFA_STATUS_OK)
2218 return BFA_STATUS_FAILED;
2220 if (boot_env == BFI_FWBOOT_ENV_OS &&
2221 boot_type == BFI_FWBOOT_TYPE_NORMAL) {
2223 drv_fwhdr = (struct bfi_ioc_image_hdr_s *)
2224 bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc), 0);
2227 * Work with Flash iff flash f/w is better than driver f/w.
2228 * Otherwise push drivers firmware.
2230 if (bfa_ioc_flash_fwver_cmp(ioc, drv_fwhdr) ==
2231 BFI_IOC_IMG_VER_BETTER)
2232 boot_type = BFI_FWBOOT_TYPE_FLASH;
2236 * Initialize IOC state of all functions on a chip reset.
2238 if (boot_type == BFI_FWBOOT_TYPE_MEMTEST) {
2239 bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_MEMTEST);
2240 bfa_ioc_set_alt_ioc_fwstate(ioc, BFI_IOC_MEMTEST);
2242 bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_INITING);
2243 bfa_ioc_set_alt_ioc_fwstate(ioc, BFI_IOC_INITING);
2246 bfa_ioc_msgflush(ioc);
2247 status = bfa_ioc_download_fw(ioc, boot_type, boot_env);
2248 if (status == BFA_STATUS_OK)
2249 bfa_ioc_lpu_start(ioc);
2251 WARN_ON(boot_type == BFI_FWBOOT_TYPE_MEMTEST);
2252 bfa_iocpf_timeout(ioc);
2258 * Enable/disable IOC failure auto recovery.
2261 bfa_ioc_auto_recover(bfa_boolean_t auto_recover)
2263 bfa_auto_recover = auto_recover;
2269 bfa_ioc_is_operational(struct bfa_ioc_s *ioc)
2271 return bfa_fsm_cmp_state(ioc, bfa_ioc_sm_op);
2275 bfa_ioc_is_initialized(struct bfa_ioc_s *ioc)
2277 u32 r32 = bfa_ioc_get_cur_ioc_fwstate(ioc);
2279 return ((r32 != BFI_IOC_UNINIT) &&
2280 (r32 != BFI_IOC_INITING) &&
2281 (r32 != BFI_IOC_MEMTEST));
2285 bfa_ioc_msgget(struct bfa_ioc_s *ioc, void *mbmsg)
2287 __be32 *msgp = mbmsg;
2291 r32 = readl(ioc->ioc_regs.lpu_mbox_cmd);
2298 for (i = 0; i < (sizeof(union bfi_ioc_i2h_msg_u) / sizeof(u32));
2300 r32 = readl(ioc->ioc_regs.lpu_mbox +
2302 msgp[i] = cpu_to_be32(r32);
2306 * turn off mailbox interrupt by clearing mailbox status
2308 writel(1, ioc->ioc_regs.lpu_mbox_cmd);
2309 readl(ioc->ioc_regs.lpu_mbox_cmd);
2315 bfa_ioc_isr(struct bfa_ioc_s *ioc, struct bfi_mbmsg_s *m)
2317 union bfi_ioc_i2h_msg_u *msg;
2318 struct bfa_iocpf_s *iocpf = &ioc->iocpf;
2320 msg = (union bfi_ioc_i2h_msg_u *) m;
2322 bfa_ioc_stats(ioc, ioc_isrs);
2324 switch (msg->mh.msg_id) {
2325 case BFI_IOC_I2H_HBEAT:
2328 case BFI_IOC_I2H_ENABLE_REPLY:
2329 ioc->port_mode = ioc->port_mode_cfg =
2330 (enum bfa_mode_s)msg->fw_event.port_mode;
2331 ioc->ad_cap_bm = msg->fw_event.cap_bm;
2332 bfa_fsm_send_event(iocpf, IOCPF_E_FWRSP_ENABLE);
2335 case BFI_IOC_I2H_DISABLE_REPLY:
2336 bfa_fsm_send_event(iocpf, IOCPF_E_FWRSP_DISABLE);
2339 case BFI_IOC_I2H_GETATTR_REPLY:
2340 bfa_ioc_getattr_reply(ioc);
2344 bfa_trc(ioc, msg->mh.msg_id);
2350 * IOC attach time initialization and setup.
2352 * @param[in] ioc memory for IOC
2353 * @param[in] bfa driver instance structure
2356 bfa_ioc_attach(struct bfa_ioc_s *ioc, void *bfa, struct bfa_ioc_cbfn_s *cbfn,
2357 struct bfa_timer_mod_s *timer_mod)
2361 ioc->timer_mod = timer_mod;
2362 ioc->fcmode = BFA_FALSE;
2363 ioc->pllinit = BFA_FALSE;
2364 ioc->dbg_fwsave_once = BFA_TRUE;
2365 ioc->iocpf.ioc = ioc;
2367 bfa_ioc_mbox_attach(ioc);
2368 INIT_LIST_HEAD(&ioc->notify_q);
2370 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
2371 bfa_fsm_send_event(ioc, IOC_E_RESET);
2375 * Driver detach time IOC cleanup.
2378 bfa_ioc_detach(struct bfa_ioc_s *ioc)
2380 bfa_fsm_send_event(ioc, IOC_E_DETACH);
2381 INIT_LIST_HEAD(&ioc->notify_q);
2385 * Setup IOC PCI properties.
2387 * @param[in] pcidev PCI device information for this IOC
2390 bfa_ioc_pci_init(struct bfa_ioc_s *ioc, struct bfa_pcidev_s *pcidev,
2391 enum bfi_pcifn_class clscode)
2393 ioc->clscode = clscode;
2394 ioc->pcidev = *pcidev;
2397 * Initialize IOC and device personality
2399 ioc->port0_mode = ioc->port1_mode = BFI_PORT_MODE_FC;
2400 ioc->asic_mode = BFI_ASIC_MODE_FC;
2402 switch (pcidev->device_id) {
2403 case BFA_PCI_DEVICE_ID_FC_8G1P:
2404 case BFA_PCI_DEVICE_ID_FC_8G2P:
2405 ioc->asic_gen = BFI_ASIC_GEN_CB;
2406 ioc->fcmode = BFA_TRUE;
2407 ioc->port_mode = ioc->port_mode_cfg = BFA_MODE_HBA;
2408 ioc->ad_cap_bm = BFA_CM_HBA;
2411 case BFA_PCI_DEVICE_ID_CT:
2412 ioc->asic_gen = BFI_ASIC_GEN_CT;
2413 ioc->port0_mode = ioc->port1_mode = BFI_PORT_MODE_ETH;
2414 ioc->asic_mode = BFI_ASIC_MODE_ETH;
2415 ioc->port_mode = ioc->port_mode_cfg = BFA_MODE_CNA;
2416 ioc->ad_cap_bm = BFA_CM_CNA;
2419 case BFA_PCI_DEVICE_ID_CT_FC:
2420 ioc->asic_gen = BFI_ASIC_GEN_CT;
2421 ioc->fcmode = BFA_TRUE;
2422 ioc->port_mode = ioc->port_mode_cfg = BFA_MODE_HBA;
2423 ioc->ad_cap_bm = BFA_CM_HBA;
2426 case BFA_PCI_DEVICE_ID_CT2:
2427 case BFA_PCI_DEVICE_ID_CT2_QUAD:
2428 ioc->asic_gen = BFI_ASIC_GEN_CT2;
2429 if (clscode == BFI_PCIFN_CLASS_FC &&
2430 pcidev->ssid == BFA_PCI_CT2_SSID_FC) {
2431 ioc->asic_mode = BFI_ASIC_MODE_FC16;
2432 ioc->fcmode = BFA_TRUE;
2433 ioc->port_mode = ioc->port_mode_cfg = BFA_MODE_HBA;
2434 ioc->ad_cap_bm = BFA_CM_HBA;
2436 ioc->port0_mode = ioc->port1_mode = BFI_PORT_MODE_ETH;
2437 ioc->asic_mode = BFI_ASIC_MODE_ETH;
2438 if (pcidev->ssid == BFA_PCI_CT2_SSID_FCoE) {
2440 ioc->port_mode_cfg = BFA_MODE_CNA;
2441 ioc->ad_cap_bm = BFA_CM_CNA;
2444 ioc->port_mode_cfg = BFA_MODE_NIC;
2445 ioc->ad_cap_bm = BFA_CM_NIC;
2455 * Set asic specific interfaces. See bfa_ioc_cb.c and bfa_ioc_ct.c
2457 if (ioc->asic_gen == BFI_ASIC_GEN_CB)
2458 bfa_ioc_set_cb_hwif(ioc);
2459 else if (ioc->asic_gen == BFI_ASIC_GEN_CT)
2460 bfa_ioc_set_ct_hwif(ioc);
2462 WARN_ON(ioc->asic_gen != BFI_ASIC_GEN_CT2);
2463 bfa_ioc_set_ct2_hwif(ioc);
2464 bfa_ioc_ct2_poweron(ioc);
2467 bfa_ioc_map_port(ioc);
2468 bfa_ioc_reg_init(ioc);
2472 * Initialize IOC dma memory
2474 * @param[in] dm_kva kernel virtual address of IOC dma memory
2475 * @param[in] dm_pa physical address of IOC dma memory
2478 bfa_ioc_mem_claim(struct bfa_ioc_s *ioc, u8 *dm_kva, u64 dm_pa)
2481 * dma memory for firmware attribute
2483 ioc->attr_dma.kva = dm_kva;
2484 ioc->attr_dma.pa = dm_pa;
2485 ioc->attr = (struct bfi_ioc_attr_s *) dm_kva;
2489 bfa_ioc_enable(struct bfa_ioc_s *ioc)
2491 bfa_ioc_stats(ioc, ioc_enables);
2492 ioc->dbg_fwsave_once = BFA_TRUE;
2494 bfa_fsm_send_event(ioc, IOC_E_ENABLE);
2498 bfa_ioc_disable(struct bfa_ioc_s *ioc)
2500 bfa_ioc_stats(ioc, ioc_disables);
2501 bfa_fsm_send_event(ioc, IOC_E_DISABLE);
2505 bfa_ioc_suspend(struct bfa_ioc_s *ioc)
2507 ioc->dbg_fwsave_once = BFA_TRUE;
2508 bfa_fsm_send_event(ioc, IOC_E_HWERROR);
2512 * Initialize memory for saving firmware trace. Driver must initialize
2513 * trace memory before call bfa_ioc_enable().
2516 bfa_ioc_debug_memclaim(struct bfa_ioc_s *ioc, void *dbg_fwsave)
2518 ioc->dbg_fwsave = dbg_fwsave;
2519 ioc->dbg_fwsave_len = BFA_DBG_FWTRC_LEN;
2523 * Register mailbox message handler functions
2525 * @param[in] ioc IOC instance
2526 * @param[in] mcfuncs message class handler functions
2529 bfa_ioc_mbox_register(struct bfa_ioc_s *ioc, bfa_ioc_mbox_mcfunc_t *mcfuncs)
2531 struct bfa_ioc_mbox_mod_s *mod = &ioc->mbox_mod;
2534 for (mc = 0; mc < BFI_MC_MAX; mc++)
2535 mod->mbhdlr[mc].cbfn = mcfuncs[mc];
2539 * Register mailbox message handler function, to be called by common modules
2542 bfa_ioc_mbox_regisr(struct bfa_ioc_s *ioc, enum bfi_mclass mc,
2543 bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg)
2545 struct bfa_ioc_mbox_mod_s *mod = &ioc->mbox_mod;
2547 mod->mbhdlr[mc].cbfn = cbfn;
2548 mod->mbhdlr[mc].cbarg = cbarg;
2552 * Queue a mailbox command request to firmware. Waits if mailbox is busy.
2553 * Responsibility of caller to serialize
2555 * @param[in] ioc IOC instance
2556 * @param[i] cmd Mailbox command
2559 bfa_ioc_mbox_queue(struct bfa_ioc_s *ioc, struct bfa_mbox_cmd_s *cmd)
2561 struct bfa_ioc_mbox_mod_s *mod = &ioc->mbox_mod;
2565 * If a previous command is pending, queue new command
2567 if (!list_empty(&mod->cmd_q)) {
2568 list_add_tail(&cmd->qe, &mod->cmd_q);
2573 * If mailbox is busy, queue command for poll timer
2575 stat = readl(ioc->ioc_regs.hfn_mbox_cmd);
2577 list_add_tail(&cmd->qe, &mod->cmd_q);
2582 * mailbox is free -- queue command to firmware
2584 bfa_ioc_mbox_send(ioc, cmd->msg, sizeof(cmd->msg));
2588 * Handle mailbox interrupts
2591 bfa_ioc_mbox_isr(struct bfa_ioc_s *ioc)
2593 struct bfa_ioc_mbox_mod_s *mod = &ioc->mbox_mod;
2594 struct bfi_mbmsg_s m;
2597 if (bfa_ioc_msgget(ioc, &m)) {
2599 * Treat IOC message class as special.
2601 mc = m.mh.msg_class;
2602 if (mc == BFI_MC_IOC) {
2603 bfa_ioc_isr(ioc, &m);
2607 if ((mc >= BFI_MC_MAX) || (mod->mbhdlr[mc].cbfn == NULL))
2610 mod->mbhdlr[mc].cbfn(mod->mbhdlr[mc].cbarg, &m);
2613 bfa_ioc_lpu_read_stat(ioc);
2616 * Try to send pending mailbox commands
2618 bfa_ioc_mbox_poll(ioc);
2622 bfa_ioc_error_isr(struct bfa_ioc_s *ioc)
2624 bfa_ioc_stats(ioc, ioc_hbfails);
2625 ioc->stats.hb_count = ioc->hb_count;
2626 bfa_fsm_send_event(ioc, IOC_E_HWERROR);
2630 * return true if IOC is disabled
2633 bfa_ioc_is_disabled(struct bfa_ioc_s *ioc)
2635 return bfa_fsm_cmp_state(ioc, bfa_ioc_sm_disabling) ||
2636 bfa_fsm_cmp_state(ioc, bfa_ioc_sm_disabled);
2640 * return true if IOC firmware is different.
2643 bfa_ioc_fw_mismatch(struct bfa_ioc_s *ioc)
2645 return bfa_fsm_cmp_state(ioc, bfa_ioc_sm_reset) ||
2646 bfa_fsm_cmp_state(&ioc->iocpf, bfa_iocpf_sm_fwcheck) ||
2647 bfa_fsm_cmp_state(&ioc->iocpf, bfa_iocpf_sm_mismatch);
2651 * Check if adapter is disabled -- both IOCs should be in a disabled
2655 bfa_ioc_adapter_is_disabled(struct bfa_ioc_s *ioc)
2659 if (!bfa_fsm_cmp_state(ioc, bfa_ioc_sm_disabled))
2662 ioc_state = bfa_ioc_get_cur_ioc_fwstate(ioc);
2663 if (!bfa_ioc_state_disabled(ioc_state))
2666 if (ioc->pcidev.device_id != BFA_PCI_DEVICE_ID_FC_8G1P) {
2667 ioc_state = bfa_ioc_get_cur_ioc_fwstate(ioc);
2668 if (!bfa_ioc_state_disabled(ioc_state))
2676 * Reset IOC fwstate registers.
2679 bfa_ioc_reset_fwstate(struct bfa_ioc_s *ioc)
2681 bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_UNINIT);
2682 bfa_ioc_set_alt_ioc_fwstate(ioc, BFI_IOC_UNINIT);
2685 #define BFA_MFG_NAME "QLogic"
2687 bfa_ioc_get_adapter_attr(struct bfa_ioc_s *ioc,
2688 struct bfa_adapter_attr_s *ad_attr)
2690 struct bfi_ioc_attr_s *ioc_attr;
2692 ioc_attr = ioc->attr;
2694 bfa_ioc_get_adapter_serial_num(ioc, ad_attr->serial_num);
2695 bfa_ioc_get_adapter_fw_ver(ioc, ad_attr->fw_ver);
2696 bfa_ioc_get_adapter_optrom_ver(ioc, ad_attr->optrom_ver);
2697 bfa_ioc_get_adapter_manufacturer(ioc, ad_attr->manufacturer);
2698 memcpy(&ad_attr->vpd, &ioc_attr->vpd,
2699 sizeof(struct bfa_mfg_vpd_s));
2701 ad_attr->nports = bfa_ioc_get_nports(ioc);
2702 ad_attr->max_speed = bfa_ioc_speed_sup(ioc);
2704 bfa_ioc_get_adapter_model(ioc, ad_attr->model);
2705 /* For now, model descr uses same model string */
2706 bfa_ioc_get_adapter_model(ioc, ad_attr->model_descr);
2708 ad_attr->card_type = ioc_attr->card_type;
2709 ad_attr->is_mezz = bfa_mfg_is_mezz(ioc_attr->card_type);
2711 if (BFI_ADAPTER_IS_SPECIAL(ioc_attr->adapter_prop))
2712 ad_attr->prototype = 1;
2714 ad_attr->prototype = 0;
2716 ad_attr->pwwn = ioc->attr->pwwn;
2717 ad_attr->mac = bfa_ioc_get_mac(ioc);
2719 ad_attr->pcie_gen = ioc_attr->pcie_gen;
2720 ad_attr->pcie_lanes = ioc_attr->pcie_lanes;
2721 ad_attr->pcie_lanes_orig = ioc_attr->pcie_lanes_orig;
2722 ad_attr->asic_rev = ioc_attr->asic_rev;
2724 bfa_ioc_get_pci_chip_rev(ioc, ad_attr->hw_ver);
2726 ad_attr->cna_capable = bfa_ioc_is_cna(ioc);
2727 ad_attr->trunk_capable = (ad_attr->nports > 1) &&
2728 !bfa_ioc_is_cna(ioc) && !ad_attr->is_mezz;
2729 ad_attr->mfg_day = ioc_attr->mfg_day;
2730 ad_attr->mfg_month = ioc_attr->mfg_month;
2731 ad_attr->mfg_year = ioc_attr->mfg_year;
2732 memcpy(ad_attr->uuid, ioc_attr->uuid, BFA_ADAPTER_UUID_LEN);
2736 bfa_ioc_get_type(struct bfa_ioc_s *ioc)
2738 if (ioc->clscode == BFI_PCIFN_CLASS_ETH)
2739 return BFA_IOC_TYPE_LL;
2741 WARN_ON(ioc->clscode != BFI_PCIFN_CLASS_FC);
2743 return (ioc->attr->port_mode == BFI_PORT_MODE_FC)
2744 ? BFA_IOC_TYPE_FC : BFA_IOC_TYPE_FCoE;
2748 bfa_ioc_get_adapter_serial_num(struct bfa_ioc_s *ioc, char *serial_num)
2750 memset((void *)serial_num, 0, BFA_ADAPTER_SERIAL_NUM_LEN);
2751 memcpy((void *)serial_num,
2752 (void *)ioc->attr->brcd_serialnum,
2753 BFA_ADAPTER_SERIAL_NUM_LEN);
2757 bfa_ioc_get_adapter_fw_ver(struct bfa_ioc_s *ioc, char *fw_ver)
2759 memset((void *)fw_ver, 0, BFA_VERSION_LEN);
2760 memcpy(fw_ver, ioc->attr->fw_version, BFA_VERSION_LEN);
2764 bfa_ioc_get_pci_chip_rev(struct bfa_ioc_s *ioc, char *chip_rev)
2768 memset((void *)chip_rev, 0, BFA_IOC_CHIP_REV_LEN);
2774 chip_rev[4] = ioc->attr->asic_rev;
2779 bfa_ioc_get_adapter_optrom_ver(struct bfa_ioc_s *ioc, char *optrom_ver)
2781 memset((void *)optrom_ver, 0, BFA_VERSION_LEN);
2782 memcpy(optrom_ver, ioc->attr->optrom_version,
2787 bfa_ioc_get_adapter_manufacturer(struct bfa_ioc_s *ioc, char *manufacturer)
2789 memset((void *)manufacturer, 0, BFA_ADAPTER_MFG_NAME_LEN);
2790 strscpy(manufacturer, BFA_MFG_NAME, BFA_ADAPTER_MFG_NAME_LEN);
2794 bfa_ioc_get_adapter_model(struct bfa_ioc_s *ioc, char *model)
2796 struct bfi_ioc_attr_s *ioc_attr;
2797 u8 nports = bfa_ioc_get_nports(ioc);
2800 memset((void *)model, 0, BFA_ADAPTER_MODEL_NAME_LEN);
2802 ioc_attr = ioc->attr;
2804 if (bfa_asic_id_ct2(ioc->pcidev.device_id) &&
2805 (!bfa_mfg_is_mezz(ioc_attr->card_type)))
2806 snprintf(model, BFA_ADAPTER_MODEL_NAME_LEN, "%s-%u-%u%s",
2807 BFA_MFG_NAME, ioc_attr->card_type, nports, "p");
2809 snprintf(model, BFA_ADAPTER_MODEL_NAME_LEN, "%s-%u",
2810 BFA_MFG_NAME, ioc_attr->card_type);
2814 bfa_ioc_get_state(struct bfa_ioc_s *ioc)
2816 enum bfa_iocpf_state iocpf_st;
2817 enum bfa_ioc_state ioc_st = bfa_ioc_sm_to_state(ioc_sm_table, ioc->fsm);
2819 if (ioc_st == BFA_IOC_ENABLING ||
2820 ioc_st == BFA_IOC_FAIL || ioc_st == BFA_IOC_INITFAIL) {
2822 iocpf_st = bfa_iocpf_sm_to_state(iocpf_sm_table, ioc->iocpf.fsm);
2825 case BFA_IOCPF_SEMWAIT:
2826 ioc_st = BFA_IOC_SEMWAIT;
2829 case BFA_IOCPF_HWINIT:
2830 ioc_st = BFA_IOC_HWINIT;
2833 case BFA_IOCPF_FWMISMATCH:
2834 ioc_st = BFA_IOC_FWMISMATCH;
2837 case BFA_IOCPF_FAIL:
2838 ioc_st = BFA_IOC_FAIL;
2841 case BFA_IOCPF_INITFAIL:
2842 ioc_st = BFA_IOC_INITFAIL;
2854 bfa_ioc_get_attr(struct bfa_ioc_s *ioc, struct bfa_ioc_attr_s *ioc_attr)
2856 memset((void *)ioc_attr, 0, sizeof(struct bfa_ioc_attr_s));
2858 ioc_attr->state = bfa_ioc_get_state(ioc);
2859 ioc_attr->port_id = bfa_ioc_portid(ioc);
2860 ioc_attr->port_mode = ioc->port_mode;
2861 ioc_attr->port_mode_cfg = ioc->port_mode_cfg;
2862 ioc_attr->cap_bm = ioc->ad_cap_bm;
2864 ioc_attr->ioc_type = bfa_ioc_get_type(ioc);
2866 bfa_ioc_get_adapter_attr(ioc, &ioc_attr->adapter_attr);
2868 ioc_attr->pci_attr.device_id = bfa_ioc_devid(ioc);
2869 ioc_attr->pci_attr.pcifn = bfa_ioc_pcifn(ioc);
2870 ioc_attr->def_fn = (bfa_ioc_pcifn(ioc) == bfa_ioc_portid(ioc));
2871 bfa_ioc_get_pci_chip_rev(ioc, ioc_attr->pci_attr.chip_rev);
2875 bfa_ioc_get_mac(struct bfa_ioc_s *ioc)
2878 * Check the IOC type and return the appropriate MAC
2880 if (bfa_ioc_get_type(ioc) == BFA_IOC_TYPE_FCoE)
2881 return ioc->attr->fcoe_mac;
2883 return ioc->attr->mac;
2887 bfa_ioc_get_mfg_mac(struct bfa_ioc_s *ioc)
2891 m = ioc->attr->mfg_mac;
2892 if (bfa_mfg_is_old_wwn_mac_model(ioc->attr->card_type))
2893 m.mac[MAC_ADDRLEN - 1] += bfa_ioc_pcifn(ioc);
2895 bfa_mfg_increment_wwn_mac(&(m.mac[MAC_ADDRLEN-3]),
2896 bfa_ioc_pcifn(ioc));
2902 * Send AEN notification
2905 bfa_ioc_aen_post(struct bfa_ioc_s *ioc, enum bfa_ioc_aen_event event)
2907 struct bfad_s *bfad = (struct bfad_s *)ioc->bfa->bfad;
2908 struct bfa_aen_entry_s *aen_entry;
2909 enum bfa_ioc_type_e ioc_type;
2911 bfad_get_aen_entry(bfad, aen_entry);
2915 ioc_type = bfa_ioc_get_type(ioc);
2917 case BFA_IOC_TYPE_FC:
2918 aen_entry->aen_data.ioc.pwwn = ioc->attr->pwwn;
2920 case BFA_IOC_TYPE_FCoE:
2921 aen_entry->aen_data.ioc.pwwn = ioc->attr->pwwn;
2922 aen_entry->aen_data.ioc.mac = bfa_ioc_get_mac(ioc);
2924 case BFA_IOC_TYPE_LL:
2925 aen_entry->aen_data.ioc.mac = bfa_ioc_get_mac(ioc);
2928 WARN_ON(ioc_type != BFA_IOC_TYPE_FC);
2932 /* Send the AEN notification */
2933 aen_entry->aen_data.ioc.ioc_type = ioc_type;
2934 bfad_im_post_vendor_event(aen_entry, bfad, ++ioc->ioc_aen_seq,
2935 BFA_AEN_CAT_IOC, event);
2939 * Retrieve saved firmware trace from a prior IOC failure.
2942 bfa_ioc_debug_fwsave(struct bfa_ioc_s *ioc, void *trcdata, int *trclen)
2946 if (ioc->dbg_fwsave_len == 0)
2947 return BFA_STATUS_ENOFSAVE;
2950 if (tlen > ioc->dbg_fwsave_len)
2951 tlen = ioc->dbg_fwsave_len;
2953 memcpy(trcdata, ioc->dbg_fwsave, tlen);
2955 return BFA_STATUS_OK;
2960 * Retrieve saved firmware trace from a prior IOC failure.
2963 bfa_ioc_debug_fwtrc(struct bfa_ioc_s *ioc, void *trcdata, int *trclen)
2965 u32 loff = BFA_DBG_FWTRC_OFF(bfa_ioc_portid(ioc));
2967 bfa_status_t status;
2969 bfa_trc(ioc, *trclen);
2972 if (tlen > BFA_DBG_FWTRC_LEN)
2973 tlen = BFA_DBG_FWTRC_LEN;
2975 status = bfa_ioc_smem_read(ioc, trcdata, loff, tlen);
2981 bfa_ioc_send_fwsync(struct bfa_ioc_s *ioc)
2983 struct bfa_mbox_cmd_s cmd;
2984 struct bfi_ioc_ctrl_req_s *req = (struct bfi_ioc_ctrl_req_s *) cmd.msg;
2986 bfi_h2i_set(req->mh, BFI_MC_IOC, BFI_IOC_H2I_DBG_SYNC,
2987 bfa_ioc_portid(ioc));
2988 req->clscode = cpu_to_be16(ioc->clscode);
2989 bfa_ioc_mbox_queue(ioc, &cmd);
2993 bfa_ioc_fwsync(struct bfa_ioc_s *ioc)
2995 u32 fwsync_iter = 1000;
2997 bfa_ioc_send_fwsync(ioc);
3000 * After sending a fw sync mbox command wait for it to
3001 * take effect. We will not wait for a response because
3002 * 1. fw_sync mbox cmd doesn't have a response.
3003 * 2. Even if we implement that, interrupts might not
3004 * be enabled when we call this function.
3005 * So, just keep checking if any mbox cmd is pending, and
3006 * after waiting for a reasonable amount of time, go ahead.
3007 * It is possible that fw has crashed and the mbox command
3008 * is never acknowledged.
3010 while (bfa_ioc_mbox_cmd_pending(ioc) && fwsync_iter > 0)
3015 * Dump firmware smem
3018 bfa_ioc_debug_fwcore(struct bfa_ioc_s *ioc, void *buf,
3019 u32 *offset, int *buflen)
3023 bfa_status_t status;
3024 u32 smem_len = BFA_IOC_FW_SMEM_SIZE(ioc);
3026 if (*offset >= smem_len) {
3027 *offset = *buflen = 0;
3028 return BFA_STATUS_EINVAL;
3035 * First smem read, sync smem before proceeding
3036 * No need to sync before reading every chunk.
3039 bfa_ioc_fwsync(ioc);
3041 if ((loff + dlen) >= smem_len)
3042 dlen = smem_len - loff;
3044 status = bfa_ioc_smem_read(ioc, buf, loff, dlen);
3046 if (status != BFA_STATUS_OK) {
3047 *offset = *buflen = 0;
3053 if (*offset >= smem_len)
3062 * Firmware statistics
3065 bfa_ioc_fw_stats_get(struct bfa_ioc_s *ioc, void *stats)
3067 u32 loff = BFI_IOC_FWSTATS_OFF + \
3068 BFI_IOC_FWSTATS_SZ * (bfa_ioc_portid(ioc));
3070 bfa_status_t status;
3072 if (ioc->stats_busy) {
3073 bfa_trc(ioc, ioc->stats_busy);
3074 return BFA_STATUS_DEVBUSY;
3076 ioc->stats_busy = BFA_TRUE;
3078 tlen = sizeof(struct bfa_fw_stats_s);
3079 status = bfa_ioc_smem_read(ioc, stats, loff, tlen);
3081 ioc->stats_busy = BFA_FALSE;
3086 bfa_ioc_fw_stats_clear(struct bfa_ioc_s *ioc)
3088 u32 loff = BFI_IOC_FWSTATS_OFF + \
3089 BFI_IOC_FWSTATS_SZ * (bfa_ioc_portid(ioc));
3091 bfa_status_t status;
3093 if (ioc->stats_busy) {
3094 bfa_trc(ioc, ioc->stats_busy);
3095 return BFA_STATUS_DEVBUSY;
3097 ioc->stats_busy = BFA_TRUE;
3099 tlen = sizeof(struct bfa_fw_stats_s);
3100 status = bfa_ioc_smem_clr(ioc, loff, tlen);
3102 ioc->stats_busy = BFA_FALSE;
3107 * Save firmware trace if configured.
3110 bfa_ioc_debug_save_ftrc(struct bfa_ioc_s *ioc)
3114 if (ioc->dbg_fwsave_once) {
3115 ioc->dbg_fwsave_once = BFA_FALSE;
3116 if (ioc->dbg_fwsave_len) {
3117 tlen = ioc->dbg_fwsave_len;
3118 bfa_ioc_debug_fwtrc(ioc, ioc->dbg_fwsave, &tlen);
3124 * Firmware failure detected. Start recovery actions.
3127 bfa_ioc_recover(struct bfa_ioc_s *ioc)
3129 bfa_ioc_stats(ioc, ioc_hbfails);
3130 ioc->stats.hb_count = ioc->hb_count;
3131 bfa_fsm_send_event(ioc, IOC_E_HBFAIL);
3135 * BFA IOC PF private functions
3138 bfa_iocpf_timeout(void *ioc_arg)
3140 struct bfa_ioc_s *ioc = (struct bfa_ioc_s *) ioc_arg;
3143 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_TIMEOUT);
3147 bfa_iocpf_sem_timeout(void *ioc_arg)
3149 struct bfa_ioc_s *ioc = (struct bfa_ioc_s *) ioc_arg;
3151 bfa_ioc_hw_sem_get(ioc);
3155 bfa_ioc_poll_fwinit(struct bfa_ioc_s *ioc)
3157 u32 fwstate = bfa_ioc_get_cur_ioc_fwstate(ioc);
3159 bfa_trc(ioc, fwstate);
3161 if (fwstate == BFI_IOC_DISABLED) {
3162 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_FWREADY);
3166 if (ioc->iocpf.poll_time >= (3 * BFA_IOC_TOV))
3167 bfa_iocpf_timeout(ioc);
3169 ioc->iocpf.poll_time += BFA_IOC_POLL_TOV;
3170 bfa_iocpf_poll_timer_start(ioc);
3175 bfa_iocpf_poll_timeout(void *ioc_arg)
3177 struct bfa_ioc_s *ioc = (struct bfa_ioc_s *) ioc_arg;
3179 bfa_ioc_poll_fwinit(ioc);
3183 * bfa timer function
3186 bfa_timer_beat(struct bfa_timer_mod_s *mod)
3188 struct list_head *qh = &mod->timer_q;
3189 struct list_head *qe, *qe_next;
3190 struct bfa_timer_s *elem;
3191 struct list_head timedout_q;
3193 INIT_LIST_HEAD(&timedout_q);
3195 qe = bfa_q_next(qh);
3198 qe_next = bfa_q_next(qe);
3200 elem = (struct bfa_timer_s *) qe;
3201 if (elem->timeout <= BFA_TIMER_FREQ) {
3203 list_del(&elem->qe);
3204 list_add_tail(&elem->qe, &timedout_q);
3206 elem->timeout -= BFA_TIMER_FREQ;
3209 qe = qe_next; /* go to next elem */
3213 * Pop all the timeout entries
3215 while (!list_empty(&timedout_q)) {
3216 bfa_q_deq(&timedout_q, &elem);
3217 elem->timercb(elem->arg);
3222 * Should be called with lock protection
3225 bfa_timer_begin(struct bfa_timer_mod_s *mod, struct bfa_timer_s *timer,
3226 void (*timercb) (void *), void *arg, unsigned int timeout)
3229 WARN_ON(timercb == NULL);
3230 WARN_ON(bfa_q_is_on_q(&mod->timer_q, timer));
3232 timer->timeout = timeout;
3233 timer->timercb = timercb;
3236 list_add_tail(&timer->qe, &mod->timer_q);
3240 * Should be called with lock protection
3243 bfa_timer_stop(struct bfa_timer_s *timer)
3245 WARN_ON(list_empty(&timer->qe));
3247 list_del(&timer->qe);
3251 * ASIC block related
3254 bfa_ablk_config_swap(struct bfa_ablk_cfg_s *cfg)
3256 struct bfa_ablk_cfg_inst_s *cfg_inst;
3260 for (i = 0; i < BFA_ABLK_MAX; i++) {
3261 cfg_inst = &cfg->inst[i];
3262 for (j = 0; j < BFA_ABLK_MAX_PFS; j++) {
3263 be16 = cfg_inst->pf_cfg[j].pers;
3264 cfg_inst->pf_cfg[j].pers = be16_to_cpu(be16);
3265 be16 = cfg_inst->pf_cfg[j].num_qpairs;
3266 cfg_inst->pf_cfg[j].num_qpairs = be16_to_cpu(be16);
3267 be16 = cfg_inst->pf_cfg[j].num_vectors;
3268 cfg_inst->pf_cfg[j].num_vectors = be16_to_cpu(be16);
3269 be16 = cfg_inst->pf_cfg[j].bw_min;
3270 cfg_inst->pf_cfg[j].bw_min = be16_to_cpu(be16);
3271 be16 = cfg_inst->pf_cfg[j].bw_max;
3272 cfg_inst->pf_cfg[j].bw_max = be16_to_cpu(be16);
3278 bfa_ablk_isr(void *cbarg, struct bfi_mbmsg_s *msg)
3280 struct bfa_ablk_s *ablk = (struct bfa_ablk_s *)cbarg;
3281 struct bfi_ablk_i2h_rsp_s *rsp = (struct bfi_ablk_i2h_rsp_s *)msg;
3282 bfa_ablk_cbfn_t cbfn;
3284 WARN_ON(msg->mh.msg_class != BFI_MC_ABLK);
3285 bfa_trc(ablk->ioc, msg->mh.msg_id);
3287 switch (msg->mh.msg_id) {
3288 case BFI_ABLK_I2H_QUERY:
3289 if (rsp->status == BFA_STATUS_OK) {
3290 memcpy(ablk->cfg, ablk->dma_addr.kva,
3291 sizeof(struct bfa_ablk_cfg_s));
3292 bfa_ablk_config_swap(ablk->cfg);
3297 case BFI_ABLK_I2H_ADPT_CONFIG:
3298 case BFI_ABLK_I2H_PORT_CONFIG:
3299 /* update config port mode */
3300 ablk->ioc->port_mode_cfg = rsp->port_mode;
3303 case BFI_ABLK_I2H_PF_DELETE:
3304 case BFI_ABLK_I2H_PF_UPDATE:
3305 case BFI_ABLK_I2H_OPTROM_ENABLE:
3306 case BFI_ABLK_I2H_OPTROM_DISABLE:
3310 case BFI_ABLK_I2H_PF_CREATE:
3311 *(ablk->pcifn) = rsp->pcifn;
3319 ablk->busy = BFA_FALSE;
3323 cbfn(ablk->cbarg, rsp->status);
3328 bfa_ablk_notify(void *cbarg, enum bfa_ioc_event_e event)
3330 struct bfa_ablk_s *ablk = (struct bfa_ablk_s *)cbarg;
3332 bfa_trc(ablk->ioc, event);
3335 case BFA_IOC_E_ENABLED:
3336 WARN_ON(ablk->busy != BFA_FALSE);
3339 case BFA_IOC_E_DISABLED:
3340 case BFA_IOC_E_FAILED:
3341 /* Fail any pending requests */
3345 ablk->cbfn(ablk->cbarg, BFA_STATUS_FAILED);
3347 ablk->busy = BFA_FALSE;
3358 bfa_ablk_meminfo(void)
3360 return BFA_ROUNDUP(sizeof(struct bfa_ablk_cfg_s), BFA_DMA_ALIGN_SZ);
3364 bfa_ablk_memclaim(struct bfa_ablk_s *ablk, u8 *dma_kva, u64 dma_pa)
3366 ablk->dma_addr.kva = dma_kva;
3367 ablk->dma_addr.pa = dma_pa;
3371 bfa_ablk_attach(struct bfa_ablk_s *ablk, struct bfa_ioc_s *ioc)
3375 bfa_ioc_mbox_regisr(ablk->ioc, BFI_MC_ABLK, bfa_ablk_isr, ablk);
3376 bfa_q_qe_init(&ablk->ioc_notify);
3377 bfa_ioc_notify_init(&ablk->ioc_notify, bfa_ablk_notify, ablk);
3378 list_add_tail(&ablk->ioc_notify.qe, &ablk->ioc->notify_q);
3382 bfa_ablk_query(struct bfa_ablk_s *ablk, struct bfa_ablk_cfg_s *ablk_cfg,
3383 bfa_ablk_cbfn_t cbfn, void *cbarg)
3385 struct bfi_ablk_h2i_query_s *m;
3389 if (!bfa_ioc_is_operational(ablk->ioc)) {
3390 bfa_trc(ablk->ioc, BFA_STATUS_IOC_FAILURE);
3391 return BFA_STATUS_IOC_FAILURE;
3395 bfa_trc(ablk->ioc, BFA_STATUS_DEVBUSY);
3396 return BFA_STATUS_DEVBUSY;
3399 ablk->cfg = ablk_cfg;
3401 ablk->cbarg = cbarg;
3402 ablk->busy = BFA_TRUE;
3404 m = (struct bfi_ablk_h2i_query_s *)ablk->mb.msg;
3405 bfi_h2i_set(m->mh, BFI_MC_ABLK, BFI_ABLK_H2I_QUERY,
3406 bfa_ioc_portid(ablk->ioc));
3407 bfa_dma_be_addr_set(m->addr, ablk->dma_addr.pa);
3408 bfa_ioc_mbox_queue(ablk->ioc, &ablk->mb);
3410 return BFA_STATUS_OK;
3414 bfa_ablk_pf_create(struct bfa_ablk_s *ablk, u16 *pcifn,
3415 u8 port, enum bfi_pcifn_class personality,
3416 u16 bw_min, u16 bw_max,
3417 bfa_ablk_cbfn_t cbfn, void *cbarg)
3419 struct bfi_ablk_h2i_pf_req_s *m;
3421 if (!bfa_ioc_is_operational(ablk->ioc)) {
3422 bfa_trc(ablk->ioc, BFA_STATUS_IOC_FAILURE);
3423 return BFA_STATUS_IOC_FAILURE;
3427 bfa_trc(ablk->ioc, BFA_STATUS_DEVBUSY);
3428 return BFA_STATUS_DEVBUSY;
3431 ablk->pcifn = pcifn;
3433 ablk->cbarg = cbarg;
3434 ablk->busy = BFA_TRUE;
3436 m = (struct bfi_ablk_h2i_pf_req_s *)ablk->mb.msg;
3437 bfi_h2i_set(m->mh, BFI_MC_ABLK, BFI_ABLK_H2I_PF_CREATE,
3438 bfa_ioc_portid(ablk->ioc));
3439 m->pers = cpu_to_be16((u16)personality);
3440 m->bw_min = cpu_to_be16(bw_min);
3441 m->bw_max = cpu_to_be16(bw_max);
3443 bfa_ioc_mbox_queue(ablk->ioc, &ablk->mb);
3445 return BFA_STATUS_OK;
3449 bfa_ablk_pf_delete(struct bfa_ablk_s *ablk, int pcifn,
3450 bfa_ablk_cbfn_t cbfn, void *cbarg)
3452 struct bfi_ablk_h2i_pf_req_s *m;
3454 if (!bfa_ioc_is_operational(ablk->ioc)) {
3455 bfa_trc(ablk->ioc, BFA_STATUS_IOC_FAILURE);
3456 return BFA_STATUS_IOC_FAILURE;
3460 bfa_trc(ablk->ioc, BFA_STATUS_DEVBUSY);
3461 return BFA_STATUS_DEVBUSY;
3465 ablk->cbarg = cbarg;
3466 ablk->busy = BFA_TRUE;
3468 m = (struct bfi_ablk_h2i_pf_req_s *)ablk->mb.msg;
3469 bfi_h2i_set(m->mh, BFI_MC_ABLK, BFI_ABLK_H2I_PF_DELETE,
3470 bfa_ioc_portid(ablk->ioc));
3471 m->pcifn = (u8)pcifn;
3472 bfa_ioc_mbox_queue(ablk->ioc, &ablk->mb);
3474 return BFA_STATUS_OK;
3478 bfa_ablk_adapter_config(struct bfa_ablk_s *ablk, enum bfa_mode_s mode,
3479 int max_pf, int max_vf, bfa_ablk_cbfn_t cbfn, void *cbarg)
3481 struct bfi_ablk_h2i_cfg_req_s *m;
3483 if (!bfa_ioc_is_operational(ablk->ioc)) {
3484 bfa_trc(ablk->ioc, BFA_STATUS_IOC_FAILURE);
3485 return BFA_STATUS_IOC_FAILURE;
3489 bfa_trc(ablk->ioc, BFA_STATUS_DEVBUSY);
3490 return BFA_STATUS_DEVBUSY;
3494 ablk->cbarg = cbarg;
3495 ablk->busy = BFA_TRUE;
3497 m = (struct bfi_ablk_h2i_cfg_req_s *)ablk->mb.msg;
3498 bfi_h2i_set(m->mh, BFI_MC_ABLK, BFI_ABLK_H2I_ADPT_CONFIG,
3499 bfa_ioc_portid(ablk->ioc));
3501 m->max_pf = (u8)max_pf;
3502 m->max_vf = (u8)max_vf;
3503 bfa_ioc_mbox_queue(ablk->ioc, &ablk->mb);
3505 return BFA_STATUS_OK;
3509 bfa_ablk_port_config(struct bfa_ablk_s *ablk, int port, enum bfa_mode_s mode,
3510 int max_pf, int max_vf, bfa_ablk_cbfn_t cbfn, void *cbarg)
3512 struct bfi_ablk_h2i_cfg_req_s *m;
3514 if (!bfa_ioc_is_operational(ablk->ioc)) {
3515 bfa_trc(ablk->ioc, BFA_STATUS_IOC_FAILURE);
3516 return BFA_STATUS_IOC_FAILURE;
3520 bfa_trc(ablk->ioc, BFA_STATUS_DEVBUSY);
3521 return BFA_STATUS_DEVBUSY;
3525 ablk->cbarg = cbarg;
3526 ablk->busy = BFA_TRUE;
3528 m = (struct bfi_ablk_h2i_cfg_req_s *)ablk->mb.msg;
3529 bfi_h2i_set(m->mh, BFI_MC_ABLK, BFI_ABLK_H2I_PORT_CONFIG,
3530 bfa_ioc_portid(ablk->ioc));
3533 m->max_pf = (u8)max_pf;
3534 m->max_vf = (u8)max_vf;
3535 bfa_ioc_mbox_queue(ablk->ioc, &ablk->mb);
3537 return BFA_STATUS_OK;
3541 bfa_ablk_pf_update(struct bfa_ablk_s *ablk, int pcifn, u16 bw_min,
3542 u16 bw_max, bfa_ablk_cbfn_t cbfn, void *cbarg)
3544 struct bfi_ablk_h2i_pf_req_s *m;
3546 if (!bfa_ioc_is_operational(ablk->ioc)) {
3547 bfa_trc(ablk->ioc, BFA_STATUS_IOC_FAILURE);
3548 return BFA_STATUS_IOC_FAILURE;
3552 bfa_trc(ablk->ioc, BFA_STATUS_DEVBUSY);
3553 return BFA_STATUS_DEVBUSY;
3557 ablk->cbarg = cbarg;
3558 ablk->busy = BFA_TRUE;
3560 m = (struct bfi_ablk_h2i_pf_req_s *)ablk->mb.msg;
3561 bfi_h2i_set(m->mh, BFI_MC_ABLK, BFI_ABLK_H2I_PF_UPDATE,
3562 bfa_ioc_portid(ablk->ioc));
3563 m->pcifn = (u8)pcifn;
3564 m->bw_min = cpu_to_be16(bw_min);
3565 m->bw_max = cpu_to_be16(bw_max);
3566 bfa_ioc_mbox_queue(ablk->ioc, &ablk->mb);
3568 return BFA_STATUS_OK;
3572 bfa_ablk_optrom_en(struct bfa_ablk_s *ablk, bfa_ablk_cbfn_t cbfn, void *cbarg)
3574 struct bfi_ablk_h2i_optrom_s *m;
3576 if (!bfa_ioc_is_operational(ablk->ioc)) {
3577 bfa_trc(ablk->ioc, BFA_STATUS_IOC_FAILURE);
3578 return BFA_STATUS_IOC_FAILURE;
3582 bfa_trc(ablk->ioc, BFA_STATUS_DEVBUSY);
3583 return BFA_STATUS_DEVBUSY;
3587 ablk->cbarg = cbarg;
3588 ablk->busy = BFA_TRUE;
3590 m = (struct bfi_ablk_h2i_optrom_s *)ablk->mb.msg;
3591 bfi_h2i_set(m->mh, BFI_MC_ABLK, BFI_ABLK_H2I_OPTROM_ENABLE,
3592 bfa_ioc_portid(ablk->ioc));
3593 bfa_ioc_mbox_queue(ablk->ioc, &ablk->mb);
3595 return BFA_STATUS_OK;
3599 bfa_ablk_optrom_dis(struct bfa_ablk_s *ablk, bfa_ablk_cbfn_t cbfn, void *cbarg)
3601 struct bfi_ablk_h2i_optrom_s *m;
3603 if (!bfa_ioc_is_operational(ablk->ioc)) {
3604 bfa_trc(ablk->ioc, BFA_STATUS_IOC_FAILURE);
3605 return BFA_STATUS_IOC_FAILURE;
3609 bfa_trc(ablk->ioc, BFA_STATUS_DEVBUSY);
3610 return BFA_STATUS_DEVBUSY;
3614 ablk->cbarg = cbarg;
3615 ablk->busy = BFA_TRUE;
3617 m = (struct bfi_ablk_h2i_optrom_s *)ablk->mb.msg;
3618 bfi_h2i_set(m->mh, BFI_MC_ABLK, BFI_ABLK_H2I_OPTROM_DISABLE,
3619 bfa_ioc_portid(ablk->ioc));
3620 bfa_ioc_mbox_queue(ablk->ioc, &ablk->mb);
3622 return BFA_STATUS_OK;
3626 * SFP module specific
3629 /* forward declarations */
3630 static void bfa_sfp_getdata_send(struct bfa_sfp_s *sfp);
3631 static void bfa_sfp_media_get(struct bfa_sfp_s *sfp);
3632 static bfa_status_t bfa_sfp_speed_valid(struct bfa_sfp_s *sfp,
3633 enum bfa_port_speed portspeed);
3636 bfa_cb_sfp_show(struct bfa_sfp_s *sfp)
3638 bfa_trc(sfp, sfp->lock);
3640 sfp->cbfn(sfp->cbarg, sfp->status);
3646 bfa_cb_sfp_state_query(struct bfa_sfp_s *sfp)
3648 bfa_trc(sfp, sfp->portspeed);
3650 bfa_sfp_media_get(sfp);
3651 if (sfp->state_query_cbfn)
3652 sfp->state_query_cbfn(sfp->state_query_cbarg,
3657 if (sfp->portspeed) {
3658 sfp->status = bfa_sfp_speed_valid(sfp, sfp->portspeed);
3659 if (sfp->state_query_cbfn)
3660 sfp->state_query_cbfn(sfp->state_query_cbarg,
3662 sfp->portspeed = BFA_PORT_SPEED_UNKNOWN;
3665 sfp->state_query_lock = 0;
3666 sfp->state_query_cbfn = NULL;
3670 * IOC event handler.
3673 bfa_sfp_notify(void *sfp_arg, enum bfa_ioc_event_e event)
3675 struct bfa_sfp_s *sfp = sfp_arg;
3677 bfa_trc(sfp, event);
3678 bfa_trc(sfp, sfp->lock);
3679 bfa_trc(sfp, sfp->state_query_lock);
3682 case BFA_IOC_E_DISABLED:
3683 case BFA_IOC_E_FAILED:
3685 sfp->status = BFA_STATUS_IOC_FAILURE;
3686 bfa_cb_sfp_show(sfp);
3689 if (sfp->state_query_lock) {
3690 sfp->status = BFA_STATUS_IOC_FAILURE;
3691 bfa_cb_sfp_state_query(sfp);
3701 * SFP's State Change Notification post to AEN
3704 bfa_sfp_scn_aen_post(struct bfa_sfp_s *sfp, struct bfi_sfp_scn_s *rsp)
3706 struct bfad_s *bfad = (struct bfad_s *)sfp->ioc->bfa->bfad;
3707 struct bfa_aen_entry_s *aen_entry;
3708 enum bfa_port_aen_event aen_evt = 0;
3710 bfa_trc(sfp, (((u64)rsp->pomlvl) << 16) | (((u64)rsp->sfpid) << 8) |
3713 bfad_get_aen_entry(bfad, aen_entry);
3717 aen_entry->aen_data.port.ioc_type = bfa_ioc_get_type(sfp->ioc);
3718 aen_entry->aen_data.port.pwwn = sfp->ioc->attr->pwwn;
3719 aen_entry->aen_data.port.mac = bfa_ioc_get_mac(sfp->ioc);
3721 switch (rsp->event) {
3722 case BFA_SFP_SCN_INSERTED:
3723 aen_evt = BFA_PORT_AEN_SFP_INSERT;
3725 case BFA_SFP_SCN_REMOVED:
3726 aen_evt = BFA_PORT_AEN_SFP_REMOVE;
3728 case BFA_SFP_SCN_FAILED:
3729 aen_evt = BFA_PORT_AEN_SFP_ACCESS_ERROR;
3731 case BFA_SFP_SCN_UNSUPPORT:
3732 aen_evt = BFA_PORT_AEN_SFP_UNSUPPORT;
3734 case BFA_SFP_SCN_POM:
3735 aen_evt = BFA_PORT_AEN_SFP_POM;
3736 aen_entry->aen_data.port.level = rsp->pomlvl;
3739 bfa_trc(sfp, rsp->event);
3743 /* Send the AEN notification */
3744 bfad_im_post_vendor_event(aen_entry, bfad, ++sfp->ioc->ioc_aen_seq,
3745 BFA_AEN_CAT_PORT, aen_evt);
3752 bfa_sfp_getdata_send(struct bfa_sfp_s *sfp)
3754 struct bfi_sfp_req_s *req = (struct bfi_sfp_req_s *)sfp->mbcmd.msg;
3756 bfa_trc(sfp, req->memtype);
3758 /* build host command */
3759 bfi_h2i_set(req->mh, BFI_MC_SFP, BFI_SFP_H2I_SHOW,
3760 bfa_ioc_portid(sfp->ioc));
3763 bfa_ioc_mbox_queue(sfp->ioc, &sfp->mbcmd);
3767 * SFP is valid, read sfp data
3770 bfa_sfp_getdata(struct bfa_sfp_s *sfp, enum bfi_sfp_mem_e memtype)
3772 struct bfi_sfp_req_s *req = (struct bfi_sfp_req_s *)sfp->mbcmd.msg;
3774 WARN_ON(sfp->lock != 0);
3775 bfa_trc(sfp, sfp->state);
3778 sfp->memtype = memtype;
3779 req->memtype = memtype;
3782 bfa_alen_set(&req->alen, sizeof(struct sfp_mem_s), sfp->dbuf_pa);
3784 bfa_sfp_getdata_send(sfp);
3791 bfa_sfp_scn(struct bfa_sfp_s *sfp, struct bfi_mbmsg_s *msg)
3793 struct bfi_sfp_scn_s *rsp = (struct bfi_sfp_scn_s *) msg;
3795 switch (rsp->event) {
3796 case BFA_SFP_SCN_INSERTED:
3797 sfp->state = BFA_SFP_STATE_INSERTED;
3798 sfp->data_valid = 0;
3799 bfa_sfp_scn_aen_post(sfp, rsp);
3801 case BFA_SFP_SCN_REMOVED:
3802 sfp->state = BFA_SFP_STATE_REMOVED;
3803 sfp->data_valid = 0;
3804 bfa_sfp_scn_aen_post(sfp, rsp);
3806 case BFA_SFP_SCN_FAILED:
3807 sfp->state = BFA_SFP_STATE_FAILED;
3808 sfp->data_valid = 0;
3809 bfa_sfp_scn_aen_post(sfp, rsp);
3811 case BFA_SFP_SCN_UNSUPPORT:
3812 sfp->state = BFA_SFP_STATE_UNSUPPORT;
3813 bfa_sfp_scn_aen_post(sfp, rsp);
3815 bfa_sfp_getdata(sfp, BFI_SFP_MEM_ALL);
3817 case BFA_SFP_SCN_POM:
3818 bfa_sfp_scn_aen_post(sfp, rsp);
3820 case BFA_SFP_SCN_VALID:
3821 sfp->state = BFA_SFP_STATE_VALID;
3823 bfa_sfp_getdata(sfp, BFI_SFP_MEM_ALL);
3826 bfa_trc(sfp, rsp->event);
3835 bfa_sfp_show_comp(struct bfa_sfp_s *sfp, struct bfi_mbmsg_s *msg)
3837 struct bfi_sfp_rsp_s *rsp = (struct bfi_sfp_rsp_s *) msg;
3841 * receiving response after ioc failure
3843 bfa_trc(sfp, sfp->lock);
3847 bfa_trc(sfp, rsp->status);
3848 if (rsp->status == BFA_STATUS_OK) {
3849 sfp->data_valid = 1;
3850 if (sfp->state == BFA_SFP_STATE_VALID)
3851 sfp->status = BFA_STATUS_OK;
3852 else if (sfp->state == BFA_SFP_STATE_UNSUPPORT)
3853 sfp->status = BFA_STATUS_SFP_UNSUPP;
3855 bfa_trc(sfp, sfp->state);
3857 sfp->data_valid = 0;
3858 sfp->status = rsp->status;
3859 /* sfpshow shouldn't change sfp state */
3862 bfa_trc(sfp, sfp->memtype);
3863 if (sfp->memtype == BFI_SFP_MEM_DIAGEXT) {
3864 bfa_trc(sfp, sfp->data_valid);
3865 if (sfp->data_valid) {
3866 u32 size = sizeof(struct sfp_mem_s);
3867 u8 *des = (u8 *)(sfp->sfpmem);
3868 memcpy(des, sfp->dbuf_kva, size);
3871 * Queue completion callback.
3873 bfa_cb_sfp_show(sfp);
3877 bfa_trc(sfp, sfp->state_query_lock);
3878 if (sfp->state_query_lock) {
3879 sfp->state = rsp->state;
3880 /* Complete callback */
3881 bfa_cb_sfp_state_query(sfp);
3886 * SFP query fw sfp state
3889 bfa_sfp_state_query(struct bfa_sfp_s *sfp)
3891 struct bfi_sfp_req_s *req = (struct bfi_sfp_req_s *)sfp->mbcmd.msg;
3893 /* Should not be doing query if not in _INIT state */
3894 WARN_ON(sfp->state != BFA_SFP_STATE_INIT);
3895 WARN_ON(sfp->state_query_lock != 0);
3896 bfa_trc(sfp, sfp->state);
3898 sfp->state_query_lock = 1;
3902 bfa_sfp_getdata(sfp, BFI_SFP_MEM_ALL);
3906 bfa_sfp_media_get(struct bfa_sfp_s *sfp)
3908 enum bfa_defs_sfp_media_e *media = sfp->media;
3910 *media = BFA_SFP_MEDIA_UNKNOWN;
3912 if (sfp->state == BFA_SFP_STATE_UNSUPPORT)
3913 *media = BFA_SFP_MEDIA_UNSUPPORT;
3914 else if (sfp->state == BFA_SFP_STATE_VALID) {
3915 union sfp_xcvr_e10g_code_u e10g;
3916 struct sfp_mem_s *sfpmem = (struct sfp_mem_s *)sfp->dbuf_kva;
3917 u16 xmtr_tech = (sfpmem->srlid_base.xcvr[4] & 0x3) << 7 |
3918 (sfpmem->srlid_base.xcvr[5] >> 1);
3920 e10g.b = sfpmem->srlid_base.xcvr[0];
3921 bfa_trc(sfp, e10g.b);
3922 bfa_trc(sfp, xmtr_tech);
3923 /* check fc transmitter tech */
3924 if ((xmtr_tech & SFP_XMTR_TECH_CU) ||
3925 (xmtr_tech & SFP_XMTR_TECH_CP) ||
3926 (xmtr_tech & SFP_XMTR_TECH_CA))
3927 *media = BFA_SFP_MEDIA_CU;
3928 else if ((xmtr_tech & SFP_XMTR_TECH_EL_INTRA) ||
3929 (xmtr_tech & SFP_XMTR_TECH_EL_INTER))
3930 *media = BFA_SFP_MEDIA_EL;
3931 else if ((xmtr_tech & SFP_XMTR_TECH_LL) ||
3932 (xmtr_tech & SFP_XMTR_TECH_LC))
3933 *media = BFA_SFP_MEDIA_LW;
3934 else if ((xmtr_tech & SFP_XMTR_TECH_SL) ||
3935 (xmtr_tech & SFP_XMTR_TECH_SN) ||
3936 (xmtr_tech & SFP_XMTR_TECH_SA))
3937 *media = BFA_SFP_MEDIA_SW;
3938 /* Check 10G Ethernet Compilance code */
3939 else if (e10g.r.e10g_sr)
3940 *media = BFA_SFP_MEDIA_SW;
3941 else if (e10g.r.e10g_lrm && e10g.r.e10g_lr)
3942 *media = BFA_SFP_MEDIA_LW;
3943 else if (e10g.r.e10g_unall)
3944 *media = BFA_SFP_MEDIA_UNKNOWN;
3948 bfa_trc(sfp, sfp->state);
3952 bfa_sfp_speed_valid(struct bfa_sfp_s *sfp, enum bfa_port_speed portspeed)
3954 struct sfp_mem_s *sfpmem = (struct sfp_mem_s *)sfp->dbuf_kva;
3955 struct sfp_xcvr_s *xcvr = (struct sfp_xcvr_s *) sfpmem->srlid_base.xcvr;
3956 union sfp_xcvr_fc3_code_u fc3 = xcvr->fc3;
3957 union sfp_xcvr_e10g_code_u e10g = xcvr->e10g;
3959 if (portspeed == BFA_PORT_SPEED_10GBPS) {
3960 if (e10g.r.e10g_sr || e10g.r.e10g_lr)
3961 return BFA_STATUS_OK;
3963 bfa_trc(sfp, e10g.b);
3964 return BFA_STATUS_UNSUPP_SPEED;
3967 if (((portspeed & BFA_PORT_SPEED_16GBPS) && fc3.r.mb1600) ||
3968 ((portspeed & BFA_PORT_SPEED_8GBPS) && fc3.r.mb800) ||
3969 ((portspeed & BFA_PORT_SPEED_4GBPS) && fc3.r.mb400) ||
3970 ((portspeed & BFA_PORT_SPEED_2GBPS) && fc3.r.mb200) ||
3971 ((portspeed & BFA_PORT_SPEED_1GBPS) && fc3.r.mb100))
3972 return BFA_STATUS_OK;
3974 bfa_trc(sfp, portspeed);
3975 bfa_trc(sfp, fc3.b);
3976 bfa_trc(sfp, e10g.b);
3977 return BFA_STATUS_UNSUPP_SPEED;
3985 bfa_sfp_intr(void *sfparg, struct bfi_mbmsg_s *msg)
3987 struct bfa_sfp_s *sfp = sfparg;
3989 switch (msg->mh.msg_id) {
3990 case BFI_SFP_I2H_SHOW:
3991 bfa_sfp_show_comp(sfp, msg);
3994 case BFI_SFP_I2H_SCN:
3995 bfa_sfp_scn(sfp, msg);
3999 bfa_trc(sfp, msg->mh.msg_id);
4005 * Return DMA memory needed by sfp module.
4008 bfa_sfp_meminfo(void)
4010 return BFA_ROUNDUP(sizeof(struct sfp_mem_s), BFA_DMA_ALIGN_SZ);
4014 * Attach virtual and physical memory for SFP.
4017 bfa_sfp_attach(struct bfa_sfp_s *sfp, struct bfa_ioc_s *ioc, void *dev,
4018 struct bfa_trc_mod_s *trcmod)
4022 sfp->trcmod = trcmod;
4028 sfp->data_valid = 0;
4029 sfp->state = BFA_SFP_STATE_INIT;
4030 sfp->state_query_lock = 0;
4031 sfp->state_query_cbfn = NULL;
4032 sfp->state_query_cbarg = NULL;
4034 sfp->portspeed = BFA_PORT_SPEED_UNKNOWN;
4035 sfp->is_elb = BFA_FALSE;
4037 bfa_ioc_mbox_regisr(sfp->ioc, BFI_MC_SFP, bfa_sfp_intr, sfp);
4038 bfa_q_qe_init(&sfp->ioc_notify);
4039 bfa_ioc_notify_init(&sfp->ioc_notify, bfa_sfp_notify, sfp);
4040 list_add_tail(&sfp->ioc_notify.qe, &sfp->ioc->notify_q);
4044 * Claim Memory for SFP
4047 bfa_sfp_memclaim(struct bfa_sfp_s *sfp, u8 *dm_kva, u64 dm_pa)
4049 sfp->dbuf_kva = dm_kva;
4050 sfp->dbuf_pa = dm_pa;
4051 memset(sfp->dbuf_kva, 0, sizeof(struct sfp_mem_s));
4053 dm_kva += BFA_ROUNDUP(sizeof(struct sfp_mem_s), BFA_DMA_ALIGN_SZ);
4054 dm_pa += BFA_ROUNDUP(sizeof(struct sfp_mem_s), BFA_DMA_ALIGN_SZ);
4058 * Show SFP eeprom content
4060 * @param[in] sfp - bfa sfp module
4062 * @param[out] sfpmem - sfp eeprom data
4066 bfa_sfp_show(struct bfa_sfp_s *sfp, struct sfp_mem_s *sfpmem,
4067 bfa_cb_sfp_t cbfn, void *cbarg)
4070 if (!bfa_ioc_is_operational(sfp->ioc)) {
4072 return BFA_STATUS_IOC_NON_OP;
4077 return BFA_STATUS_DEVBUSY;
4082 sfp->sfpmem = sfpmem;
4084 bfa_sfp_getdata(sfp, BFI_SFP_MEM_DIAGEXT);
4085 return BFA_STATUS_OK;
4089 * Return SFP Media type
4091 * @param[in] sfp - bfa sfp module
4093 * @param[out] media - port speed from user
4097 bfa_sfp_media(struct bfa_sfp_s *sfp, enum bfa_defs_sfp_media_e *media,
4098 bfa_cb_sfp_t cbfn, void *cbarg)
4100 if (!bfa_ioc_is_operational(sfp->ioc)) {
4102 return BFA_STATUS_IOC_NON_OP;
4106 if (sfp->state == BFA_SFP_STATE_INIT) {
4107 if (sfp->state_query_lock) {
4109 return BFA_STATUS_DEVBUSY;
4111 sfp->state_query_cbfn = cbfn;
4112 sfp->state_query_cbarg = cbarg;
4113 bfa_sfp_state_query(sfp);
4114 return BFA_STATUS_SFP_NOT_READY;
4118 bfa_sfp_media_get(sfp);
4119 return BFA_STATUS_OK;
4123 * Check if user set port speed is allowed by the SFP
4125 * @param[in] sfp - bfa sfp module
4126 * @param[in] portspeed - port speed from user
4130 bfa_sfp_speed(struct bfa_sfp_s *sfp, enum bfa_port_speed portspeed,
4131 bfa_cb_sfp_t cbfn, void *cbarg)
4133 WARN_ON(portspeed == BFA_PORT_SPEED_UNKNOWN);
4135 if (!bfa_ioc_is_operational(sfp->ioc))
4136 return BFA_STATUS_IOC_NON_OP;
4138 /* For Mezz card, all speed is allowed */
4139 if (bfa_mfg_is_mezz(sfp->ioc->attr->card_type))
4140 return BFA_STATUS_OK;
4142 /* Check SFP state */
4143 sfp->portspeed = portspeed;
4144 if (sfp->state == BFA_SFP_STATE_INIT) {
4145 if (sfp->state_query_lock) {
4147 return BFA_STATUS_DEVBUSY;
4149 sfp->state_query_cbfn = cbfn;
4150 sfp->state_query_cbarg = cbarg;
4151 bfa_sfp_state_query(sfp);
4152 return BFA_STATUS_SFP_NOT_READY;
4156 if (sfp->state == BFA_SFP_STATE_REMOVED ||
4157 sfp->state == BFA_SFP_STATE_FAILED) {
4158 bfa_trc(sfp, sfp->state);
4159 return BFA_STATUS_NO_SFP_DEV;
4162 if (sfp->state == BFA_SFP_STATE_INSERTED) {
4163 bfa_trc(sfp, sfp->state);
4164 return BFA_STATUS_DEVBUSY; /* sfp is reading data */
4167 /* For eloopback, all speed is allowed */
4169 return BFA_STATUS_OK;
4171 return bfa_sfp_speed_valid(sfp, portspeed);
4175 * Flash module specific
4179 * FLASH DMA buffer should be big enough to hold both MFG block and
4180 * asic block(64k) at the same time and also should be 2k aligned to
4181 * avoid write segement to cross sector boundary.
4183 #define BFA_FLASH_SEG_SZ 2048
4184 #define BFA_FLASH_DMA_BUF_SZ \
4185 BFA_ROUNDUP(0x010000 + sizeof(struct bfa_mfg_block_s), BFA_FLASH_SEG_SZ)
4188 bfa_flash_aen_audit_post(struct bfa_ioc_s *ioc, enum bfa_audit_aen_event event,
4191 struct bfad_s *bfad = (struct bfad_s *)ioc->bfa->bfad;
4192 struct bfa_aen_entry_s *aen_entry;
4194 bfad_get_aen_entry(bfad, aen_entry);
4198 aen_entry->aen_data.audit.pwwn = ioc->attr->pwwn;
4199 aen_entry->aen_data.audit.partition_inst = inst;
4200 aen_entry->aen_data.audit.partition_type = type;
4202 /* Send the AEN notification */
4203 bfad_im_post_vendor_event(aen_entry, bfad, ++ioc->ioc_aen_seq,
4204 BFA_AEN_CAT_AUDIT, event);
4208 bfa_flash_cb(struct bfa_flash_s *flash)
4212 flash->cbfn(flash->cbarg, flash->status);
4216 bfa_flash_notify(void *cbarg, enum bfa_ioc_event_e event)
4218 struct bfa_flash_s *flash = cbarg;
4220 bfa_trc(flash, event);
4222 case BFA_IOC_E_DISABLED:
4223 case BFA_IOC_E_FAILED:
4224 if (flash->op_busy) {
4225 flash->status = BFA_STATUS_IOC_FAILURE;
4226 flash->cbfn(flash->cbarg, flash->status);
4237 * Send flash attribute query request.
4239 * @param[in] cbarg - callback argument
4242 bfa_flash_query_send(void *cbarg)
4244 struct bfa_flash_s *flash = cbarg;
4245 struct bfi_flash_query_req_s *msg =
4246 (struct bfi_flash_query_req_s *) flash->mb.msg;
4248 bfi_h2i_set(msg->mh, BFI_MC_FLASH, BFI_FLASH_H2I_QUERY_REQ,
4249 bfa_ioc_portid(flash->ioc));
4250 bfa_alen_set(&msg->alen, sizeof(struct bfa_flash_attr_s),
4252 bfa_ioc_mbox_queue(flash->ioc, &flash->mb);
4256 * Send flash write request.
4258 * @param[in] cbarg - callback argument
4261 bfa_flash_write_send(struct bfa_flash_s *flash)
4263 struct bfi_flash_write_req_s *msg =
4264 (struct bfi_flash_write_req_s *) flash->mb.msg;
4267 msg->type = be32_to_cpu(flash->type);
4268 msg->instance = flash->instance;
4269 msg->offset = be32_to_cpu(flash->addr_off + flash->offset);
4270 len = (flash->residue < BFA_FLASH_DMA_BUF_SZ) ?
4271 flash->residue : BFA_FLASH_DMA_BUF_SZ;
4272 msg->length = be32_to_cpu(len);
4274 /* indicate if it's the last msg of the whole write operation */
4275 msg->last = (len == flash->residue) ? 1 : 0;
4277 bfi_h2i_set(msg->mh, BFI_MC_FLASH, BFI_FLASH_H2I_WRITE_REQ,
4278 bfa_ioc_portid(flash->ioc));
4279 bfa_alen_set(&msg->alen, len, flash->dbuf_pa);
4280 memcpy(flash->dbuf_kva, flash->ubuf + flash->offset, len);
4281 bfa_ioc_mbox_queue(flash->ioc, &flash->mb);
4283 flash->residue -= len;
4284 flash->offset += len;
4288 * Send flash read request.
4290 * @param[in] cbarg - callback argument
4293 bfa_flash_read_send(void *cbarg)
4295 struct bfa_flash_s *flash = cbarg;
4296 struct bfi_flash_read_req_s *msg =
4297 (struct bfi_flash_read_req_s *) flash->mb.msg;
4300 msg->type = be32_to_cpu(flash->type);
4301 msg->instance = flash->instance;
4302 msg->offset = be32_to_cpu(flash->addr_off + flash->offset);
4303 len = (flash->residue < BFA_FLASH_DMA_BUF_SZ) ?
4304 flash->residue : BFA_FLASH_DMA_BUF_SZ;
4305 msg->length = be32_to_cpu(len);
4306 bfi_h2i_set(msg->mh, BFI_MC_FLASH, BFI_FLASH_H2I_READ_REQ,
4307 bfa_ioc_portid(flash->ioc));
4308 bfa_alen_set(&msg->alen, len, flash->dbuf_pa);
4309 bfa_ioc_mbox_queue(flash->ioc, &flash->mb);
4313 * Send flash erase request.
4315 * @param[in] cbarg - callback argument
4318 bfa_flash_erase_send(void *cbarg)
4320 struct bfa_flash_s *flash = cbarg;
4321 struct bfi_flash_erase_req_s *msg =
4322 (struct bfi_flash_erase_req_s *) flash->mb.msg;
4324 msg->type = be32_to_cpu(flash->type);
4325 msg->instance = flash->instance;
4326 bfi_h2i_set(msg->mh, BFI_MC_FLASH, BFI_FLASH_H2I_ERASE_REQ,
4327 bfa_ioc_portid(flash->ioc));
4328 bfa_ioc_mbox_queue(flash->ioc, &flash->mb);
4332 * Process flash response messages upon receiving interrupts.
4334 * @param[in] flasharg - flash structure
4335 * @param[in] msg - message structure
4338 bfa_flash_intr(void *flasharg, struct bfi_mbmsg_s *msg)
4340 struct bfa_flash_s *flash = flasharg;
4344 struct bfi_flash_query_rsp_s *query;
4345 struct bfi_flash_erase_rsp_s *erase;
4346 struct bfi_flash_write_rsp_s *write;
4347 struct bfi_flash_read_rsp_s *read;
4348 struct bfi_flash_event_s *event;
4349 struct bfi_mbmsg_s *msg;
4353 bfa_trc(flash, msg->mh.msg_id);
4355 if (!flash->op_busy && msg->mh.msg_id != BFI_FLASH_I2H_EVENT) {
4356 /* receiving response after ioc failure */
4357 bfa_trc(flash, 0x9999);
4361 switch (msg->mh.msg_id) {
4362 case BFI_FLASH_I2H_QUERY_RSP:
4363 status = be32_to_cpu(m.query->status);
4364 bfa_trc(flash, status);
4365 if (status == BFA_STATUS_OK) {
4367 struct bfa_flash_attr_s *attr, *f;
4369 attr = (struct bfa_flash_attr_s *) flash->ubuf;
4370 f = (struct bfa_flash_attr_s *) flash->dbuf_kva;
4371 attr->status = be32_to_cpu(f->status);
4372 attr->npart = be32_to_cpu(f->npart);
4373 bfa_trc(flash, attr->status);
4374 bfa_trc(flash, attr->npart);
4375 for (i = 0; i < attr->npart; i++) {
4376 attr->part[i].part_type =
4377 be32_to_cpu(f->part[i].part_type);
4378 attr->part[i].part_instance =
4379 be32_to_cpu(f->part[i].part_instance);
4380 attr->part[i].part_off =
4381 be32_to_cpu(f->part[i].part_off);
4382 attr->part[i].part_size =
4383 be32_to_cpu(f->part[i].part_size);
4384 attr->part[i].part_len =
4385 be32_to_cpu(f->part[i].part_len);
4386 attr->part[i].part_status =
4387 be32_to_cpu(f->part[i].part_status);
4390 flash->status = status;
4391 bfa_flash_cb(flash);
4393 case BFI_FLASH_I2H_ERASE_RSP:
4394 status = be32_to_cpu(m.erase->status);
4395 bfa_trc(flash, status);
4396 flash->status = status;
4397 bfa_flash_cb(flash);
4399 case BFI_FLASH_I2H_WRITE_RSP:
4400 status = be32_to_cpu(m.write->status);
4401 bfa_trc(flash, status);
4402 if (status != BFA_STATUS_OK || flash->residue == 0) {
4403 flash->status = status;
4404 bfa_flash_cb(flash);
4406 bfa_trc(flash, flash->offset);
4407 bfa_flash_write_send(flash);
4410 case BFI_FLASH_I2H_READ_RSP:
4411 status = be32_to_cpu(m.read->status);
4412 bfa_trc(flash, status);
4413 if (status != BFA_STATUS_OK) {
4414 flash->status = status;
4415 bfa_flash_cb(flash);
4417 u32 len = be32_to_cpu(m.read->length);
4418 bfa_trc(flash, flash->offset);
4419 bfa_trc(flash, len);
4420 memcpy(flash->ubuf + flash->offset,
4421 flash->dbuf_kva, len);
4422 flash->residue -= len;
4423 flash->offset += len;
4424 if (flash->residue == 0) {
4425 flash->status = status;
4426 bfa_flash_cb(flash);
4428 bfa_flash_read_send(flash);
4431 case BFI_FLASH_I2H_BOOT_VER_RSP:
4433 case BFI_FLASH_I2H_EVENT:
4434 status = be32_to_cpu(m.event->status);
4435 bfa_trc(flash, status);
4436 if (status == BFA_STATUS_BAD_FWCFG)
4437 bfa_ioc_aen_post(flash->ioc, BFA_IOC_AEN_FWCFG_ERROR);
4438 else if (status == BFA_STATUS_INVALID_VENDOR) {
4440 param = be32_to_cpu(m.event->param);
4441 bfa_trc(flash, param);
4442 bfa_ioc_aen_post(flash->ioc,
4443 BFA_IOC_AEN_INVALID_VENDOR);
4453 * Flash memory info API.
4455 * @param[in] mincfg - minimal cfg variable
4458 bfa_flash_meminfo(bfa_boolean_t mincfg)
4460 /* min driver doesn't need flash */
4463 return BFA_ROUNDUP(BFA_FLASH_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
4469 * @param[in] flash - flash structure
4470 * @param[in] ioc - ioc structure
4471 * @param[in] dev - device structure
4472 * @param[in] trcmod - trace module
4473 * @param[in] logmod - log module
4476 bfa_flash_attach(struct bfa_flash_s *flash, struct bfa_ioc_s *ioc, void *dev,
4477 struct bfa_trc_mod_s *trcmod, bfa_boolean_t mincfg)
4480 flash->trcmod = trcmod;
4482 flash->cbarg = NULL;
4485 bfa_ioc_mbox_regisr(flash->ioc, BFI_MC_FLASH, bfa_flash_intr, flash);
4486 bfa_q_qe_init(&flash->ioc_notify);
4487 bfa_ioc_notify_init(&flash->ioc_notify, bfa_flash_notify, flash);
4488 list_add_tail(&flash->ioc_notify.qe, &flash->ioc->notify_q);
4490 /* min driver doesn't need flash */
4492 flash->dbuf_kva = NULL;
4498 * Claim memory for flash
4500 * @param[in] flash - flash structure
4501 * @param[in] dm_kva - pointer to virtual memory address
4502 * @param[in] dm_pa - physical memory address
4503 * @param[in] mincfg - minimal cfg variable
4506 bfa_flash_memclaim(struct bfa_flash_s *flash, u8 *dm_kva, u64 dm_pa,
4507 bfa_boolean_t mincfg)
4512 flash->dbuf_kva = dm_kva;
4513 flash->dbuf_pa = dm_pa;
4514 memset(flash->dbuf_kva, 0, BFA_FLASH_DMA_BUF_SZ);
4515 dm_kva += BFA_ROUNDUP(BFA_FLASH_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
4516 dm_pa += BFA_ROUNDUP(BFA_FLASH_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
4520 * Get flash attribute.
4522 * @param[in] flash - flash structure
4523 * @param[in] attr - flash attribute structure
4524 * @param[in] cbfn - callback function
4525 * @param[in] cbarg - callback argument
4530 bfa_flash_get_attr(struct bfa_flash_s *flash, struct bfa_flash_attr_s *attr,
4531 bfa_cb_flash_t cbfn, void *cbarg)
4533 bfa_trc(flash, BFI_FLASH_H2I_QUERY_REQ);
4535 if (!bfa_ioc_is_operational(flash->ioc))
4536 return BFA_STATUS_IOC_NON_OP;
4538 if (flash->op_busy) {
4539 bfa_trc(flash, flash->op_busy);
4540 return BFA_STATUS_DEVBUSY;
4545 flash->cbarg = cbarg;
4546 flash->ubuf = (u8 *) attr;
4547 bfa_flash_query_send(flash);
4549 return BFA_STATUS_OK;
4553 * Erase flash partition.
4555 * @param[in] flash - flash structure
4556 * @param[in] type - flash partition type
4557 * @param[in] instance - flash partition instance
4558 * @param[in] cbfn - callback function
4559 * @param[in] cbarg - callback argument
4564 bfa_flash_erase_part(struct bfa_flash_s *flash, enum bfa_flash_part_type type,
4565 u8 instance, bfa_cb_flash_t cbfn, void *cbarg)
4567 bfa_trc(flash, BFI_FLASH_H2I_ERASE_REQ);
4568 bfa_trc(flash, type);
4569 bfa_trc(flash, instance);
4571 if (!bfa_ioc_is_operational(flash->ioc))
4572 return BFA_STATUS_IOC_NON_OP;
4574 if (flash->op_busy) {
4575 bfa_trc(flash, flash->op_busy);
4576 return BFA_STATUS_DEVBUSY;
4581 flash->cbarg = cbarg;
4583 flash->instance = instance;
4585 bfa_flash_erase_send(flash);
4586 bfa_flash_aen_audit_post(flash->ioc, BFA_AUDIT_AEN_FLASH_ERASE,
4588 return BFA_STATUS_OK;
4592 * Update flash partition.
4594 * @param[in] flash - flash structure
4595 * @param[in] type - flash partition type
4596 * @param[in] instance - flash partition instance
4597 * @param[in] buf - update data buffer
4598 * @param[in] len - data buffer length
4599 * @param[in] offset - offset relative to the partition starting address
4600 * @param[in] cbfn - callback function
4601 * @param[in] cbarg - callback argument
4606 bfa_flash_update_part(struct bfa_flash_s *flash, enum bfa_flash_part_type type,
4607 u8 instance, void *buf, u32 len, u32 offset,
4608 bfa_cb_flash_t cbfn, void *cbarg)
4610 bfa_trc(flash, BFI_FLASH_H2I_WRITE_REQ);
4611 bfa_trc(flash, type);
4612 bfa_trc(flash, instance);
4613 bfa_trc(flash, len);
4614 bfa_trc(flash, offset);
4616 if (!bfa_ioc_is_operational(flash->ioc))
4617 return BFA_STATUS_IOC_NON_OP;
4620 * 'len' must be in word (4-byte) boundary
4621 * 'offset' must be in sector (16kb) boundary
4623 if (!len || (len & 0x03) || (offset & 0x00003FFF))
4624 return BFA_STATUS_FLASH_BAD_LEN;
4626 if (type == BFA_FLASH_PART_MFG)
4627 return BFA_STATUS_EINVAL;
4629 if (flash->op_busy) {
4630 bfa_trc(flash, flash->op_busy);
4631 return BFA_STATUS_DEVBUSY;
4636 flash->cbarg = cbarg;
4638 flash->instance = instance;
4639 flash->residue = len;
4641 flash->addr_off = offset;
4644 bfa_flash_write_send(flash);
4645 return BFA_STATUS_OK;
4649 * Read flash partition.
4651 * @param[in] flash - flash structure
4652 * @param[in] type - flash partition type
4653 * @param[in] instance - flash partition instance
4654 * @param[in] buf - read data buffer
4655 * @param[in] len - data buffer length
4656 * @param[in] offset - offset relative to the partition starting address
4657 * @param[in] cbfn - callback function
4658 * @param[in] cbarg - callback argument
4663 bfa_flash_read_part(struct bfa_flash_s *flash, enum bfa_flash_part_type type,
4664 u8 instance, void *buf, u32 len, u32 offset,
4665 bfa_cb_flash_t cbfn, void *cbarg)
4667 bfa_trc(flash, BFI_FLASH_H2I_READ_REQ);
4668 bfa_trc(flash, type);
4669 bfa_trc(flash, instance);
4670 bfa_trc(flash, len);
4671 bfa_trc(flash, offset);
4673 if (!bfa_ioc_is_operational(flash->ioc))
4674 return BFA_STATUS_IOC_NON_OP;
4677 * 'len' must be in word (4-byte) boundary
4678 * 'offset' must be in sector (16kb) boundary
4680 if (!len || (len & 0x03) || (offset & 0x00003FFF))
4681 return BFA_STATUS_FLASH_BAD_LEN;
4683 if (flash->op_busy) {
4684 bfa_trc(flash, flash->op_busy);
4685 return BFA_STATUS_DEVBUSY;
4690 flash->cbarg = cbarg;
4692 flash->instance = instance;
4693 flash->residue = len;
4695 flash->addr_off = offset;
4697 bfa_flash_read_send(flash);
4699 return BFA_STATUS_OK;
4703 * DIAG module specific
4706 #define BFA_DIAG_MEMTEST_TOV 50000 /* memtest timeout in msec */
4707 #define CT2_BFA_DIAG_MEMTEST_TOV (9*30*1000) /* 4.5 min */
4709 /* IOC event handler */
4711 bfa_diag_notify(void *diag_arg, enum bfa_ioc_event_e event)
4713 struct bfa_diag_s *diag = diag_arg;
4715 bfa_trc(diag, event);
4716 bfa_trc(diag, diag->block);
4717 bfa_trc(diag, diag->fwping.lock);
4718 bfa_trc(diag, diag->tsensor.lock);
4721 case BFA_IOC_E_DISABLED:
4722 case BFA_IOC_E_FAILED:
4723 if (diag->fwping.lock) {
4724 diag->fwping.status = BFA_STATUS_IOC_FAILURE;
4725 diag->fwping.cbfn(diag->fwping.cbarg,
4726 diag->fwping.status);
4727 diag->fwping.lock = 0;
4730 if (diag->tsensor.lock) {
4731 diag->tsensor.status = BFA_STATUS_IOC_FAILURE;
4732 diag->tsensor.cbfn(diag->tsensor.cbarg,
4733 diag->tsensor.status);
4734 diag->tsensor.lock = 0;
4738 if (diag->timer_active) {
4739 bfa_timer_stop(&diag->timer);
4740 diag->timer_active = 0;
4743 diag->status = BFA_STATUS_IOC_FAILURE;
4744 diag->cbfn(diag->cbarg, diag->status);
4755 bfa_diag_memtest_done(void *cbarg)
4757 struct bfa_diag_s *diag = cbarg;
4758 struct bfa_ioc_s *ioc = diag->ioc;
4759 struct bfa_diag_memtest_result *res = diag->result;
4760 u32 loff = BFI_BOOT_MEMTEST_RES_ADDR;
4763 pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, loff);
4764 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
4766 for (i = 0; i < (sizeof(struct bfa_diag_memtest_result) /
4767 sizeof(u32)); i++) {
4768 /* read test result from smem */
4769 *((u32 *) res + i) =
4770 bfa_mem_read(ioc->ioc_regs.smem_page_start, loff);
4771 loff += sizeof(u32);
4774 /* Reset IOC fwstates to BFI_IOC_UNINIT */
4775 bfa_ioc_reset_fwstate(ioc);
4777 res->status = swab32(res->status);
4778 bfa_trc(diag, res->status);
4780 if (res->status == BFI_BOOT_MEMTEST_RES_SIG)
4781 diag->status = BFA_STATUS_OK;
4783 diag->status = BFA_STATUS_MEMTEST_FAILED;
4784 res->addr = swab32(res->addr);
4785 res->exp = swab32(res->exp);
4786 res->act = swab32(res->act);
4787 res->err_status = swab32(res->err_status);
4788 res->err_status1 = swab32(res->err_status1);
4789 res->err_addr = swab32(res->err_addr);
4790 bfa_trc(diag, res->addr);
4791 bfa_trc(diag, res->exp);
4792 bfa_trc(diag, res->act);
4793 bfa_trc(diag, res->err_status);
4794 bfa_trc(diag, res->err_status1);
4795 bfa_trc(diag, res->err_addr);
4797 diag->timer_active = 0;
4798 diag->cbfn(diag->cbarg, diag->status);
4807 * Perform DMA test directly
4810 diag_fwping_send(struct bfa_diag_s *diag)
4812 struct bfi_diag_fwping_req_s *fwping_req;
4815 bfa_trc(diag, diag->fwping.dbuf_pa);
4817 /* fill DMA area with pattern */
4818 for (i = 0; i < (BFI_DIAG_DMA_BUF_SZ >> 2); i++)
4819 *((u32 *)diag->fwping.dbuf_kva + i) = diag->fwping.data;
4822 fwping_req = (struct bfi_diag_fwping_req_s *)diag->fwping.mbcmd.msg;
4825 bfa_alen_set(&fwping_req->alen, BFI_DIAG_DMA_BUF_SZ,
4826 diag->fwping.dbuf_pa);
4827 /* Set up dma count */
4828 fwping_req->count = cpu_to_be32(diag->fwping.count);
4829 /* Set up data pattern */
4830 fwping_req->data = diag->fwping.data;
4832 /* build host command */
4833 bfi_h2i_set(fwping_req->mh, BFI_MC_DIAG, BFI_DIAG_H2I_FWPING,
4834 bfa_ioc_portid(diag->ioc));
4837 bfa_ioc_mbox_queue(diag->ioc, &diag->fwping.mbcmd);
4841 diag_fwping_comp(struct bfa_diag_s *diag,
4842 struct bfi_diag_fwping_rsp_s *diag_rsp)
4844 u32 rsp_data = diag_rsp->data;
4845 u8 rsp_dma_status = diag_rsp->dma_status;
4847 bfa_trc(diag, rsp_data);
4848 bfa_trc(diag, rsp_dma_status);
4850 if (rsp_dma_status == BFA_STATUS_OK) {
4852 pat = (diag->fwping.count & 0x1) ? ~(diag->fwping.data) :
4854 /* Check mbox data */
4855 if (diag->fwping.data != rsp_data) {
4856 bfa_trc(diag, rsp_data);
4857 diag->fwping.result->dmastatus =
4858 BFA_STATUS_DATACORRUPTED;
4859 diag->fwping.status = BFA_STATUS_DATACORRUPTED;
4860 diag->fwping.cbfn(diag->fwping.cbarg,
4861 diag->fwping.status);
4862 diag->fwping.lock = 0;
4865 /* Check dma pattern */
4866 for (i = 0; i < (BFI_DIAG_DMA_BUF_SZ >> 2); i++) {
4867 if (*((u32 *)diag->fwping.dbuf_kva + i) != pat) {
4871 *((u32 *)diag->fwping.dbuf_kva + i));
4872 diag->fwping.result->dmastatus =
4873 BFA_STATUS_DATACORRUPTED;
4874 diag->fwping.status = BFA_STATUS_DATACORRUPTED;
4875 diag->fwping.cbfn(diag->fwping.cbarg,
4876 diag->fwping.status);
4877 diag->fwping.lock = 0;
4881 diag->fwping.result->dmastatus = BFA_STATUS_OK;
4882 diag->fwping.status = BFA_STATUS_OK;
4883 diag->fwping.cbfn(diag->fwping.cbarg, diag->fwping.status);
4884 diag->fwping.lock = 0;
4886 diag->fwping.status = BFA_STATUS_HDMA_FAILED;
4887 diag->fwping.cbfn(diag->fwping.cbarg, diag->fwping.status);
4888 diag->fwping.lock = 0;
4893 * Temperature Sensor
4897 diag_tempsensor_send(struct bfa_diag_s *diag)
4899 struct bfi_diag_ts_req_s *msg;
4901 msg = (struct bfi_diag_ts_req_s *)diag->tsensor.mbcmd.msg;
4902 bfa_trc(diag, msg->temp);
4903 /* build host command */
4904 bfi_h2i_set(msg->mh, BFI_MC_DIAG, BFI_DIAG_H2I_TEMPSENSOR,
4905 bfa_ioc_portid(diag->ioc));
4907 bfa_ioc_mbox_queue(diag->ioc, &diag->tsensor.mbcmd);
4911 diag_tempsensor_comp(struct bfa_diag_s *diag, bfi_diag_ts_rsp_t *rsp)
4913 if (!diag->tsensor.lock) {
4914 /* receiving response after ioc failure */
4915 bfa_trc(diag, diag->tsensor.lock);
4920 * ASIC junction tempsensor is a reg read operation
4921 * it will always return OK
4923 diag->tsensor.temp->temp = be16_to_cpu(rsp->temp);
4924 diag->tsensor.temp->ts_junc = rsp->ts_junc;
4925 diag->tsensor.temp->ts_brd = rsp->ts_brd;
4928 /* tsensor.temp->status is brd_temp status */
4929 diag->tsensor.temp->status = rsp->status;
4930 if (rsp->status == BFA_STATUS_OK) {
4931 diag->tsensor.temp->brd_temp =
4932 be16_to_cpu(rsp->brd_temp);
4934 diag->tsensor.temp->brd_temp = 0;
4937 bfa_trc(diag, rsp->status);
4938 bfa_trc(diag, rsp->ts_junc);
4939 bfa_trc(diag, rsp->temp);
4940 bfa_trc(diag, rsp->ts_brd);
4941 bfa_trc(diag, rsp->brd_temp);
4943 /* tsensor status is always good bcos we always have junction temp */
4944 diag->tsensor.status = BFA_STATUS_OK;
4945 diag->tsensor.cbfn(diag->tsensor.cbarg, diag->tsensor.status);
4946 diag->tsensor.lock = 0;
4953 diag_ledtest_send(struct bfa_diag_s *diag, struct bfa_diag_ledtest_s *ledtest)
4955 struct bfi_diag_ledtest_req_s *msg;
4957 msg = (struct bfi_diag_ledtest_req_s *)diag->ledtest.mbcmd.msg;
4958 /* build host command */
4959 bfi_h2i_set(msg->mh, BFI_MC_DIAG, BFI_DIAG_H2I_LEDTEST,
4960 bfa_ioc_portid(diag->ioc));
4963 * convert the freq from N blinks per 10 sec to
4964 * crossbow ontime value. We do it here because division is need
4967 ledtest->freq = 500 / ledtest->freq;
4969 if (ledtest->freq == 0)
4972 bfa_trc(diag, ledtest->freq);
4973 /* mcpy(&ledtest_req->req, ledtest, sizeof(bfa_diag_ledtest_t)); */
4974 msg->cmd = (u8) ledtest->cmd;
4975 msg->color = (u8) ledtest->color;
4976 msg->portid = bfa_ioc_portid(diag->ioc);
4977 msg->led = ledtest->led;
4978 msg->freq = cpu_to_be16(ledtest->freq);
4981 bfa_ioc_mbox_queue(diag->ioc, &diag->ledtest.mbcmd);
4985 diag_ledtest_comp(struct bfa_diag_s *diag, struct bfi_diag_ledtest_rsp_s *msg)
4987 bfa_trc(diag, diag->ledtest.lock);
4988 diag->ledtest.lock = BFA_FALSE;
4989 /* no bfa_cb_queue is needed because driver is not waiting */
4996 diag_portbeacon_send(struct bfa_diag_s *diag, bfa_boolean_t beacon, u32 sec)
4998 struct bfi_diag_portbeacon_req_s *msg;
5000 msg = (struct bfi_diag_portbeacon_req_s *)diag->beacon.mbcmd.msg;
5001 /* build host command */
5002 bfi_h2i_set(msg->mh, BFI_MC_DIAG, BFI_DIAG_H2I_PORTBEACON,
5003 bfa_ioc_portid(diag->ioc));
5004 msg->beacon = beacon;
5005 msg->period = cpu_to_be32(sec);
5007 bfa_ioc_mbox_queue(diag->ioc, &diag->beacon.mbcmd);
5011 diag_portbeacon_comp(struct bfa_diag_s *diag)
5013 bfa_trc(diag, diag->beacon.state);
5014 diag->beacon.state = BFA_FALSE;
5015 if (diag->cbfn_beacon)
5016 diag->cbfn_beacon(diag->dev, BFA_FALSE, diag->beacon.link_e2e);
5020 * Diag hmbox handler
5023 bfa_diag_intr(void *diagarg, struct bfi_mbmsg_s *msg)
5025 struct bfa_diag_s *diag = diagarg;
5027 switch (msg->mh.msg_id) {
5028 case BFI_DIAG_I2H_PORTBEACON:
5029 diag_portbeacon_comp(diag);
5031 case BFI_DIAG_I2H_FWPING:
5032 diag_fwping_comp(diag, (struct bfi_diag_fwping_rsp_s *) msg);
5034 case BFI_DIAG_I2H_TEMPSENSOR:
5035 diag_tempsensor_comp(diag, (bfi_diag_ts_rsp_t *) msg);
5037 case BFI_DIAG_I2H_LEDTEST:
5038 diag_ledtest_comp(diag, (struct bfi_diag_ledtest_rsp_s *) msg);
5041 bfa_trc(diag, msg->mh.msg_id);
5049 * @param[in] *diag - diag data struct
5050 * @param[in] *memtest - mem test params input from upper layer,
5051 * @param[in] pattern - mem test pattern
5052 * @param[in] *result - mem test result
5053 * @param[in] cbfn - mem test callback functioin
5054 * @param[in] cbarg - callback functioin arg
5059 bfa_diag_memtest(struct bfa_diag_s *diag, struct bfa_diag_memtest_s *memtest,
5060 u32 pattern, struct bfa_diag_memtest_result *result,
5061 bfa_cb_diag_t cbfn, void *cbarg)
5065 bfa_trc(diag, pattern);
5067 if (!bfa_ioc_adapter_is_disabled(diag->ioc))
5068 return BFA_STATUS_ADAPTER_ENABLED;
5070 /* check to see if there is another destructive diag cmd running */
5072 bfa_trc(diag, diag->block);
5073 return BFA_STATUS_DEVBUSY;
5077 diag->result = result;
5079 diag->cbarg = cbarg;
5081 /* download memtest code and take LPU0 out of reset */
5082 bfa_ioc_boot(diag->ioc, BFI_FWBOOT_TYPE_MEMTEST, BFI_FWBOOT_ENV_OS);
5084 memtest_tov = (bfa_ioc_asic_gen(diag->ioc) == BFI_ASIC_GEN_CT2) ?
5085 CT2_BFA_DIAG_MEMTEST_TOV : BFA_DIAG_MEMTEST_TOV;
5086 bfa_timer_begin(diag->ioc->timer_mod, &diag->timer,
5087 bfa_diag_memtest_done, diag, memtest_tov);
5088 diag->timer_active = 1;
5089 return BFA_STATUS_OK;
5093 * DIAG firmware ping command
5095 * @param[in] *diag - diag data struct
5096 * @param[in] cnt - dma loop count for testing PCIE
5097 * @param[in] data - data pattern to pass in fw
5098 * @param[in] *result - pt to bfa_diag_fwping_result_t data struct
5099 * @param[in] cbfn - callback function
5100 * @param[in] *cbarg - callback functioin arg
5105 bfa_diag_fwping(struct bfa_diag_s *diag, u32 cnt, u32 data,
5106 struct bfa_diag_results_fwping *result, bfa_cb_diag_t cbfn,
5110 bfa_trc(diag, data);
5112 if (!bfa_ioc_is_operational(diag->ioc))
5113 return BFA_STATUS_IOC_NON_OP;
5115 if (bfa_asic_id_ct2(bfa_ioc_devid((diag->ioc))) &&
5116 ((diag->ioc)->clscode == BFI_PCIFN_CLASS_ETH))
5117 return BFA_STATUS_CMD_NOTSUPP;
5119 /* check to see if there is another destructive diag cmd running */
5120 if (diag->block || diag->fwping.lock) {
5121 bfa_trc(diag, diag->block);
5122 bfa_trc(diag, diag->fwping.lock);
5123 return BFA_STATUS_DEVBUSY;
5126 /* Initialization */
5127 diag->fwping.lock = 1;
5128 diag->fwping.cbfn = cbfn;
5129 diag->fwping.cbarg = cbarg;
5130 diag->fwping.result = result;
5131 diag->fwping.data = data;
5132 diag->fwping.count = cnt;
5134 /* Init test results */
5135 diag->fwping.result->data = 0;
5136 diag->fwping.result->status = BFA_STATUS_OK;
5138 /* kick off the first ping */
5139 diag_fwping_send(diag);
5140 return BFA_STATUS_OK;
5144 * Read Temperature Sensor
5146 * @param[in] *diag - diag data struct
5147 * @param[in] *result - pt to bfa_diag_temp_t data struct
5148 * @param[in] cbfn - callback function
5149 * @param[in] *cbarg - callback functioin arg
5154 bfa_diag_tsensor_query(struct bfa_diag_s *diag,
5155 struct bfa_diag_results_tempsensor_s *result,
5156 bfa_cb_diag_t cbfn, void *cbarg)
5158 /* check to see if there is a destructive diag cmd running */
5159 if (diag->block || diag->tsensor.lock) {
5160 bfa_trc(diag, diag->block);
5161 bfa_trc(diag, diag->tsensor.lock);
5162 return BFA_STATUS_DEVBUSY;
5165 if (!bfa_ioc_is_operational(diag->ioc))
5166 return BFA_STATUS_IOC_NON_OP;
5168 /* Init diag mod params */
5169 diag->tsensor.lock = 1;
5170 diag->tsensor.temp = result;
5171 diag->tsensor.cbfn = cbfn;
5172 diag->tsensor.cbarg = cbarg;
5173 diag->tsensor.status = BFA_STATUS_OK;
5175 /* Send msg to fw */
5176 diag_tempsensor_send(diag);
5178 return BFA_STATUS_OK;
5184 * @param[in] *diag - diag data struct
5185 * @param[in] *ledtest - pt to ledtest data structure
5190 bfa_diag_ledtest(struct bfa_diag_s *diag, struct bfa_diag_ledtest_s *ledtest)
5192 bfa_trc(diag, ledtest->cmd);
5194 if (!bfa_ioc_is_operational(diag->ioc))
5195 return BFA_STATUS_IOC_NON_OP;
5197 if (diag->beacon.state)
5198 return BFA_STATUS_BEACON_ON;
5200 if (diag->ledtest.lock)
5201 return BFA_STATUS_LEDTEST_OP;
5203 /* Send msg to fw */
5204 diag->ledtest.lock = BFA_TRUE;
5205 diag_ledtest_send(diag, ledtest);
5207 return BFA_STATUS_OK;
5211 * Port beaconing command
5213 * @param[in] *diag - diag data struct
5214 * @param[in] beacon - port beaconing 1:ON 0:OFF
5215 * @param[in] link_e2e_beacon - link beaconing 1:ON 0:OFF
5216 * @param[in] sec - beaconing duration in seconds
5221 bfa_diag_beacon_port(struct bfa_diag_s *diag, bfa_boolean_t beacon,
5222 bfa_boolean_t link_e2e_beacon, uint32_t sec)
5224 bfa_trc(diag, beacon);
5225 bfa_trc(diag, link_e2e_beacon);
5228 if (!bfa_ioc_is_operational(diag->ioc))
5229 return BFA_STATUS_IOC_NON_OP;
5231 if (diag->ledtest.lock)
5232 return BFA_STATUS_LEDTEST_OP;
5234 if (diag->beacon.state && beacon) /* beacon alread on */
5235 return BFA_STATUS_BEACON_ON;
5237 diag->beacon.state = beacon;
5238 diag->beacon.link_e2e = link_e2e_beacon;
5239 if (diag->cbfn_beacon)
5240 diag->cbfn_beacon(diag->dev, beacon, link_e2e_beacon);
5242 /* Send msg to fw */
5243 diag_portbeacon_send(diag, beacon, sec);
5245 return BFA_STATUS_OK;
5249 * Return DMA memory needed by diag module.
5252 bfa_diag_meminfo(void)
5254 return BFA_ROUNDUP(BFI_DIAG_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
5258 * Attach virtual and physical memory for Diag.
5261 bfa_diag_attach(struct bfa_diag_s *diag, struct bfa_ioc_s *ioc, void *dev,
5262 bfa_cb_diag_beacon_t cbfn_beacon, struct bfa_trc_mod_s *trcmod)
5266 diag->trcmod = trcmod;
5271 diag->result = NULL;
5272 diag->cbfn_beacon = cbfn_beacon;
5274 bfa_ioc_mbox_regisr(diag->ioc, BFI_MC_DIAG, bfa_diag_intr, diag);
5275 bfa_q_qe_init(&diag->ioc_notify);
5276 bfa_ioc_notify_init(&diag->ioc_notify, bfa_diag_notify, diag);
5277 list_add_tail(&diag->ioc_notify.qe, &diag->ioc->notify_q);
5281 bfa_diag_memclaim(struct bfa_diag_s *diag, u8 *dm_kva, u64 dm_pa)
5283 diag->fwping.dbuf_kva = dm_kva;
5284 diag->fwping.dbuf_pa = dm_pa;
5285 memset(diag->fwping.dbuf_kva, 0, BFI_DIAG_DMA_BUF_SZ);
5289 * PHY module specific
5291 #define BFA_PHY_DMA_BUF_SZ 0x02000 /* 8k dma buffer */
5292 #define BFA_PHY_LOCK_STATUS 0x018878 /* phy semaphore status reg */
5295 bfa_phy_ntoh32(u32 *obuf, u32 *ibuf, int sz)
5299 for (i = 0; i < m; i++)
5300 obuf[i] = be32_to_cpu(ibuf[i]);
5303 static bfa_boolean_t
5304 bfa_phy_present(struct bfa_phy_s *phy)
5306 return (phy->ioc->attr->card_type == BFA_MFG_TYPE_LIGHTNING);
5310 bfa_phy_notify(void *cbarg, enum bfa_ioc_event_e event)
5312 struct bfa_phy_s *phy = cbarg;
5314 bfa_trc(phy, event);
5317 case BFA_IOC_E_DISABLED:
5318 case BFA_IOC_E_FAILED:
5320 phy->status = BFA_STATUS_IOC_FAILURE;
5321 phy->cbfn(phy->cbarg, phy->status);
5332 * Send phy attribute query request.
5334 * @param[in] cbarg - callback argument
5337 bfa_phy_query_send(void *cbarg)
5339 struct bfa_phy_s *phy = cbarg;
5340 struct bfi_phy_query_req_s *msg =
5341 (struct bfi_phy_query_req_s *) phy->mb.msg;
5343 msg->instance = phy->instance;
5344 bfi_h2i_set(msg->mh, BFI_MC_PHY, BFI_PHY_H2I_QUERY_REQ,
5345 bfa_ioc_portid(phy->ioc));
5346 bfa_alen_set(&msg->alen, sizeof(struct bfa_phy_attr_s), phy->dbuf_pa);
5347 bfa_ioc_mbox_queue(phy->ioc, &phy->mb);
5351 * Send phy write request.
5353 * @param[in] cbarg - callback argument
5356 bfa_phy_write_send(void *cbarg)
5358 struct bfa_phy_s *phy = cbarg;
5359 struct bfi_phy_write_req_s *msg =
5360 (struct bfi_phy_write_req_s *) phy->mb.msg;
5365 msg->instance = phy->instance;
5366 msg->offset = cpu_to_be32(phy->addr_off + phy->offset);
5367 len = (phy->residue < BFA_PHY_DMA_BUF_SZ) ?
5368 phy->residue : BFA_PHY_DMA_BUF_SZ;
5369 msg->length = cpu_to_be32(len);
5371 /* indicate if it's the last msg of the whole write operation */
5372 msg->last = (len == phy->residue) ? 1 : 0;
5374 bfi_h2i_set(msg->mh, BFI_MC_PHY, BFI_PHY_H2I_WRITE_REQ,
5375 bfa_ioc_portid(phy->ioc));
5376 bfa_alen_set(&msg->alen, len, phy->dbuf_pa);
5378 buf = (u16 *) (phy->ubuf + phy->offset);
5379 dbuf = (u16 *)phy->dbuf_kva;
5381 for (i = 0; i < sz; i++)
5382 buf[i] = cpu_to_be16(dbuf[i]);
5384 bfa_ioc_mbox_queue(phy->ioc, &phy->mb);
5386 phy->residue -= len;
5391 * Send phy read request.
5393 * @param[in] cbarg - callback argument
5396 bfa_phy_read_send(void *cbarg)
5398 struct bfa_phy_s *phy = cbarg;
5399 struct bfi_phy_read_req_s *msg =
5400 (struct bfi_phy_read_req_s *) phy->mb.msg;
5403 msg->instance = phy->instance;
5404 msg->offset = cpu_to_be32(phy->addr_off + phy->offset);
5405 len = (phy->residue < BFA_PHY_DMA_BUF_SZ) ?
5406 phy->residue : BFA_PHY_DMA_BUF_SZ;
5407 msg->length = cpu_to_be32(len);
5408 bfi_h2i_set(msg->mh, BFI_MC_PHY, BFI_PHY_H2I_READ_REQ,
5409 bfa_ioc_portid(phy->ioc));
5410 bfa_alen_set(&msg->alen, len, phy->dbuf_pa);
5411 bfa_ioc_mbox_queue(phy->ioc, &phy->mb);
5415 * Send phy stats request.
5417 * @param[in] cbarg - callback argument
5420 bfa_phy_stats_send(void *cbarg)
5422 struct bfa_phy_s *phy = cbarg;
5423 struct bfi_phy_stats_req_s *msg =
5424 (struct bfi_phy_stats_req_s *) phy->mb.msg;
5426 msg->instance = phy->instance;
5427 bfi_h2i_set(msg->mh, BFI_MC_PHY, BFI_PHY_H2I_STATS_REQ,
5428 bfa_ioc_portid(phy->ioc));
5429 bfa_alen_set(&msg->alen, sizeof(struct bfa_phy_stats_s), phy->dbuf_pa);
5430 bfa_ioc_mbox_queue(phy->ioc, &phy->mb);
5434 * Flash memory info API.
5436 * @param[in] mincfg - minimal cfg variable
5439 bfa_phy_meminfo(bfa_boolean_t mincfg)
5441 /* min driver doesn't need phy */
5445 return BFA_ROUNDUP(BFA_PHY_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
5451 * @param[in] phy - phy structure
5452 * @param[in] ioc - ioc structure
5453 * @param[in] dev - device structure
5454 * @param[in] trcmod - trace module
5455 * @param[in] logmod - log module
5458 bfa_phy_attach(struct bfa_phy_s *phy, struct bfa_ioc_s *ioc, void *dev,
5459 struct bfa_trc_mod_s *trcmod, bfa_boolean_t mincfg)
5462 phy->trcmod = trcmod;
5467 bfa_ioc_mbox_regisr(phy->ioc, BFI_MC_PHY, bfa_phy_intr, phy);
5468 bfa_q_qe_init(&phy->ioc_notify);
5469 bfa_ioc_notify_init(&phy->ioc_notify, bfa_phy_notify, phy);
5470 list_add_tail(&phy->ioc_notify.qe, &phy->ioc->notify_q);
5472 /* min driver doesn't need phy */
5474 phy->dbuf_kva = NULL;
5480 * Claim memory for phy
5482 * @param[in] phy - phy structure
5483 * @param[in] dm_kva - pointer to virtual memory address
5484 * @param[in] dm_pa - physical memory address
5485 * @param[in] mincfg - minimal cfg variable
5488 bfa_phy_memclaim(struct bfa_phy_s *phy, u8 *dm_kva, u64 dm_pa,
5489 bfa_boolean_t mincfg)
5494 phy->dbuf_kva = dm_kva;
5495 phy->dbuf_pa = dm_pa;
5496 memset(phy->dbuf_kva, 0, BFA_PHY_DMA_BUF_SZ);
5497 dm_kva += BFA_ROUNDUP(BFA_PHY_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
5498 dm_pa += BFA_ROUNDUP(BFA_PHY_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
5502 bfa_phy_busy(struct bfa_ioc_s *ioc)
5506 rb = bfa_ioc_bar0(ioc);
5507 return readl(rb + BFA_PHY_LOCK_STATUS);
5511 * Get phy attribute.
5513 * @param[in] phy - phy structure
5514 * @param[in] attr - phy attribute structure
5515 * @param[in] cbfn - callback function
5516 * @param[in] cbarg - callback argument
5521 bfa_phy_get_attr(struct bfa_phy_s *phy, u8 instance,
5522 struct bfa_phy_attr_s *attr, bfa_cb_phy_t cbfn, void *cbarg)
5524 bfa_trc(phy, BFI_PHY_H2I_QUERY_REQ);
5525 bfa_trc(phy, instance);
5527 if (!bfa_phy_present(phy))
5528 return BFA_STATUS_PHY_NOT_PRESENT;
5530 if (!bfa_ioc_is_operational(phy->ioc))
5531 return BFA_STATUS_IOC_NON_OP;
5533 if (phy->op_busy || bfa_phy_busy(phy->ioc)) {
5534 bfa_trc(phy, phy->op_busy);
5535 return BFA_STATUS_DEVBUSY;
5541 phy->instance = instance;
5542 phy->ubuf = (uint8_t *) attr;
5543 bfa_phy_query_send(phy);
5545 return BFA_STATUS_OK;
5551 * @param[in] phy - phy structure
5552 * @param[in] instance - phy image instance
5553 * @param[in] stats - pointer to phy stats
5554 * @param[in] cbfn - callback function
5555 * @param[in] cbarg - callback argument
5560 bfa_phy_get_stats(struct bfa_phy_s *phy, u8 instance,
5561 struct bfa_phy_stats_s *stats,
5562 bfa_cb_phy_t cbfn, void *cbarg)
5564 bfa_trc(phy, BFI_PHY_H2I_STATS_REQ);
5565 bfa_trc(phy, instance);
5567 if (!bfa_phy_present(phy))
5568 return BFA_STATUS_PHY_NOT_PRESENT;
5570 if (!bfa_ioc_is_operational(phy->ioc))
5571 return BFA_STATUS_IOC_NON_OP;
5573 if (phy->op_busy || bfa_phy_busy(phy->ioc)) {
5574 bfa_trc(phy, phy->op_busy);
5575 return BFA_STATUS_DEVBUSY;
5581 phy->instance = instance;
5582 phy->ubuf = (u8 *) stats;
5583 bfa_phy_stats_send(phy);
5585 return BFA_STATUS_OK;
5591 * @param[in] phy - phy structure
5592 * @param[in] instance - phy image instance
5593 * @param[in] buf - update data buffer
5594 * @param[in] len - data buffer length
5595 * @param[in] offset - offset relative to starting address
5596 * @param[in] cbfn - callback function
5597 * @param[in] cbarg - callback argument
5602 bfa_phy_update(struct bfa_phy_s *phy, u8 instance,
5603 void *buf, u32 len, u32 offset,
5604 bfa_cb_phy_t cbfn, void *cbarg)
5606 bfa_trc(phy, BFI_PHY_H2I_WRITE_REQ);
5607 bfa_trc(phy, instance);
5609 bfa_trc(phy, offset);
5611 if (!bfa_phy_present(phy))
5612 return BFA_STATUS_PHY_NOT_PRESENT;
5614 if (!bfa_ioc_is_operational(phy->ioc))
5615 return BFA_STATUS_IOC_NON_OP;
5617 /* 'len' must be in word (4-byte) boundary */
5618 if (!len || (len & 0x03))
5619 return BFA_STATUS_FAILED;
5621 if (phy->op_busy || bfa_phy_busy(phy->ioc)) {
5622 bfa_trc(phy, phy->op_busy);
5623 return BFA_STATUS_DEVBUSY;
5629 phy->instance = instance;
5632 phy->addr_off = offset;
5635 bfa_phy_write_send(phy);
5636 return BFA_STATUS_OK;
5642 * @param[in] phy - phy structure
5643 * @param[in] instance - phy image instance
5644 * @param[in] buf - read data buffer
5645 * @param[in] len - data buffer length
5646 * @param[in] offset - offset relative to starting address
5647 * @param[in] cbfn - callback function
5648 * @param[in] cbarg - callback argument
5653 bfa_phy_read(struct bfa_phy_s *phy, u8 instance,
5654 void *buf, u32 len, u32 offset,
5655 bfa_cb_phy_t cbfn, void *cbarg)
5657 bfa_trc(phy, BFI_PHY_H2I_READ_REQ);
5658 bfa_trc(phy, instance);
5660 bfa_trc(phy, offset);
5662 if (!bfa_phy_present(phy))
5663 return BFA_STATUS_PHY_NOT_PRESENT;
5665 if (!bfa_ioc_is_operational(phy->ioc))
5666 return BFA_STATUS_IOC_NON_OP;
5668 /* 'len' must be in word (4-byte) boundary */
5669 if (!len || (len & 0x03))
5670 return BFA_STATUS_FAILED;
5672 if (phy->op_busy || bfa_phy_busy(phy->ioc)) {
5673 bfa_trc(phy, phy->op_busy);
5674 return BFA_STATUS_DEVBUSY;
5680 phy->instance = instance;
5683 phy->addr_off = offset;
5685 bfa_phy_read_send(phy);
5687 return BFA_STATUS_OK;
5691 * Process phy response messages upon receiving interrupts.
5693 * @param[in] phyarg - phy structure
5694 * @param[in] msg - message structure
5697 bfa_phy_intr(void *phyarg, struct bfi_mbmsg_s *msg)
5699 struct bfa_phy_s *phy = phyarg;
5703 struct bfi_phy_query_rsp_s *query;
5704 struct bfi_phy_stats_rsp_s *stats;
5705 struct bfi_phy_write_rsp_s *write;
5706 struct bfi_phy_read_rsp_s *read;
5707 struct bfi_mbmsg_s *msg;
5711 bfa_trc(phy, msg->mh.msg_id);
5713 if (!phy->op_busy) {
5714 /* receiving response after ioc failure */
5715 bfa_trc(phy, 0x9999);
5719 switch (msg->mh.msg_id) {
5720 case BFI_PHY_I2H_QUERY_RSP:
5721 status = be32_to_cpu(m.query->status);
5722 bfa_trc(phy, status);
5724 if (status == BFA_STATUS_OK) {
5725 struct bfa_phy_attr_s *attr =
5726 (struct bfa_phy_attr_s *) phy->ubuf;
5727 bfa_phy_ntoh32((u32 *)attr, (u32 *)phy->dbuf_kva,
5728 sizeof(struct bfa_phy_attr_s));
5729 bfa_trc(phy, attr->status);
5730 bfa_trc(phy, attr->length);
5733 phy->status = status;
5736 phy->cbfn(phy->cbarg, phy->status);
5738 case BFI_PHY_I2H_STATS_RSP:
5739 status = be32_to_cpu(m.stats->status);
5740 bfa_trc(phy, status);
5742 if (status == BFA_STATUS_OK) {
5743 struct bfa_phy_stats_s *stats =
5744 (struct bfa_phy_stats_s *) phy->ubuf;
5745 bfa_phy_ntoh32((u32 *)stats, (u32 *)phy->dbuf_kva,
5746 sizeof(struct bfa_phy_stats_s));
5747 bfa_trc(phy, stats->status);
5750 phy->status = status;
5753 phy->cbfn(phy->cbarg, phy->status);
5755 case BFI_PHY_I2H_WRITE_RSP:
5756 status = be32_to_cpu(m.write->status);
5757 bfa_trc(phy, status);
5759 if (status != BFA_STATUS_OK || phy->residue == 0) {
5760 phy->status = status;
5763 phy->cbfn(phy->cbarg, phy->status);
5765 bfa_trc(phy, phy->offset);
5766 bfa_phy_write_send(phy);
5769 case BFI_PHY_I2H_READ_RSP:
5770 status = be32_to_cpu(m.read->status);
5771 bfa_trc(phy, status);
5773 if (status != BFA_STATUS_OK) {
5774 phy->status = status;
5777 phy->cbfn(phy->cbarg, phy->status);
5779 u32 len = be32_to_cpu(m.read->length);
5780 u16 *buf = (u16 *)(phy->ubuf + phy->offset);
5781 u16 *dbuf = (u16 *)phy->dbuf_kva;
5782 int i, sz = len >> 1;
5784 bfa_trc(phy, phy->offset);
5787 for (i = 0; i < sz; i++)
5788 buf[i] = be16_to_cpu(dbuf[i]);
5790 phy->residue -= len;
5793 if (phy->residue == 0) {
5794 phy->status = status;
5797 phy->cbfn(phy->cbarg, phy->status);
5799 bfa_phy_read_send(phy);
5807 /* forward declaration of DCONF state machine */
5808 static void bfa_dconf_sm_uninit(struct bfa_dconf_mod_s *dconf,
5809 enum bfa_dconf_event event);
5810 static void bfa_dconf_sm_flash_read(struct bfa_dconf_mod_s *dconf,
5811 enum bfa_dconf_event event);
5812 static void bfa_dconf_sm_ready(struct bfa_dconf_mod_s *dconf,
5813 enum bfa_dconf_event event);
5814 static void bfa_dconf_sm_dirty(struct bfa_dconf_mod_s *dconf,
5815 enum bfa_dconf_event event);
5816 static void bfa_dconf_sm_sync(struct bfa_dconf_mod_s *dconf,
5817 enum bfa_dconf_event event);
5818 static void bfa_dconf_sm_final_sync(struct bfa_dconf_mod_s *dconf,
5819 enum bfa_dconf_event event);
5820 static void bfa_dconf_sm_iocdown_dirty(struct bfa_dconf_mod_s *dconf,
5821 enum bfa_dconf_event event);
5823 static void bfa_dconf_cbfn(void *dconf, bfa_status_t status);
5824 static void bfa_dconf_timer(void *cbarg);
5825 static bfa_status_t bfa_dconf_flash_write(struct bfa_dconf_mod_s *dconf);
5826 static void bfa_dconf_init_cb(void *arg, bfa_status_t status);
5829 * Beginning state of dconf module. Waiting for an event to start.
5832 bfa_dconf_sm_uninit(struct bfa_dconf_mod_s *dconf, enum bfa_dconf_event event)
5834 bfa_status_t bfa_status;
5835 bfa_trc(dconf->bfa, event);
5838 case BFA_DCONF_SM_INIT:
5839 if (dconf->min_cfg) {
5840 bfa_trc(dconf->bfa, dconf->min_cfg);
5841 bfa_fsm_send_event(&dconf->bfa->iocfc,
5842 IOCFC_E_DCONF_DONE);
5845 bfa_sm_set_state(dconf, bfa_dconf_sm_flash_read);
5846 bfa_timer_start(dconf->bfa, &dconf->timer,
5847 bfa_dconf_timer, dconf, 2 * BFA_DCONF_UPDATE_TOV);
5848 bfa_status = bfa_flash_read_part(BFA_FLASH(dconf->bfa),
5849 BFA_FLASH_PART_DRV, dconf->instance,
5851 sizeof(struct bfa_dconf_s), 0,
5852 bfa_dconf_init_cb, dconf->bfa);
5853 if (bfa_status != BFA_STATUS_OK) {
5854 bfa_timer_stop(&dconf->timer);
5855 bfa_dconf_init_cb(dconf->bfa, BFA_STATUS_FAILED);
5856 bfa_sm_set_state(dconf, bfa_dconf_sm_uninit);
5860 case BFA_DCONF_SM_EXIT:
5861 bfa_fsm_send_event(&dconf->bfa->iocfc, IOCFC_E_DCONF_DONE);
5863 case BFA_DCONF_SM_IOCDISABLE:
5864 case BFA_DCONF_SM_WR:
5865 case BFA_DCONF_SM_FLASH_COMP:
5868 bfa_sm_fault(dconf->bfa, event);
5873 * Read flash for dconf entries and make a call back to the driver once done.
5876 bfa_dconf_sm_flash_read(struct bfa_dconf_mod_s *dconf,
5877 enum bfa_dconf_event event)
5879 bfa_trc(dconf->bfa, event);
5882 case BFA_DCONF_SM_FLASH_COMP:
5883 bfa_timer_stop(&dconf->timer);
5884 bfa_sm_set_state(dconf, bfa_dconf_sm_ready);
5886 case BFA_DCONF_SM_TIMEOUT:
5887 bfa_sm_set_state(dconf, bfa_dconf_sm_ready);
5888 bfa_ioc_suspend(&dconf->bfa->ioc);
5890 case BFA_DCONF_SM_EXIT:
5891 bfa_timer_stop(&dconf->timer);
5892 bfa_sm_set_state(dconf, bfa_dconf_sm_uninit);
5893 bfa_fsm_send_event(&dconf->bfa->iocfc, IOCFC_E_DCONF_DONE);
5895 case BFA_DCONF_SM_IOCDISABLE:
5896 bfa_timer_stop(&dconf->timer);
5897 bfa_sm_set_state(dconf, bfa_dconf_sm_uninit);
5900 bfa_sm_fault(dconf->bfa, event);
5905 * DCONF Module is in ready state. Has completed the initialization.
5908 bfa_dconf_sm_ready(struct bfa_dconf_mod_s *dconf, enum bfa_dconf_event event)
5910 bfa_trc(dconf->bfa, event);
5913 case BFA_DCONF_SM_WR:
5914 bfa_timer_start(dconf->bfa, &dconf->timer,
5915 bfa_dconf_timer, dconf, BFA_DCONF_UPDATE_TOV);
5916 bfa_sm_set_state(dconf, bfa_dconf_sm_dirty);
5918 case BFA_DCONF_SM_EXIT:
5919 bfa_sm_set_state(dconf, bfa_dconf_sm_uninit);
5920 bfa_fsm_send_event(&dconf->bfa->iocfc, IOCFC_E_DCONF_DONE);
5922 case BFA_DCONF_SM_INIT:
5923 case BFA_DCONF_SM_IOCDISABLE:
5926 bfa_sm_fault(dconf->bfa, event);
5931 * entries are dirty, write back to the flash.
5935 bfa_dconf_sm_dirty(struct bfa_dconf_mod_s *dconf, enum bfa_dconf_event event)
5937 bfa_trc(dconf->bfa, event);
5940 case BFA_DCONF_SM_TIMEOUT:
5941 bfa_sm_set_state(dconf, bfa_dconf_sm_sync);
5942 bfa_dconf_flash_write(dconf);
5944 case BFA_DCONF_SM_WR:
5945 bfa_timer_stop(&dconf->timer);
5946 bfa_timer_start(dconf->bfa, &dconf->timer,
5947 bfa_dconf_timer, dconf, BFA_DCONF_UPDATE_TOV);
5949 case BFA_DCONF_SM_EXIT:
5950 bfa_timer_stop(&dconf->timer);
5951 bfa_timer_start(dconf->bfa, &dconf->timer,
5952 bfa_dconf_timer, dconf, BFA_DCONF_UPDATE_TOV);
5953 bfa_sm_set_state(dconf, bfa_dconf_sm_final_sync);
5954 bfa_dconf_flash_write(dconf);
5956 case BFA_DCONF_SM_FLASH_COMP:
5958 case BFA_DCONF_SM_IOCDISABLE:
5959 bfa_timer_stop(&dconf->timer);
5960 bfa_sm_set_state(dconf, bfa_dconf_sm_iocdown_dirty);
5963 bfa_sm_fault(dconf->bfa, event);
5968 * Sync the dconf entries to the flash.
5971 bfa_dconf_sm_final_sync(struct bfa_dconf_mod_s *dconf,
5972 enum bfa_dconf_event event)
5974 bfa_trc(dconf->bfa, event);
5977 case BFA_DCONF_SM_IOCDISABLE:
5978 case BFA_DCONF_SM_FLASH_COMP:
5979 bfa_timer_stop(&dconf->timer);
5981 case BFA_DCONF_SM_TIMEOUT:
5982 bfa_sm_set_state(dconf, bfa_dconf_sm_uninit);
5983 bfa_fsm_send_event(&dconf->bfa->iocfc, IOCFC_E_DCONF_DONE);
5986 bfa_sm_fault(dconf->bfa, event);
5991 bfa_dconf_sm_sync(struct bfa_dconf_mod_s *dconf, enum bfa_dconf_event event)
5993 bfa_trc(dconf->bfa, event);
5996 case BFA_DCONF_SM_FLASH_COMP:
5997 bfa_sm_set_state(dconf, bfa_dconf_sm_ready);
5999 case BFA_DCONF_SM_WR:
6000 bfa_timer_start(dconf->bfa, &dconf->timer,
6001 bfa_dconf_timer, dconf, BFA_DCONF_UPDATE_TOV);
6002 bfa_sm_set_state(dconf, bfa_dconf_sm_dirty);
6004 case BFA_DCONF_SM_EXIT:
6005 bfa_timer_start(dconf->bfa, &dconf->timer,
6006 bfa_dconf_timer, dconf, BFA_DCONF_UPDATE_TOV);
6007 bfa_sm_set_state(dconf, bfa_dconf_sm_final_sync);
6009 case BFA_DCONF_SM_IOCDISABLE:
6010 bfa_sm_set_state(dconf, bfa_dconf_sm_iocdown_dirty);
6013 bfa_sm_fault(dconf->bfa, event);
6018 bfa_dconf_sm_iocdown_dirty(struct bfa_dconf_mod_s *dconf,
6019 enum bfa_dconf_event event)
6021 bfa_trc(dconf->bfa, event);
6024 case BFA_DCONF_SM_INIT:
6025 bfa_timer_start(dconf->bfa, &dconf->timer,
6026 bfa_dconf_timer, dconf, BFA_DCONF_UPDATE_TOV);
6027 bfa_sm_set_state(dconf, bfa_dconf_sm_dirty);
6029 case BFA_DCONF_SM_EXIT:
6030 bfa_sm_set_state(dconf, bfa_dconf_sm_uninit);
6031 bfa_fsm_send_event(&dconf->bfa->iocfc, IOCFC_E_DCONF_DONE);
6033 case BFA_DCONF_SM_IOCDISABLE:
6036 bfa_sm_fault(dconf->bfa, event);
6041 * Compute and return memory needed by DRV_CFG module.
6044 bfa_dconf_meminfo(struct bfa_iocfc_cfg_s *cfg, struct bfa_meminfo_s *meminfo,
6047 struct bfa_mem_kva_s *dconf_kva = BFA_MEM_DCONF_KVA(bfa);
6049 if (cfg->drvcfg.min_cfg)
6050 bfa_mem_kva_setup(meminfo, dconf_kva,
6051 sizeof(struct bfa_dconf_hdr_s));
6053 bfa_mem_kva_setup(meminfo, dconf_kva,
6054 sizeof(struct bfa_dconf_s));
6058 bfa_dconf_attach(struct bfa_s *bfa, void *bfad, struct bfa_iocfc_cfg_s *cfg)
6060 struct bfa_dconf_mod_s *dconf = BFA_DCONF_MOD(bfa);
6064 dconf->instance = bfa->ioc.port_id;
6065 bfa_trc(bfa, dconf->instance);
6067 dconf->dconf = (struct bfa_dconf_s *) bfa_mem_kva_curp(dconf);
6068 if (cfg->drvcfg.min_cfg) {
6069 bfa_mem_kva_curp(dconf) += sizeof(struct bfa_dconf_hdr_s);
6070 dconf->min_cfg = BFA_TRUE;
6072 dconf->min_cfg = BFA_FALSE;
6073 bfa_mem_kva_curp(dconf) += sizeof(struct bfa_dconf_s);
6076 bfa_dconf_read_data_valid(bfa) = BFA_FALSE;
6077 bfa_sm_set_state(dconf, bfa_dconf_sm_uninit);
6081 bfa_dconf_init_cb(void *arg, bfa_status_t status)
6083 struct bfa_s *bfa = arg;
6084 struct bfa_dconf_mod_s *dconf = BFA_DCONF_MOD(bfa);
6086 if (status == BFA_STATUS_OK) {
6087 bfa_dconf_read_data_valid(bfa) = BFA_TRUE;
6088 if (dconf->dconf->hdr.signature != BFI_DCONF_SIGNATURE)
6089 dconf->dconf->hdr.signature = BFI_DCONF_SIGNATURE;
6090 if (dconf->dconf->hdr.version != BFI_DCONF_VERSION)
6091 dconf->dconf->hdr.version = BFI_DCONF_VERSION;
6093 bfa_sm_send_event(dconf, BFA_DCONF_SM_FLASH_COMP);
6094 bfa_fsm_send_event(&bfa->iocfc, IOCFC_E_DCONF_DONE);
6098 bfa_dconf_modinit(struct bfa_s *bfa)
6100 struct bfa_dconf_mod_s *dconf = BFA_DCONF_MOD(bfa);
6101 bfa_sm_send_event(dconf, BFA_DCONF_SM_INIT);
6104 static void bfa_dconf_timer(void *cbarg)
6106 struct bfa_dconf_mod_s *dconf = cbarg;
6107 bfa_sm_send_event(dconf, BFA_DCONF_SM_TIMEOUT);
6111 bfa_dconf_iocdisable(struct bfa_s *bfa)
6113 struct bfa_dconf_mod_s *dconf = BFA_DCONF_MOD(bfa);
6114 bfa_sm_send_event(dconf, BFA_DCONF_SM_IOCDISABLE);
6118 bfa_dconf_flash_write(struct bfa_dconf_mod_s *dconf)
6120 bfa_status_t bfa_status;
6121 bfa_trc(dconf->bfa, 0);
6123 bfa_status = bfa_flash_update_part(BFA_FLASH(dconf->bfa),
6124 BFA_FLASH_PART_DRV, dconf->instance,
6125 dconf->dconf, sizeof(struct bfa_dconf_s), 0,
6126 bfa_dconf_cbfn, dconf);
6127 if (bfa_status != BFA_STATUS_OK)
6128 WARN_ON(bfa_status);
6129 bfa_trc(dconf->bfa, bfa_status);
6135 bfa_dconf_update(struct bfa_s *bfa)
6137 struct bfa_dconf_mod_s *dconf = BFA_DCONF_MOD(bfa);
6138 bfa_trc(dconf->bfa, 0);
6139 if (bfa_sm_cmp_state(dconf, bfa_dconf_sm_iocdown_dirty))
6140 return BFA_STATUS_FAILED;
6142 if (dconf->min_cfg) {
6143 bfa_trc(dconf->bfa, dconf->min_cfg);
6144 return BFA_STATUS_FAILED;
6147 bfa_sm_send_event(dconf, BFA_DCONF_SM_WR);
6148 return BFA_STATUS_OK;
6152 bfa_dconf_cbfn(void *arg, bfa_status_t status)
6154 struct bfa_dconf_mod_s *dconf = arg;
6156 bfa_sm_send_event(dconf, BFA_DCONF_SM_FLASH_COMP);
6160 bfa_dconf_modexit(struct bfa_s *bfa)
6162 struct bfa_dconf_mod_s *dconf = BFA_DCONF_MOD(bfa);
6163 bfa_sm_send_event(dconf, BFA_DCONF_SM_EXIT);
6167 * FRU specific functions
6170 #define BFA_FRU_DMA_BUF_SZ 0x02000 /* 8k dma buffer */
6171 #define BFA_FRU_CHINOOK_MAX_SIZE 0x10000
6172 #define BFA_FRU_LIGHTNING_MAX_SIZE 0x200
6175 bfa_fru_notify(void *cbarg, enum bfa_ioc_event_e event)
6177 struct bfa_fru_s *fru = cbarg;
6179 bfa_trc(fru, event);
6182 case BFA_IOC_E_DISABLED:
6183 case BFA_IOC_E_FAILED:
6185 fru->status = BFA_STATUS_IOC_FAILURE;
6186 fru->cbfn(fru->cbarg, fru->status);
6197 * Send fru write request.
6199 * @param[in] cbarg - callback argument
6202 bfa_fru_write_send(void *cbarg, enum bfi_fru_h2i_msgs msg_type)
6204 struct bfa_fru_s *fru = cbarg;
6205 struct bfi_fru_write_req_s *msg =
6206 (struct bfi_fru_write_req_s *) fru->mb.msg;
6209 msg->offset = cpu_to_be32(fru->addr_off + fru->offset);
6210 len = (fru->residue < BFA_FRU_DMA_BUF_SZ) ?
6211 fru->residue : BFA_FRU_DMA_BUF_SZ;
6212 msg->length = cpu_to_be32(len);
6215 * indicate if it's the last msg of the whole write operation
6217 msg->last = (len == fru->residue) ? 1 : 0;
6219 msg->trfr_cmpl = (len == fru->residue) ? fru->trfr_cmpl : 0;
6220 bfi_h2i_set(msg->mh, BFI_MC_FRU, msg_type, bfa_ioc_portid(fru->ioc));
6221 bfa_alen_set(&msg->alen, len, fru->dbuf_pa);
6223 memcpy(fru->dbuf_kva, fru->ubuf + fru->offset, len);
6224 bfa_ioc_mbox_queue(fru->ioc, &fru->mb);
6226 fru->residue -= len;
6231 * Send fru read request.
6233 * @param[in] cbarg - callback argument
6236 bfa_fru_read_send(void *cbarg, enum bfi_fru_h2i_msgs msg_type)
6238 struct bfa_fru_s *fru = cbarg;
6239 struct bfi_fru_read_req_s *msg =
6240 (struct bfi_fru_read_req_s *) fru->mb.msg;
6243 msg->offset = cpu_to_be32(fru->addr_off + fru->offset);
6244 len = (fru->residue < BFA_FRU_DMA_BUF_SZ) ?
6245 fru->residue : BFA_FRU_DMA_BUF_SZ;
6246 msg->length = cpu_to_be32(len);
6247 bfi_h2i_set(msg->mh, BFI_MC_FRU, msg_type, bfa_ioc_portid(fru->ioc));
6248 bfa_alen_set(&msg->alen, len, fru->dbuf_pa);
6249 bfa_ioc_mbox_queue(fru->ioc, &fru->mb);
6253 * Flash memory info API.
6255 * @param[in] mincfg - minimal cfg variable
6258 bfa_fru_meminfo(bfa_boolean_t mincfg)
6260 /* min driver doesn't need fru */
6264 return BFA_ROUNDUP(BFA_FRU_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
6270 * @param[in] fru - fru structure
6271 * @param[in] ioc - ioc structure
6272 * @param[in] dev - device structure
6273 * @param[in] trcmod - trace module
6274 * @param[in] logmod - log module
6277 bfa_fru_attach(struct bfa_fru_s *fru, struct bfa_ioc_s *ioc, void *dev,
6278 struct bfa_trc_mod_s *trcmod, bfa_boolean_t mincfg)
6281 fru->trcmod = trcmod;
6286 bfa_ioc_mbox_regisr(fru->ioc, BFI_MC_FRU, bfa_fru_intr, fru);
6287 bfa_q_qe_init(&fru->ioc_notify);
6288 bfa_ioc_notify_init(&fru->ioc_notify, bfa_fru_notify, fru);
6289 list_add_tail(&fru->ioc_notify.qe, &fru->ioc->notify_q);
6291 /* min driver doesn't need fru */
6293 fru->dbuf_kva = NULL;
6299 * Claim memory for fru
6301 * @param[in] fru - fru structure
6302 * @param[in] dm_kva - pointer to virtual memory address
6303 * @param[in] dm_pa - frusical memory address
6304 * @param[in] mincfg - minimal cfg variable
6307 bfa_fru_memclaim(struct bfa_fru_s *fru, u8 *dm_kva, u64 dm_pa,
6308 bfa_boolean_t mincfg)
6313 fru->dbuf_kva = dm_kva;
6314 fru->dbuf_pa = dm_pa;
6315 memset(fru->dbuf_kva, 0, BFA_FRU_DMA_BUF_SZ);
6316 dm_kva += BFA_ROUNDUP(BFA_FRU_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
6317 dm_pa += BFA_ROUNDUP(BFA_FRU_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
6321 * Update fru vpd image.
6323 * @param[in] fru - fru structure
6324 * @param[in] buf - update data buffer
6325 * @param[in] len - data buffer length
6326 * @param[in] offset - offset relative to starting address
6327 * @param[in] cbfn - callback function
6328 * @param[in] cbarg - callback argument
6333 bfa_fruvpd_update(struct bfa_fru_s *fru, void *buf, u32 len, u32 offset,
6334 bfa_cb_fru_t cbfn, void *cbarg, u8 trfr_cmpl)
6336 bfa_trc(fru, BFI_FRUVPD_H2I_WRITE_REQ);
6338 bfa_trc(fru, offset);
6340 if (fru->ioc->asic_gen != BFI_ASIC_GEN_CT2 &&
6341 fru->ioc->attr->card_type != BFA_MFG_TYPE_CHINOOK2)
6342 return BFA_STATUS_FRU_NOT_PRESENT;
6344 if (fru->ioc->attr->card_type != BFA_MFG_TYPE_CHINOOK)
6345 return BFA_STATUS_CMD_NOTSUPP;
6347 if (!bfa_ioc_is_operational(fru->ioc))
6348 return BFA_STATUS_IOC_NON_OP;
6351 bfa_trc(fru, fru->op_busy);
6352 return BFA_STATUS_DEVBUSY;
6361 fru->addr_off = offset;
6363 fru->trfr_cmpl = trfr_cmpl;
6365 bfa_fru_write_send(fru, BFI_FRUVPD_H2I_WRITE_REQ);
6367 return BFA_STATUS_OK;
6371 * Read fru vpd image.
6373 * @param[in] fru - fru structure
6374 * @param[in] buf - read data buffer
6375 * @param[in] len - data buffer length
6376 * @param[in] offset - offset relative to starting address
6377 * @param[in] cbfn - callback function
6378 * @param[in] cbarg - callback argument
6383 bfa_fruvpd_read(struct bfa_fru_s *fru, void *buf, u32 len, u32 offset,
6384 bfa_cb_fru_t cbfn, void *cbarg)
6386 bfa_trc(fru, BFI_FRUVPD_H2I_READ_REQ);
6388 bfa_trc(fru, offset);
6390 if (fru->ioc->asic_gen != BFI_ASIC_GEN_CT2)
6391 return BFA_STATUS_FRU_NOT_PRESENT;
6393 if (fru->ioc->attr->card_type != BFA_MFG_TYPE_CHINOOK &&
6394 fru->ioc->attr->card_type != BFA_MFG_TYPE_CHINOOK2)
6395 return BFA_STATUS_CMD_NOTSUPP;
6397 if (!bfa_ioc_is_operational(fru->ioc))
6398 return BFA_STATUS_IOC_NON_OP;
6401 bfa_trc(fru, fru->op_busy);
6402 return BFA_STATUS_DEVBUSY;
6411 fru->addr_off = offset;
6413 bfa_fru_read_send(fru, BFI_FRUVPD_H2I_READ_REQ);
6415 return BFA_STATUS_OK;
6419 * Get maximum size fru vpd image.
6421 * @param[in] fru - fru structure
6422 * @param[out] size - maximum size of fru vpd data
6427 bfa_fruvpd_get_max_size(struct bfa_fru_s *fru, u32 *max_size)
6429 if (fru->ioc->asic_gen != BFI_ASIC_GEN_CT2)
6430 return BFA_STATUS_FRU_NOT_PRESENT;
6432 if (!bfa_ioc_is_operational(fru->ioc))
6433 return BFA_STATUS_IOC_NON_OP;
6435 if (fru->ioc->attr->card_type == BFA_MFG_TYPE_CHINOOK ||
6436 fru->ioc->attr->card_type == BFA_MFG_TYPE_CHINOOK2)
6437 *max_size = BFA_FRU_CHINOOK_MAX_SIZE;
6439 return BFA_STATUS_CMD_NOTSUPP;
6440 return BFA_STATUS_OK;
6445 * @param[in] fru - fru structure
6446 * @param[in] buf - update data buffer
6447 * @param[in] len - data buffer length
6448 * @param[in] offset - offset relative to starting address
6449 * @param[in] cbfn - callback function
6450 * @param[in] cbarg - callback argument
6455 bfa_tfru_write(struct bfa_fru_s *fru, void *buf, u32 len, u32 offset,
6456 bfa_cb_fru_t cbfn, void *cbarg)
6458 bfa_trc(fru, BFI_TFRU_H2I_WRITE_REQ);
6460 bfa_trc(fru, offset);
6461 bfa_trc(fru, *((u8 *) buf));
6463 if (fru->ioc->asic_gen != BFI_ASIC_GEN_CT2)
6464 return BFA_STATUS_FRU_NOT_PRESENT;
6466 if (!bfa_ioc_is_operational(fru->ioc))
6467 return BFA_STATUS_IOC_NON_OP;
6470 bfa_trc(fru, fru->op_busy);
6471 return BFA_STATUS_DEVBUSY;
6480 fru->addr_off = offset;
6483 bfa_fru_write_send(fru, BFI_TFRU_H2I_WRITE_REQ);
6485 return BFA_STATUS_OK;
6491 * @param[in] fru - fru structure
6492 * @param[in] buf - read data buffer
6493 * @param[in] len - data buffer length
6494 * @param[in] offset - offset relative to starting address
6495 * @param[in] cbfn - callback function
6496 * @param[in] cbarg - callback argument
6501 bfa_tfru_read(struct bfa_fru_s *fru, void *buf, u32 len, u32 offset,
6502 bfa_cb_fru_t cbfn, void *cbarg)
6504 bfa_trc(fru, BFI_TFRU_H2I_READ_REQ);
6506 bfa_trc(fru, offset);
6508 if (fru->ioc->asic_gen != BFI_ASIC_GEN_CT2)
6509 return BFA_STATUS_FRU_NOT_PRESENT;
6511 if (!bfa_ioc_is_operational(fru->ioc))
6512 return BFA_STATUS_IOC_NON_OP;
6515 bfa_trc(fru, fru->op_busy);
6516 return BFA_STATUS_DEVBUSY;
6525 fru->addr_off = offset;
6527 bfa_fru_read_send(fru, BFI_TFRU_H2I_READ_REQ);
6529 return BFA_STATUS_OK;
6533 * Process fru response messages upon receiving interrupts.
6535 * @param[in] fruarg - fru structure
6536 * @param[in] msg - message structure
6539 bfa_fru_intr(void *fruarg, struct bfi_mbmsg_s *msg)
6541 struct bfa_fru_s *fru = fruarg;
6542 struct bfi_fru_rsp_s *rsp = (struct bfi_fru_rsp_s *)msg;
6545 bfa_trc(fru, msg->mh.msg_id);
6547 if (!fru->op_busy) {
6549 * receiving response after ioc failure
6551 bfa_trc(fru, 0x9999);
6555 switch (msg->mh.msg_id) {
6556 case BFI_FRUVPD_I2H_WRITE_RSP:
6557 case BFI_TFRU_I2H_WRITE_RSP:
6558 status = be32_to_cpu(rsp->status);
6559 bfa_trc(fru, status);
6561 if (status != BFA_STATUS_OK || fru->residue == 0) {
6562 fru->status = status;
6565 fru->cbfn(fru->cbarg, fru->status);
6567 bfa_trc(fru, fru->offset);
6568 if (msg->mh.msg_id == BFI_FRUVPD_I2H_WRITE_RSP)
6569 bfa_fru_write_send(fru,
6570 BFI_FRUVPD_H2I_WRITE_REQ);
6572 bfa_fru_write_send(fru,
6573 BFI_TFRU_H2I_WRITE_REQ);
6576 case BFI_FRUVPD_I2H_READ_RSP:
6577 case BFI_TFRU_I2H_READ_RSP:
6578 status = be32_to_cpu(rsp->status);
6579 bfa_trc(fru, status);
6581 if (status != BFA_STATUS_OK) {
6582 fru->status = status;
6585 fru->cbfn(fru->cbarg, fru->status);
6587 u32 len = be32_to_cpu(rsp->length);
6589 bfa_trc(fru, fru->offset);
6592 memcpy(fru->ubuf + fru->offset, fru->dbuf_kva, len);
6593 fru->residue -= len;
6596 if (fru->residue == 0) {
6597 fru->status = status;
6600 fru->cbfn(fru->cbarg, fru->status);
6602 if (msg->mh.msg_id == BFI_FRUVPD_I2H_READ_RSP)
6603 bfa_fru_read_send(fru,
6604 BFI_FRUVPD_H2I_READ_REQ);
6606 bfa_fru_read_send(fru,
6607 BFI_TFRU_H2I_READ_REQ);
6617 * register definitions
6619 #define FLI_CMD_REG 0x0001d000
6620 #define FLI_RDDATA_REG 0x0001d010
6621 #define FLI_ADDR_REG 0x0001d004
6622 #define FLI_DEV_STATUS_REG 0x0001d014
6624 #define BFA_FLASH_FIFO_SIZE 128 /* fifo size */
6625 #define BFA_FLASH_CHECK_MAX 10000 /* max # of status check */
6626 #define BFA_FLASH_BLOCKING_OP_MAX 1000000 /* max # of blocking op check */
6627 #define BFA_FLASH_WIP_MASK 0x01 /* write in progress bit mask */
6629 enum bfa_flash_cmd {
6630 BFA_FLASH_FAST_READ = 0x0b, /* fast read */
6631 BFA_FLASH_READ_STATUS = 0x05, /* read status */
6635 * Hardware error definition
6637 enum bfa_flash_err {
6638 BFA_FLASH_NOT_PRESENT = -1, /*!< flash not present */
6639 BFA_FLASH_UNINIT = -2, /*!< flash not initialized */
6640 BFA_FLASH_BAD = -3, /*!< flash bad */
6641 BFA_FLASH_BUSY = -4, /*!< flash busy */
6642 BFA_FLASH_ERR_CMD_ACT = -5, /*!< command active never cleared */
6643 BFA_FLASH_ERR_FIFO_CNT = -6, /*!< fifo count never cleared */
6644 BFA_FLASH_ERR_WIP = -7, /*!< write-in-progress never cleared */
6645 BFA_FLASH_ERR_TIMEOUT = -8, /*!< fli timeout */
6646 BFA_FLASH_ERR_LEN = -9, /*!< invalid length */
6650 * Flash command register data structure
6652 union bfa_flash_cmd_reg_u {
6674 * Flash device status register data structure
6676 union bfa_flash_dev_status_reg_u {
6700 * Flash address register data structure
6702 union bfa_flash_addr_reg_u {
6716 * dg flash_raw_private Flash raw private functions
6719 bfa_flash_set_cmd(void __iomem *pci_bar, u8 wr_cnt,
6720 u8 rd_cnt, u8 ad_cnt, u8 op)
6722 union bfa_flash_cmd_reg_u cmd;
6726 cmd.r.write_cnt = wr_cnt;
6727 cmd.r.read_cnt = rd_cnt;
6728 cmd.r.addr_cnt = ad_cnt;
6730 writel(cmd.i, (pci_bar + FLI_CMD_REG));
6734 bfa_flash_set_addr(void __iomem *pci_bar, u32 address)
6736 union bfa_flash_addr_reg_u addr;
6738 addr.r.addr = address & 0x00ffffff;
6740 writel(addr.i, (pci_bar + FLI_ADDR_REG));
6744 bfa_flash_cmd_act_check(void __iomem *pci_bar)
6746 union bfa_flash_cmd_reg_u cmd;
6748 cmd.i = readl(pci_bar + FLI_CMD_REG);
6751 return BFA_FLASH_ERR_CMD_ACT;
6758 * Flush FLI data fifo.
6760 * @param[in] pci_bar - pci bar address
6761 * @param[in] dev_status - device status
6763 * Return 0 on success, negative error number on error.
6766 bfa_flash_fifo_flush(void __iomem *pci_bar)
6769 union bfa_flash_dev_status_reg_u dev_status;
6771 dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG);
6773 if (!dev_status.r.fifo_cnt)
6776 /* fifo counter in terms of words */
6777 for (i = 0; i < dev_status.r.fifo_cnt; i++)
6778 readl(pci_bar + FLI_RDDATA_REG);
6781 * Check the device status. It may take some time.
6783 for (i = 0; i < BFA_FLASH_CHECK_MAX; i++) {
6784 dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG);
6785 if (!dev_status.r.fifo_cnt)
6789 if (dev_status.r.fifo_cnt)
6790 return BFA_FLASH_ERR_FIFO_CNT;
6797 * Read flash status.
6799 * @param[in] pci_bar - pci bar address
6801 * Return 0 on success, negative error number on error.
6804 bfa_flash_status_read(void __iomem *pci_bar)
6806 union bfa_flash_dev_status_reg_u dev_status;
6811 status = bfa_flash_fifo_flush(pci_bar);
6815 bfa_flash_set_cmd(pci_bar, 0, 4, 0, BFA_FLASH_READ_STATUS);
6817 for (i = 0; i < BFA_FLASH_CHECK_MAX; i++) {
6818 status = bfa_flash_cmd_act_check(pci_bar);
6826 dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG);
6827 if (!dev_status.r.fifo_cnt)
6828 return BFA_FLASH_BUSY;
6830 ret_status = readl(pci_bar + FLI_RDDATA_REG);
6833 status = bfa_flash_fifo_flush(pci_bar);
6842 * Start flash read operation.
6844 * @param[in] pci_bar - pci bar address
6845 * @param[in] offset - flash address offset
6846 * @param[in] len - read data length
6847 * @param[in] buf - read data buffer
6849 * Return 0 on success, negative error number on error.
6852 bfa_flash_read_start(void __iomem *pci_bar, u32 offset, u32 len,
6858 * len must be mutiple of 4 and not exceeding fifo size
6860 if (len == 0 || len > BFA_FLASH_FIFO_SIZE || (len & 0x03) != 0)
6861 return BFA_FLASH_ERR_LEN;
6866 status = bfa_flash_status_read(pci_bar);
6867 if (status == BFA_FLASH_BUSY)
6868 status = bfa_flash_status_read(pci_bar);
6874 * check if write-in-progress bit is cleared
6876 if (status & BFA_FLASH_WIP_MASK)
6877 return BFA_FLASH_ERR_WIP;
6879 bfa_flash_set_addr(pci_bar, offset);
6881 bfa_flash_set_cmd(pci_bar, 0, (u8)len, 4, BFA_FLASH_FAST_READ);
6888 * Check flash read operation.
6890 * @param[in] pci_bar - pci bar address
6892 * Return flash device status, 1 if busy, 0 if not.
6895 bfa_flash_read_check(void __iomem *pci_bar)
6897 if (bfa_flash_cmd_act_check(pci_bar))
6905 * End flash read operation.
6907 * @param[in] pci_bar - pci bar address
6908 * @param[in] len - read data length
6909 * @param[in] buf - read data buffer
6913 bfa_flash_read_end(void __iomem *pci_bar, u32 len, char *buf)
6919 * read data fifo up to 32 words
6921 for (i = 0; i < len; i += 4) {
6922 u32 w = readl(pci_bar + FLI_RDDATA_REG);
6923 *((u32 *) (buf + i)) = swab32(w);
6926 bfa_flash_fifo_flush(pci_bar);
6931 * Perform flash raw read.
6933 * @param[in] pci_bar - pci bar address
6934 * @param[in] offset - flash partition address offset
6935 * @param[in] buf - read data buffer
6936 * @param[in] len - read data length
6942 #define FLASH_BLOCKING_OP_MAX 500
6943 #define FLASH_SEM_LOCK_REG 0x18820
6946 bfa_raw_sem_get(void __iomem *bar)
6950 locked = readl((bar + FLASH_SEM_LOCK_REG));
6956 bfa_flash_sem_get(void __iomem *bar)
6958 u32 n = FLASH_BLOCKING_OP_MAX;
6960 while (!bfa_raw_sem_get(bar)) {
6962 return BFA_STATUS_BADFLASH;
6965 return BFA_STATUS_OK;
6969 bfa_flash_sem_put(void __iomem *bar)
6971 writel(0, (bar + FLASH_SEM_LOCK_REG));
6975 bfa_flash_raw_read(void __iomem *pci_bar, u32 offset, char *buf,
6980 u32 off, l, s, residue, fifo_sz;
6984 fifo_sz = BFA_FLASH_FIFO_SIZE;
6985 status = bfa_flash_sem_get(pci_bar);
6986 if (status != BFA_STATUS_OK)
6992 l = (n + 1) * fifo_sz - s;
6996 status = bfa_flash_read_start(pci_bar, offset + off, l,
6999 bfa_flash_sem_put(pci_bar);
7000 return BFA_STATUS_FAILED;
7003 n = BFA_FLASH_BLOCKING_OP_MAX;
7004 while (bfa_flash_read_check(pci_bar)) {
7006 bfa_flash_sem_put(pci_bar);
7007 return BFA_STATUS_FAILED;
7011 bfa_flash_read_end(pci_bar, l, &buf[off]);
7016 bfa_flash_sem_put(pci_bar);
7018 return BFA_STATUS_OK;