1 // SPDX-License-Identifier: GPL-2.0
3 * Power button driver for Intel MID platforms.
5 * Copyright (C) 2010,2017 Intel Corp
7 * Author: Hong Liu <hong.liu@intel.com>
8 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
11 #include <linux/input.h>
12 #include <linux/interrupt.h>
13 #include <linux/mfd/intel_msic.h>
14 #include <linux/module.h>
15 #include <linux/platform_device.h>
16 #include <linux/pm_wakeirq.h>
17 #include <linux/slab.h>
19 #include <asm/cpu_device_id.h>
20 #include <asm/intel-family.h>
21 #include <asm/intel_scu_ipc.h>
23 #define DRIVER_NAME "msic_power_btn"
25 #define MSIC_PB_LEVEL (1 << 3) /* 1 - release, 0 - press */
28 * MSIC document ti_datasheet defines the 1st bit reg 0x21 is used to mask
29 * power button interrupt
31 #define MSIC_PWRBTNM (1 << 0)
34 #define BCOVE_PB_LEVEL (1 << 4) /* 1 - release, 0 - press */
37 #define BCOVE_PBIRQ 0x02
38 #define BCOVE_IRQLVL1MSK 0x0c
39 #define BCOVE_PBIRQMASK 0x0d
40 #define BCOVE_PBSTATUS 0x27
45 struct input_dev *input;
46 unsigned short mirqlvl1_addr;
47 unsigned short pbstat_addr;
49 struct intel_scu_ipc_dev *scu;
50 int (*setup)(struct mid_pb_ddata *ddata);
53 static int mid_pbstat(struct mid_pb_ddata *ddata, int *value)
55 struct input_dev *input = ddata->input;
59 ret = intel_scu_ipc_dev_ioread8(ddata->scu, ddata->pbstat_addr,
64 dev_dbg(input->dev.parent, "PB_INT status= %d\n", pbstat);
66 *value = !(pbstat & ddata->pbstat_mask);
70 static int mid_irq_ack(struct mid_pb_ddata *ddata)
72 return intel_scu_ipc_dev_update(ddata->scu, ddata->mirqlvl1_addr, 0,
76 static int mrfld_setup(struct mid_pb_ddata *ddata)
78 /* Unmask the PBIRQ and MPBIRQ on Tangier */
79 intel_scu_ipc_dev_update(ddata->scu, BCOVE_PBIRQ, 0, MSIC_PWRBTNM);
80 intel_scu_ipc_dev_update(ddata->scu, BCOVE_PBIRQMASK, 0, MSIC_PWRBTNM);
85 static irqreturn_t mid_pb_isr(int irq, void *dev_id)
87 struct mid_pb_ddata *ddata = dev_id;
88 struct input_dev *input = ddata->input;
92 ret = mid_pbstat(ddata, &value);
94 dev_err(input->dev.parent,
95 "Read error %d while reading MSIC_PB_STATUS\n", ret);
97 input_event(input, EV_KEY, KEY_POWER, value);
105 static const struct mid_pb_ddata mfld_ddata = {
106 .mirqlvl1_addr = INTEL_MSIC_IRQLVL1MSK,
107 .pbstat_addr = INTEL_MSIC_PBSTATUS,
108 .pbstat_mask = MSIC_PB_LEVEL,
111 static const struct mid_pb_ddata mrfld_ddata = {
112 .mirqlvl1_addr = BCOVE_IRQLVL1MSK,
113 .pbstat_addr = BCOVE_PBSTATUS,
114 .pbstat_mask = BCOVE_PB_LEVEL,
115 .setup = mrfld_setup,
118 static const struct x86_cpu_id mid_pb_cpu_ids[] = {
119 X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_MID, &mfld_ddata),
120 X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &mrfld_ddata),
124 static int mid_pb_probe(struct platform_device *pdev)
126 const struct x86_cpu_id *id;
127 struct mid_pb_ddata *ddata;
128 struct input_dev *input;
129 int irq = platform_get_irq(pdev, 0);
132 id = x86_match_cpu(mid_pb_cpu_ids);
137 dev_err(&pdev->dev, "Failed to get IRQ: %d\n", irq);
141 input = devm_input_allocate_device(&pdev->dev);
145 input->name = pdev->name;
146 input->phys = "power-button/input0";
147 input->id.bustype = BUS_HOST;
148 input->dev.parent = &pdev->dev;
150 input_set_capability(input, EV_KEY, KEY_POWER);
152 ddata = devm_kmemdup(&pdev->dev, (void *)id->driver_data,
153 sizeof(*ddata), GFP_KERNEL);
157 ddata->dev = &pdev->dev;
159 ddata->input = input;
162 error = ddata->setup(ddata);
167 ddata->scu = devm_intel_scu_ipc_dev_get(&pdev->dev);
169 return -EPROBE_DEFER;
171 error = devm_request_threaded_irq(&pdev->dev, irq, NULL, mid_pb_isr,
172 IRQF_ONESHOT, DRIVER_NAME, ddata);
175 "Unable to request irq %d for MID power button\n", irq);
179 error = input_register_device(input);
182 "Unable to register input dev, error %d\n", error);
186 platform_set_drvdata(pdev, ddata);
189 * SCU firmware might send power button interrupts to IA core before
190 * kernel boots and doesn't get EOI from IA core. The first bit of
191 * MSIC reg 0x21 is kept masked, and SCU firmware doesn't send new
192 * power interrupt to Android kernel. Unmask the bit when probing
193 * power button in kernel.
194 * There is a very narrow race between irq handler and power button
195 * initialization. The race happens rarely. So we needn't worry
198 error = mid_irq_ack(ddata);
201 "Unable to clear power button interrupt, error: %d\n",
206 device_init_wakeup(&pdev->dev, true);
207 dev_pm_set_wake_irq(&pdev->dev, irq);
212 static int mid_pb_remove(struct platform_device *pdev)
214 dev_pm_clear_wake_irq(&pdev->dev);
215 device_init_wakeup(&pdev->dev, false);
220 static struct platform_driver mid_pb_driver = {
224 .probe = mid_pb_probe,
225 .remove = mid_pb_remove,
228 module_platform_driver(mid_pb_driver);
230 MODULE_AUTHOR("Hong Liu <hong.liu@intel.com>");
231 MODULE_DESCRIPTION("Intel MID Power Button Driver");
232 MODULE_LICENSE("GPL v2");
233 MODULE_ALIAS("platform:" DRIVER_NAME);