drivers/nvme/host/nvme.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  */
   5
   6 #ifndef _NVME_H
   7 #define _NVME_H
   8
   9 #include <linux/nvme.h>
  10 #include <linux/cdev.h>
  11 #include <linux/pci.h>
  12 #include <linux/kref.h>
  13 #include <linux/blk-mq.h>
  14 #include <linux/sed-opal.h>
  15 #include <linux/fault-inject.h>
  16 #include <linux/rcupdate.h>
  17 #include <linux/wait.h>
  18 #include <linux/t10-pi.h>
  19
  20 #include <trace/events/block.h>
  21
  22 extern unsigned int nvme_io_timeout;
  23 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
  24
  25 extern unsigned int admin_timeout;
  26 #define NVME_ADMIN_TIMEOUT      (admin_timeout * HZ)
  27
  28 #define NVME_DEFAULT_KATO       5
  29
  30 #ifdef CONFIG_ARCH_NO_SG_CHAIN
  31 #define  NVME_INLINE_SG_CNT  0
  32 #define  NVME_INLINE_METADATA_SG_CNT  0
  33 #else
  34 #define  NVME_INLINE_SG_CNT  2
  35 #define  NVME_INLINE_METADATA_SG_CNT  1
  36 #endif
  37
  38 /*
  39  * Default to a 4K page size, with the intention to update this
  40  * path in the future to accommodate architectures with differing
  41  * kernel and IO page sizes.
  42  */
  43 #define NVME_CTRL_PAGE_SHIFT    12
  44 #define NVME_CTRL_PAGE_SIZE     (1 << NVME_CTRL_PAGE_SHIFT)
  45
  46 extern struct workqueue_struct *nvme_wq;
  47 extern struct workqueue_struct *nvme_reset_wq;
  48 extern struct workqueue_struct *nvme_delete_wq;
  49
  50 /*
  51  * List of workarounds for devices that required behavior not specified in
  52  * the standard.
  53  */
  54 enum nvme_quirks {
  55         /*
  56          * Prefers I/O aligned to a stripe size specified in a vendor
  57          * specific Identify field.
  58          */
  59         NVME_QUIRK_STRIPE_SIZE                  = (1 << 0),
  60
  61         /*
  62          * The controller doesn't handle Identify value others than 0 or 1
  63          * correctly.
  64          */
  65         NVME_QUIRK_IDENTIFY_CNS                 = (1 << 1),
  66
  67         /*
  68          * The controller deterministically returns O's on reads to
  69          * logical blocks that deallocate was called on.
  70          */
  71         NVME_QUIRK_DEALLOCATE_ZEROES            = (1 << 2),
  72
  73         /*
  74          * The controller needs a delay before starts checking the device
  75          * readiness, which is done by reading the NVME_CSTS_RDY bit.
  76          */
  77         NVME_QUIRK_DELAY_BEFORE_CHK_RDY         = (1 << 3),
  78
  79         /*
  80          * APST should not be used.
  81          */
  82         NVME_QUIRK_NO_APST                      = (1 << 4),
  83
  84         /*
  85          * The deepest sleep state should not be used.
  86          */
  87         NVME_QUIRK_NO_DEEPEST_PS                = (1 << 5),
  88
  89         /*
  90          * Set MEDIUM priority on SQ creation
  91          */
  92         NVME_QUIRK_MEDIUM_PRIO_SQ               = (1 << 7),
  93
  94         /*
  95          * Ignore device provided subnqn.
  96          */
  97         NVME_QUIRK_IGNORE_DEV_SUBNQN            = (1 << 8),
  98
  99         /*
 100          * Broken Write Zeroes.
 101          */
 102         NVME_QUIRK_DISABLE_WRITE_ZEROES         = (1 << 9),
 103
 104         /*
 105          * Force simple suspend/resume path.
 106          */
 107         NVME_QUIRK_SIMPLE_SUSPEND               = (1 << 10),
 108
 109         /*
 110          * Use only one interrupt vector for all queues
 111          */
 112         NVME_QUIRK_SINGLE_VECTOR                = (1 << 11),
 113
 114         /*
 115          * Use non-standard 128 bytes SQEs.
 116          */
 117         NVME_QUIRK_128_BYTES_SQES               = (1 << 12),
 118
 119         /*
 120          * Prevent tag overlap between queues
 121          */
 122         NVME_QUIRK_SHARED_TAGS                  = (1 << 13),
 123
 124         /*
 125          * Don't change the value of the temperature threshold feature
 126          */
 127         NVME_QUIRK_NO_TEMP_THRESH_CHANGE        = (1 << 14),
 128
 129         /*
 130          * The controller doesn't handle the Identify Namespace
 131          * Identification Descriptor list subcommand despite claiming
 132          * NVMe 1.3 compliance.
 133          */
 134         NVME_QUIRK_NO_NS_DESC_LIST              = (1 << 15),
 135
 136         /*
 137          * The controller does not properly handle DMA addresses over
 138          * 48 bits.
 139          */
 140         NVME_QUIRK_DMA_ADDRESS_BITS_48          = (1 << 16),
 141
 142         /*
 143          * The controller requires the command_id value be limited, so skip
 144          * encoding the generation sequence number.
 145          */
 146         NVME_QUIRK_SKIP_CID_GEN                 = (1 << 17),
 147
 148         /*
 149          * Reports garbage in the namespace identifiers (eui64, nguid, uuid).
 150          */
 151         NVME_QUIRK_BOGUS_NID                    = (1 << 18),
 152 };
 153
 154 /*
 155  * Common request structure for NVMe passthrough.  All drivers must have
 156  * this structure as the first member of their request-private data.
 157  */
 158 struct nvme_request {
 159         struct nvme_command     *cmd;
 160         union nvme_result       result;
 161         u8                      genctr;
 162         u8                      retries;
 163         u8                      flags;
 164         u16                     status;
 165         struct nvme_ctrl        *ctrl;
 166 };
 167
 168 /*
 169  * Mark a bio as coming in through the mpath node.
 170  */
 171 #define REQ_NVME_MPATH          REQ_DRV
 172
 173 enum {
 174         NVME_REQ_CANCELLED              = (1 << 0),
 175         NVME_REQ_USERCMD                = (1 << 1),
 176 };
 177
 178 static inline struct nvme_request *nvme_req(struct request *req)
 179 {
 180         return blk_mq_rq_to_pdu(req);
 181 }
 182
 183 static inline u16 nvme_req_qid(struct request *req)
 184 {
 185         if (!req->q->queuedata)
 186                 return 0;
 187
 188         return req->mq_hctx->queue_num + 1;
 189 }
 190
 191 /* The below value is the specific amount of delay needed before checking
 192  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
 193  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
 194  * found empirically.
 195  */
 196 #define NVME_QUIRK_DELAY_AMOUNT         2300
 197
 198 /*
 199  * enum nvme_ctrl_state: Controller state
 200  *
 201  * @NVME_CTRL_NEW:              New controller just allocated, initial state
 202  * @NVME_CTRL_LIVE:             Controller is connected and I/O capable
 203  * @NVME_CTRL_RESETTING:        Controller is resetting (or scheduled reset)
 204  * @NVME_CTRL_CONNECTING:       Controller is disconnected, now connecting the
 205  *                              transport
 206  * @NVME_CTRL_DELETING:         Controller is deleting (or scheduled deletion)
 207  * @NVME_CTRL_DELETING_NOIO:    Controller is deleting and I/O is not
 208  *                              disabled/failed immediately. This state comes
 209  *                              after all async event processing took place and
 210  *                              before ns removal and the controller deletion
 211  *                              progress
 212  * @NVME_CTRL_DEAD:             Controller is non-present/unresponsive during
 213  *                              shutdown or removal. In this case we forcibly
 214  *                              kill all inflight I/O as they have no chance to
 215  *                              complete
 216  */
 217 enum nvme_ctrl_state {
 218         NVME_CTRL_NEW,
 219         NVME_CTRL_LIVE,
 220         NVME_CTRL_RESETTING,
 221         NVME_CTRL_CONNECTING,
 222         NVME_CTRL_DELETING,
 223         NVME_CTRL_DELETING_NOIO,
 224         NVME_CTRL_DEAD,
 225 };
 226
 227 struct nvme_fault_inject {
 228 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
 229         struct fault_attr attr;
 230         struct dentry *parent;
 231         bool dont_retry;        /* DNR, do not retry */
 232         u16 status;             /* status code */
 233 #endif
 234 };
 235
 236 struct nvme_ctrl {
 237         bool comp_seen;
 238         enum nvme_ctrl_state state;
 239         bool identified;
 240         spinlock_t lock;
 241         struct mutex scan_lock;
 242         const struct nvme_ctrl_ops *ops;
 243         struct request_queue *admin_q;
 244         struct request_queue *connect_q;
 245         struct request_queue *fabrics_q;
 246         struct device *dev;
 247         int instance;
 248         int numa_node;
 249         struct blk_mq_tag_set *tagset;
 250         struct blk_mq_tag_set *admin_tagset;
 251         struct list_head namespaces;
 252         struct rw_semaphore namespaces_rwsem;
 253         struct device ctrl_device;
 254         struct device *device;  /* char device */
 255 #ifdef CONFIG_NVME_HWMON
 256         struct device *hwmon_device;
 257 #endif
 258         struct cdev cdev;
 259         struct work_struct reset_work;
 260         struct work_struct delete_work;
 261         wait_queue_head_t state_wq;
 262
 263         struct nvme_subsystem *subsys;
 264         struct list_head subsys_entry;
 265
 266         struct opal_dev *opal_dev;
 267
 268         char name[12];
 269         u16 cntlid;
 270
 271         u32 ctrl_config;
 272         u16 mtfa;
 273         u32 queue_count;
 274
 275         u64 cap;
 276         u32 max_hw_sectors;
 277         u32 max_segments;
 278         u32 max_integrity_segments;
 279         u32 max_discard_sectors;
 280         u32 max_discard_segments;
 281         u32 max_zeroes_sectors;
 282 #ifdef CONFIG_BLK_DEV_ZONED
 283         u32 max_zone_append;
 284 #endif
 285         u16 crdt[3];
 286         u16 oncs;
 287         u32 dmrsl;
 288         u16 oacs;
 289         u16 sqsize;
 290         u32 max_namespaces;
 291         atomic_t abort_limit;
 292         u8 vwc;
 293         u32 vs;
 294         u32 sgls;
 295         u16 kas;
 296         u8 npss;
 297         u8 apsta;
 298         u16 wctemp;
 299         u16 cctemp;
 300         u32 oaes;
 301         u32 aen_result;
 302         u32 ctratt;
 303         unsigned int shutdown_timeout;
 304         unsigned int kato;
 305         bool subsystem;
 306         unsigned long quirks;
 307         struct nvme_id_power_state psd[32];
 308         struct nvme_effects_log *effects;
 309         struct xarray cels;
 310         struct work_struct scan_work;
 311         struct work_struct async_event_work;
 312         struct delayed_work ka_work;
 313         struct delayed_work failfast_work;
 314         struct nvme_command ka_cmd;
 315         struct work_struct fw_act_work;
 316         unsigned long events;
 317
 318 #ifdef CONFIG_NVME_MULTIPATH
 319         /* asymmetric namespace access: */
 320         u8 anacap;
 321         u8 anatt;
 322         u32 anagrpmax;
 323         u32 nanagrpid;
 324         struct mutex ana_lock;
 325         struct nvme_ana_rsp_hdr *ana_log_buf;
 326         size_t ana_log_size;
 327         struct timer_list anatt_timer;
 328         struct work_struct ana_work;
 329 #endif
 330
 331 #ifdef CONFIG_NVME_AUTH
 332         struct work_struct dhchap_auth_work;
 333         struct list_head dhchap_auth_list;
 334         struct mutex dhchap_auth_mutex;
 335         struct nvme_dhchap_key *host_key;
 336         struct nvme_dhchap_key *ctrl_key;
 337         u16 transaction;
 338 #endif
 339
 340         /* Power saving configuration */
 341         u64 ps_max_latency_us;
 342         bool apst_enabled;
 343
 344         /* PCIe only: */
 345         u32 hmpre;
 346         u32 hmmin;
 347         u32 hmminds;
 348         u16 hmmaxd;
 349
 350         /* Fabrics only */
 351         u32 ioccsz;
 352         u32 iorcsz;
 353         u16 icdoff;
 354         u16 maxcmd;
 355         int nr_reconnects;
 356         unsigned long flags;
 357 #define NVME_CTRL_FAILFAST_EXPIRED      0
 358 #define NVME_CTRL_ADMIN_Q_STOPPED       1
 359         struct nvmf_ctrl_options *opts;
 360
 361         struct page *discard_page;
 362         unsigned long discard_page_busy;
 363
 364         struct nvme_fault_inject fault_inject;
 365
 366         enum nvme_ctrl_type cntrltype;
 367         enum nvme_dctype dctype;
 368 };
 369
 370 enum nvme_iopolicy {
 371         NVME_IOPOLICY_NUMA,
 372         NVME_IOPOLICY_RR,
 373 };
 374
 375 struct nvme_subsystem {
 376         int                     instance;
 377         struct device           dev;
 378         /*
 379          * Because we unregister the device on the last put we need
 380          * a separate refcount.
 381          */
 382         struct kref             ref;
 383         struct list_head        entry;
 384         struct mutex            lock;
 385         struct list_head        ctrls;
 386         struct list_head        nsheads;
 387         char                    subnqn[NVMF_NQN_SIZE];
 388         char                    serial[20];
 389         char                    model[40];
 390         char                    firmware_rev[8];
 391         u8                      cmic;
 392         enum nvme_subsys_type   subtype;
 393         u16                     vendor_id;
 394         u16                     awupf;  /* 0's based awupf value. */
 395         struct ida              ns_ida;
 396 #ifdef CONFIG_NVME_MULTIPATH
 397         enum nvme_iopolicy      iopolicy;
 398 #endif
 399 };
 400
 401 /*
 402  * Container structure for uniqueue namespace identifiers.
 403  */
 404 struct nvme_ns_ids {
 405         u8      eui64[8];
 406         u8      nguid[16];
 407         uuid_t  uuid;
 408         u8      csi;
 409 };
 410
 411 /*
 412  * Anchor structure for namespaces.  There is one for each namespace in a
 413  * NVMe subsystem that any of our controllers can see, and the namespace
 414  * structure for each controller is chained of it.  For private namespaces
 415  * there is a 1:1 relation to our namespace structures, that is ->list
 416  * only ever has a single entry for private namespaces.
 417  */
 418 struct nvme_ns_head {
 419         struct list_head        list;
 420         struct srcu_struct      srcu;
 421         struct nvme_subsystem   *subsys;
 422         unsigned                ns_id;
 423         struct nvme_ns_ids      ids;
 424         struct list_head        entry;
 425         struct kref             ref;
 426         bool                    shared;
 427         int                     instance;
 428         struct nvme_effects_log *effects;
 429
 430         struct cdev             cdev;
 431         struct device           cdev_device;
 432
 433         struct gendisk          *disk;
 434 #ifdef CONFIG_NVME_MULTIPATH
 435         struct bio_list         requeue_list;
 436         spinlock_t              requeue_lock;
 437         struct work_struct      requeue_work;
 438         struct mutex            lock;
 439         unsigned long           flags;
 440 #define NVME_NSHEAD_DISK_LIVE   0
 441         struct nvme_ns __rcu    *current_path[];
 442 #endif
 443 };
 444
 445 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head)
 446 {
 447         return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk;
 448 }
 449
 450 enum nvme_ns_features {
 451         NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */
 452         NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */
 453 };
 454
 455 struct nvme_ns {
 456         struct list_head list;
 457
 458         struct nvme_ctrl *ctrl;
 459         struct request_queue *queue;
 460         struct gendisk *disk;
 461 #ifdef CONFIG_NVME_MULTIPATH
 462         enum nvme_ana_state ana_state;
 463         u32 ana_grpid;
 464 #endif
 465         struct list_head siblings;
 466         struct kref kref;
 467         struct nvme_ns_head *head;
 468
 469         int lba_shift;
 470         u16 ms;
 471         u16 pi_size;
 472         u16 sgs;
 473         u32 sws;
 474         u8 pi_type;
 475         u8 guard_type;
 476 #ifdef CONFIG_BLK_DEV_ZONED
 477         u64 zsze;
 478 #endif
 479         unsigned long features;
 480         unsigned long flags;
 481 #define NVME_NS_REMOVING        0
 482 #define NVME_NS_DEAD            1
 483 #define NVME_NS_ANA_PENDING     2
 484 #define NVME_NS_FORCE_RO        3
 485 #define NVME_NS_READY           4
 486 #define NVME_NS_STOPPED         5
 487
 488         struct cdev             cdev;
 489         struct device           cdev_device;
 490
 491         struct nvme_fault_inject fault_inject;
 492
 493 };
 494
 495 /* NVMe ns supports metadata actions by the controller (generate/strip) */
 496 static inline bool nvme_ns_has_pi(struct nvme_ns *ns)
 497 {
 498         return ns->pi_type && ns->ms == ns->pi_size;
 499 }
 500
 501 struct nvme_ctrl_ops {
 502         const char *name;
 503         struct module *module;
 504         unsigned int flags;
 505 #define NVME_F_FABRICS                  (1 << 0)
 506 #define NVME_F_METADATA_SUPPORTED       (1 << 1)
 507 #define NVME_F_PCI_P2PDMA               (1 << 2)
 508         int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
 509         int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
 510         int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
 511         void (*free_ctrl)(struct nvme_ctrl *ctrl);
 512         void (*submit_async_event)(struct nvme_ctrl *ctrl);
 513         void (*delete_ctrl)(struct nvme_ctrl *ctrl);
 514         void (*stop_ctrl)(struct nvme_ctrl *ctrl);
 515         int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
 516         void (*print_device_info)(struct nvme_ctrl *ctrl);
 517 };
 518
 519 /*
 520  * nvme command_id is constructed as such:
 521  * | xxxx | xxxxxxxxxxxx |
 522  *   gen    request tag
 523  */
 524 #define nvme_genctr_mask(gen)                   (gen & 0xf)
 525 #define nvme_cid_install_genctr(gen)            (nvme_genctr_mask(gen) << 12)
 526 #define nvme_genctr_from_cid(cid)               ((cid & 0xf000) >> 12)
 527 #define nvme_tag_from_cid(cid)                  (cid & 0xfff)
 528
 529 static inline u16 nvme_cid(struct request *rq)
 530 {
 531         return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag;
 532 }
 533
 534 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags,
 535                 u16 command_id)
 536 {
 537         u8 genctr = nvme_genctr_from_cid(command_id);
 538         u16 tag = nvme_tag_from_cid(command_id);
 539         struct request *rq;
 540
 541         rq = blk_mq_tag_to_rq(tags, tag);
 542         if (unlikely(!rq)) {
 543                 pr_err("could not locate request for tag %#x\n",
 544                         tag);
 545                 return NULL;
 546         }
 547         if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) {
 548                 dev_err(nvme_req(rq)->ctrl->device,
 549                         "request %#x genctr mismatch (got %#x expected %#x)\n",
 550                         tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr));
 551                 return NULL;
 552         }
 553         return rq;
 554 }
 555
 556 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags,
 557                 u16 command_id)
 558 {
 559         return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id));
 560 }
 561
 562 /*
 563  * Return the length of the string without the space padding
 564  */
 565 static inline int nvme_strlen(char *s, int len)
 566 {
 567         while (s[len - 1] == ' ')
 568                 len--;
 569         return len;
 570 }
 571
 572 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl)
 573 {
 574         struct nvme_subsystem *subsys = ctrl->subsys;
 575
 576         if (ctrl->ops->print_device_info) {
 577                 ctrl->ops->print_device_info(ctrl);
 578                 return;
 579         }
 580
 581         dev_err(ctrl->device,
 582                 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id,
 583                 nvme_strlen(subsys->model, sizeof(subsys->model)),
 584                 subsys->model, nvme_strlen(subsys->firmware_rev,
 585                                            sizeof(subsys->firmware_rev)),
 586                 subsys->firmware_rev);
 587 }
 588
 589 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
 590 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
 591                             const char *dev_name);
 592 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject);
 593 void nvme_should_fail(struct request *req);
 594 #else
 595 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
 596                                           const char *dev_name)
 597 {
 598 }
 599 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj)
 600 {
 601 }
 602 static inline void nvme_should_fail(struct request *req) {}
 603 #endif
 604
 605 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
 606 {
 607         if (!ctrl->subsystem)
 608                 return -ENOTTY;
 609         return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
 610 }
 611
 612 /*
 613  * Convert a 512B sector number to a device logical block number.
 614  */
 615 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector)
 616 {
 617         return sector >> (ns->lba_shift - SECTOR_SHIFT);
 618 }
 619
 620 /*
 621  * Convert a device logical block number to a 512B sector number.
 622  */
 623 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba)
 624 {
 625         return lba << (ns->lba_shift - SECTOR_SHIFT);
 626 }
 627
 628 /*
 629  * Convert byte length to nvme's 0-based num dwords
 630  */
 631 static inline u32 nvme_bytes_to_numd(size_t len)
 632 {
 633         return (len >> 2) - 1;
 634 }
 635
 636 static inline bool nvme_is_ana_error(u16 status)
 637 {
 638         switch (status & 0x7ff) {
 639         case NVME_SC_ANA_TRANSITION:
 640         case NVME_SC_ANA_INACCESSIBLE:
 641         case NVME_SC_ANA_PERSISTENT_LOSS:
 642                 return true;
 643         default:
 644                 return false;
 645         }
 646 }
 647
 648 static inline bool nvme_is_path_error(u16 status)
 649 {
 650         /* check for a status code type of 'path related status' */
 651         return (status & 0x700) == 0x300;
 652 }
 653
 654 /*
 655  * Fill in the status and result information from the CQE, and then figure out
 656  * if blk-mq will need to use IPI magic to complete the request, and if yes do
 657  * so.  If not let the caller complete the request without an indirect function
 658  * call.
 659  */
 660 static inline bool nvme_try_complete_req(struct request *req, __le16 status,
 661                 union nvme_result result)
 662 {
 663         struct nvme_request *rq = nvme_req(req);
 664         struct nvme_ctrl *ctrl = rq->ctrl;
 665
 666         if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN))
 667                 rq->genctr++;
 668
 669         rq->status = le16_to_cpu(status) >> 1;
 670         rq->result = result;
 671         /* inject error when permitted by fault injection framework */
 672         nvme_should_fail(req);
 673         if (unlikely(blk_should_fake_timeout(req->q)))
 674                 return true;
 675         return blk_mq_complete_request_remote(req);
 676 }
 677
 678 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
 679 {
 680         get_device(ctrl->device);
 681 }
 682
 683 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
 684 {
 685         put_device(ctrl->device);
 686 }
 687
 688 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id)
 689 {
 690         return !qid &&
 691                 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH;
 692 }
 693
 694 void nvme_complete_rq(struct request *req);
 695 void nvme_complete_batch_req(struct request *req);
 696
 697 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob,
 698                                                 void (*fn)(struct request *rq))
 699 {
 700         struct request *req;
 701
 702         rq_list_for_each(&iob->req_list, req) {
 703                 fn(req);
 704                 nvme_complete_batch_req(req);
 705         }
 706         blk_mq_end_request_batch(iob);
 707 }
 708
 709 blk_status_t nvme_host_path_error(struct request *req);
 710 bool nvme_cancel_request(struct request *req, void *data);
 711 void nvme_cancel_tagset(struct nvme_ctrl *ctrl);
 712 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl);
 713 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
 714                 enum nvme_ctrl_state new_state);
 715 bool nvme_wait_reset(struct nvme_ctrl *ctrl);
 716 int nvme_disable_ctrl(struct nvme_ctrl *ctrl);
 717 int nvme_enable_ctrl(struct nvme_ctrl *ctrl);
 718 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
 719 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
 720                 const struct nvme_ctrl_ops *ops, unsigned long quirks);
 721 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
 722 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
 723 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
 724 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl);
 725
 726 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
 727
 728 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
 729                 bool send);
 730
 731 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
 732                 volatile union nvme_result *res);
 733
 734 void nvme_stop_queues(struct nvme_ctrl *ctrl);
 735 void nvme_start_queues(struct nvme_ctrl *ctrl);
 736 void nvme_stop_admin_queue(struct nvme_ctrl *ctrl);
 737 void nvme_start_admin_queue(struct nvme_ctrl *ctrl);
 738 void nvme_kill_queues(struct nvme_ctrl *ctrl);
 739 void nvme_sync_queues(struct nvme_ctrl *ctrl);
 740 void nvme_sync_io_queues(struct nvme_ctrl *ctrl);
 741 void nvme_unfreeze(struct nvme_ctrl *ctrl);
 742 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
 743 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
 744 void nvme_start_freeze(struct nvme_ctrl *ctrl);
 745
 746 static inline enum req_op nvme_req_op(struct nvme_command *cmd)
 747 {
 748         return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
 749 }
 750
 751 #define NVME_QID_ANY -1
 752 void nvme_init_request(struct request *req, struct nvme_command *cmd);
 753 void nvme_cleanup_cmd(struct request *req);
 754 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req);
 755 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
 756                 struct request *req);
 757 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
 758                 bool queue_live);
 759
 760 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
 761                 bool queue_live)
 762 {
 763         if (likely(ctrl->state == NVME_CTRL_LIVE))
 764                 return true;
 765         if (ctrl->ops->flags & NVME_F_FABRICS &&
 766             ctrl->state == NVME_CTRL_DELETING)
 767                 return queue_live;
 768         return __nvme_check_ready(ctrl, rq, queue_live);
 769 }
 770
 771 /*
 772  * NSID shall be unique for all shared namespaces, or if at least one of the
 773  * following conditions is met:
 774  *   1. Namespace Management is supported by the controller
 775  *   2. ANA is supported by the controller
 776  *   3. NVM Set are supported by the controller
 777  *
 778  * In other case, private namespace are not required to report a unique NSID.
 779  */
 780 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl,
 781                 struct nvme_ns_head *head)
 782 {
 783         return head->shared ||
 784                 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) ||
 785                 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) ||
 786                 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS);
 787 }
 788
 789 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 790                 void *buf, unsigned bufflen);
 791 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 792                 union nvme_result *result, void *buffer, unsigned bufflen,
 793                 int qid, int at_head,
 794                 blk_mq_req_flags_t flags);
 795 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
 796                       unsigned int dword11, void *buffer, size_t buflen,
 797                       u32 *result);
 798 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
 799                       unsigned int dword11, void *buffer, size_t buflen,
 800                       u32 *result);
 801 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
 802 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
 803 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
 804 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
 805 int nvme_try_sched_reset(struct nvme_ctrl *ctrl);
 806 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
 807 void nvme_queue_scan(struct nvme_ctrl *ctrl);
 808 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
 809                 void *log, size_t size, u64 offset);
 810 bool nvme_tryget_ns_head(struct nvme_ns_head *head);
 811 void nvme_put_ns_head(struct nvme_ns_head *head);
 812 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
 813                 const struct file_operations *fops, struct module *owner);
 814 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device);
 815 int nvme_ioctl(struct block_device *bdev, fmode_t mode,
 816                 unsigned int cmd, unsigned long arg);
 817 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
 818 int nvme_ns_head_ioctl(struct block_device *bdev, fmode_t mode,
 819                 unsigned int cmd, unsigned long arg);
 820 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd,
 821                 unsigned long arg);
 822 long nvme_dev_ioctl(struct file *file, unsigned int cmd,
 823                 unsigned long arg);
 824 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd,
 825                 unsigned int issue_flags);
 826 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd,
 827                 unsigned int issue_flags);
 828 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo);
 829 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags);
 830
 831 extern const struct attribute_group *nvme_ns_id_attr_groups[];
 832 extern const struct pr_ops nvme_pr_ops;
 833 extern const struct block_device_operations nvme_ns_head_ops;
 834
 835 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
 836 #ifdef CONFIG_NVME_MULTIPATH
 837 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
 838 {
 839         return ctrl->ana_log_buf != NULL;
 840 }
 841
 842 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys);
 843 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys);
 844 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys);
 845 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys);
 846 void nvme_failover_req(struct request *req);
 847 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
 848 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
 849 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid);
 850 void nvme_mpath_remove_disk(struct nvme_ns_head *head);
 851 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id);
 852 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl);
 853 void nvme_mpath_update(struct nvme_ctrl *ctrl);
 854 void nvme_mpath_uninit(struct nvme_ctrl *ctrl);
 855 void nvme_mpath_stop(struct nvme_ctrl *ctrl);
 856 bool nvme_mpath_clear_current_path(struct nvme_ns *ns);
 857 void nvme_mpath_revalidate_paths(struct nvme_ns *ns);
 858 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl);
 859 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head);
 860
 861 static inline void nvme_trace_bio_complete(struct request *req)
 862 {
 863         struct nvme_ns *ns = req->q->queuedata;
 864
 865         if (req->cmd_flags & REQ_NVME_MPATH)
 866                 trace_block_bio_complete(ns->head->disk->queue, req->bio);
 867 }
 868
 869 extern bool multipath;
 870 extern struct device_attribute dev_attr_ana_grpid;
 871 extern struct device_attribute dev_attr_ana_state;
 872 extern struct device_attribute subsys_attr_iopolicy;
 873
 874 #else
 875 #define multipath false
 876 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
 877 {
 878         return false;
 879 }
 880 static inline void nvme_failover_req(struct request *req)
 881 {
 882 }
 883 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
 884 {
 885 }
 886 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
 887                 struct nvme_ns_head *head)
 888 {
 889         return 0;
 890 }
 891 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid)
 892 {
 893 }
 894 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
 895 {
 896 }
 897 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns)
 898 {
 899         return false;
 900 }
 901 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns)
 902 {
 903 }
 904 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl)
 905 {
 906 }
 907 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head)
 908 {
 909 }
 910 static inline void nvme_trace_bio_complete(struct request *req)
 911 {
 912 }
 913 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl)
 914 {
 915 }
 916 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl,
 917                 struct nvme_id_ctrl *id)
 918 {
 919         if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA)
 920                 dev_warn(ctrl->device,
 921 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n");
 922         return 0;
 923 }
 924 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl)
 925 {
 926 }
 927 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl)
 928 {
 929 }
 930 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl)
 931 {
 932 }
 933 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys)
 934 {
 935 }
 936 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys)
 937 {
 938 }
 939 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys)
 940 {
 941 }
 942 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys)
 943 {
 944 }
 945 #endif /* CONFIG_NVME_MULTIPATH */
 946
 947 int nvme_revalidate_zones(struct nvme_ns *ns);
 948 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector,
 949                 unsigned int nr_zones, report_zones_cb cb, void *data);
 950 #ifdef CONFIG_BLK_DEV_ZONED
 951 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf);
 952 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req,
 953                                        struct nvme_command *cmnd,
 954                                        enum nvme_zone_mgmt_action action);
 955 #else
 956 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns,
 957                 struct request *req, struct nvme_command *cmnd,
 958                 enum nvme_zone_mgmt_action action)
 959 {
 960         return BLK_STS_NOTSUPP;
 961 }
 962
 963 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf)
 964 {
 965         dev_warn(ns->ctrl->device,
 966                  "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n");
 967         return -EPROTONOSUPPORT;
 968 }
 969 #endif
 970
 971 static inline int nvme_ctrl_init_connect_q(struct nvme_ctrl *ctrl)
 972 {
 973         ctrl->connect_q = blk_mq_init_queue(ctrl->tagset);
 974         if (IS_ERR(ctrl->connect_q))
 975                 return PTR_ERR(ctrl->connect_q);
 976         return 0;
 977 }
 978
 979 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
 980 {
 981         return dev_to_disk(dev)->private_data;
 982 }
 983
 984 #ifdef CONFIG_NVME_HWMON
 985 int nvme_hwmon_init(struct nvme_ctrl *ctrl);
 986 void nvme_hwmon_exit(struct nvme_ctrl *ctrl);
 987 #else
 988 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl)
 989 {
 990         return 0;
 991 }
 992
 993 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl)
 994 {
 995 }
 996 #endif
 997
 998 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl)
 999 {
1000         return ctrl->sgls & ((1 << 0) | (1 << 1));
1001 }
1002
1003 #ifdef CONFIG_NVME_AUTH
1004 void nvme_auth_init_ctrl(struct nvme_ctrl *ctrl);
1005 void nvme_auth_stop(struct nvme_ctrl *ctrl);
1006 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid);
1007 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid);
1008 void nvme_auth_reset(struct nvme_ctrl *ctrl);
1009 void nvme_auth_free(struct nvme_ctrl *ctrl);
1010 #else
1011 static inline void nvme_auth_init_ctrl(struct nvme_ctrl *ctrl) {};
1012 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {};
1013 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid)
1014 {
1015         return -EPROTONOSUPPORT;
1016 }
1017 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid)
1018 {
1019         return NVME_SC_AUTH_REQUIRED;
1020 }
1021 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {};
1022 #endif
1023
1024 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
1025                          u8 opcode);
1026 int nvme_execute_passthru_rq(struct request *rq);
1027 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file);
1028 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid);
1029 void nvme_put_ns(struct nvme_ns *ns);
1030
1031 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl)
1032 {
1033         return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI;
1034 }
1035
1036 #ifdef CONFIG_NVME_VERBOSE_ERRORS
1037 const unsigned char *nvme_get_error_status_str(u16 status);
1038 const unsigned char *nvme_get_opcode_str(u8 opcode);
1039 const unsigned char *nvme_get_admin_opcode_str(u8 opcode);
1040 #else /* CONFIG_NVME_VERBOSE_ERRORS */
1041 static inline const unsigned char *nvme_get_error_status_str(u16 status)
1042 {
1043         return "I/O Error";
1044 }
1045 static inline const unsigned char *nvme_get_opcode_str(u8 opcode)
1046 {
1047         return "I/O Cmd";
1048 }
1049 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode)
1050 {
1051         return "Admin Cmd";
1052 }
1053 #endif /* CONFIG_NVME_VERBOSE_ERRORS */
1054
1055 #endif /* _NVME_H */