Merge branches 'acpi-battery', 'acpi-video' and 'acpi-misc'
[sfrench/cifs-2.6.git] / drivers / nvme / host / nvme.h
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (c) 2011-2014, Intel Corporation.
4  */
5
6 #ifndef _NVME_H
7 #define _NVME_H
8
9 #include <linux/nvme.h>
10 #include <linux/cdev.h>
11 #include <linux/pci.h>
12 #include <linux/kref.h>
13 #include <linux/blk-mq.h>
14 #include <linux/sed-opal.h>
15 #include <linux/fault-inject.h>
16 #include <linux/rcupdate.h>
17 #include <linux/wait.h>
18 #include <linux/t10-pi.h>
19
20 #include <trace/events/block.h>
21
22 extern unsigned int nvme_io_timeout;
23 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
24
25 extern unsigned int admin_timeout;
26 #define NVME_ADMIN_TIMEOUT      (admin_timeout * HZ)
27
28 #define NVME_DEFAULT_KATO       5
29
30 #ifdef CONFIG_ARCH_NO_SG_CHAIN
31 #define  NVME_INLINE_SG_CNT  0
32 #define  NVME_INLINE_METADATA_SG_CNT  0
33 #else
34 #define  NVME_INLINE_SG_CNT  2
35 #define  NVME_INLINE_METADATA_SG_CNT  1
36 #endif
37
38 /*
39  * Default to a 4K page size, with the intention to update this
40  * path in the future to accommodate architectures with differing
41  * kernel and IO page sizes.
42  */
43 #define NVME_CTRL_PAGE_SHIFT    12
44 #define NVME_CTRL_PAGE_SIZE     (1 << NVME_CTRL_PAGE_SHIFT)
45
46 extern struct workqueue_struct *nvme_wq;
47 extern struct workqueue_struct *nvme_reset_wq;
48 extern struct workqueue_struct *nvme_delete_wq;
49
50 /*
51  * List of workarounds for devices that required behavior not specified in
52  * the standard.
53  */
54 enum nvme_quirks {
55         /*
56          * Prefers I/O aligned to a stripe size specified in a vendor
57          * specific Identify field.
58          */
59         NVME_QUIRK_STRIPE_SIZE                  = (1 << 0),
60
61         /*
62          * The controller doesn't handle Identify value others than 0 or 1
63          * correctly.
64          */
65         NVME_QUIRK_IDENTIFY_CNS                 = (1 << 1),
66
67         /*
68          * The controller deterministically returns O's on reads to
69          * logical blocks that deallocate was called on.
70          */
71         NVME_QUIRK_DEALLOCATE_ZEROES            = (1 << 2),
72
73         /*
74          * The controller needs a delay before starts checking the device
75          * readiness, which is done by reading the NVME_CSTS_RDY bit.
76          */
77         NVME_QUIRK_DELAY_BEFORE_CHK_RDY         = (1 << 3),
78
79         /*
80          * APST should not be used.
81          */
82         NVME_QUIRK_NO_APST                      = (1 << 4),
83
84         /*
85          * The deepest sleep state should not be used.
86          */
87         NVME_QUIRK_NO_DEEPEST_PS                = (1 << 5),
88
89         /*
90          * Set MEDIUM priority on SQ creation
91          */
92         NVME_QUIRK_MEDIUM_PRIO_SQ               = (1 << 7),
93
94         /*
95          * Ignore device provided subnqn.
96          */
97         NVME_QUIRK_IGNORE_DEV_SUBNQN            = (1 << 8),
98
99         /*
100          * Broken Write Zeroes.
101          */
102         NVME_QUIRK_DISABLE_WRITE_ZEROES         = (1 << 9),
103
104         /*
105          * Force simple suspend/resume path.
106          */
107         NVME_QUIRK_SIMPLE_SUSPEND               = (1 << 10),
108
109         /*
110          * Use only one interrupt vector for all queues
111          */
112         NVME_QUIRK_SINGLE_VECTOR                = (1 << 11),
113
114         /*
115          * Use non-standard 128 bytes SQEs.
116          */
117         NVME_QUIRK_128_BYTES_SQES               = (1 << 12),
118
119         /*
120          * Prevent tag overlap between queues
121          */
122         NVME_QUIRK_SHARED_TAGS                  = (1 << 13),
123
124         /*
125          * Don't change the value of the temperature threshold feature
126          */
127         NVME_QUIRK_NO_TEMP_THRESH_CHANGE        = (1 << 14),
128
129         /*
130          * The controller doesn't handle the Identify Namespace
131          * Identification Descriptor list subcommand despite claiming
132          * NVMe 1.3 compliance.
133          */
134         NVME_QUIRK_NO_NS_DESC_LIST              = (1 << 15),
135
136         /*
137          * The controller does not properly handle DMA addresses over
138          * 48 bits.
139          */
140         NVME_QUIRK_DMA_ADDRESS_BITS_48          = (1 << 16),
141
142         /*
143          * The controller requires the command_id value be be limited, so skip
144          * encoding the generation sequence number.
145          */
146         NVME_QUIRK_SKIP_CID_GEN                 = (1 << 17),
147
148         /*
149          * Reports garbage in the namespace identifiers (eui64, nguid, uuid).
150          */
151         NVME_QUIRK_BOGUS_NID                    = (1 << 18),
152 };
153
154 /*
155  * Common request structure for NVMe passthrough.  All drivers must have
156  * this structure as the first member of their request-private data.
157  */
158 struct nvme_request {
159         struct nvme_command     *cmd;
160         union nvme_result       result;
161         u8                      genctr;
162         u8                      retries;
163         u8                      flags;
164         u16                     status;
165         struct nvme_ctrl        *ctrl;
166 };
167
168 /*
169  * Mark a bio as coming in through the mpath node.
170  */
171 #define REQ_NVME_MPATH          REQ_DRV
172
173 enum {
174         NVME_REQ_CANCELLED              = (1 << 0),
175         NVME_REQ_USERCMD                = (1 << 1),
176 };
177
178 static inline struct nvme_request *nvme_req(struct request *req)
179 {
180         return blk_mq_rq_to_pdu(req);
181 }
182
183 static inline u16 nvme_req_qid(struct request *req)
184 {
185         if (!req->q->queuedata)
186                 return 0;
187
188         return req->mq_hctx->queue_num + 1;
189 }
190
191 /* The below value is the specific amount of delay needed before checking
192  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
193  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
194  * found empirically.
195  */
196 #define NVME_QUIRK_DELAY_AMOUNT         2300
197
198 /*
199  * enum nvme_ctrl_state: Controller state
200  *
201  * @NVME_CTRL_NEW:              New controller just allocated, initial state
202  * @NVME_CTRL_LIVE:             Controller is connected and I/O capable
203  * @NVME_CTRL_RESETTING:        Controller is resetting (or scheduled reset)
204  * @NVME_CTRL_CONNECTING:       Controller is disconnected, now connecting the
205  *                              transport
206  * @NVME_CTRL_DELETING:         Controller is deleting (or scheduled deletion)
207  * @NVME_CTRL_DELETING_NOIO:    Controller is deleting and I/O is not
208  *                              disabled/failed immediately. This state comes
209  *                              after all async event processing took place and
210  *                              before ns removal and the controller deletion
211  *                              progress
212  * @NVME_CTRL_DEAD:             Controller is non-present/unresponsive during
213  *                              shutdown or removal. In this case we forcibly
214  *                              kill all inflight I/O as they have no chance to
215  *                              complete
216  */
217 enum nvme_ctrl_state {
218         NVME_CTRL_NEW,
219         NVME_CTRL_LIVE,
220         NVME_CTRL_RESETTING,
221         NVME_CTRL_CONNECTING,
222         NVME_CTRL_DELETING,
223         NVME_CTRL_DELETING_NOIO,
224         NVME_CTRL_DEAD,
225 };
226
227 struct nvme_fault_inject {
228 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
229         struct fault_attr attr;
230         struct dentry *parent;
231         bool dont_retry;        /* DNR, do not retry */
232         u16 status;             /* status code */
233 #endif
234 };
235
236 struct nvme_ctrl {
237         bool comp_seen;
238         enum nvme_ctrl_state state;
239         bool identified;
240         spinlock_t lock;
241         struct mutex scan_lock;
242         const struct nvme_ctrl_ops *ops;
243         struct request_queue *admin_q;
244         struct request_queue *connect_q;
245         struct request_queue *fabrics_q;
246         struct device *dev;
247         int instance;
248         int numa_node;
249         struct blk_mq_tag_set *tagset;
250         struct blk_mq_tag_set *admin_tagset;
251         struct list_head namespaces;
252         struct rw_semaphore namespaces_rwsem;
253         struct device ctrl_device;
254         struct device *device;  /* char device */
255 #ifdef CONFIG_NVME_HWMON
256         struct device *hwmon_device;
257 #endif
258         struct cdev cdev;
259         struct work_struct reset_work;
260         struct work_struct delete_work;
261         wait_queue_head_t state_wq;
262
263         struct nvme_subsystem *subsys;
264         struct list_head subsys_entry;
265
266         struct opal_dev *opal_dev;
267
268         char name[12];
269         u16 cntlid;
270
271         u32 ctrl_config;
272         u16 mtfa;
273         u32 queue_count;
274
275         u64 cap;
276         u32 max_hw_sectors;
277         u32 max_segments;
278         u32 max_integrity_segments;
279         u32 max_discard_sectors;
280         u32 max_discard_segments;
281         u32 max_zeroes_sectors;
282 #ifdef CONFIG_BLK_DEV_ZONED
283         u32 max_zone_append;
284 #endif
285         u16 crdt[3];
286         u16 oncs;
287         u32 dmrsl;
288         u16 oacs;
289         u16 sqsize;
290         u32 max_namespaces;
291         atomic_t abort_limit;
292         u8 vwc;
293         u32 vs;
294         u32 sgls;
295         u16 kas;
296         u8 npss;
297         u8 apsta;
298         u16 wctemp;
299         u16 cctemp;
300         u32 oaes;
301         u32 aen_result;
302         u32 ctratt;
303         unsigned int shutdown_timeout;
304         unsigned int kato;
305         bool subsystem;
306         unsigned long quirks;
307         struct nvme_id_power_state psd[32];
308         struct nvme_effects_log *effects;
309         struct xarray cels;
310         struct work_struct scan_work;
311         struct work_struct async_event_work;
312         struct delayed_work ka_work;
313         struct delayed_work failfast_work;
314         struct nvme_command ka_cmd;
315         struct work_struct fw_act_work;
316         unsigned long events;
317
318 #ifdef CONFIG_NVME_MULTIPATH
319         /* asymmetric namespace access: */
320         u8 anacap;
321         u8 anatt;
322         u32 anagrpmax;
323         u32 nanagrpid;
324         struct mutex ana_lock;
325         struct nvme_ana_rsp_hdr *ana_log_buf;
326         size_t ana_log_size;
327         struct timer_list anatt_timer;
328         struct work_struct ana_work;
329 #endif
330
331         /* Power saving configuration */
332         u64 ps_max_latency_us;
333         bool apst_enabled;
334
335         /* PCIe only: */
336         u32 hmpre;
337         u32 hmmin;
338         u32 hmminds;
339         u16 hmmaxd;
340
341         /* Fabrics only */
342         u32 ioccsz;
343         u32 iorcsz;
344         u16 icdoff;
345         u16 maxcmd;
346         int nr_reconnects;
347         unsigned long flags;
348 #define NVME_CTRL_FAILFAST_EXPIRED      0
349 #define NVME_CTRL_ADMIN_Q_STOPPED       1
350         struct nvmf_ctrl_options *opts;
351
352         struct page *discard_page;
353         unsigned long discard_page_busy;
354
355         struct nvme_fault_inject fault_inject;
356
357         enum nvme_ctrl_type cntrltype;
358         enum nvme_dctype dctype;
359 };
360
361 enum nvme_iopolicy {
362         NVME_IOPOLICY_NUMA,
363         NVME_IOPOLICY_RR,
364 };
365
366 struct nvme_subsystem {
367         int                     instance;
368         struct device           dev;
369         /*
370          * Because we unregister the device on the last put we need
371          * a separate refcount.
372          */
373         struct kref             ref;
374         struct list_head        entry;
375         struct mutex            lock;
376         struct list_head        ctrls;
377         struct list_head        nsheads;
378         char                    subnqn[NVMF_NQN_SIZE];
379         char                    serial[20];
380         char                    model[40];
381         char                    firmware_rev[8];
382         u8                      cmic;
383         enum nvme_subsys_type   subtype;
384         u16                     vendor_id;
385         u16                     awupf;  /* 0's based awupf value. */
386         struct ida              ns_ida;
387 #ifdef CONFIG_NVME_MULTIPATH
388         enum nvme_iopolicy      iopolicy;
389 #endif
390 };
391
392 /*
393  * Container structure for uniqueue namespace identifiers.
394  */
395 struct nvme_ns_ids {
396         u8      eui64[8];
397         u8      nguid[16];
398         uuid_t  uuid;
399         u8      csi;
400 };
401
402 /*
403  * Anchor structure for namespaces.  There is one for each namespace in a
404  * NVMe subsystem that any of our controllers can see, and the namespace
405  * structure for each controller is chained of it.  For private namespaces
406  * there is a 1:1 relation to our namespace structures, that is ->list
407  * only ever has a single entry for private namespaces.
408  */
409 struct nvme_ns_head {
410         struct list_head        list;
411         struct srcu_struct      srcu;
412         struct nvme_subsystem   *subsys;
413         unsigned                ns_id;
414         struct nvme_ns_ids      ids;
415         struct list_head        entry;
416         struct kref             ref;
417         bool                    shared;
418         int                     instance;
419         struct nvme_effects_log *effects;
420
421         struct cdev             cdev;
422         struct device           cdev_device;
423
424         struct gendisk          *disk;
425 #ifdef CONFIG_NVME_MULTIPATH
426         struct bio_list         requeue_list;
427         spinlock_t              requeue_lock;
428         struct work_struct      requeue_work;
429         struct mutex            lock;
430         unsigned long           flags;
431 #define NVME_NSHEAD_DISK_LIVE   0
432         struct nvme_ns __rcu    *current_path[];
433 #endif
434 };
435
436 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head)
437 {
438         return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk;
439 }
440
441 enum nvme_ns_features {
442         NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */
443         NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */
444 };
445
446 struct nvme_ns {
447         struct list_head list;
448
449         struct nvme_ctrl *ctrl;
450         struct request_queue *queue;
451         struct gendisk *disk;
452 #ifdef CONFIG_NVME_MULTIPATH
453         enum nvme_ana_state ana_state;
454         u32 ana_grpid;
455 #endif
456         struct list_head siblings;
457         struct kref kref;
458         struct nvme_ns_head *head;
459
460         int lba_shift;
461         u16 ms;
462         u16 pi_size;
463         u16 sgs;
464         u32 sws;
465         u8 pi_type;
466         u8 guard_type;
467 #ifdef CONFIG_BLK_DEV_ZONED
468         u64 zsze;
469 #endif
470         unsigned long features;
471         unsigned long flags;
472 #define NVME_NS_REMOVING        0
473 #define NVME_NS_DEAD            1
474 #define NVME_NS_ANA_PENDING     2
475 #define NVME_NS_FORCE_RO        3
476 #define NVME_NS_READY           4
477 #define NVME_NS_STOPPED         5
478
479         struct cdev             cdev;
480         struct device           cdev_device;
481
482         struct nvme_fault_inject fault_inject;
483
484 };
485
486 /* NVMe ns supports metadata actions by the controller (generate/strip) */
487 static inline bool nvme_ns_has_pi(struct nvme_ns *ns)
488 {
489         return ns->pi_type && ns->ms == ns->pi_size;
490 }
491
492 struct nvme_ctrl_ops {
493         const char *name;
494         struct module *module;
495         unsigned int flags;
496 #define NVME_F_FABRICS                  (1 << 0)
497 #define NVME_F_METADATA_SUPPORTED       (1 << 1)
498 #define NVME_F_PCI_P2PDMA               (1 << 2)
499         int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
500         int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
501         int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
502         void (*free_ctrl)(struct nvme_ctrl *ctrl);
503         void (*submit_async_event)(struct nvme_ctrl *ctrl);
504         void (*delete_ctrl)(struct nvme_ctrl *ctrl);
505         int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
506 };
507
508 /*
509  * nvme command_id is constructed as such:
510  * | xxxx | xxxxxxxxxxxx |
511  *   gen    request tag
512  */
513 #define nvme_genctr_mask(gen)                   (gen & 0xf)
514 #define nvme_cid_install_genctr(gen)            (nvme_genctr_mask(gen) << 12)
515 #define nvme_genctr_from_cid(cid)               ((cid & 0xf000) >> 12)
516 #define nvme_tag_from_cid(cid)                  (cid & 0xfff)
517
518 static inline u16 nvme_cid(struct request *rq)
519 {
520         return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag;
521 }
522
523 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags,
524                 u16 command_id)
525 {
526         u8 genctr = nvme_genctr_from_cid(command_id);
527         u16 tag = nvme_tag_from_cid(command_id);
528         struct request *rq;
529
530         rq = blk_mq_tag_to_rq(tags, tag);
531         if (unlikely(!rq)) {
532                 pr_err("could not locate request for tag %#x\n",
533                         tag);
534                 return NULL;
535         }
536         if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) {
537                 dev_err(nvme_req(rq)->ctrl->device,
538                         "request %#x genctr mismatch (got %#x expected %#x)\n",
539                         tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr));
540                 return NULL;
541         }
542         return rq;
543 }
544
545 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags,
546                 u16 command_id)
547 {
548         return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id));
549 }
550
551 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
552 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
553                             const char *dev_name);
554 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject);
555 void nvme_should_fail(struct request *req);
556 #else
557 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
558                                           const char *dev_name)
559 {
560 }
561 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj)
562 {
563 }
564 static inline void nvme_should_fail(struct request *req) {}
565 #endif
566
567 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
568 {
569         if (!ctrl->subsystem)
570                 return -ENOTTY;
571         return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
572 }
573
574 /*
575  * Convert a 512B sector number to a device logical block number.
576  */
577 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector)
578 {
579         return sector >> (ns->lba_shift - SECTOR_SHIFT);
580 }
581
582 /*
583  * Convert a device logical block number to a 512B sector number.
584  */
585 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba)
586 {
587         return lba << (ns->lba_shift - SECTOR_SHIFT);
588 }
589
590 /*
591  * Convert byte length to nvme's 0-based num dwords
592  */
593 static inline u32 nvme_bytes_to_numd(size_t len)
594 {
595         return (len >> 2) - 1;
596 }
597
598 static inline bool nvme_is_ana_error(u16 status)
599 {
600         switch (status & 0x7ff) {
601         case NVME_SC_ANA_TRANSITION:
602         case NVME_SC_ANA_INACCESSIBLE:
603         case NVME_SC_ANA_PERSISTENT_LOSS:
604                 return true;
605         default:
606                 return false;
607         }
608 }
609
610 static inline bool nvme_is_path_error(u16 status)
611 {
612         /* check for a status code type of 'path related status' */
613         return (status & 0x700) == 0x300;
614 }
615
616 /*
617  * Fill in the status and result information from the CQE, and then figure out
618  * if blk-mq will need to use IPI magic to complete the request, and if yes do
619  * so.  If not let the caller complete the request without an indirect function
620  * call.
621  */
622 static inline bool nvme_try_complete_req(struct request *req, __le16 status,
623                 union nvme_result result)
624 {
625         struct nvme_request *rq = nvme_req(req);
626         struct nvme_ctrl *ctrl = rq->ctrl;
627
628         if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN))
629                 rq->genctr++;
630
631         rq->status = le16_to_cpu(status) >> 1;
632         rq->result = result;
633         /* inject error when permitted by fault injection framework */
634         nvme_should_fail(req);
635         if (unlikely(blk_should_fake_timeout(req->q)))
636                 return true;
637         return blk_mq_complete_request_remote(req);
638 }
639
640 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
641 {
642         get_device(ctrl->device);
643 }
644
645 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
646 {
647         put_device(ctrl->device);
648 }
649
650 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id)
651 {
652         return !qid &&
653                 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH;
654 }
655
656 void nvme_complete_rq(struct request *req);
657 void nvme_complete_batch_req(struct request *req);
658
659 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob,
660                                                 void (*fn)(struct request *rq))
661 {
662         struct request *req;
663
664         rq_list_for_each(&iob->req_list, req) {
665                 fn(req);
666                 nvme_complete_batch_req(req);
667         }
668         blk_mq_end_request_batch(iob);
669 }
670
671 blk_status_t nvme_host_path_error(struct request *req);
672 bool nvme_cancel_request(struct request *req, void *data, bool reserved);
673 void nvme_cancel_tagset(struct nvme_ctrl *ctrl);
674 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl);
675 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
676                 enum nvme_ctrl_state new_state);
677 bool nvme_wait_reset(struct nvme_ctrl *ctrl);
678 int nvme_disable_ctrl(struct nvme_ctrl *ctrl);
679 int nvme_enable_ctrl(struct nvme_ctrl *ctrl);
680 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
681 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
682                 const struct nvme_ctrl_ops *ops, unsigned long quirks);
683 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
684 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
685 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
686 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl);
687
688 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
689
690 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
691                 bool send);
692
693 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
694                 volatile union nvme_result *res);
695
696 void nvme_stop_queues(struct nvme_ctrl *ctrl);
697 void nvme_start_queues(struct nvme_ctrl *ctrl);
698 void nvme_stop_admin_queue(struct nvme_ctrl *ctrl);
699 void nvme_start_admin_queue(struct nvme_ctrl *ctrl);
700 void nvme_kill_queues(struct nvme_ctrl *ctrl);
701 void nvme_sync_queues(struct nvme_ctrl *ctrl);
702 void nvme_sync_io_queues(struct nvme_ctrl *ctrl);
703 void nvme_unfreeze(struct nvme_ctrl *ctrl);
704 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
705 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
706 void nvme_start_freeze(struct nvme_ctrl *ctrl);
707
708 static inline unsigned int nvme_req_op(struct nvme_command *cmd)
709 {
710         return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
711 }
712
713 #define NVME_QID_ANY -1
714 void nvme_init_request(struct request *req, struct nvme_command *cmd);
715 void nvme_cleanup_cmd(struct request *req);
716 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req);
717 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
718                 struct request *req);
719 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
720                 bool queue_live);
721
722 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
723                 bool queue_live)
724 {
725         if (likely(ctrl->state == NVME_CTRL_LIVE))
726                 return true;
727         if (ctrl->ops->flags & NVME_F_FABRICS &&
728             ctrl->state == NVME_CTRL_DELETING)
729                 return queue_live;
730         return __nvme_check_ready(ctrl, rq, queue_live);
731 }
732
733 /*
734  * NSID shall be unique for all shared namespaces, or if at least one of the
735  * following conditions is met:
736  *   1. Namespace Management is supported by the controller
737  *   2. ANA is supported by the controller
738  *   3. NVM Set are supported by the controller
739  *
740  * In other case, private namespace are not required to report a unique NSID.
741  */
742 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl,
743                 struct nvme_ns_head *head)
744 {
745         return head->shared ||
746                 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) ||
747                 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) ||
748                 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS);
749 }
750
751 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
752                 void *buf, unsigned bufflen);
753 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
754                 union nvme_result *result, void *buffer, unsigned bufflen,
755                 unsigned timeout, int qid, int at_head,
756                 blk_mq_req_flags_t flags);
757 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
758                       unsigned int dword11, void *buffer, size_t buflen,
759                       u32 *result);
760 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
761                       unsigned int dword11, void *buffer, size_t buflen,
762                       u32 *result);
763 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
764 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
765 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
766 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
767 int nvme_try_sched_reset(struct nvme_ctrl *ctrl);
768 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
769 void nvme_queue_scan(struct nvme_ctrl *ctrl);
770 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
771                 void *log, size_t size, u64 offset);
772 bool nvme_tryget_ns_head(struct nvme_ns_head *head);
773 void nvme_put_ns_head(struct nvme_ns_head *head);
774 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
775                 const struct file_operations *fops, struct module *owner);
776 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device);
777 int nvme_ioctl(struct block_device *bdev, fmode_t mode,
778                 unsigned int cmd, unsigned long arg);
779 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
780 int nvme_ns_head_ioctl(struct block_device *bdev, fmode_t mode,
781                 unsigned int cmd, unsigned long arg);
782 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd,
783                 unsigned long arg);
784 long nvme_dev_ioctl(struct file *file, unsigned int cmd,
785                 unsigned long arg);
786 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd,
787                 unsigned int issue_flags);
788 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd,
789                 unsigned int issue_flags);
790 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo);
791 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags);
792
793 extern const struct attribute_group *nvme_ns_id_attr_groups[];
794 extern const struct pr_ops nvme_pr_ops;
795 extern const struct block_device_operations nvme_ns_head_ops;
796
797 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
798 #ifdef CONFIG_NVME_MULTIPATH
799 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
800 {
801         return ctrl->ana_log_buf != NULL;
802 }
803
804 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys);
805 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys);
806 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys);
807 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys);
808 void nvme_failover_req(struct request *req);
809 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
810 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
811 void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id);
812 void nvme_mpath_remove_disk(struct nvme_ns_head *head);
813 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id);
814 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl);
815 void nvme_mpath_update(struct nvme_ctrl *ctrl);
816 void nvme_mpath_uninit(struct nvme_ctrl *ctrl);
817 void nvme_mpath_stop(struct nvme_ctrl *ctrl);
818 bool nvme_mpath_clear_current_path(struct nvme_ns *ns);
819 void nvme_mpath_revalidate_paths(struct nvme_ns *ns);
820 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl);
821 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head);
822
823 static inline void nvme_trace_bio_complete(struct request *req)
824 {
825         struct nvme_ns *ns = req->q->queuedata;
826
827         if (req->cmd_flags & REQ_NVME_MPATH)
828                 trace_block_bio_complete(ns->head->disk->queue, req->bio);
829 }
830
831 extern bool multipath;
832 extern struct device_attribute dev_attr_ana_grpid;
833 extern struct device_attribute dev_attr_ana_state;
834 extern struct device_attribute subsys_attr_iopolicy;
835
836 #else
837 #define multipath false
838 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
839 {
840         return false;
841 }
842 static inline void nvme_failover_req(struct request *req)
843 {
844 }
845 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
846 {
847 }
848 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
849                 struct nvme_ns_head *head)
850 {
851         return 0;
852 }
853 static inline void nvme_mpath_add_disk(struct nvme_ns *ns,
854                 struct nvme_id_ns *id)
855 {
856 }
857 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
858 {
859 }
860 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns)
861 {
862         return false;
863 }
864 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns)
865 {
866 }
867 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl)
868 {
869 }
870 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head)
871 {
872 }
873 static inline void nvme_trace_bio_complete(struct request *req)
874 {
875 }
876 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl)
877 {
878 }
879 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl,
880                 struct nvme_id_ctrl *id)
881 {
882         if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA)
883                 dev_warn(ctrl->device,
884 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n");
885         return 0;
886 }
887 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl)
888 {
889 }
890 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl)
891 {
892 }
893 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl)
894 {
895 }
896 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys)
897 {
898 }
899 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys)
900 {
901 }
902 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys)
903 {
904 }
905 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys)
906 {
907 }
908 #endif /* CONFIG_NVME_MULTIPATH */
909
910 int nvme_revalidate_zones(struct nvme_ns *ns);
911 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector,
912                 unsigned int nr_zones, report_zones_cb cb, void *data);
913 #ifdef CONFIG_BLK_DEV_ZONED
914 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf);
915 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req,
916                                        struct nvme_command *cmnd,
917                                        enum nvme_zone_mgmt_action action);
918 #else
919 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns,
920                 struct request *req, struct nvme_command *cmnd,
921                 enum nvme_zone_mgmt_action action)
922 {
923         return BLK_STS_NOTSUPP;
924 }
925
926 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf)
927 {
928         dev_warn(ns->ctrl->device,
929                  "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n");
930         return -EPROTONOSUPPORT;
931 }
932 #endif
933
934 static inline int nvme_ctrl_init_connect_q(struct nvme_ctrl *ctrl)
935 {
936         ctrl->connect_q = blk_mq_init_queue(ctrl->tagset);
937         if (IS_ERR(ctrl->connect_q))
938                 return PTR_ERR(ctrl->connect_q);
939         return 0;
940 }
941
942 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
943 {
944         return dev_to_disk(dev)->private_data;
945 }
946
947 #ifdef CONFIG_NVME_HWMON
948 int nvme_hwmon_init(struct nvme_ctrl *ctrl);
949 void nvme_hwmon_exit(struct nvme_ctrl *ctrl);
950 #else
951 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl)
952 {
953         return 0;
954 }
955
956 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl)
957 {
958 }
959 #endif
960
961 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl)
962 {
963         return ctrl->sgls & ((1 << 0) | (1 << 1));
964 }
965
966 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
967                          u8 opcode);
968 int nvme_execute_passthru_rq(struct request *rq);
969 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file);
970 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid);
971 void nvme_put_ns(struct nvme_ns *ns);
972
973 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl)
974 {
975         return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI;
976 }
977
978 #ifdef CONFIG_NVME_VERBOSE_ERRORS
979 const unsigned char *nvme_get_error_status_str(u16 status);
980 const unsigned char *nvme_get_opcode_str(u8 opcode);
981 const unsigned char *nvme_get_admin_opcode_str(u8 opcode);
982 #else /* CONFIG_NVME_VERBOSE_ERRORS */
983 static inline const unsigned char *nvme_get_error_status_str(u16 status)
984 {
985         return "I/O Error";
986 }
987 static inline const unsigned char *nvme_get_opcode_str(u8 opcode)
988 {
989         return "I/O Cmd";
990 }
991 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode)
992 {
993         return "Admin Cmd";
994 }
995 #endif /* CONFIG_NVME_VERBOSE_ERRORS */
996
997 #endif /* _NVME_H */