ahci: don't ignore result code of ahci_reset_controller()
[sfrench/cifs-2.6.git] / drivers / nvme / host / nvme.h
1 /*
2  * Copyright (c) 2011-2014, Intel Corporation.
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms and conditions of the GNU General Public License,
6  * version 2, as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope it will be useful, but WITHOUT
9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11  * more details.
12  */
13
14 #ifndef _NVME_H
15 #define _NVME_H
16
17 #include <linux/nvme.h>
18 #include <linux/pci.h>
19 #include <linux/kref.h>
20 #include <linux/blk-mq.h>
21 #include <linux/lightnvm.h>
22 #include <linux/sed-opal.h>
23
24 extern unsigned char nvme_io_timeout;
25 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
26
27 extern unsigned char admin_timeout;
28 #define ADMIN_TIMEOUT   (admin_timeout * HZ)
29
30 #define NVME_DEFAULT_KATO       5
31 #define NVME_KATO_GRACE         10
32
33 extern struct workqueue_struct *nvme_wq;
34
35 enum {
36         NVME_NS_LBA             = 0,
37         NVME_NS_LIGHTNVM        = 1,
38 };
39
40 /*
41  * List of workarounds for devices that required behavior not specified in
42  * the standard.
43  */
44 enum nvme_quirks {
45         /*
46          * Prefers I/O aligned to a stripe size specified in a vendor
47          * specific Identify field.
48          */
49         NVME_QUIRK_STRIPE_SIZE                  = (1 << 0),
50
51         /*
52          * The controller doesn't handle Identify value others than 0 or 1
53          * correctly.
54          */
55         NVME_QUIRK_IDENTIFY_CNS                 = (1 << 1),
56
57         /*
58          * The controller deterministically returns O's on reads to
59          * logical blocks that deallocate was called on.
60          */
61         NVME_QUIRK_DEALLOCATE_ZEROES            = (1 << 2),
62
63         /*
64          * The controller needs a delay before starts checking the device
65          * readiness, which is done by reading the NVME_CSTS_RDY bit.
66          */
67         NVME_QUIRK_DELAY_BEFORE_CHK_RDY         = (1 << 3),
68
69         /*
70          * APST should not be used.
71          */
72         NVME_QUIRK_NO_APST                      = (1 << 4),
73
74         /*
75          * The deepest sleep state should not be used.
76          */
77         NVME_QUIRK_NO_DEEPEST_PS                = (1 << 5),
78 };
79
80 /*
81  * Common request structure for NVMe passthrough.  All drivers must have
82  * this structure as the first member of their request-private data.
83  */
84 struct nvme_request {
85         struct nvme_command     *cmd;
86         union nvme_result       result;
87         u8                      retries;
88         u8                      flags;
89         u16                     status;
90 };
91
92 enum {
93         NVME_REQ_CANCELLED              = (1 << 0),
94 };
95
96 static inline struct nvme_request *nvme_req(struct request *req)
97 {
98         return blk_mq_rq_to_pdu(req);
99 }
100
101 /* The below value is the specific amount of delay needed before checking
102  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
103  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
104  * found empirically.
105  */
106 #define NVME_QUIRK_DELAY_AMOUNT         2000
107
108 enum nvme_ctrl_state {
109         NVME_CTRL_NEW,
110         NVME_CTRL_LIVE,
111         NVME_CTRL_RESETTING,
112         NVME_CTRL_RECONNECTING,
113         NVME_CTRL_DELETING,
114         NVME_CTRL_DEAD,
115 };
116
117 struct nvme_ctrl {
118         enum nvme_ctrl_state state;
119         bool identified;
120         spinlock_t lock;
121         const struct nvme_ctrl_ops *ops;
122         struct request_queue *admin_q;
123         struct request_queue *connect_q;
124         struct device *dev;
125         struct kref kref;
126         int instance;
127         struct blk_mq_tag_set *tagset;
128         struct list_head namespaces;
129         struct mutex namespaces_mutex;
130         struct device *device;  /* char device */
131         struct list_head node;
132         struct ida ns_ida;
133         struct work_struct reset_work;
134
135         struct opal_dev *opal_dev;
136
137         char name[12];
138         char serial[20];
139         char model[40];
140         char firmware_rev[8];
141         char subnqn[NVMF_NQN_SIZE];
142         u16 cntlid;
143
144         u32 ctrl_config;
145         u32 queue_count;
146
147         u64 cap;
148         u32 page_size;
149         u32 max_hw_sectors;
150         u16 oncs;
151         u16 vid;
152         u16 oacs;
153         u16 nssa;
154         u16 nr_streams;
155         atomic_t abort_limit;
156         u8 event_limit;
157         u8 vwc;
158         u32 vs;
159         u32 sgls;
160         u16 kas;
161         u8 npss;
162         u8 apsta;
163         unsigned int kato;
164         bool subsystem;
165         unsigned long quirks;
166         struct nvme_id_power_state psd[32];
167         struct work_struct scan_work;
168         struct work_struct async_event_work;
169         struct delayed_work ka_work;
170
171         /* Power saving configuration */
172         u64 ps_max_latency_us;
173         bool apst_enabled;
174
175         u32 hmpre;
176         u32 hmmin;
177
178         /* Fabrics only */
179         u16 sqsize;
180         u32 ioccsz;
181         u32 iorcsz;
182         u16 icdoff;
183         u16 maxcmd;
184         int nr_reconnects;
185         struct nvmf_ctrl_options *opts;
186 };
187
188 struct nvme_ns {
189         struct list_head list;
190
191         struct nvme_ctrl *ctrl;
192         struct request_queue *queue;
193         struct gendisk *disk;
194         struct nvm_dev *ndev;
195         struct kref kref;
196         int instance;
197
198         u8 eui[8];
199         u8 nguid[16];
200         uuid_t uuid;
201
202         unsigned ns_id;
203         int lba_shift;
204         u16 ms;
205         u16 sgs;
206         u32 sws;
207         bool ext;
208         u8 pi_type;
209         unsigned long flags;
210         u16 noiob;
211
212 #define NVME_NS_REMOVING 0
213 #define NVME_NS_DEAD     1
214
215         u64 mode_select_num_blocks;
216         u32 mode_select_block_len;
217 };
218
219 struct nvme_ctrl_ops {
220         const char *name;
221         struct module *module;
222         unsigned int flags;
223 #define NVME_F_FABRICS                  (1 << 0)
224 #define NVME_F_METADATA_SUPPORTED       (1 << 1)
225         int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
226         int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
227         int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
228         void (*free_ctrl)(struct nvme_ctrl *ctrl);
229         void (*submit_async_event)(struct nvme_ctrl *ctrl, int aer_idx);
230         int (*delete_ctrl)(struct nvme_ctrl *ctrl);
231         int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
232 };
233
234 static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
235 {
236         u32 val = 0;
237
238         if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
239                 return false;
240         return val & NVME_CSTS_RDY;
241 }
242
243 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
244 {
245         if (!ctrl->subsystem)
246                 return -ENOTTY;
247         return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
248 }
249
250 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
251 {
252         return (sector >> (ns->lba_shift - 9));
253 }
254
255 static inline void nvme_cleanup_cmd(struct request *req)
256 {
257         if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
258                 kfree(page_address(req->special_vec.bv_page) +
259                       req->special_vec.bv_offset);
260         }
261 }
262
263 static inline void nvme_end_request(struct request *req, __le16 status,
264                 union nvme_result result)
265 {
266         struct nvme_request *rq = nvme_req(req);
267
268         rq->status = le16_to_cpu(status) >> 1;
269         rq->result = result;
270         blk_mq_complete_request(req);
271 }
272
273 void nvme_complete_rq(struct request *req);
274 void nvme_cancel_request(struct request *req, void *data, bool reserved);
275 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
276                 enum nvme_ctrl_state new_state);
277 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
278 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
279 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
280 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
281                 const struct nvme_ctrl_ops *ops, unsigned long quirks);
282 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
283 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
284 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
285 void nvme_put_ctrl(struct nvme_ctrl *ctrl);
286 int nvme_init_identify(struct nvme_ctrl *ctrl);
287
288 void nvme_queue_scan(struct nvme_ctrl *ctrl);
289 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
290
291 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
292                 bool send);
293
294 #define NVME_NR_AERS    1
295 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
296                 union nvme_result *res);
297 void nvme_queue_async_events(struct nvme_ctrl *ctrl);
298
299 void nvme_stop_queues(struct nvme_ctrl *ctrl);
300 void nvme_start_queues(struct nvme_ctrl *ctrl);
301 void nvme_kill_queues(struct nvme_ctrl *ctrl);
302 void nvme_unfreeze(struct nvme_ctrl *ctrl);
303 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
304 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
305 void nvme_start_freeze(struct nvme_ctrl *ctrl);
306
307 #define NVME_QID_ANY -1
308 struct request *nvme_alloc_request(struct request_queue *q,
309                 struct nvme_command *cmd, unsigned int flags, int qid);
310 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
311                 struct nvme_command *cmd);
312 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
313                 void *buf, unsigned bufflen);
314 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
315                 union nvme_result *result, void *buffer, unsigned bufflen,
316                 unsigned timeout, int qid, int at_head, int flags);
317 int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
318                 void __user *ubuffer, unsigned bufflen, u32 *result,
319                 unsigned timeout);
320 int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
321                 void __user *ubuffer, unsigned bufflen,
322                 void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
323                 u32 *result, unsigned timeout);
324 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
325 void nvme_start_keep_alive(struct nvme_ctrl *ctrl);
326 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
327 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
328
329 #ifdef CONFIG_NVM
330 int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id);
331 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node);
332 void nvme_nvm_unregister(struct nvme_ns *ns);
333 int nvme_nvm_register_sysfs(struct nvme_ns *ns);
334 void nvme_nvm_unregister_sysfs(struct nvme_ns *ns);
335 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg);
336 #else
337 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name,
338                                     int node)
339 {
340         return 0;
341 }
342
343 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {};
344 static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns)
345 {
346         return 0;
347 }
348 static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {};
349 static inline int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id)
350 {
351         return 0;
352 }
353 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd,
354                                                         unsigned long arg)
355 {
356         return -ENOTTY;
357 }
358 #endif /* CONFIG_NVM */
359
360 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
361 {
362         return dev_to_disk(dev)->private_data;
363 }
364
365 int __init nvme_core_init(void);
366 void nvme_core_exit(void);
367
368 #endif /* _NVME_H */