zonefs: convert zonefs to use the new mount api
[sfrench/cifs-2.6.git] / drivers / nvme / host / nvme.h
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (c) 2011-2014, Intel Corporation.
4  */
5
6 #ifndef _NVME_H
7 #define _NVME_H
8
9 #include <linux/nvme.h>
10 #include <linux/cdev.h>
11 #include <linux/pci.h>
12 #include <linux/kref.h>
13 #include <linux/blk-mq.h>
14 #include <linux/sed-opal.h>
15 #include <linux/fault-inject.h>
16 #include <linux/rcupdate.h>
17 #include <linux/wait.h>
18 #include <linux/t10-pi.h>
19 #include <linux/ratelimit_types.h>
20
21 #include <trace/events/block.h>
22
23 extern const struct pr_ops nvme_pr_ops;
24
25 extern unsigned int nvme_io_timeout;
26 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
27
28 extern unsigned int admin_timeout;
29 #define NVME_ADMIN_TIMEOUT      (admin_timeout * HZ)
30
31 #define NVME_DEFAULT_KATO       5
32
33 #ifdef CONFIG_ARCH_NO_SG_CHAIN
34 #define  NVME_INLINE_SG_CNT  0
35 #define  NVME_INLINE_METADATA_SG_CNT  0
36 #else
37 #define  NVME_INLINE_SG_CNT  2
38 #define  NVME_INLINE_METADATA_SG_CNT  1
39 #endif
40
41 /*
42  * Default to a 4K page size, with the intention to update this
43  * path in the future to accommodate architectures with differing
44  * kernel and IO page sizes.
45  */
46 #define NVME_CTRL_PAGE_SHIFT    12
47 #define NVME_CTRL_PAGE_SIZE     (1 << NVME_CTRL_PAGE_SHIFT)
48
49 extern struct workqueue_struct *nvme_wq;
50 extern struct workqueue_struct *nvme_reset_wq;
51 extern struct workqueue_struct *nvme_delete_wq;
52
53 /*
54  * List of workarounds for devices that required behavior not specified in
55  * the standard.
56  */
57 enum nvme_quirks {
58         /*
59          * Prefers I/O aligned to a stripe size specified in a vendor
60          * specific Identify field.
61          */
62         NVME_QUIRK_STRIPE_SIZE                  = (1 << 0),
63
64         /*
65          * The controller doesn't handle Identify value others than 0 or 1
66          * correctly.
67          */
68         NVME_QUIRK_IDENTIFY_CNS                 = (1 << 1),
69
70         /*
71          * The controller deterministically returns O's on reads to
72          * logical blocks that deallocate was called on.
73          */
74         NVME_QUIRK_DEALLOCATE_ZEROES            = (1 << 2),
75
76         /*
77          * The controller needs a delay before starts checking the device
78          * readiness, which is done by reading the NVME_CSTS_RDY bit.
79          */
80         NVME_QUIRK_DELAY_BEFORE_CHK_RDY         = (1 << 3),
81
82         /*
83          * APST should not be used.
84          */
85         NVME_QUIRK_NO_APST                      = (1 << 4),
86
87         /*
88          * The deepest sleep state should not be used.
89          */
90         NVME_QUIRK_NO_DEEPEST_PS                = (1 << 5),
91
92         /*
93          * Set MEDIUM priority on SQ creation
94          */
95         NVME_QUIRK_MEDIUM_PRIO_SQ               = (1 << 7),
96
97         /*
98          * Ignore device provided subnqn.
99          */
100         NVME_QUIRK_IGNORE_DEV_SUBNQN            = (1 << 8),
101
102         /*
103          * Broken Write Zeroes.
104          */
105         NVME_QUIRK_DISABLE_WRITE_ZEROES         = (1 << 9),
106
107         /*
108          * Force simple suspend/resume path.
109          */
110         NVME_QUIRK_SIMPLE_SUSPEND               = (1 << 10),
111
112         /*
113          * Use only one interrupt vector for all queues
114          */
115         NVME_QUIRK_SINGLE_VECTOR                = (1 << 11),
116
117         /*
118          * Use non-standard 128 bytes SQEs.
119          */
120         NVME_QUIRK_128_BYTES_SQES               = (1 << 12),
121
122         /*
123          * Prevent tag overlap between queues
124          */
125         NVME_QUIRK_SHARED_TAGS                  = (1 << 13),
126
127         /*
128          * Don't change the value of the temperature threshold feature
129          */
130         NVME_QUIRK_NO_TEMP_THRESH_CHANGE        = (1 << 14),
131
132         /*
133          * The controller doesn't handle the Identify Namespace
134          * Identification Descriptor list subcommand despite claiming
135          * NVMe 1.3 compliance.
136          */
137         NVME_QUIRK_NO_NS_DESC_LIST              = (1 << 15),
138
139         /*
140          * The controller does not properly handle DMA addresses over
141          * 48 bits.
142          */
143         NVME_QUIRK_DMA_ADDRESS_BITS_48          = (1 << 16),
144
145         /*
146          * The controller requires the command_id value be limited, so skip
147          * encoding the generation sequence number.
148          */
149         NVME_QUIRK_SKIP_CID_GEN                 = (1 << 17),
150
151         /*
152          * Reports garbage in the namespace identifiers (eui64, nguid, uuid).
153          */
154         NVME_QUIRK_BOGUS_NID                    = (1 << 18),
155
156         /*
157          * No temperature thresholds for channels other than 0 (Composite).
158          */
159         NVME_QUIRK_NO_SECONDARY_TEMP_THRESH     = (1 << 19),
160
161         /*
162          * Disables simple suspend/resume path.
163          */
164         NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND      = (1 << 20),
165 };
166
167 /*
168  * Common request structure for NVMe passthrough.  All drivers must have
169  * this structure as the first member of their request-private data.
170  */
171 struct nvme_request {
172         struct nvme_command     *cmd;
173         union nvme_result       result;
174         u8                      genctr;
175         u8                      retries;
176         u8                      flags;
177         u16                     status;
178 #ifdef CONFIG_NVME_MULTIPATH
179         unsigned long           start_time;
180 #endif
181         struct nvme_ctrl        *ctrl;
182 };
183
184 /*
185  * Mark a bio as coming in through the mpath node.
186  */
187 #define REQ_NVME_MPATH          REQ_DRV
188
189 enum {
190         NVME_REQ_CANCELLED              = (1 << 0),
191         NVME_REQ_USERCMD                = (1 << 1),
192         NVME_MPATH_IO_STATS             = (1 << 2),
193 };
194
195 static inline struct nvme_request *nvme_req(struct request *req)
196 {
197         return blk_mq_rq_to_pdu(req);
198 }
199
200 static inline u16 nvme_req_qid(struct request *req)
201 {
202         if (!req->q->queuedata)
203                 return 0;
204
205         return req->mq_hctx->queue_num + 1;
206 }
207
208 /* The below value is the specific amount of delay needed before checking
209  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
210  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
211  * found empirically.
212  */
213 #define NVME_QUIRK_DELAY_AMOUNT         2300
214
215 /*
216  * enum nvme_ctrl_state: Controller state
217  *
218  * @NVME_CTRL_NEW:              New controller just allocated, initial state
219  * @NVME_CTRL_LIVE:             Controller is connected and I/O capable
220  * @NVME_CTRL_RESETTING:        Controller is resetting (or scheduled reset)
221  * @NVME_CTRL_CONNECTING:       Controller is disconnected, now connecting the
222  *                              transport
223  * @NVME_CTRL_DELETING:         Controller is deleting (or scheduled deletion)
224  * @NVME_CTRL_DELETING_NOIO:    Controller is deleting and I/O is not
225  *                              disabled/failed immediately. This state comes
226  *                              after all async event processing took place and
227  *                              before ns removal and the controller deletion
228  *                              progress
229  * @NVME_CTRL_DEAD:             Controller is non-present/unresponsive during
230  *                              shutdown or removal. In this case we forcibly
231  *                              kill all inflight I/O as they have no chance to
232  *                              complete
233  */
234 enum nvme_ctrl_state {
235         NVME_CTRL_NEW,
236         NVME_CTRL_LIVE,
237         NVME_CTRL_RESETTING,
238         NVME_CTRL_CONNECTING,
239         NVME_CTRL_DELETING,
240         NVME_CTRL_DELETING_NOIO,
241         NVME_CTRL_DEAD,
242 };
243
244 struct nvme_fault_inject {
245 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
246         struct fault_attr attr;
247         struct dentry *parent;
248         bool dont_retry;        /* DNR, do not retry */
249         u16 status;             /* status code */
250 #endif
251 };
252
253 enum nvme_ctrl_flags {
254         NVME_CTRL_FAILFAST_EXPIRED      = 0,
255         NVME_CTRL_ADMIN_Q_STOPPED       = 1,
256         NVME_CTRL_STARTED_ONCE          = 2,
257         NVME_CTRL_STOPPED               = 3,
258         NVME_CTRL_SKIP_ID_CNS_CS        = 4,
259         NVME_CTRL_DIRTY_CAPABILITY      = 5,
260         NVME_CTRL_FROZEN                = 6,
261 };
262
263 struct nvme_ctrl {
264         bool comp_seen;
265         bool identified;
266         bool passthru_err_log_enabled;
267         enum nvme_ctrl_state state;
268         spinlock_t lock;
269         struct mutex scan_lock;
270         const struct nvme_ctrl_ops *ops;
271         struct request_queue *admin_q;
272         struct request_queue *connect_q;
273         struct request_queue *fabrics_q;
274         struct device *dev;
275         int instance;
276         int numa_node;
277         struct blk_mq_tag_set *tagset;
278         struct blk_mq_tag_set *admin_tagset;
279         struct list_head namespaces;
280         struct rw_semaphore namespaces_rwsem;
281         struct device ctrl_device;
282         struct device *device;  /* char device */
283 #ifdef CONFIG_NVME_HWMON
284         struct device *hwmon_device;
285 #endif
286         struct cdev cdev;
287         struct work_struct reset_work;
288         struct work_struct delete_work;
289         wait_queue_head_t state_wq;
290
291         struct nvme_subsystem *subsys;
292         struct list_head subsys_entry;
293
294         struct opal_dev *opal_dev;
295
296         char name[12];
297         u16 cntlid;
298
299         u16 mtfa;
300         u32 ctrl_config;
301         u32 queue_count;
302
303         u64 cap;
304         u32 max_hw_sectors;
305         u32 max_segments;
306         u32 max_integrity_segments;
307         u32 max_zeroes_sectors;
308 #ifdef CONFIG_BLK_DEV_ZONED
309         u32 max_zone_append;
310 #endif
311         u16 crdt[3];
312         u16 oncs;
313         u8 dmrl;
314         u32 dmrsl;
315         u16 oacs;
316         u16 sqsize;
317         u32 max_namespaces;
318         atomic_t abort_limit;
319         u8 vwc;
320         u32 vs;
321         u32 sgls;
322         u16 kas;
323         u8 npss;
324         u8 apsta;
325         u16 wctemp;
326         u16 cctemp;
327         u32 oaes;
328         u32 aen_result;
329         u32 ctratt;
330         unsigned int shutdown_timeout;
331         unsigned int kato;
332         bool subsystem;
333         unsigned long quirks;
334         struct nvme_id_power_state psd[32];
335         struct nvme_effects_log *effects;
336         struct xarray cels;
337         struct work_struct scan_work;
338         struct work_struct async_event_work;
339         struct delayed_work ka_work;
340         struct delayed_work failfast_work;
341         struct nvme_command ka_cmd;
342         unsigned long ka_last_check_time;
343         struct work_struct fw_act_work;
344         unsigned long events;
345
346 #ifdef CONFIG_NVME_MULTIPATH
347         /* asymmetric namespace access: */
348         u8 anacap;
349         u8 anatt;
350         u32 anagrpmax;
351         u32 nanagrpid;
352         struct mutex ana_lock;
353         struct nvme_ana_rsp_hdr *ana_log_buf;
354         size_t ana_log_size;
355         struct timer_list anatt_timer;
356         struct work_struct ana_work;
357 #endif
358
359 #ifdef CONFIG_NVME_HOST_AUTH
360         struct work_struct dhchap_auth_work;
361         struct mutex dhchap_auth_mutex;
362         struct nvme_dhchap_queue_context *dhchap_ctxs;
363         struct nvme_dhchap_key *host_key;
364         struct nvme_dhchap_key *ctrl_key;
365         u16 transaction;
366 #endif
367         struct key *tls_key;
368
369         /* Power saving configuration */
370         u64 ps_max_latency_us;
371         bool apst_enabled;
372
373         /* PCIe only: */
374         u16 hmmaxd;
375         u32 hmpre;
376         u32 hmmin;
377         u32 hmminds;
378
379         /* Fabrics only */
380         u32 ioccsz;
381         u32 iorcsz;
382         u16 icdoff;
383         u16 maxcmd;
384         int nr_reconnects;
385         unsigned long flags;
386         struct nvmf_ctrl_options *opts;
387
388         struct page *discard_page;
389         unsigned long discard_page_busy;
390
391         struct nvme_fault_inject fault_inject;
392
393         enum nvme_ctrl_type cntrltype;
394         enum nvme_dctype dctype;
395 };
396
397 static inline enum nvme_ctrl_state nvme_ctrl_state(struct nvme_ctrl *ctrl)
398 {
399         return READ_ONCE(ctrl->state);
400 }
401
402 enum nvme_iopolicy {
403         NVME_IOPOLICY_NUMA,
404         NVME_IOPOLICY_RR,
405 };
406
407 struct nvme_subsystem {
408         int                     instance;
409         struct device           dev;
410         /*
411          * Because we unregister the device on the last put we need
412          * a separate refcount.
413          */
414         struct kref             ref;
415         struct list_head        entry;
416         struct mutex            lock;
417         struct list_head        ctrls;
418         struct list_head        nsheads;
419         char                    subnqn[NVMF_NQN_SIZE];
420         char                    serial[20];
421         char                    model[40];
422         char                    firmware_rev[8];
423         u8                      cmic;
424         enum nvme_subsys_type   subtype;
425         u16                     vendor_id;
426         u16                     awupf;  /* 0's based awupf value. */
427         struct ida              ns_ida;
428 #ifdef CONFIG_NVME_MULTIPATH
429         enum nvme_iopolicy      iopolicy;
430 #endif
431 };
432
433 /*
434  * Container structure for uniqueue namespace identifiers.
435  */
436 struct nvme_ns_ids {
437         u8      eui64[8];
438         u8      nguid[16];
439         uuid_t  uuid;
440         u8      csi;
441 };
442
443 /*
444  * Anchor structure for namespaces.  There is one for each namespace in a
445  * NVMe subsystem that any of our controllers can see, and the namespace
446  * structure for each controller is chained of it.  For private namespaces
447  * there is a 1:1 relation to our namespace structures, that is ->list
448  * only ever has a single entry for private namespaces.
449  */
450 struct nvme_ns_head {
451         struct list_head        list;
452         struct srcu_struct      srcu;
453         struct nvme_subsystem   *subsys;
454         struct nvme_ns_ids      ids;
455         struct list_head        entry;
456         struct kref             ref;
457         bool                    shared;
458         bool                    passthru_err_log_enabled;
459         int                     instance;
460         struct nvme_effects_log *effects;
461         u64                     nuse;
462         unsigned                ns_id;
463         int                     lba_shift;
464         u16                     ms;
465         u16                     pi_size;
466         u8                      pi_type;
467         u8                      guard_type;
468         u16                     sgs;
469         u32                     sws;
470 #ifdef CONFIG_BLK_DEV_ZONED
471         u64                     zsze;
472 #endif
473         unsigned long           features;
474
475         struct ratelimit_state  rs_nuse;
476
477         struct cdev             cdev;
478         struct device           cdev_device;
479
480         struct gendisk          *disk;
481 #ifdef CONFIG_NVME_MULTIPATH
482         struct bio_list         requeue_list;
483         spinlock_t              requeue_lock;
484         struct work_struct      requeue_work;
485         struct mutex            lock;
486         unsigned long           flags;
487 #define NVME_NSHEAD_DISK_LIVE   0
488         struct nvme_ns __rcu    *current_path[];
489 #endif
490 };
491
492 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head)
493 {
494         return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk;
495 }
496
497 enum nvme_ns_features {
498         NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */
499         NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */
500         NVME_NS_DEAC,           /* DEAC bit in Write Zeores supported */
501 };
502
503 struct nvme_ns {
504         struct list_head list;
505
506         struct nvme_ctrl *ctrl;
507         struct request_queue *queue;
508         struct gendisk *disk;
509 #ifdef CONFIG_NVME_MULTIPATH
510         enum nvme_ana_state ana_state;
511         u32 ana_grpid;
512 #endif
513         struct list_head siblings;
514         struct kref kref;
515         struct nvme_ns_head *head;
516
517         unsigned long flags;
518 #define NVME_NS_REMOVING        0
519 #define NVME_NS_ANA_PENDING     2
520 #define NVME_NS_FORCE_RO        3
521 #define NVME_NS_READY           4
522
523         struct cdev             cdev;
524         struct device           cdev_device;
525
526         struct nvme_fault_inject fault_inject;
527 };
528
529 /* NVMe ns supports metadata actions by the controller (generate/strip) */
530 static inline bool nvme_ns_has_pi(struct nvme_ns_head *head)
531 {
532         return head->pi_type && head->ms == head->pi_size;
533 }
534
535 struct nvme_ctrl_ops {
536         const char *name;
537         struct module *module;
538         unsigned int flags;
539 #define NVME_F_FABRICS                  (1 << 0)
540 #define NVME_F_METADATA_SUPPORTED       (1 << 1)
541 #define NVME_F_BLOCKING                 (1 << 2)
542
543         const struct attribute_group **dev_attr_groups;
544         int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
545         int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
546         int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
547         void (*free_ctrl)(struct nvme_ctrl *ctrl);
548         void (*submit_async_event)(struct nvme_ctrl *ctrl);
549         void (*delete_ctrl)(struct nvme_ctrl *ctrl);
550         void (*stop_ctrl)(struct nvme_ctrl *ctrl);
551         int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
552         void (*print_device_info)(struct nvme_ctrl *ctrl);
553         bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl);
554 };
555
556 /*
557  * nvme command_id is constructed as such:
558  * | xxxx | xxxxxxxxxxxx |
559  *   gen    request tag
560  */
561 #define nvme_genctr_mask(gen)                   (gen & 0xf)
562 #define nvme_cid_install_genctr(gen)            (nvme_genctr_mask(gen) << 12)
563 #define nvme_genctr_from_cid(cid)               ((cid & 0xf000) >> 12)
564 #define nvme_tag_from_cid(cid)                  (cid & 0xfff)
565
566 static inline u16 nvme_cid(struct request *rq)
567 {
568         return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag;
569 }
570
571 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags,
572                 u16 command_id)
573 {
574         u8 genctr = nvme_genctr_from_cid(command_id);
575         u16 tag = nvme_tag_from_cid(command_id);
576         struct request *rq;
577
578         rq = blk_mq_tag_to_rq(tags, tag);
579         if (unlikely(!rq)) {
580                 pr_err("could not locate request for tag %#x\n",
581                         tag);
582                 return NULL;
583         }
584         if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) {
585                 dev_err(nvme_req(rq)->ctrl->device,
586                         "request %#x genctr mismatch (got %#x expected %#x)\n",
587                         tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr));
588                 return NULL;
589         }
590         return rq;
591 }
592
593 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags,
594                 u16 command_id)
595 {
596         return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id));
597 }
598
599 /*
600  * Return the length of the string without the space padding
601  */
602 static inline int nvme_strlen(char *s, int len)
603 {
604         while (s[len - 1] == ' ')
605                 len--;
606         return len;
607 }
608
609 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl)
610 {
611         struct nvme_subsystem *subsys = ctrl->subsys;
612
613         if (ctrl->ops->print_device_info) {
614                 ctrl->ops->print_device_info(ctrl);
615                 return;
616         }
617
618         dev_err(ctrl->device,
619                 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id,
620                 nvme_strlen(subsys->model, sizeof(subsys->model)),
621                 subsys->model, nvme_strlen(subsys->firmware_rev,
622                                            sizeof(subsys->firmware_rev)),
623                 subsys->firmware_rev);
624 }
625
626 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
627 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
628                             const char *dev_name);
629 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject);
630 void nvme_should_fail(struct request *req);
631 #else
632 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
633                                           const char *dev_name)
634 {
635 }
636 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj)
637 {
638 }
639 static inline void nvme_should_fail(struct request *req) {}
640 #endif
641
642 bool nvme_wait_reset(struct nvme_ctrl *ctrl);
643 int nvme_try_sched_reset(struct nvme_ctrl *ctrl);
644
645 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
646 {
647         int ret;
648
649         if (!ctrl->subsystem)
650                 return -ENOTTY;
651         if (!nvme_wait_reset(ctrl))
652                 return -EBUSY;
653
654         ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
655         if (ret)
656                 return ret;
657
658         return nvme_try_sched_reset(ctrl);
659 }
660
661 /*
662  * Convert a 512B sector number to a device logical block number.
663  */
664 static inline u64 nvme_sect_to_lba(struct nvme_ns_head *head, sector_t sector)
665 {
666         return sector >> (head->lba_shift - SECTOR_SHIFT);
667 }
668
669 /*
670  * Convert a device logical block number to a 512B sector number.
671  */
672 static inline sector_t nvme_lba_to_sect(struct nvme_ns_head *head, u64 lba)
673 {
674         return lba << (head->lba_shift - SECTOR_SHIFT);
675 }
676
677 /*
678  * Convert byte length to nvme's 0-based num dwords
679  */
680 static inline u32 nvme_bytes_to_numd(size_t len)
681 {
682         return (len >> 2) - 1;
683 }
684
685 static inline bool nvme_is_ana_error(u16 status)
686 {
687         switch (status & 0x7ff) {
688         case NVME_SC_ANA_TRANSITION:
689         case NVME_SC_ANA_INACCESSIBLE:
690         case NVME_SC_ANA_PERSISTENT_LOSS:
691                 return true;
692         default:
693                 return false;
694         }
695 }
696
697 static inline bool nvme_is_path_error(u16 status)
698 {
699         /* check for a status code type of 'path related status' */
700         return (status & 0x700) == 0x300;
701 }
702
703 /*
704  * Fill in the status and result information from the CQE, and then figure out
705  * if blk-mq will need to use IPI magic to complete the request, and if yes do
706  * so.  If not let the caller complete the request without an indirect function
707  * call.
708  */
709 static inline bool nvme_try_complete_req(struct request *req, __le16 status,
710                 union nvme_result result)
711 {
712         struct nvme_request *rq = nvme_req(req);
713         struct nvme_ctrl *ctrl = rq->ctrl;
714
715         if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN))
716                 rq->genctr++;
717
718         rq->status = le16_to_cpu(status) >> 1;
719         rq->result = result;
720         /* inject error when permitted by fault injection framework */
721         nvme_should_fail(req);
722         if (unlikely(blk_should_fake_timeout(req->q)))
723                 return true;
724         return blk_mq_complete_request_remote(req);
725 }
726
727 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
728 {
729         get_device(ctrl->device);
730 }
731
732 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
733 {
734         put_device(ctrl->device);
735 }
736
737 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id)
738 {
739         return !qid &&
740                 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH;
741 }
742
743 void nvme_complete_rq(struct request *req);
744 void nvme_complete_batch_req(struct request *req);
745
746 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob,
747                                                 void (*fn)(struct request *rq))
748 {
749         struct request *req;
750
751         rq_list_for_each(&iob->req_list, req) {
752                 fn(req);
753                 nvme_complete_batch_req(req);
754         }
755         blk_mq_end_request_batch(iob);
756 }
757
758 blk_status_t nvme_host_path_error(struct request *req);
759 bool nvme_cancel_request(struct request *req, void *data);
760 void nvme_cancel_tagset(struct nvme_ctrl *ctrl);
761 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl);
762 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
763                 enum nvme_ctrl_state new_state);
764 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown);
765 int nvme_enable_ctrl(struct nvme_ctrl *ctrl);
766 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
767                 const struct nvme_ctrl_ops *ops, unsigned long quirks);
768 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
769 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
770 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
771 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended);
772 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
773                 const struct blk_mq_ops *ops, unsigned int cmd_size);
774 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl);
775 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
776                 const struct blk_mq_ops *ops, unsigned int nr_maps,
777                 unsigned int cmd_size);
778 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl);
779
780 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
781
782 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
783                 volatile union nvme_result *res);
784
785 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl);
786 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl);
787 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl);
788 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl);
789 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl);
790 void nvme_sync_queues(struct nvme_ctrl *ctrl);
791 void nvme_sync_io_queues(struct nvme_ctrl *ctrl);
792 void nvme_unfreeze(struct nvme_ctrl *ctrl);
793 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
794 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
795 void nvme_start_freeze(struct nvme_ctrl *ctrl);
796
797 static inline enum req_op nvme_req_op(struct nvme_command *cmd)
798 {
799         return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
800 }
801
802 #define NVME_QID_ANY -1
803 void nvme_init_request(struct request *req, struct nvme_command *cmd);
804 void nvme_cleanup_cmd(struct request *req);
805 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req);
806 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
807                 struct request *req);
808 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
809                 bool queue_live, enum nvme_ctrl_state state);
810
811 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
812                 bool queue_live)
813 {
814         enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
815
816         if (likely(state == NVME_CTRL_LIVE))
817                 return true;
818         if (ctrl->ops->flags & NVME_F_FABRICS && state == NVME_CTRL_DELETING)
819                 return queue_live;
820         return __nvme_check_ready(ctrl, rq, queue_live, state);
821 }
822
823 /*
824  * NSID shall be unique for all shared namespaces, or if at least one of the
825  * following conditions is met:
826  *   1. Namespace Management is supported by the controller
827  *   2. ANA is supported by the controller
828  *   3. NVM Set are supported by the controller
829  *
830  * In other case, private namespace are not required to report a unique NSID.
831  */
832 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl,
833                 struct nvme_ns_head *head)
834 {
835         return head->shared ||
836                 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) ||
837                 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) ||
838                 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS);
839 }
840
841 /*
842  * Flags for __nvme_submit_sync_cmd()
843  */
844 typedef __u32 __bitwise nvme_submit_flags_t;
845
846 enum {
847         /* Insert request at the head of the queue */
848         NVME_SUBMIT_AT_HEAD  = (__force nvme_submit_flags_t)(1 << 0),
849         /* Set BLK_MQ_REQ_NOWAIT when allocating request */
850         NVME_SUBMIT_NOWAIT = (__force nvme_submit_flags_t)(1 << 1),
851         /* Set BLK_MQ_REQ_RESERVED when allocating request */
852         NVME_SUBMIT_RESERVED = (__force nvme_submit_flags_t)(1 << 2),
853         /* Retry command when NVME_SC_DNR is not set in the result */
854         NVME_SUBMIT_RETRY = (__force nvme_submit_flags_t)(1 << 3),
855 };
856
857 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
858                 void *buf, unsigned bufflen);
859 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
860                 union nvme_result *result, void *buffer, unsigned bufflen,
861                 int qid, nvme_submit_flags_t flags);
862 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
863                       unsigned int dword11, void *buffer, size_t buflen,
864                       u32 *result);
865 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
866                       unsigned int dword11, void *buffer, size_t buflen,
867                       u32 *result);
868 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
869 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
870 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
871 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
872 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
873 void nvme_queue_scan(struct nvme_ctrl *ctrl);
874 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
875                 void *log, size_t size, u64 offset);
876 bool nvme_tryget_ns_head(struct nvme_ns_head *head);
877 void nvme_put_ns_head(struct nvme_ns_head *head);
878 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
879                 const struct file_operations *fops, struct module *owner);
880 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device);
881 int nvme_ioctl(struct block_device *bdev, blk_mode_t mode,
882                 unsigned int cmd, unsigned long arg);
883 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
884 int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode,
885                 unsigned int cmd, unsigned long arg);
886 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd,
887                 unsigned long arg);
888 long nvme_dev_ioctl(struct file *file, unsigned int cmd,
889                 unsigned long arg);
890 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd,
891                 struct io_comp_batch *iob, unsigned int poll_flags);
892 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd,
893                 unsigned int issue_flags);
894 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd,
895                 unsigned int issue_flags);
896 int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid,
897                 struct nvme_id_ns **id);
898 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo);
899 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags);
900
901 extern const struct attribute_group *nvme_ns_attr_groups[];
902 extern const struct pr_ops nvme_pr_ops;
903 extern const struct block_device_operations nvme_ns_head_ops;
904 extern const struct attribute_group nvme_dev_attrs_group;
905 extern const struct attribute_group *nvme_subsys_attrs_groups[];
906 extern const struct attribute_group *nvme_dev_attr_groups[];
907 extern const struct block_device_operations nvme_bdev_ops;
908
909 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl);
910 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
911 #ifdef CONFIG_NVME_MULTIPATH
912 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
913 {
914         return ctrl->ana_log_buf != NULL;
915 }
916
917 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys);
918 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys);
919 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys);
920 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys);
921 void nvme_failover_req(struct request *req);
922 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
923 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
924 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid);
925 void nvme_mpath_remove_disk(struct nvme_ns_head *head);
926 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id);
927 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl);
928 void nvme_mpath_update(struct nvme_ctrl *ctrl);
929 void nvme_mpath_uninit(struct nvme_ctrl *ctrl);
930 void nvme_mpath_stop(struct nvme_ctrl *ctrl);
931 bool nvme_mpath_clear_current_path(struct nvme_ns *ns);
932 void nvme_mpath_revalidate_paths(struct nvme_ns *ns);
933 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl);
934 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head);
935 void nvme_mpath_start_request(struct request *rq);
936 void nvme_mpath_end_request(struct request *rq);
937
938 static inline void nvme_trace_bio_complete(struct request *req)
939 {
940         struct nvme_ns *ns = req->q->queuedata;
941
942         if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio)
943                 trace_block_bio_complete(ns->head->disk->queue, req->bio);
944 }
945
946 extern bool multipath;
947 extern struct device_attribute dev_attr_ana_grpid;
948 extern struct device_attribute dev_attr_ana_state;
949 extern struct device_attribute subsys_attr_iopolicy;
950
951 static inline bool nvme_disk_is_ns_head(struct gendisk *disk)
952 {
953         return disk->fops == &nvme_ns_head_ops;
954 }
955 #else
956 #define multipath false
957 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
958 {
959         return false;
960 }
961 static inline void nvme_failover_req(struct request *req)
962 {
963 }
964 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
965 {
966 }
967 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
968                 struct nvme_ns_head *head)
969 {
970         return 0;
971 }
972 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid)
973 {
974 }
975 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
976 {
977 }
978 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns)
979 {
980         return false;
981 }
982 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns)
983 {
984 }
985 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl)
986 {
987 }
988 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head)
989 {
990 }
991 static inline void nvme_trace_bio_complete(struct request *req)
992 {
993 }
994 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl)
995 {
996 }
997 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl,
998                 struct nvme_id_ctrl *id)
999 {
1000         if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA)
1001                 dev_warn(ctrl->device,
1002 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n");
1003         return 0;
1004 }
1005 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl)
1006 {
1007 }
1008 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl)
1009 {
1010 }
1011 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl)
1012 {
1013 }
1014 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys)
1015 {
1016 }
1017 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys)
1018 {
1019 }
1020 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys)
1021 {
1022 }
1023 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys)
1024 {
1025 }
1026 static inline void nvme_mpath_start_request(struct request *rq)
1027 {
1028 }
1029 static inline void nvme_mpath_end_request(struct request *rq)
1030 {
1031 }
1032 static inline bool nvme_disk_is_ns_head(struct gendisk *disk)
1033 {
1034         return false;
1035 }
1036 #endif /* CONFIG_NVME_MULTIPATH */
1037
1038 int nvme_revalidate_zones(struct nvme_ns *ns);
1039 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector,
1040                 unsigned int nr_zones, report_zones_cb cb, void *data);
1041 #ifdef CONFIG_BLK_DEV_ZONED
1042 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf);
1043 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req,
1044                                        struct nvme_command *cmnd,
1045                                        enum nvme_zone_mgmt_action action);
1046 #else
1047 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns,
1048                 struct request *req, struct nvme_command *cmnd,
1049                 enum nvme_zone_mgmt_action action)
1050 {
1051         return BLK_STS_NOTSUPP;
1052 }
1053
1054 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf)
1055 {
1056         dev_warn(ns->ctrl->device,
1057                  "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n");
1058         return -EPROTONOSUPPORT;
1059 }
1060 #endif
1061
1062 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
1063 {
1064         struct gendisk *disk = dev_to_disk(dev);
1065
1066         WARN_ON(nvme_disk_is_ns_head(disk));
1067         return disk->private_data;
1068 }
1069
1070 #ifdef CONFIG_NVME_HWMON
1071 int nvme_hwmon_init(struct nvme_ctrl *ctrl);
1072 void nvme_hwmon_exit(struct nvme_ctrl *ctrl);
1073 #else
1074 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl)
1075 {
1076         return 0;
1077 }
1078
1079 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl)
1080 {
1081 }
1082 #endif
1083
1084 static inline void nvme_start_request(struct request *rq)
1085 {
1086         if (rq->cmd_flags & REQ_NVME_MPATH)
1087                 nvme_mpath_start_request(rq);
1088         blk_mq_start_request(rq);
1089 }
1090
1091 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl)
1092 {
1093         return ctrl->sgls & ((1 << 0) | (1 << 1));
1094 }
1095
1096 #ifdef CONFIG_NVME_HOST_AUTH
1097 int __init nvme_init_auth(void);
1098 void __exit nvme_exit_auth(void);
1099 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl);
1100 void nvme_auth_stop(struct nvme_ctrl *ctrl);
1101 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid);
1102 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid);
1103 void nvme_auth_free(struct nvme_ctrl *ctrl);
1104 #else
1105 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl)
1106 {
1107         return 0;
1108 }
1109 static inline int __init nvme_init_auth(void)
1110 {
1111         return 0;
1112 }
1113 static inline void __exit nvme_exit_auth(void)
1114 {
1115 }
1116 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {};
1117 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid)
1118 {
1119         return -EPROTONOSUPPORT;
1120 }
1121 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid)
1122 {
1123         return NVME_SC_AUTH_REQUIRED;
1124 }
1125 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {};
1126 #endif
1127
1128 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
1129                          u8 opcode);
1130 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode);
1131 int nvme_execute_rq(struct request *rq, bool at_head);
1132 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects,
1133                        struct nvme_command *cmd, int status);
1134 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file);
1135 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid);
1136 void nvme_put_ns(struct nvme_ns *ns);
1137
1138 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl)
1139 {
1140         return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI;
1141 }
1142
1143 #ifdef CONFIG_NVME_VERBOSE_ERRORS
1144 const char *nvme_get_error_status_str(u16 status);
1145 const char *nvme_get_opcode_str(u8 opcode);
1146 const char *nvme_get_admin_opcode_str(u8 opcode);
1147 const char *nvme_get_fabrics_opcode_str(u8 opcode);
1148 #else /* CONFIG_NVME_VERBOSE_ERRORS */
1149 static inline const char *nvme_get_error_status_str(u16 status)
1150 {
1151         return "I/O Error";
1152 }
1153 static inline const char *nvme_get_opcode_str(u8 opcode)
1154 {
1155         return "I/O Cmd";
1156 }
1157 static inline const char *nvme_get_admin_opcode_str(u8 opcode)
1158 {
1159         return "Admin Cmd";
1160 }
1161
1162 static inline const char *nvme_get_fabrics_opcode_str(u8 opcode)
1163 {
1164         return "Fabrics Cmd";
1165 }
1166 #endif /* CONFIG_NVME_VERBOSE_ERRORS */
1167
1168 static inline const char *nvme_opcode_str(int qid, u8 opcode)
1169 {
1170         return qid ? nvme_get_opcode_str(opcode) :
1171                 nvme_get_admin_opcode_str(opcode);
1172 }
1173
1174 static inline const char *nvme_fabrics_opcode_str(
1175                 int qid, const struct nvme_command *cmd)
1176 {
1177         if (nvme_is_fabrics(cmd))
1178                 return nvme_get_fabrics_opcode_str(cmd->fabrics.fctype);
1179
1180         return nvme_opcode_str(qid, cmd->common.opcode);
1181 }
1182 #endif /* _NVME_H */