1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
4 #include <linux/module.h>
5 #include <linux/netdevice.h>
10 #include "ionic_lif.h"
11 #include "ionic_ethtool.h"
12 #include "ionic_stats.h"
14 static void ionic_get_stats_strings(struct ionic_lif *lif, u8 *buf)
18 for (i = 0; i < ionic_num_stats_grps; i++)
19 ionic_stats_groups[i].get_strings(lif, &buf);
22 static void ionic_get_stats(struct net_device *netdev,
23 struct ethtool_stats *stats, u64 *buf)
25 struct ionic_lif *lif = netdev_priv(netdev);
28 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
31 memset(buf, 0, stats->n_stats * sizeof(*buf));
32 for (i = 0; i < ionic_num_stats_grps; i++)
33 ionic_stats_groups[i].get_values(lif, &buf);
36 static int ionic_get_stats_count(struct ionic_lif *lif)
40 for (i = 0; i < ionic_num_stats_grps; i++)
41 num_stats += ionic_stats_groups[i].get_count(lif);
46 static int ionic_get_sset_count(struct net_device *netdev, int sset)
48 struct ionic_lif *lif = netdev_priv(netdev);
53 count = ionic_get_stats_count(lif);
59 static void ionic_get_strings(struct net_device *netdev,
62 struct ionic_lif *lif = netdev_priv(netdev);
66 ionic_get_stats_strings(lif, buf);
71 static void ionic_get_drvinfo(struct net_device *netdev,
72 struct ethtool_drvinfo *drvinfo)
74 struct ionic_lif *lif = netdev_priv(netdev);
75 struct ionic *ionic = lif->ionic;
77 strscpy(drvinfo->driver, IONIC_DRV_NAME, sizeof(drvinfo->driver));
78 strscpy(drvinfo->fw_version, ionic->idev.dev_info.fw_version,
79 sizeof(drvinfo->fw_version));
80 strscpy(drvinfo->bus_info, ionic_bus_info(ionic),
81 sizeof(drvinfo->bus_info));
84 static int ionic_get_regs_len(struct net_device *netdev)
86 return (IONIC_DEV_INFO_REG_COUNT + IONIC_DEV_CMD_REG_COUNT) * sizeof(u32);
89 static void ionic_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
92 struct ionic_lif *lif = netdev_priv(netdev);
96 regs->version = IONIC_DEV_CMD_REG_VERSION;
99 size = IONIC_DEV_INFO_REG_COUNT * sizeof(u32);
100 memcpy_fromio(p + offset, lif->ionic->idev.dev_info_regs->words, size);
103 size = IONIC_DEV_CMD_REG_COUNT * sizeof(u32);
104 memcpy_fromio(p + offset, lif->ionic->idev.dev_cmd_regs->words, size);
107 static void ionic_get_link_ext_stats(struct net_device *netdev,
108 struct ethtool_link_ext_stats *stats)
110 struct ionic_lif *lif = netdev_priv(netdev);
112 if (lif->ionic->pdev->is_physfn)
113 stats->link_down_events = lif->link_down_count;
116 static int ionic_get_link_ksettings(struct net_device *netdev,
117 struct ethtool_link_ksettings *ks)
119 struct ionic_lif *lif = netdev_priv(netdev);
120 struct ionic_dev *idev = &lif->ionic->idev;
123 ethtool_link_ksettings_zero_link_mode(ks, supported);
125 if (!idev->port_info) {
126 netdev_err(netdev, "port_info not initialized\n");
130 /* The port_info data is found in a DMA space that the NIC keeps
131 * up-to-date, so there's no need to request the data from the
132 * NIC, we already have it in our memory space.
135 switch (le16_to_cpu(idev->port_info->status.xcvr.pid)) {
137 case IONIC_XCVR_PID_QSFP_100G_CR4:
138 ethtool_link_ksettings_add_link_mode(ks, supported,
142 case IONIC_XCVR_PID_QSFP_40GBASE_CR4:
143 ethtool_link_ksettings_add_link_mode(ks, supported,
147 case IONIC_XCVR_PID_SFP_25GBASE_CR_S:
148 case IONIC_XCVR_PID_SFP_25GBASE_CR_L:
149 case IONIC_XCVR_PID_SFP_25GBASE_CR_N:
150 ethtool_link_ksettings_add_link_mode(ks, supported,
154 case IONIC_XCVR_PID_SFP_10GBASE_AOC:
155 case IONIC_XCVR_PID_SFP_10GBASE_CU:
156 ethtool_link_ksettings_add_link_mode(ks, supported,
162 case IONIC_XCVR_PID_QSFP_100G_SR4:
163 case IONIC_XCVR_PID_QSFP_100G_AOC:
164 ethtool_link_ksettings_add_link_mode(ks, supported,
167 case IONIC_XCVR_PID_QSFP_100G_CWDM4:
168 case IONIC_XCVR_PID_QSFP_100G_PSM4:
169 case IONIC_XCVR_PID_QSFP_100G_LR4:
170 ethtool_link_ksettings_add_link_mode(ks, supported,
171 100000baseLR4_ER4_Full);
173 case IONIC_XCVR_PID_QSFP_100G_ER4:
174 ethtool_link_ksettings_add_link_mode(ks, supported,
175 100000baseLR4_ER4_Full);
177 case IONIC_XCVR_PID_QSFP_40GBASE_SR4:
178 case IONIC_XCVR_PID_QSFP_40GBASE_AOC:
179 ethtool_link_ksettings_add_link_mode(ks, supported,
182 case IONIC_XCVR_PID_QSFP_40GBASE_LR4:
183 ethtool_link_ksettings_add_link_mode(ks, supported,
186 case IONIC_XCVR_PID_SFP_25GBASE_SR:
187 case IONIC_XCVR_PID_SFP_25GBASE_AOC:
188 case IONIC_XCVR_PID_SFP_25GBASE_ACC:
189 ethtool_link_ksettings_add_link_mode(ks, supported,
192 case IONIC_XCVR_PID_SFP_10GBASE_SR:
193 ethtool_link_ksettings_add_link_mode(ks, supported,
196 case IONIC_XCVR_PID_SFP_10GBASE_LR:
197 ethtool_link_ksettings_add_link_mode(ks, supported,
200 case IONIC_XCVR_PID_SFP_10GBASE_LRM:
201 ethtool_link_ksettings_add_link_mode(ks, supported,
204 case IONIC_XCVR_PID_SFP_10GBASE_ER:
205 ethtool_link_ksettings_add_link_mode(ks, supported,
208 case IONIC_XCVR_PID_SFP_10GBASE_T:
209 ethtool_link_ksettings_add_link_mode(ks, supported,
212 case IONIC_XCVR_PID_SFP_1000BASE_T:
213 ethtool_link_ksettings_add_link_mode(ks, supported,
216 case IONIC_XCVR_PID_UNKNOWN:
217 /* This means there's no module plugged in */
220 dev_info(lif->ionic->dev, "unknown xcvr type pid=%d / 0x%x\n",
221 idev->port_info->status.xcvr.pid,
222 idev->port_info->status.xcvr.pid);
226 linkmode_copy(ks->link_modes.advertising, ks->link_modes.supported);
228 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER);
229 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS);
230 if (idev->port_info->config.fec_type == IONIC_PORT_FEC_TYPE_FC)
231 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_BASER);
232 else if (idev->port_info->config.fec_type == IONIC_PORT_FEC_TYPE_RS)
233 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS);
235 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
236 ethtool_link_ksettings_add_link_mode(ks, supported, Pause);
238 if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_COPPER ||
240 ks->base.port = PORT_DA;
241 else if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_FIBER)
242 ks->base.port = PORT_FIBRE;
244 ks->base.port = PORT_NONE;
246 if (ks->base.port != PORT_NONE) {
247 ks->base.speed = le32_to_cpu(lif->info->status.link_speed);
249 if (le16_to_cpu(lif->info->status.link_status))
250 ks->base.duplex = DUPLEX_FULL;
252 ks->base.duplex = DUPLEX_UNKNOWN;
254 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
256 if (idev->port_info->config.an_enable) {
257 ethtool_link_ksettings_add_link_mode(ks, advertising,
259 ks->base.autoneg = AUTONEG_ENABLE;
266 static int ionic_set_link_ksettings(struct net_device *netdev,
267 const struct ethtool_link_ksettings *ks)
269 struct ionic_lif *lif = netdev_priv(netdev);
270 struct ionic_dev *idev = &lif->ionic->idev;
271 struct ionic *ionic = lif->ionic;
274 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
278 if (ks->base.autoneg != idev->port_info->config.an_enable) {
279 mutex_lock(&ionic->dev_cmd_lock);
280 ionic_dev_cmd_port_autoneg(idev, ks->base.autoneg);
281 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
282 mutex_unlock(&ionic->dev_cmd_lock);
288 if (ks->base.speed != le32_to_cpu(idev->port_info->config.speed)) {
289 mutex_lock(&ionic->dev_cmd_lock);
290 ionic_dev_cmd_port_speed(idev, ks->base.speed);
291 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
292 mutex_unlock(&ionic->dev_cmd_lock);
300 static void ionic_get_pauseparam(struct net_device *netdev,
301 struct ethtool_pauseparam *pause)
303 struct ionic_lif *lif = netdev_priv(netdev);
308 pause_type = lif->ionic->idev.port_info->config.pause_type;
310 pause->rx_pause = (pause_type & IONIC_PAUSE_F_RX) ? 1 : 0;
311 pause->tx_pause = (pause_type & IONIC_PAUSE_F_TX) ? 1 : 0;
315 static int ionic_set_pauseparam(struct net_device *netdev,
316 struct ethtool_pauseparam *pause)
318 struct ionic_lif *lif = netdev_priv(netdev);
319 struct ionic *ionic = lif->ionic;
323 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
329 /* change both at the same time */
330 requested_pause = IONIC_PORT_PAUSE_TYPE_LINK;
332 requested_pause |= IONIC_PAUSE_F_RX;
334 requested_pause |= IONIC_PAUSE_F_TX;
336 if (requested_pause == lif->ionic->idev.port_info->config.pause_type)
339 mutex_lock(&ionic->dev_cmd_lock);
340 ionic_dev_cmd_port_pause(&lif->ionic->idev, requested_pause);
341 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
342 mutex_unlock(&ionic->dev_cmd_lock);
349 static int ionic_get_fecparam(struct net_device *netdev,
350 struct ethtool_fecparam *fec)
352 struct ionic_lif *lif = netdev_priv(netdev);
354 switch (lif->ionic->idev.port_info->config.fec_type) {
355 case IONIC_PORT_FEC_TYPE_NONE:
356 fec->active_fec = ETHTOOL_FEC_OFF;
358 case IONIC_PORT_FEC_TYPE_RS:
359 fec->active_fec = ETHTOOL_FEC_RS;
361 case IONIC_PORT_FEC_TYPE_FC:
362 fec->active_fec = ETHTOOL_FEC_BASER;
366 fec->fec = ETHTOOL_FEC_OFF | ETHTOOL_FEC_RS | ETHTOOL_FEC_BASER;
371 static int ionic_set_fecparam(struct net_device *netdev,
372 struct ethtool_fecparam *fec)
374 struct ionic_lif *lif = netdev_priv(netdev);
378 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
381 if (lif->ionic->idev.port_info->config.an_enable) {
382 netdev_err(netdev, "FEC request not allowed while autoneg is enabled\n");
387 case ETHTOOL_FEC_NONE:
388 fec_type = IONIC_PORT_FEC_TYPE_NONE;
390 case ETHTOOL_FEC_OFF:
391 fec_type = IONIC_PORT_FEC_TYPE_NONE;
394 fec_type = IONIC_PORT_FEC_TYPE_RS;
396 case ETHTOOL_FEC_BASER:
397 fec_type = IONIC_PORT_FEC_TYPE_FC;
399 case ETHTOOL_FEC_AUTO:
401 netdev_err(netdev, "FEC request 0x%04x not supported\n",
406 if (fec_type != lif->ionic->idev.port_info->config.fec_type) {
407 mutex_lock(&lif->ionic->dev_cmd_lock);
408 ionic_dev_cmd_port_fec(&lif->ionic->idev, fec_type);
409 ret = ionic_dev_cmd_wait(lif->ionic, DEVCMD_TIMEOUT);
410 mutex_unlock(&lif->ionic->dev_cmd_lock);
416 static int ionic_get_coalesce(struct net_device *netdev,
417 struct ethtool_coalesce *coalesce,
418 struct kernel_ethtool_coalesce *kernel_coal,
419 struct netlink_ext_ack *extack)
421 struct ionic_lif *lif = netdev_priv(netdev);
423 coalesce->tx_coalesce_usecs = lif->tx_coalesce_usecs;
424 coalesce->rx_coalesce_usecs = lif->rx_coalesce_usecs;
426 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
427 coalesce->use_adaptive_tx_coalesce = test_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
429 coalesce->use_adaptive_tx_coalesce = 0;
431 coalesce->use_adaptive_rx_coalesce = test_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
436 static int ionic_set_coalesce(struct net_device *netdev,
437 struct ethtool_coalesce *coalesce,
438 struct kernel_ethtool_coalesce *kernel_coal,
439 struct netlink_ext_ack *extack)
441 struct ionic_lif *lif = netdev_priv(netdev);
442 struct ionic_identity *ident;
447 ident = &lif->ionic->ident;
448 if (ident->dev.intr_coal_div == 0) {
449 netdev_warn(netdev, "bad HW value in dev.intr_coal_div = %d\n",
450 ident->dev.intr_coal_div);
454 /* Tx normally shares Rx interrupt, so only change Rx if not split */
455 if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state) &&
456 (coalesce->tx_coalesce_usecs != lif->rx_coalesce_usecs ||
457 coalesce->use_adaptive_tx_coalesce)) {
458 netdev_warn(netdev, "only rx parameters can be changed\n");
462 /* Convert the usec request to a HW usable value. If they asked
463 * for non-zero and it resolved to zero, bump it up
465 rx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->rx_coalesce_usecs);
466 if (!rx_coal && coalesce->rx_coalesce_usecs)
468 tx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->tx_coalesce_usecs);
469 if (!tx_coal && coalesce->tx_coalesce_usecs)
472 if (rx_coal > IONIC_INTR_CTRL_COAL_MAX ||
473 tx_coal > IONIC_INTR_CTRL_COAL_MAX)
476 /* Save the new values */
477 lif->rx_coalesce_usecs = coalesce->rx_coalesce_usecs;
478 lif->rx_coalesce_hw = rx_coal;
480 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
481 lif->tx_coalesce_usecs = coalesce->tx_coalesce_usecs;
483 lif->tx_coalesce_usecs = coalesce->rx_coalesce_usecs;
484 lif->tx_coalesce_hw = tx_coal;
486 if (coalesce->use_adaptive_rx_coalesce) {
487 set_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
490 clear_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
494 if (coalesce->use_adaptive_tx_coalesce) {
495 set_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
498 clear_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
502 if (test_bit(IONIC_LIF_F_UP, lif->state)) {
503 for (i = 0; i < lif->nxqs; i++) {
504 if (lif->rxqcqs[i]->flags & IONIC_QCQ_F_INTR) {
505 ionic_intr_coal_init(lif->ionic->idev.intr_ctrl,
506 lif->rxqcqs[i]->intr.index,
507 lif->rx_coalesce_hw);
508 lif->rxqcqs[i]->intr.dim_coal_hw = rx_dim;
511 if (lif->txqcqs[i]->flags & IONIC_QCQ_F_INTR) {
512 ionic_intr_coal_init(lif->ionic->idev.intr_ctrl,
513 lif->txqcqs[i]->intr.index,
514 lif->tx_coalesce_hw);
515 lif->txqcqs[i]->intr.dim_coal_hw = tx_dim;
523 static int ionic_validate_cmb_config(struct ionic_lif *lif,
524 struct ionic_queue_params *qparam)
526 int pages_have, pages_required = 0;
529 if (!lif->ionic->idev.cmb_inuse &&
530 (qparam->cmb_tx || qparam->cmb_rx)) {
531 netdev_info(lif->netdev, "CMB rings are not supported on this device\n");
535 if (qparam->cmb_tx) {
536 if (!(lif->qtype_info[IONIC_QTYPE_TXQ].features & IONIC_QIDENT_F_CMB)) {
537 netdev_info(lif->netdev,
538 "CMB rings for tx-push are not supported on this device\n");
542 sz = sizeof(struct ionic_txq_desc) * qparam->ntxq_descs * qparam->nxqs;
543 pages_required += ALIGN(sz, PAGE_SIZE) / PAGE_SIZE;
546 if (qparam->cmb_rx) {
547 if (!(lif->qtype_info[IONIC_QTYPE_RXQ].features & IONIC_QIDENT_F_CMB)) {
548 netdev_info(lif->netdev,
549 "CMB rings for rx-push are not supported on this device\n");
553 sz = sizeof(struct ionic_rxq_desc) * qparam->nrxq_descs * qparam->nxqs;
554 pages_required += ALIGN(sz, PAGE_SIZE) / PAGE_SIZE;
557 pages_have = lif->ionic->bars[IONIC_PCI_BAR_CMB].len / PAGE_SIZE;
558 if (pages_required > pages_have) {
559 netdev_info(lif->netdev,
560 "Not enough CMB pages for number of queues and size of descriptor rings, need %d have %d",
561 pages_required, pages_have);
565 return pages_required;
568 static int ionic_cmb_rings_toggle(struct ionic_lif *lif, bool cmb_tx, bool cmb_rx)
570 struct ionic_queue_params qparam;
573 if (netif_running(lif->netdev)) {
574 netdev_info(lif->netdev, "Please stop device to toggle CMB for tx/rx-push\n");
578 ionic_init_queue_params(lif, &qparam);
579 qparam.cmb_tx = cmb_tx;
580 qparam.cmb_rx = cmb_rx;
581 pages_used = ionic_validate_cmb_config(lif, &qparam);
586 set_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state);
588 clear_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state);
591 set_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state);
593 clear_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state);
595 if (cmb_tx || cmb_rx)
596 netdev_info(lif->netdev, "Enabling CMB %s %s rings - %d pages\n",
597 cmb_tx ? "TX" : "", cmb_rx ? "RX" : "", pages_used);
599 netdev_info(lif->netdev, "Disabling CMB rings\n");
604 static void ionic_get_ringparam(struct net_device *netdev,
605 struct ethtool_ringparam *ring,
606 struct kernel_ethtool_ringparam *kernel_ring,
607 struct netlink_ext_ack *extack)
609 struct ionic_lif *lif = netdev_priv(netdev);
611 ring->tx_max_pending = IONIC_MAX_TX_DESC;
612 ring->tx_pending = lif->ntxq_descs;
613 ring->rx_max_pending = IONIC_MAX_RX_DESC;
614 ring->rx_pending = lif->nrxq_descs;
615 kernel_ring->tx_push = test_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state);
616 kernel_ring->rx_push = test_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state);
619 static int ionic_set_ringparam(struct net_device *netdev,
620 struct ethtool_ringparam *ring,
621 struct kernel_ethtool_ringparam *kernel_ring,
622 struct netlink_ext_ack *extack)
624 struct ionic_lif *lif = netdev_priv(netdev);
625 struct ionic_queue_params qparam;
628 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
631 ionic_init_queue_params(lif, &qparam);
633 if (ring->rx_mini_pending || ring->rx_jumbo_pending) {
634 netdev_info(netdev, "Changing jumbo or mini descriptors not supported\n");
638 if (!is_power_of_2(ring->tx_pending) ||
639 !is_power_of_2(ring->rx_pending)) {
640 netdev_info(netdev, "Descriptor count must be a power of 2\n");
644 /* if nothing to do return success */
645 if (ring->tx_pending == lif->ntxq_descs &&
646 ring->rx_pending == lif->nrxq_descs &&
647 kernel_ring->tx_push == test_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state) &&
648 kernel_ring->rx_push == test_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state))
651 qparam.ntxq_descs = ring->tx_pending;
652 qparam.nrxq_descs = ring->rx_pending;
653 qparam.cmb_tx = kernel_ring->tx_push;
654 qparam.cmb_rx = kernel_ring->rx_push;
656 err = ionic_validate_cmb_config(lif, &qparam);
660 if (kernel_ring->tx_push != test_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state) ||
661 kernel_ring->rx_push != test_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state)) {
662 err = ionic_cmb_rings_toggle(lif, kernel_ring->tx_push,
663 kernel_ring->rx_push);
668 if (ring->tx_pending != lif->ntxq_descs)
669 netdev_info(netdev, "Changing Tx ring size from %d to %d\n",
670 lif->ntxq_descs, ring->tx_pending);
672 if (ring->rx_pending != lif->nrxq_descs)
673 netdev_info(netdev, "Changing Rx ring size from %d to %d\n",
674 lif->nrxq_descs, ring->rx_pending);
676 /* if we're not running, just set the values and return */
677 if (!netif_running(lif->netdev)) {
678 lif->ntxq_descs = ring->tx_pending;
679 lif->nrxq_descs = ring->rx_pending;
683 mutex_lock(&lif->queue_lock);
684 err = ionic_reconfigure_queues(lif, &qparam);
685 mutex_unlock(&lif->queue_lock);
687 netdev_info(netdev, "Ring reconfiguration failed, changes canceled: %d\n", err);
692 static void ionic_get_channels(struct net_device *netdev,
693 struct ethtool_channels *ch)
695 struct ionic_lif *lif = netdev_priv(netdev);
697 /* report maximum channels */
698 ch->max_combined = lif->ionic->ntxqs_per_lif;
699 ch->max_rx = lif->ionic->ntxqs_per_lif / 2;
700 ch->max_tx = lif->ionic->ntxqs_per_lif / 2;
702 /* report current channels */
703 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) {
704 ch->rx_count = lif->nxqs;
705 ch->tx_count = lif->nxqs;
707 ch->combined_count = lif->nxqs;
711 static int ionic_set_channels(struct net_device *netdev,
712 struct ethtool_channels *ch)
714 struct ionic_lif *lif = netdev_priv(netdev);
715 struct ionic_queue_params qparam;
719 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
722 ionic_init_queue_params(lif, &qparam);
724 if (ch->rx_count != ch->tx_count) {
725 netdev_info(netdev, "The rx and tx count must be equal\n");
729 if (ch->combined_count && ch->rx_count) {
730 netdev_info(netdev, "Use either combined or rx and tx, not both\n");
734 max_cnt = lif->ionic->ntxqs_per_lif;
735 if (ch->combined_count) {
736 if (ch->combined_count > max_cnt)
739 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
740 netdev_info(lif->netdev, "Sharing queue interrupts\n");
741 else if (ch->combined_count == lif->nxqs)
744 if (lif->nxqs != ch->combined_count)
745 netdev_info(netdev, "Changing queue count from %d to %d\n",
746 lif->nxqs, ch->combined_count);
748 qparam.nxqs = ch->combined_count;
749 qparam.intr_split = false;
752 if (ch->rx_count > max_cnt)
755 if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
756 netdev_info(lif->netdev, "Splitting queue interrupts\n");
757 else if (ch->rx_count == lif->nxqs)
760 if (lif->nxqs != ch->rx_count)
761 netdev_info(netdev, "Changing queue count from %d to %d\n",
762 lif->nxqs, ch->rx_count);
764 qparam.nxqs = ch->rx_count;
765 qparam.intr_split = true;
768 err = ionic_validate_cmb_config(lif, &qparam);
772 /* if we're not running, just set the values and return */
773 if (!netif_running(lif->netdev)) {
774 lif->nxqs = qparam.nxqs;
776 if (qparam.intr_split) {
777 set_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
779 clear_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
780 lif->tx_coalesce_usecs = lif->rx_coalesce_usecs;
781 lif->tx_coalesce_hw = lif->rx_coalesce_hw;
786 mutex_lock(&lif->queue_lock);
787 err = ionic_reconfigure_queues(lif, &qparam);
788 mutex_unlock(&lif->queue_lock);
790 netdev_info(netdev, "Queue reconfiguration failed, changes canceled: %d\n", err);
795 static int ionic_get_rxnfc(struct net_device *netdev,
796 struct ethtool_rxnfc *info, u32 *rules)
798 struct ionic_lif *lif = netdev_priv(netdev);
802 case ETHTOOL_GRXRINGS:
803 info->data = lif->nxqs;
806 netdev_dbg(netdev, "Command parameter %d is not supported\n",
814 static u32 ionic_get_rxfh_indir_size(struct net_device *netdev)
816 struct ionic_lif *lif = netdev_priv(netdev);
818 return le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz);
821 static u32 ionic_get_rxfh_key_size(struct net_device *netdev)
823 return IONIC_RSS_HASH_KEY_SIZE;
826 static int ionic_get_rxfh(struct net_device *netdev,
827 struct ethtool_rxfh_param *rxfh)
829 struct ionic_lif *lif = netdev_priv(netdev);
830 unsigned int i, tbl_sz;
833 tbl_sz = le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz);
834 for (i = 0; i < tbl_sz; i++)
835 rxfh->indir[i] = lif->rss_ind_tbl[i];
839 memcpy(rxfh->key, lif->rss_hash_key, IONIC_RSS_HASH_KEY_SIZE);
841 rxfh->hfunc = ETH_RSS_HASH_TOP;
846 static int ionic_set_rxfh(struct net_device *netdev,
847 struct ethtool_rxfh_param *rxfh,
848 struct netlink_ext_ack *extack)
850 struct ionic_lif *lif = netdev_priv(netdev);
852 if (rxfh->hfunc != ETH_RSS_HASH_NO_CHANGE &&
853 rxfh->hfunc != ETH_RSS_HASH_TOP)
856 return ionic_lif_rss_config(lif, lif->rss_types,
857 rxfh->key, rxfh->indir);
860 static int ionic_set_tunable(struct net_device *dev,
861 const struct ethtool_tunable *tuna,
864 struct ionic_lif *lif = netdev_priv(dev);
867 case ETHTOOL_RX_COPYBREAK:
868 lif->rx_copybreak = *(u32 *)data;
877 static int ionic_get_tunable(struct net_device *netdev,
878 const struct ethtool_tunable *tuna, void *data)
880 struct ionic_lif *lif = netdev_priv(netdev);
883 case ETHTOOL_RX_COPYBREAK:
884 *(u32 *)data = lif->rx_copybreak;
893 static int ionic_get_module_info(struct net_device *netdev,
894 struct ethtool_modinfo *modinfo)
897 struct ionic_lif *lif = netdev_priv(netdev);
898 struct ionic_dev *idev = &lif->ionic->idev;
899 struct ionic_xcvr_status *xcvr;
900 struct sfp_eeprom_base *sfp;
902 xcvr = &idev->port_info->status.xcvr;
903 sfp = (struct sfp_eeprom_base *) xcvr->sprom;
905 /* report the module data type and length */
906 switch (sfp->phys_id) {
908 modinfo->type = ETH_MODULE_SFF_8079;
909 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
911 case SFF8024_ID_QSFP_8436_8636:
912 case SFF8024_ID_QSFP28_8636:
913 modinfo->type = ETH_MODULE_SFF_8436;
914 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
917 netdev_info(netdev, "unknown xcvr type 0x%02x\n",
920 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
927 static int ionic_get_module_eeprom(struct net_device *netdev,
928 struct ethtool_eeprom *ee,
931 struct ionic_lif *lif = netdev_priv(netdev);
932 struct ionic_dev *idev = &lif->ionic->idev;
933 struct ionic_xcvr_status *xcvr;
934 char tbuf[sizeof(xcvr->sprom)];
938 /* The NIC keeps the module prom up-to-date in the DMA space
939 * so we can simply copy the module bytes into the data buffer.
941 xcvr = &idev->port_info->status.xcvr;
942 len = min_t(u32, sizeof(xcvr->sprom), ee->len);
945 memcpy(data, xcvr->sprom, len);
946 memcpy(tbuf, xcvr->sprom, len);
948 /* Let's make sure we got a consistent copy */
949 if (!memcmp(data, tbuf, len))
960 static int ionic_get_ts_info(struct net_device *netdev,
961 struct ethtool_ts_info *info)
963 struct ionic_lif *lif = netdev_priv(netdev);
964 struct ionic *ionic = lif->ionic;
967 if (!lif->phc || !lif->phc->ptp)
968 return ethtool_op_get_ts_info(netdev, info);
970 info->phc_index = ptp_clock_index(lif->phc->ptp);
972 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
973 SOF_TIMESTAMPING_RX_SOFTWARE |
974 SOF_TIMESTAMPING_SOFTWARE |
975 SOF_TIMESTAMPING_TX_HARDWARE |
976 SOF_TIMESTAMPING_RX_HARDWARE |
977 SOF_TIMESTAMPING_RAW_HARDWARE;
981 info->tx_types = BIT(HWTSTAMP_TX_OFF) |
984 mask = cpu_to_le64(BIT_ULL(IONIC_TXSTAMP_ONESTEP_SYNC));
985 if (ionic->ident.lif.eth.hwstamp_tx_modes & mask)
986 info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_SYNC);
988 mask = cpu_to_le64(BIT_ULL(IONIC_TXSTAMP_ONESTEP_P2P));
989 if (ionic->ident.lif.eth.hwstamp_tx_modes & mask)
990 info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_P2P);
994 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
995 BIT(HWTSTAMP_FILTER_ALL);
997 mask = cpu_to_le64(IONIC_PKT_CLS_NTP_ALL);
998 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
999 info->rx_filters |= BIT(HWTSTAMP_FILTER_NTP_ALL);
1001 mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_SYNC);
1002 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1003 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC);
1005 mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_DREQ);
1006 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1007 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ);
1009 mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_ALL);
1010 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1011 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_EVENT);
1013 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_SYNC);
1014 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1015 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC);
1017 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_DREQ);
1018 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1019 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
1021 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_ALL);
1022 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1023 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT);
1025 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_SYNC);
1026 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1027 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC);
1029 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_DREQ);
1030 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1031 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
1033 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_ALL);
1034 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1035 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT);
1037 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_SYNC);
1038 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1039 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_SYNC);
1041 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_DREQ);
1042 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1043 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ);
1045 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_ALL);
1046 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1047 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
1052 static int ionic_nway_reset(struct net_device *netdev)
1054 struct ionic_lif *lif = netdev_priv(netdev);
1055 struct ionic *ionic = lif->ionic;
1058 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
1061 /* flap the link to force auto-negotiation */
1063 mutex_lock(&ionic->dev_cmd_lock);
1065 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_DOWN);
1066 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
1069 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP);
1070 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
1073 mutex_unlock(&ionic->dev_cmd_lock);
1078 static const struct ethtool_ops ionic_ethtool_ops = {
1079 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1080 ETHTOOL_COALESCE_USE_ADAPTIVE_RX |
1081 ETHTOOL_COALESCE_USE_ADAPTIVE_TX,
1082 .supported_ring_params = ETHTOOL_RING_USE_TX_PUSH |
1083 ETHTOOL_RING_USE_RX_PUSH,
1084 .get_drvinfo = ionic_get_drvinfo,
1085 .get_regs_len = ionic_get_regs_len,
1086 .get_regs = ionic_get_regs,
1087 .get_link = ethtool_op_get_link,
1088 .get_link_ext_stats = ionic_get_link_ext_stats,
1089 .get_link_ksettings = ionic_get_link_ksettings,
1090 .set_link_ksettings = ionic_set_link_ksettings,
1091 .get_coalesce = ionic_get_coalesce,
1092 .set_coalesce = ionic_set_coalesce,
1093 .get_ringparam = ionic_get_ringparam,
1094 .set_ringparam = ionic_set_ringparam,
1095 .get_channels = ionic_get_channels,
1096 .set_channels = ionic_set_channels,
1097 .get_strings = ionic_get_strings,
1098 .get_ethtool_stats = ionic_get_stats,
1099 .get_sset_count = ionic_get_sset_count,
1100 .get_rxnfc = ionic_get_rxnfc,
1101 .get_rxfh_indir_size = ionic_get_rxfh_indir_size,
1102 .get_rxfh_key_size = ionic_get_rxfh_key_size,
1103 .get_rxfh = ionic_get_rxfh,
1104 .set_rxfh = ionic_set_rxfh,
1105 .get_tunable = ionic_get_tunable,
1106 .set_tunable = ionic_set_tunable,
1107 .get_module_info = ionic_get_module_info,
1108 .get_module_eeprom = ionic_get_module_eeprom,
1109 .get_pauseparam = ionic_get_pauseparam,
1110 .set_pauseparam = ionic_set_pauseparam,
1111 .get_fecparam = ionic_get_fecparam,
1112 .set_fecparam = ionic_set_fecparam,
1113 .get_ts_info = ionic_get_ts_info,
1114 .nway_reset = ionic_nway_reset,
1117 void ionic_ethtool_set_ops(struct net_device *netdev)
1119 netdev->ethtool_ops = &ionic_ethtool_ops;