drivers/net/ethernet/mellanox/mlx5/core/en_tc.c

   1 /*
   2  * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <net/flow_dissector.h>
  34 #include <net/flow_offload.h>
  35 #include <net/sch_generic.h>
  36 #include <net/pkt_cls.h>
  37 #include <linux/mlx5/fs.h>
  38 #include <linux/mlx5/device.h>
  39 #include <linux/rhashtable.h>
  40 #include <linux/refcount.h>
  41 #include <linux/completion.h>
  42 #include <net/arp.h>
  43 #include <net/ipv6_stubs.h>
  44 #include <net/bareudp.h>
  45 #include <net/bonding.h>
  46 #include <net/dst_metadata.h>
  47 #include "devlink.h"
  48 #include "en.h"
  49 #include "en/tc/post_act.h"
  50 #include "en/tc/act_stats.h"
  51 #include "en_rep.h"
  52 #include "en/rep/tc.h"
  53 #include "en/rep/neigh.h"
  54 #include "en_tc.h"
  55 #include "eswitch.h"
  56 #include "fs_core.h"
  57 #include "en/port.h"
  58 #include "en/tc_tun.h"
  59 #include "en/mapping.h"
  60 #include "en/tc_ct.h"
  61 #include "en/mod_hdr.h"
  62 #include "en/tc_tun_encap.h"
  63 #include "en/tc/sample.h"
  64 #include "en/tc/act/act.h"
  65 #include "en/tc/post_meter.h"
  66 #include "lib/devcom.h"
  67 #include "lib/geneve.h"
  68 #include "lib/fs_chains.h"
  69 #include "diag/en_tc_tracepoint.h"
  70 #include <asm/div64.h>
  71 #include "lag/lag.h"
  72 #include "lag/mp.h"
  73
  74 #define MLX5E_TC_TABLE_NUM_GROUPS 4
  75 #define MLX5E_TC_TABLE_MAX_GROUP_SIZE BIT(18)
  76
  77 struct mlx5e_tc_table {
  78         /* Protects the dynamic assignment of the t parameter
  79          * which is the nic tc root table.
  80          */
  81         struct mutex                    t_lock;
  82         struct mlx5e_priv               *priv;
  83         struct mlx5_flow_table          *t;
  84         struct mlx5_flow_table          *miss_t;
  85         struct mlx5_fs_chains           *chains;
  86         struct mlx5e_post_act           *post_act;
  87
  88         struct rhashtable               ht;
  89
  90         struct mod_hdr_tbl mod_hdr;
  91         struct mutex hairpin_tbl_lock; /* protects hairpin_tbl */
  92         DECLARE_HASHTABLE(hairpin_tbl, 8);
  93
  94         struct notifier_block     netdevice_nb;
  95         struct netdev_net_notifier      netdevice_nn;
  96
  97         struct mlx5_tc_ct_priv         *ct;
  98         struct mapping_ctx             *mapping;
  99         struct dentry                  *dfs_root;
 100
 101         /* tc action stats */
 102         struct mlx5e_tc_act_stats_handle *action_stats_handle;
 103 };
 104
 105 struct mlx5e_tc_attr_to_reg_mapping mlx5e_tc_attr_to_reg_mappings[] = {
 106         [MAPPED_OBJ_TO_REG] = {
 107                 .mfield = MLX5_ACTION_IN_FIELD_METADATA_REG_C_0,
 108                 .moffset = 0,
 109                 .mlen = 16,
 110         },
 111         [VPORT_TO_REG] = {
 112                 .mfield = MLX5_ACTION_IN_FIELD_METADATA_REG_C_0,
 113                 .moffset = 16,
 114                 .mlen = 16,
 115         },
 116         [TUNNEL_TO_REG] = {
 117                 .mfield = MLX5_ACTION_IN_FIELD_METADATA_REG_C_1,
 118                 .moffset = 8,
 119                 .mlen = ESW_TUN_OPTS_BITS + ESW_TUN_ID_BITS,
 120                 .soffset = MLX5_BYTE_OFF(fte_match_param,
 121                                          misc_parameters_2.metadata_reg_c_1),
 122         },
 123         [ZONE_TO_REG] = zone_to_reg_ct,
 124         [ZONE_RESTORE_TO_REG] = zone_restore_to_reg_ct,
 125         [CTSTATE_TO_REG] = ctstate_to_reg_ct,
 126         [MARK_TO_REG] = mark_to_reg_ct,
 127         [LABELS_TO_REG] = labels_to_reg_ct,
 128         [FTEID_TO_REG] = fteid_to_reg_ct,
 129         /* For NIC rules we store the restore metadata directly
 130          * into reg_b that is passed to SW since we don't
 131          * jump between steering domains.
 132          */
 133         [NIC_MAPPED_OBJ_TO_REG] = {
 134                 .mfield = MLX5_ACTION_IN_FIELD_METADATA_REG_B,
 135                 .moffset = 0,
 136                 .mlen = 16,
 137         },
 138         [NIC_ZONE_RESTORE_TO_REG] = nic_zone_restore_to_reg_ct,
 139         [PACKET_COLOR_TO_REG] = packet_color_to_reg,
 140 };
 141
 142 struct mlx5e_tc_jump_state {
 143         u32 jump_count;
 144         bool jump_target;
 145         struct mlx5_flow_attr *jumping_attr;
 146
 147         enum flow_action_id last_id;
 148         u32 last_index;
 149 };
 150
 151 struct mlx5e_tc_table *mlx5e_tc_table_alloc(void)
 152 {
 153         struct mlx5e_tc_table *tc;
 154
 155         tc = kvzalloc(sizeof(*tc), GFP_KERNEL);
 156         return tc ? tc : ERR_PTR(-ENOMEM);
 157 }
 158
 159 void mlx5e_tc_table_free(struct mlx5e_tc_table *tc)
 160 {
 161         kvfree(tc);
 162 }
 163
 164 struct mlx5_fs_chains *mlx5e_nic_chains(struct mlx5e_tc_table *tc)
 165 {
 166         return tc->chains;
 167 }
 168
 169 /* To avoid false lock dependency warning set the tc_ht lock
 170  * class different than the lock class of the ht being used when deleting
 171  * last flow from a group and then deleting a group, we get into del_sw_flow_group()
 172  * which call rhashtable_destroy on fg->ftes_hash which will take ht->mutex but
 173  * it's different than the ht->mutex here.
 174  */
 175 static struct lock_class_key tc_ht_lock_key;
 176 static struct lock_class_key tc_ht_wq_key;
 177
 178 static void mlx5e_put_flow_tunnel_id(struct mlx5e_tc_flow *flow);
 179 static void free_flow_post_acts(struct mlx5e_tc_flow *flow);
 180 static void mlx5_free_flow_attr_actions(struct mlx5e_tc_flow *flow,
 181                                         struct mlx5_flow_attr *attr);
 182
 183 void
 184 mlx5e_tc_match_to_reg_match(struct mlx5_flow_spec *spec,
 185                             enum mlx5e_tc_attr_to_reg type,
 186                             u32 val,
 187                             u32 mask)
 188 {
 189         void *headers_c = spec->match_criteria, *headers_v = spec->match_value, *fmask, *fval;
 190         int soffset = mlx5e_tc_attr_to_reg_mappings[type].soffset;
 191         int moffset = mlx5e_tc_attr_to_reg_mappings[type].moffset;
 192         int match_len = mlx5e_tc_attr_to_reg_mappings[type].mlen;
 193         u32 max_mask = GENMASK(match_len - 1, 0);
 194         __be32 curr_mask_be, curr_val_be;
 195         u32 curr_mask, curr_val;
 196
 197         fmask = headers_c + soffset;
 198         fval = headers_v + soffset;
 199
 200         memcpy(&curr_mask_be, fmask, 4);
 201         memcpy(&curr_val_be, fval, 4);
 202
 203         curr_mask = be32_to_cpu(curr_mask_be);
 204         curr_val = be32_to_cpu(curr_val_be);
 205
 206         //move to correct offset
 207         WARN_ON(mask > max_mask);
 208         mask <<= moffset;
 209         val <<= moffset;
 210         max_mask <<= moffset;
 211
 212         //zero val and mask
 213         curr_mask &= ~max_mask;
 214         curr_val &= ~max_mask;
 215
 216         //add current to mask
 217         curr_mask |= mask;
 218         curr_val |= val;
 219
 220         //back to be32 and write
 221         curr_mask_be = cpu_to_be32(curr_mask);
 222         curr_val_be = cpu_to_be32(curr_val);
 223
 224         memcpy(fmask, &curr_mask_be, 4);
 225         memcpy(fval, &curr_val_be, 4);
 226
 227         spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2;
 228 }
 229
 230 void
 231 mlx5e_tc_match_to_reg_get_match(struct mlx5_flow_spec *spec,
 232                                 enum mlx5e_tc_attr_to_reg type,
 233                                 u32 *val,
 234                                 u32 *mask)
 235 {
 236         void *headers_c = spec->match_criteria, *headers_v = spec->match_value, *fmask, *fval;
 237         int soffset = mlx5e_tc_attr_to_reg_mappings[type].soffset;
 238         int moffset = mlx5e_tc_attr_to_reg_mappings[type].moffset;
 239         int match_len = mlx5e_tc_attr_to_reg_mappings[type].mlen;
 240         u32 max_mask = GENMASK(match_len - 1, 0);
 241         __be32 curr_mask_be, curr_val_be;
 242         u32 curr_mask, curr_val;
 243
 244         fmask = headers_c + soffset;
 245         fval = headers_v + soffset;
 246
 247         memcpy(&curr_mask_be, fmask, 4);
 248         memcpy(&curr_val_be, fval, 4);
 249
 250         curr_mask = be32_to_cpu(curr_mask_be);
 251         curr_val = be32_to_cpu(curr_val_be);
 252
 253         *mask = (curr_mask >> moffset) & max_mask;
 254         *val = (curr_val >> moffset) & max_mask;
 255 }
 256
 257 int
 258 mlx5e_tc_match_to_reg_set_and_get_id(struct mlx5_core_dev *mdev,
 259                                      struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts,
 260                                      enum mlx5_flow_namespace_type ns,
 261                                      enum mlx5e_tc_attr_to_reg type,
 262                                      u32 data)
 263 {
 264         int moffset = mlx5e_tc_attr_to_reg_mappings[type].moffset;
 265         int mfield = mlx5e_tc_attr_to_reg_mappings[type].mfield;
 266         int mlen = mlx5e_tc_attr_to_reg_mappings[type].mlen;
 267         char *modact;
 268         int err;
 269
 270         modact = mlx5e_mod_hdr_alloc(mdev, ns, mod_hdr_acts);
 271         if (IS_ERR(modact))
 272                 return PTR_ERR(modact);
 273
 274         /* Firmware has 5bit length field and 0 means 32bits */
 275         if (mlen == 32)
 276                 mlen = 0;
 277
 278         MLX5_SET(set_action_in, modact, action_type, MLX5_ACTION_TYPE_SET);
 279         MLX5_SET(set_action_in, modact, field, mfield);
 280         MLX5_SET(set_action_in, modact, offset, moffset);
 281         MLX5_SET(set_action_in, modact, length, mlen);
 282         MLX5_SET(set_action_in, modact, data, data);
 283         err = mod_hdr_acts->num_actions;
 284         mod_hdr_acts->num_actions++;
 285
 286         return err;
 287 }
 288
 289 static struct mlx5e_tc_act_stats_handle  *
 290 get_act_stats_handle(struct mlx5e_priv *priv)
 291 {
 292         struct mlx5e_tc_table *tc = mlx5e_fs_get_tc(priv->fs);
 293         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 294         struct mlx5_rep_uplink_priv *uplink_priv;
 295         struct mlx5e_rep_priv *uplink_rpriv;
 296
 297         if (is_mdev_switchdev_mode(priv->mdev)) {
 298                 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
 299                 uplink_priv = &uplink_rpriv->uplink_priv;
 300
 301                 return uplink_priv->action_stats_handle;
 302         }
 303
 304         return tc->action_stats_handle;
 305 }
 306
 307 struct mlx5e_tc_int_port_priv *
 308 mlx5e_get_int_port_priv(struct mlx5e_priv *priv)
 309 {
 310         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 311         struct mlx5_rep_uplink_priv *uplink_priv;
 312         struct mlx5e_rep_priv *uplink_rpriv;
 313
 314         if (is_mdev_switchdev_mode(priv->mdev)) {
 315                 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
 316                 uplink_priv = &uplink_rpriv->uplink_priv;
 317
 318                 return uplink_priv->int_port_priv;
 319         }
 320
 321         return NULL;
 322 }
 323
 324 struct mlx5e_flow_meters *
 325 mlx5e_get_flow_meters(struct mlx5_core_dev *dev)
 326 {
 327         struct mlx5_eswitch *esw = dev->priv.eswitch;
 328         struct mlx5_rep_uplink_priv *uplink_priv;
 329         struct mlx5e_rep_priv *uplink_rpriv;
 330         struct mlx5e_priv *priv;
 331
 332         if (is_mdev_switchdev_mode(dev)) {
 333                 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
 334                 uplink_priv = &uplink_rpriv->uplink_priv;
 335                 priv = netdev_priv(uplink_rpriv->netdev);
 336                 if (!uplink_priv->flow_meters)
 337                         uplink_priv->flow_meters =
 338                                 mlx5e_flow_meters_init(priv,
 339                                                        MLX5_FLOW_NAMESPACE_FDB,
 340                                                        uplink_priv->post_act);
 341                 if (!IS_ERR(uplink_priv->flow_meters))
 342                         return uplink_priv->flow_meters;
 343         }
 344
 345         return NULL;
 346 }
 347
 348 static struct mlx5_tc_ct_priv *
 349 get_ct_priv(struct mlx5e_priv *priv)
 350 {
 351         struct mlx5e_tc_table *tc = mlx5e_fs_get_tc(priv->fs);
 352         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 353         struct mlx5_rep_uplink_priv *uplink_priv;
 354         struct mlx5e_rep_priv *uplink_rpriv;
 355
 356         if (is_mdev_switchdev_mode(priv->mdev)) {
 357                 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
 358                 uplink_priv = &uplink_rpriv->uplink_priv;
 359
 360                 return uplink_priv->ct_priv;
 361         }
 362
 363         return tc->ct;
 364 }
 365
 366 static struct mlx5e_tc_psample *
 367 get_sample_priv(struct mlx5e_priv *priv)
 368 {
 369         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 370         struct mlx5_rep_uplink_priv *uplink_priv;
 371         struct mlx5e_rep_priv *uplink_rpriv;
 372
 373         if (is_mdev_switchdev_mode(priv->mdev)) {
 374                 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
 375                 uplink_priv = &uplink_rpriv->uplink_priv;
 376
 377                 return uplink_priv->tc_psample;
 378         }
 379
 380         return NULL;
 381 }
 382
 383 static struct mlx5e_post_act *
 384 get_post_action(struct mlx5e_priv *priv)
 385 {
 386         struct mlx5e_tc_table *tc = mlx5e_fs_get_tc(priv->fs);
 387         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 388         struct mlx5_rep_uplink_priv *uplink_priv;
 389         struct mlx5e_rep_priv *uplink_rpriv;
 390
 391         if (is_mdev_switchdev_mode(priv->mdev)) {
 392                 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
 393                 uplink_priv = &uplink_rpriv->uplink_priv;
 394
 395                 return uplink_priv->post_act;
 396         }
 397
 398         return tc->post_act;
 399 }
 400
 401 struct mlx5_flow_handle *
 402 mlx5_tc_rule_insert(struct mlx5e_priv *priv,
 403                     struct mlx5_flow_spec *spec,
 404                     struct mlx5_flow_attr *attr)
 405 {
 406         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 407
 408         if (is_mdev_switchdev_mode(priv->mdev))
 409                 return mlx5_eswitch_add_offloaded_rule(esw, spec, attr);
 410
 411         return  mlx5e_add_offloaded_nic_rule(priv, spec, attr);
 412 }
 413
 414 void
 415 mlx5_tc_rule_delete(struct mlx5e_priv *priv,
 416                     struct mlx5_flow_handle *rule,
 417                     struct mlx5_flow_attr *attr)
 418 {
 419         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 420
 421         if (is_mdev_switchdev_mode(priv->mdev)) {
 422                 mlx5_eswitch_del_offloaded_rule(esw, rule, attr);
 423                 return;
 424         }
 425
 426         mlx5e_del_offloaded_nic_rule(priv, rule, attr);
 427 }
 428
 429 static bool
 430 is_flow_meter_action(struct mlx5_flow_attr *attr)
 431 {
 432         return (((attr->action & MLX5_FLOW_CONTEXT_ACTION_EXECUTE_ASO) &&
 433                  (attr->exe_aso_type == MLX5_EXE_ASO_FLOW_METER)) ||
 434                 attr->flags & MLX5_ATTR_FLAG_MTU);
 435 }
 436
 437 static int
 438 mlx5e_tc_add_flow_meter(struct mlx5e_priv *priv,
 439                         struct mlx5_flow_attr *attr)
 440 {
 441         struct mlx5e_post_act *post_act = get_post_action(priv);
 442         struct mlx5e_post_meter_priv *post_meter;
 443         enum mlx5_flow_namespace_type ns_type;
 444         struct mlx5e_flow_meter_handle *meter;
 445         enum mlx5e_post_meter_type type;
 446
 447         meter = mlx5e_tc_meter_replace(priv->mdev, &attr->meter_attr.params);
 448         if (IS_ERR(meter)) {
 449                 mlx5_core_err(priv->mdev, "Failed to get flow meter\n");
 450                 return PTR_ERR(meter);
 451         }
 452
 453         ns_type = mlx5e_tc_meter_get_namespace(meter->flow_meters);
 454         type = meter->params.mtu ? MLX5E_POST_METER_MTU : MLX5E_POST_METER_RATE;
 455         post_meter = mlx5e_post_meter_init(priv, ns_type, post_act,
 456                                            type,
 457                                            meter->act_counter, meter->drop_counter,
 458                                            attr->branch_true, attr->branch_false);
 459         if (IS_ERR(post_meter)) {
 460                 mlx5_core_err(priv->mdev, "Failed to init post meter\n");
 461                 goto err_meter_init;
 462         }
 463
 464         attr->meter_attr.meter = meter;
 465         attr->meter_attr.post_meter = post_meter;
 466         attr->dest_ft = mlx5e_post_meter_get_ft(post_meter);
 467         attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
 468
 469         return 0;
 470
 471 err_meter_init:
 472         mlx5e_tc_meter_put(meter);
 473         return PTR_ERR(post_meter);
 474 }
 475
 476 static void
 477 mlx5e_tc_del_flow_meter(struct mlx5_eswitch *esw, struct mlx5_flow_attr *attr)
 478 {
 479         mlx5e_post_meter_cleanup(esw, attr->meter_attr.post_meter);
 480         mlx5e_tc_meter_put(attr->meter_attr.meter);
 481 }
 482
 483 struct mlx5_flow_handle *
 484 mlx5e_tc_rule_offload(struct mlx5e_priv *priv,
 485                       struct mlx5_flow_spec *spec,
 486                       struct mlx5_flow_attr *attr)
 487 {
 488         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 489         int err;
 490
 491         if (!is_mdev_switchdev_mode(priv->mdev))
 492                 return mlx5e_add_offloaded_nic_rule(priv, spec, attr);
 493
 494         if (attr->flags & MLX5_ATTR_FLAG_SAMPLE)
 495                 return mlx5e_tc_sample_offload(get_sample_priv(priv), spec, attr);
 496
 497         if (is_flow_meter_action(attr)) {
 498                 err = mlx5e_tc_add_flow_meter(priv, attr);
 499                 if (err)
 500                         return ERR_PTR(err);
 501         }
 502
 503         return mlx5_eswitch_add_offloaded_rule(esw, spec, attr);
 504 }
 505
 506 void
 507 mlx5e_tc_rule_unoffload(struct mlx5e_priv *priv,
 508                         struct mlx5_flow_handle *rule,
 509                         struct mlx5_flow_attr *attr)
 510 {
 511         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 512
 513         if (!is_mdev_switchdev_mode(priv->mdev)) {
 514                 mlx5e_del_offloaded_nic_rule(priv, rule, attr);
 515                 return;
 516         }
 517
 518         if (attr->flags & MLX5_ATTR_FLAG_SAMPLE) {
 519                 mlx5e_tc_sample_unoffload(get_sample_priv(priv), rule, attr);
 520                 return;
 521         }
 522
 523         mlx5_eswitch_del_offloaded_rule(esw, rule, attr);
 524
 525         if (attr->meter_attr.meter)
 526                 mlx5e_tc_del_flow_meter(esw, attr);
 527 }
 528
 529 int
 530 mlx5e_tc_match_to_reg_set(struct mlx5_core_dev *mdev,
 531                           struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts,
 532                           enum mlx5_flow_namespace_type ns,
 533                           enum mlx5e_tc_attr_to_reg type,
 534                           u32 data)
 535 {
 536         int ret = mlx5e_tc_match_to_reg_set_and_get_id(mdev, mod_hdr_acts, ns, type, data);
 537
 538         return ret < 0 ? ret : 0;
 539 }
 540
 541 void mlx5e_tc_match_to_reg_mod_hdr_change(struct mlx5_core_dev *mdev,
 542                                           struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts,
 543                                           enum mlx5e_tc_attr_to_reg type,
 544                                           int act_id, u32 data)
 545 {
 546         int moffset = mlx5e_tc_attr_to_reg_mappings[type].moffset;
 547         int mfield = mlx5e_tc_attr_to_reg_mappings[type].mfield;
 548         int mlen = mlx5e_tc_attr_to_reg_mappings[type].mlen;
 549         char *modact;
 550
 551         modact = mlx5e_mod_hdr_get_item(mod_hdr_acts, act_id);
 552
 553         /* Firmware has 5bit length field and 0 means 32bits */
 554         if (mlen == 32)
 555                 mlen = 0;
 556
 557         MLX5_SET(set_action_in, modact, action_type, MLX5_ACTION_TYPE_SET);
 558         MLX5_SET(set_action_in, modact, field, mfield);
 559         MLX5_SET(set_action_in, modact, offset, moffset);
 560         MLX5_SET(set_action_in, modact, length, mlen);
 561         MLX5_SET(set_action_in, modact, data, data);
 562 }
 563
 564 struct mlx5e_hairpin {
 565         struct mlx5_hairpin *pair;
 566
 567         struct mlx5_core_dev *func_mdev;
 568         struct mlx5e_priv *func_priv;
 569         u32 tdn;
 570         struct mlx5e_tir direct_tir;
 571
 572         int num_channels;
 573         u8 log_num_packets;
 574         struct mlx5e_rqt indir_rqt;
 575         struct mlx5e_tir indir_tir[MLX5E_NUM_INDIR_TIRS];
 576         struct mlx5_ttc_table *ttc;
 577 };
 578
 579 struct mlx5e_hairpin_entry {
 580         /* a node of a hash table which keeps all the  hairpin entries */
 581         struct hlist_node hairpin_hlist;
 582
 583         /* protects flows list */
 584         spinlock_t flows_lock;
 585         /* flows sharing the same hairpin */
 586         struct list_head flows;
 587         /* hpe's that were not fully initialized when dead peer update event
 588          * function traversed them.
 589          */
 590         struct list_head dead_peer_wait_list;
 591
 592         u16 peer_vhca_id;
 593         u8 prio;
 594         struct mlx5e_hairpin *hp;
 595         refcount_t refcnt;
 596         struct completion res_ready;
 597 };
 598
 599 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
 600                               struct mlx5e_tc_flow *flow);
 601
 602 struct mlx5e_tc_flow *mlx5e_flow_get(struct mlx5e_tc_flow *flow)
 603 {
 604         if (!flow || !refcount_inc_not_zero(&flow->refcnt))
 605                 return ERR_PTR(-EINVAL);
 606         return flow;
 607 }
 608
 609 void mlx5e_flow_put(struct mlx5e_priv *priv, struct mlx5e_tc_flow *flow)
 610 {
 611         if (refcount_dec_and_test(&flow->refcnt)) {
 612                 mlx5e_tc_del_flow(priv, flow);
 613                 kfree_rcu(flow, rcu_head);
 614         }
 615 }
 616
 617 bool mlx5e_is_eswitch_flow(struct mlx5e_tc_flow *flow)
 618 {
 619         return flow_flag_test(flow, ESWITCH);
 620 }
 621
 622 bool mlx5e_is_ft_flow(struct mlx5e_tc_flow *flow)
 623 {
 624         return flow_flag_test(flow, FT);
 625 }
 626
 627 bool mlx5e_is_offloaded_flow(struct mlx5e_tc_flow *flow)
 628 {
 629         return flow_flag_test(flow, OFFLOADED);
 630 }
 631
 632 int mlx5e_get_flow_namespace(struct mlx5e_tc_flow *flow)
 633 {
 634         return mlx5e_is_eswitch_flow(flow) ?
 635                 MLX5_FLOW_NAMESPACE_FDB : MLX5_FLOW_NAMESPACE_KERNEL;
 636 }
 637
 638 static struct mlx5_core_dev *
 639 get_flow_counter_dev(struct mlx5e_tc_flow *flow)
 640 {
 641         return mlx5e_is_eswitch_flow(flow) ? flow->attr->esw_attr->counter_dev : flow->priv->mdev;
 642 }
 643
 644 static struct mod_hdr_tbl *
 645 get_mod_hdr_table(struct mlx5e_priv *priv, struct mlx5e_tc_flow *flow)
 646 {
 647         struct mlx5e_tc_table *tc = mlx5e_fs_get_tc(priv->fs);
 648         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 649
 650         return mlx5e_get_flow_namespace(flow) == MLX5_FLOW_NAMESPACE_FDB ?
 651                 &esw->offloads.mod_hdr :
 652                 &tc->mod_hdr;
 653 }
 654
 655 int mlx5e_tc_attach_mod_hdr(struct mlx5e_priv *priv,
 656                             struct mlx5e_tc_flow *flow,
 657                             struct mlx5_flow_attr *attr)
 658 {
 659         struct mlx5e_mod_hdr_handle *mh;
 660
 661         mh = mlx5e_mod_hdr_attach(priv->mdev, get_mod_hdr_table(priv, flow),
 662                                   mlx5e_get_flow_namespace(flow),
 663                                   &attr->parse_attr->mod_hdr_acts);
 664         if (IS_ERR(mh))
 665                 return PTR_ERR(mh);
 666
 667         WARN_ON(attr->modify_hdr);
 668         attr->modify_hdr = mlx5e_mod_hdr_get(mh);
 669         attr->mh = mh;
 670
 671         return 0;
 672 }
 673
 674 void mlx5e_tc_detach_mod_hdr(struct mlx5e_priv *priv,
 675                              struct mlx5e_tc_flow *flow,
 676                              struct mlx5_flow_attr *attr)
 677 {
 678         /* flow wasn't fully initialized */
 679         if (!attr->mh)
 680                 return;
 681
 682         mlx5e_mod_hdr_detach(priv->mdev, get_mod_hdr_table(priv, flow),
 683                              attr->mh);
 684         attr->mh = NULL;
 685 }
 686
 687 static
 688 struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex)
 689 {
 690         struct mlx5_core_dev *mdev;
 691         struct net_device *netdev;
 692         struct mlx5e_priv *priv;
 693
 694         netdev = dev_get_by_index(net, ifindex);
 695         if (!netdev)
 696                 return ERR_PTR(-ENODEV);
 697
 698         priv = netdev_priv(netdev);
 699         mdev = priv->mdev;
 700         dev_put(netdev);
 701
 702         /* Mirred tc action holds a refcount on the ifindex net_device (see
 703          * net/sched/act_mirred.c:tcf_mirred_get_dev). So, it's okay to continue using mdev
 704          * after dev_put(netdev), while we're in the context of adding a tc flow.
 705          *
 706          * The mdev pointer corresponds to the peer/out net_device of a hairpin. It is then
 707          * stored in a hairpin object, which exists until all flows, that refer to it, get
 708          * removed.
 709          *
 710          * On the other hand, after a hairpin object has been created, the peer net_device may
 711          * be removed/unbound while there are still some hairpin flows that are using it. This
 712          * case is handled by mlx5e_tc_hairpin_update_dead_peer, which is hooked to
 713          * NETDEV_UNREGISTER event of the peer net_device.
 714          */
 715         return mdev;
 716 }
 717
 718 static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
 719 {
 720         struct mlx5e_tir_builder *builder;
 721         int err;
 722
 723         builder = mlx5e_tir_builder_alloc(false);
 724         if (!builder)
 725                 return -ENOMEM;
 726
 727         err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn);
 728         if (err)
 729                 goto out;
 730
 731         mlx5e_tir_builder_build_inline(builder, hp->tdn, hp->pair->rqn[0]);
 732         err = mlx5e_tir_init(&hp->direct_tir, builder, hp->func_mdev, false);
 733         if (err)
 734                 goto create_tir_err;
 735
 736 out:
 737         mlx5e_tir_builder_free(builder);
 738         return err;
 739
 740 create_tir_err:
 741         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 742
 743         goto out;
 744 }
 745
 746 static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp)
 747 {
 748         mlx5e_tir_destroy(&hp->direct_tir);
 749         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 750 }
 751
 752 static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)
 753 {
 754         struct mlx5e_priv *priv = hp->func_priv;
 755         struct mlx5_core_dev *mdev = priv->mdev;
 756         struct mlx5e_rss_params_indir *indir;
 757         int err;
 758
 759         indir = kvmalloc(sizeof(*indir), GFP_KERNEL);
 760         if (!indir)
 761                 return -ENOMEM;
 762
 763         mlx5e_rss_params_indir_init_uniform(indir, hp->num_channels);
 764         err = mlx5e_rqt_init_indir(&hp->indir_rqt, mdev, hp->pair->rqn, hp->num_channels,
 765                                    mlx5e_rx_res_get_current_hash(priv->rx_res).hfunc,
 766                                    indir);
 767
 768         kvfree(indir);
 769         return err;
 770 }
 771
 772 static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
 773 {
 774         struct mlx5e_priv *priv = hp->func_priv;
 775         struct mlx5e_rss_params_hash rss_hash;
 776         enum mlx5_traffic_types tt, max_tt;
 777         struct mlx5e_tir_builder *builder;
 778         int err = 0;
 779
 780         builder = mlx5e_tir_builder_alloc(false);
 781         if (!builder)
 782                 return -ENOMEM;
 783
 784         rss_hash = mlx5e_rx_res_get_current_hash(priv->rx_res);
 785
 786         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
 787                 struct mlx5e_rss_params_traffic_type rss_tt;
 788
 789                 rss_tt = mlx5e_rss_get_default_tt_config(tt);
 790
 791                 mlx5e_tir_builder_build_rqt(builder, hp->tdn,
 792                                             mlx5e_rqt_get_rqtn(&hp->indir_rqt),
 793                                             false);
 794                 mlx5e_tir_builder_build_rss(builder, &rss_hash, &rss_tt, false);
 795
 796                 err = mlx5e_tir_init(&hp->indir_tir[tt], builder, hp->func_mdev, false);
 797                 if (err) {
 798                         mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err);
 799                         goto err_destroy_tirs;
 800                 }
 801
 802                 mlx5e_tir_builder_clear(builder);
 803         }
 804
 805 out:
 806         mlx5e_tir_builder_free(builder);
 807         return err;
 808
 809 err_destroy_tirs:
 810         max_tt = tt;
 811         for (tt = 0; tt < max_tt; tt++)
 812                 mlx5e_tir_destroy(&hp->indir_tir[tt]);
 813
 814         goto out;
 815 }
 816
 817 static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp)
 818 {
 819         int tt;
 820
 821         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 822                 mlx5e_tir_destroy(&hp->indir_tir[tt]);
 823 }
 824
 825 static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp,
 826                                          struct ttc_params *ttc_params)
 827 {
 828         struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr;
 829         int tt;
 830
 831         memset(ttc_params, 0, sizeof(*ttc_params));
 832
 833         ttc_params->ns = mlx5_get_flow_namespace(hp->func_mdev,
 834                                                  MLX5_FLOW_NAMESPACE_KERNEL);
 835         for (tt = 0; tt < MLX5_NUM_TT; tt++) {
 836                 ttc_params->dests[tt].type = MLX5_FLOW_DESTINATION_TYPE_TIR;
 837                 ttc_params->dests[tt].tir_num =
 838                         tt == MLX5_TT_ANY ?
 839                                 mlx5e_tir_get_tirn(&hp->direct_tir) :
 840                                 mlx5e_tir_get_tirn(&hp->indir_tir[tt]);
 841         }
 842
 843         ft_attr->level = MLX5E_TC_TTC_FT_LEVEL;
 844         ft_attr->prio = MLX5E_TC_PRIO;
 845 }
 846
 847 static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp)
 848 {
 849         struct mlx5e_priv *priv = hp->func_priv;
 850         struct ttc_params ttc_params;
 851         struct mlx5_ttc_table *ttc;
 852         int err;
 853
 854         err = mlx5e_hairpin_create_indirect_rqt(hp);
 855         if (err)
 856                 return err;
 857
 858         err = mlx5e_hairpin_create_indirect_tirs(hp);
 859         if (err)
 860                 goto err_create_indirect_tirs;
 861
 862         mlx5e_hairpin_set_ttc_params(hp, &ttc_params);
 863         hp->ttc = mlx5_create_ttc_table(priv->mdev, &ttc_params);
 864         if (IS_ERR(hp->ttc)) {
 865                 err = PTR_ERR(hp->ttc);
 866                 goto err_create_ttc_table;
 867         }
 868
 869         ttc = mlx5e_fs_get_ttc(priv->fs, false);
 870         netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n",
 871                    hp->num_channels,
 872                    mlx5_get_ttc_flow_table(ttc)->id);
 873
 874         return 0;
 875
 876 err_create_ttc_table:
 877         mlx5e_hairpin_destroy_indirect_tirs(hp);
 878 err_create_indirect_tirs:
 879         mlx5e_rqt_destroy(&hp->indir_rqt);
 880
 881         return err;
 882 }
 883
 884 static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp)
 885 {
 886         mlx5_destroy_ttc_table(hp->ttc);
 887         mlx5e_hairpin_destroy_indirect_tirs(hp);
 888         mlx5e_rqt_destroy(&hp->indir_rqt);
 889 }
 890
 891 static struct mlx5e_hairpin *
 892 mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params,
 893                      int peer_ifindex)
 894 {
 895         struct mlx5_core_dev *func_mdev, *peer_mdev;
 896         struct mlx5e_hairpin *hp;
 897         struct mlx5_hairpin *pair;
 898         int err;
 899
 900         hp = kzalloc(sizeof(*hp), GFP_KERNEL);
 901         if (!hp)
 902                 return ERR_PTR(-ENOMEM);
 903
 904         func_mdev = priv->mdev;
 905         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 906         if (IS_ERR(peer_mdev)) {
 907                 err = PTR_ERR(peer_mdev);
 908                 goto create_pair_err;
 909         }
 910
 911         pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params);
 912         if (IS_ERR(pair)) {
 913                 err = PTR_ERR(pair);
 914                 goto create_pair_err;
 915         }
 916         hp->pair = pair;
 917         hp->func_mdev = func_mdev;
 918         hp->func_priv = priv;
 919         hp->num_channels = params->num_channels;
 920         hp->log_num_packets = params->log_num_packets;
 921
 922         err = mlx5e_hairpin_create_transport(hp);
 923         if (err)
 924                 goto create_transport_err;
 925
 926         if (hp->num_channels > 1) {
 927                 err = mlx5e_hairpin_rss_init(hp);
 928                 if (err)
 929                         goto rss_init_err;
 930         }
 931
 932         return hp;
 933
 934 rss_init_err:
 935         mlx5e_hairpin_destroy_transport(hp);
 936 create_transport_err:
 937         mlx5_core_hairpin_destroy(hp->pair);
 938 create_pair_err:
 939         kfree(hp);
 940         return ERR_PTR(err);
 941 }
 942
 943 static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp)
 944 {
 945         if (hp->num_channels > 1)
 946                 mlx5e_hairpin_rss_cleanup(hp);
 947         mlx5e_hairpin_destroy_transport(hp);
 948         mlx5_core_hairpin_destroy(hp->pair);
 949         kvfree(hp);
 950 }
 951
 952 static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio)
 953 {
 954         return (peer_vhca_id << 16 | prio);
 955 }
 956
 957 static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv,
 958                                                      u16 peer_vhca_id, u8 prio)
 959 {
 960         struct mlx5e_tc_table *tc = mlx5e_fs_get_tc(priv->fs);
 961         struct mlx5e_hairpin_entry *hpe;
 962         u32 hash_key = hash_hairpin_info(peer_vhca_id, prio);
 963
 964         hash_for_each_possible(tc->hairpin_tbl, hpe,
 965                                hairpin_hlist, hash_key) {
 966                 if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio) {
 967                         refcount_inc(&hpe->refcnt);
 968                         return hpe;
 969                 }
 970         }
 971
 972         return NULL;
 973 }
 974
 975 static void mlx5e_hairpin_put(struct mlx5e_priv *priv,
 976                               struct mlx5e_hairpin_entry *hpe)
 977 {
 978         struct mlx5e_tc_table *tc = mlx5e_fs_get_tc(priv->fs);
 979         /* no more hairpin flows for us, release the hairpin pair */
 980         if (!refcount_dec_and_mutex_lock(&hpe->refcnt, &tc->hairpin_tbl_lock))
 981                 return;
 982         hash_del(&hpe->hairpin_hlist);
 983         mutex_unlock(&tc->hairpin_tbl_lock);
 984
 985         if (!IS_ERR_OR_NULL(hpe->hp)) {
 986                 netdev_dbg(priv->netdev, "del hairpin: peer %s\n",
 987                            dev_name(hpe->hp->pair->peer_mdev->device));
 988
 989                 mlx5e_hairpin_destroy(hpe->hp);
 990         }
 991
 992         WARN_ON(!list_empty(&hpe->flows));
 993         kfree(hpe);
 994 }
 995
 996 #define UNKNOWN_MATCH_PRIO 8
 997
 998 static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv,
 999                                   struct mlx5_flow_spec *spec, u8 *match_prio,
1000                                   struct netlink_ext_ack *extack)
1001 {
1002         void *headers_c, *headers_v;
1003         u8 prio_val, prio_mask = 0;
1004         bool vlan_present;
1005
1006 #ifdef CONFIG_MLX5_CORE_EN_DCB
1007         if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) {
1008                 NL_SET_ERR_MSG_MOD(extack,
1009                                    "only PCP trust state supported for hairpin");
1010                 return -EOPNOTSUPP;
1011         }
1012 #endif
1013         headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers);
1014         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
1015
1016         vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag);
1017         if (vlan_present) {
1018                 prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
1019                 prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
1020         }
1021
1022         if (!vlan_present || !prio_mask) {
1023                 prio_val = UNKNOWN_MATCH_PRIO;
1024         } else if (prio_mask != 0x7) {
1025                 NL_SET_ERR_MSG_MOD(extack,
1026                                    "masked priority match not supported for hairpin");
1027                 return -EOPNOTSUPP;
1028         }
1029
1030         *match_prio = prio_val;
1031         return 0;
1032 }
1033
1034 static int debugfs_hairpin_num_active_get(void *data, u64 *val)
1035 {
1036         struct mlx5e_tc_table *tc = data;
1037         struct mlx5e_hairpin_entry *hpe;
1038         u32 cnt = 0;
1039         u32 bkt;
1040
1041         mutex_lock(&tc->hairpin_tbl_lock);
1042         hash_for_each(tc->hairpin_tbl, bkt, hpe, hairpin_hlist)
1043                 cnt++;
1044         mutex_unlock(&tc->hairpin_tbl_lock);
1045
1046         *val = cnt;
1047
1048         return 0;
1049 }
1050 DEFINE_DEBUGFS_ATTRIBUTE(fops_hairpin_num_active,
1051                          debugfs_hairpin_num_active_get, NULL, "%llu\n");
1052
1053 static int debugfs_hairpin_table_dump_show(struct seq_file *file, void *priv)
1054
1055 {
1056         struct mlx5e_tc_table *tc = file->private;
1057         struct mlx5e_hairpin_entry *hpe;
1058         u32 bkt;
1059
1060         mutex_lock(&tc->hairpin_tbl_lock);
1061         hash_for_each(tc->hairpin_tbl, bkt, hpe, hairpin_hlist)
1062                 seq_printf(file,
1063                            "Hairpin peer_vhca_id %u prio %u refcnt %u num_channels %u num_packets %lu\n",
1064                            hpe->peer_vhca_id, hpe->prio,
1065                            refcount_read(&hpe->refcnt), hpe->hp->num_channels,
1066                            BIT(hpe->hp->log_num_packets));
1067         mutex_unlock(&tc->hairpin_tbl_lock);
1068
1069         return 0;
1070 }
1071 DEFINE_SHOW_ATTRIBUTE(debugfs_hairpin_table_dump);
1072
1073 static void mlx5e_tc_debugfs_init(struct mlx5e_tc_table *tc,
1074                                   struct dentry *dfs_root)
1075 {
1076         if (IS_ERR_OR_NULL(dfs_root))
1077                 return;
1078
1079         tc->dfs_root = debugfs_create_dir("tc", dfs_root);
1080
1081         debugfs_create_file("hairpin_num_active", 0444, tc->dfs_root, tc,
1082                             &fops_hairpin_num_active);
1083         debugfs_create_file("hairpin_table_dump", 0444, tc->dfs_root, tc,
1084                             &debugfs_hairpin_table_dump_fops);
1085 }
1086
1087 static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv,
1088                                   struct mlx5e_tc_flow *flow,
1089                                   struct mlx5e_tc_flow_parse_attr *parse_attr,
1090                                   struct netlink_ext_ack *extack)
1091 {
1092         struct mlx5e_tc_table *tc = mlx5e_fs_get_tc(priv->fs);
1093         struct devlink *devlink = priv_to_devlink(priv->mdev);
1094         int peer_ifindex = parse_attr->mirred_ifindex[0];
1095         union devlink_param_value val = {};
1096         struct mlx5_hairpin_params params;
1097         struct mlx5_core_dev *peer_mdev;
1098         struct mlx5e_hairpin_entry *hpe;
1099         struct mlx5e_hairpin *hp;
1100         u8 match_prio;
1101         u16 peer_id;
1102         int err;
1103
1104         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
1105         if (IS_ERR(peer_mdev)) {
1106                 NL_SET_ERR_MSG_MOD(extack, "invalid ifindex of mirred device");
1107                 return PTR_ERR(peer_mdev);
1108         }
1109
1110         if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) {
1111                 NL_SET_ERR_MSG_MOD(extack, "hairpin is not supported");
1112                 return -EOPNOTSUPP;
1113         }
1114
1115         peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
1116         err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio,
1117                                      extack);
1118         if (err)
1119                 return err;
1120
1121         mutex_lock(&tc->hairpin_tbl_lock);
1122         hpe = mlx5e_hairpin_get(priv, peer_id, match_prio);
1123         if (hpe) {
1124                 mutex_unlock(&tc->hairpin_tbl_lock);
1125                 wait_for_completion(&hpe->res_ready);
1126
1127                 if (IS_ERR(hpe->hp)) {
1128                         err = -EREMOTEIO;
1129                         goto out_err;
1130                 }
1131                 goto attach_flow;
1132         }
1133
1134         hpe = kzalloc(sizeof(*hpe), GFP_KERNEL);
1135         if (!hpe) {
1136                 mutex_unlock(&tc->hairpin_tbl_lock);
1137                 return -ENOMEM;
1138         }
1139
1140         spin_lock_init(&hpe->flows_lock);
1141         INIT_LIST_HEAD(&hpe->flows);
1142         INIT_LIST_HEAD(&hpe->dead_peer_wait_list);
1143         hpe->peer_vhca_id = peer_id;
1144         hpe->prio = match_prio;
1145         refcount_set(&hpe->refcnt, 1);
1146         init_completion(&hpe->res_ready);
1147
1148         hash_add(tc->hairpin_tbl, &hpe->hairpin_hlist,
1149                  hash_hairpin_info(peer_id, match_prio));
1150         mutex_unlock(&tc->hairpin_tbl_lock);
1151
1152         err = devl_param_driverinit_value_get(
1153                 devlink, MLX5_DEVLINK_PARAM_ID_HAIRPIN_QUEUE_SIZE, &val);
1154         if (err) {
1155                 err = -ENOMEM;
1156                 goto out_err;
1157         }
1158
1159         params.log_num_packets = ilog2(val.vu32);
1160         params.log_data_size =
1161                 clamp_t(u32,
1162                         params.log_num_packets +
1163                                 MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev),
1164                         MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz),
1165                         MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz));
1166
1167         params.q_counter = priv->q_counter;
1168         err = devl_param_driverinit_value_get(
1169                 devlink, MLX5_DEVLINK_PARAM_ID_HAIRPIN_NUM_QUEUES, &val);
1170         if (err) {
1171                 err = -ENOMEM;
1172                 goto out_err;
1173         }
1174
1175         params.num_channels = val.vu32;
1176
1177         hp = mlx5e_hairpin_create(priv, &params, peer_ifindex);
1178         hpe->hp = hp;
1179         complete_all(&hpe->res_ready);
1180         if (IS_ERR(hp)) {
1181                 err = PTR_ERR(hp);
1182                 goto out_err;
1183         }
1184
1185         netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n",
1186                    mlx5e_tir_get_tirn(&hp->direct_tir), hp->pair->rqn[0],
1187                    dev_name(hp->pair->peer_mdev->device),
1188                    hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets);
1189
1190 attach_flow:
1191         if (hpe->hp->num_channels > 1) {
1192                 flow_flag_set(flow, HAIRPIN_RSS);
1193                 flow->attr->nic_attr->hairpin_ft =
1194                         mlx5_get_ttc_flow_table(hpe->hp->ttc);
1195         } else {
1196                 flow->attr->nic_attr->hairpin_tirn = mlx5e_tir_get_tirn(&hpe->hp->direct_tir);
1197         }
1198
1199         flow->hpe = hpe;
1200         spin_lock(&hpe->flows_lock);
1201         list_add(&flow->hairpin, &hpe->flows);
1202         spin_unlock(&hpe->flows_lock);
1203
1204         return 0;
1205
1206 out_err:
1207         mlx5e_hairpin_put(priv, hpe);
1208         return err;
1209 }
1210
1211 static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv,
1212                                    struct mlx5e_tc_flow *flow)
1213 {
1214         /* flow wasn't fully initialized */
1215         if (!flow->hpe)
1216                 return;
1217
1218         spin_lock(&flow->hpe->flows_lock);
1219         list_del(&flow->hairpin);
1220         spin_unlock(&flow->hpe->flows_lock);
1221
1222         mlx5e_hairpin_put(priv, flow->hpe);
1223         flow->hpe = NULL;
1224 }
1225
1226 struct mlx5_flow_handle *
1227 mlx5e_add_offloaded_nic_rule(struct mlx5e_priv *priv,
1228                              struct mlx5_flow_spec *spec,
1229                              struct mlx5_flow_attr *attr)
1230 {
1231         struct mlx5_flow_context *flow_context = &spec->flow_context;
1232         struct mlx5e_vlan_table *vlan = mlx5e_fs_get_vlan(priv->fs);
1233         struct mlx5e_tc_table *tc = mlx5e_fs_get_tc(priv->fs);
1234         struct mlx5_nic_flow_attr *nic_attr = attr->nic_attr;
1235         struct mlx5_flow_destination dest[2] = {};
1236         struct mlx5_fs_chains *nic_chains;
1237         struct mlx5_flow_act flow_act = {
1238                 .action = attr->action,
1239                 .flags    = FLOW_ACT_NO_APPEND,
1240         };
1241         struct mlx5_flow_handle *rule;
1242         struct mlx5_flow_table *ft;
1243         int dest_ix = 0;
1244
1245         nic_chains = mlx5e_nic_chains(tc);
1246         flow_context->flags |= FLOW_CONTEXT_HAS_TAG;
1247         flow_context->flow_tag = nic_attr->flow_tag;
1248
1249         if (attr->dest_ft) {
1250                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
1251                 dest[dest_ix].ft = attr->dest_ft;
1252                 dest_ix++;
1253         } else if (nic_attr->hairpin_ft) {
1254                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
1255                 dest[dest_ix].ft = nic_attr->hairpin_ft;
1256                 dest_ix++;
1257         } else if (nic_attr->hairpin_tirn) {
1258                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR;
1259                 dest[dest_ix].tir_num = nic_attr->hairpin_tirn;
1260                 dest_ix++;
1261         } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
1262                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
1263                 if (attr->dest_chain) {
1264                         dest[dest_ix].ft = mlx5_chains_get_table(nic_chains,
1265                                                                  attr->dest_chain, 1,
1266                                                                  MLX5E_TC_FT_LEVEL);
1267                         if (IS_ERR(dest[dest_ix].ft))
1268                                 return ERR_CAST(dest[dest_ix].ft);
1269                 } else {
1270                         dest[dest_ix].ft = mlx5e_vlan_get_flowtable(vlan);
1271                 }
1272                 dest_ix++;
1273         }
1274
1275         if (dest[0].type == MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE &&
1276             MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, ignore_flow_level))
1277                 flow_act.flags |= FLOW_ACT_IGNORE_FLOW_LEVEL;
1278
1279         if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
1280                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
1281                 dest[dest_ix].counter_id = mlx5_fc_id(attr->counter);
1282                 dest_ix++;
1283         }
1284
1285         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
1286                 flow_act.modify_hdr = attr->modify_hdr;
1287
1288         mutex_lock(&tc->t_lock);
1289         if (IS_ERR_OR_NULL(tc->t)) {
1290                 /* Create the root table here if doesn't exist yet */
1291                 tc->t =
1292                         mlx5_chains_get_table(nic_chains, 0, 1, MLX5E_TC_FT_LEVEL);
1293
1294                 if (IS_ERR(tc->t)) {
1295                         mutex_unlock(&tc->t_lock);
1296                         netdev_err(priv->netdev,
1297                                    "Failed to create tc offload table\n");
1298                         rule = ERR_CAST(tc->t);
1299                         goto err_ft_get;
1300                 }
1301         }
1302         mutex_unlock(&tc->t_lock);
1303
1304         if (attr->chain || attr->prio)
1305                 ft = mlx5_chains_get_table(nic_chains,
1306                                            attr->chain, attr->prio,
1307                                            MLX5E_TC_FT_LEVEL);
1308         else
1309                 ft = attr->ft;
1310
1311         if (IS_ERR(ft)) {
1312                 rule = ERR_CAST(ft);
1313                 goto err_ft_get;
1314         }
1315
1316         if (attr->outer_match_level != MLX5_MATCH_NONE)
1317                 spec->match_criteria_enable |= MLX5_MATCH_OUTER_HEADERS;
1318
1319         rule = mlx5_add_flow_rules(ft, spec,
1320                                    &flow_act, dest, dest_ix);
1321         if (IS_ERR(rule))
1322                 goto err_rule;
1323
1324         return rule;
1325
1326 err_rule:
1327         if (attr->chain || attr->prio)
1328                 mlx5_chains_put_table(nic_chains,
1329                                       attr->chain, attr->prio,
1330                                       MLX5E_TC_FT_LEVEL);
1331 err_ft_get:
1332         if (attr->dest_chain)
1333                 mlx5_chains_put_table(nic_chains,
1334                                       attr->dest_chain, 1,
1335                                       MLX5E_TC_FT_LEVEL);
1336
1337         return ERR_CAST(rule);
1338 }
1339
1340 static int
1341 alloc_flow_attr_counter(struct mlx5_core_dev *counter_dev,
1342                         struct mlx5_flow_attr *attr)
1343
1344 {
1345         struct mlx5_fc *counter;
1346
1347         counter = mlx5_fc_create(counter_dev, true);
1348         if (IS_ERR(counter))
1349                 return PTR_ERR(counter);
1350
1351         attr->counter = counter;
1352         return 0;
1353 }
1354
1355 static int
1356 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
1357                       struct mlx5e_tc_flow *flow,
1358                       struct netlink_ext_ack *extack)
1359 {
1360         struct mlx5e_tc_flow_parse_attr *parse_attr;
1361         struct mlx5_flow_attr *attr = flow->attr;
1362         struct mlx5_core_dev *dev = priv->mdev;
1363         int err;
1364
1365         parse_attr = attr->parse_attr;
1366
1367         if (flow_flag_test(flow, HAIRPIN)) {
1368                 err = mlx5e_hairpin_flow_add(priv, flow, parse_attr, extack);
1369                 if (err)
1370                         return err;
1371         }
1372
1373         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
1374                 err = alloc_flow_attr_counter(dev, attr);
1375                 if (err)
1376                         return err;
1377         }
1378
1379         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
1380                 err = mlx5e_tc_attach_mod_hdr(priv, flow, attr);
1381                 if (err)
1382                         return err;
1383         }
1384
1385         flow->rule[0] = mlx5e_add_offloaded_nic_rule(priv, &parse_attr->spec, attr);
1386         return PTR_ERR_OR_ZERO(flow->rule[0]);
1387 }
1388
1389 void mlx5e_del_offloaded_nic_rule(struct mlx5e_priv *priv,
1390                                   struct mlx5_flow_handle *rule,
1391                                   struct mlx5_flow_attr *attr)
1392 {
1393         struct mlx5e_tc_table *tc = mlx5e_fs_get_tc(priv->fs);
1394         struct mlx5_fs_chains *nic_chains;
1395
1396         nic_chains = mlx5e_nic_chains(tc);
1397         mlx5_del_flow_rules(rule);
1398
1399         if (attr->chain || attr->prio)
1400                 mlx5_chains_put_table(nic_chains, attr->chain, attr->prio,
1401                                       MLX5E_TC_FT_LEVEL);
1402
1403         if (attr->dest_chain)
1404                 mlx5_chains_put_table(nic_chains, attr->dest_chain, 1,
1405                                       MLX5E_TC_FT_LEVEL);
1406 }
1407
1408 static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv,
1409                                   struct mlx5e_tc_flow *flow)
1410 {
1411         struct mlx5e_tc_table *tc = mlx5e_fs_get_tc(priv->fs);
1412         struct mlx5_flow_attr *attr = flow->attr;
1413
1414         flow_flag_clear(flow, OFFLOADED);
1415
1416         if (!IS_ERR_OR_NULL(flow->rule[0]))
1417                 mlx5e_del_offloaded_nic_rule(priv, flow->rule[0], attr);
1418
1419         /* Remove root table if no rules are left to avoid
1420          * extra steering hops.
1421          */
1422         mutex_lock(&tc->t_lock);
1423         if (!mlx5e_tc_num_filters(priv, MLX5_TC_FLAG(NIC_OFFLOAD)) &&
1424             !IS_ERR_OR_NULL(tc->t)) {
1425                 mlx5_chains_put_table(mlx5e_nic_chains(tc), 0, 1, MLX5E_TC_FT_LEVEL);
1426                 tc->t = NULL;
1427         }
1428         mutex_unlock(&tc->t_lock);
1429
1430         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
1431                 mlx5e_mod_hdr_dealloc(&attr->parse_attr->mod_hdr_acts);
1432                 mlx5e_tc_detach_mod_hdr(priv, flow, attr);
1433         }
1434
1435         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT)
1436                 mlx5_fc_destroy(priv->mdev, attr->counter);
1437
1438         if (flow_flag_test(flow, HAIRPIN))
1439                 mlx5e_hairpin_flow_del(priv, flow);
1440
1441         free_flow_post_acts(flow);
1442         mlx5_tc_ct_delete_flow(get_ct_priv(flow->priv), attr);
1443
1444         kvfree(attr->parse_attr);
1445         kfree(flow->attr);
1446 }
1447
1448 struct mlx5_flow_handle *
1449 mlx5e_tc_offload_fdb_rules(struct mlx5_eswitch *esw,
1450                            struct mlx5e_tc_flow *flow,
1451                            struct mlx5_flow_spec *spec,
1452                            struct mlx5_flow_attr *attr)
1453 {
1454         struct mlx5_flow_handle *rule;
1455
1456         if (attr->flags & MLX5_ATTR_FLAG_SLOW_PATH)
1457                 return mlx5_eswitch_add_offloaded_rule(esw, spec, attr);
1458
1459         rule = mlx5e_tc_rule_offload(flow->priv, spec, attr);
1460
1461         if (IS_ERR(rule))
1462                 return rule;
1463
1464         if (attr->esw_attr->split_count) {
1465                 flow->rule[1] = mlx5_eswitch_add_fwd_rule(esw, spec, attr);
1466                 if (IS_ERR(flow->rule[1]))
1467                         goto err_rule1;
1468         }
1469
1470         return rule;
1471
1472 err_rule1:
1473         mlx5e_tc_rule_unoffload(flow->priv, rule, attr);
1474         return flow->rule[1];
1475 }
1476
1477 void mlx5e_tc_unoffload_fdb_rules(struct mlx5_eswitch *esw,
1478                                   struct mlx5e_tc_flow *flow,
1479                                   struct mlx5_flow_attr *attr)
1480 {
1481         flow_flag_clear(flow, OFFLOADED);
1482
1483         if (attr->flags & MLX5_ATTR_FLAG_SLOW_PATH)
1484                 return mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], attr);
1485
1486         if (attr->esw_attr->split_count)
1487                 mlx5_eswitch_del_fwd_rule(esw, flow->rule[1], attr);
1488
1489         mlx5e_tc_rule_unoffload(flow->priv, flow->rule[0], attr);
1490 }
1491
1492 struct mlx5_flow_handle *
1493 mlx5e_tc_offload_to_slow_path(struct mlx5_eswitch *esw,
1494                               struct mlx5e_tc_flow *flow,
1495                               struct mlx5_flow_spec *spec)
1496 {
1497         struct mlx5e_tc_mod_hdr_acts mod_acts = {};
1498         struct mlx5e_mod_hdr_handle *mh = NULL;
1499         struct mlx5_flow_attr *slow_attr;
1500         struct mlx5_flow_handle *rule;
1501         bool fwd_and_modify_cap;
1502         u32 chain_mapping = 0;
1503         int err;
1504
1505         slow_attr = mlx5_alloc_flow_attr(MLX5_FLOW_NAMESPACE_FDB);
1506         if (!slow_attr)
1507                 return ERR_PTR(-ENOMEM);
1508
1509         memcpy(slow_attr, flow->attr, ESW_FLOW_ATTR_SZ);
1510         slow_attr->action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
1511         slow_attr->esw_attr->split_count = 0;
1512         slow_attr->flags |= MLX5_ATTR_FLAG_SLOW_PATH;
1513
1514         fwd_and_modify_cap = MLX5_CAP_ESW_FLOWTABLE((esw)->dev, fdb_modify_header_fwd_to_table);
1515         if (!fwd_and_modify_cap)
1516                 goto skip_restore;
1517
1518         err = mlx5_chains_get_chain_mapping(esw_chains(esw), flow->attr->chain, &chain_mapping);
1519         if (err)
1520                 goto err_get_chain;
1521
1522         err = mlx5e_tc_match_to_reg_set(esw->dev, &mod_acts, MLX5_FLOW_NAMESPACE_FDB,
1523                                         MAPPED_OBJ_TO_REG, chain_mapping);
1524         if (err)
1525                 goto err_reg_set;
1526
1527         mh = mlx5e_mod_hdr_attach(esw->dev, get_mod_hdr_table(flow->priv, flow),
1528                                   MLX5_FLOW_NAMESPACE_FDB, &mod_acts);
1529         if (IS_ERR(mh)) {
1530                 err = PTR_ERR(mh);
1531                 goto err_attach;
1532         }
1533
1534         slow_attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
1535         slow_attr->modify_hdr = mlx5e_mod_hdr_get(mh);
1536
1537 skip_restore:
1538         rule = mlx5e_tc_offload_fdb_rules(esw, flow, spec, slow_attr);
1539         if (IS_ERR(rule)) {
1540                 err = PTR_ERR(rule);
1541                 goto err_offload;
1542         }
1543
1544         flow->attr->slow_mh = mh;
1545         flow->chain_mapping = chain_mapping;
1546         flow_flag_set(flow, SLOW);
1547
1548         mlx5e_mod_hdr_dealloc(&mod_acts);
1549         kfree(slow_attr);
1550
1551         return rule;
1552
1553 err_offload:
1554         if (fwd_and_modify_cap)
1555                 mlx5e_mod_hdr_detach(esw->dev, get_mod_hdr_table(flow->priv, flow), mh);
1556 err_attach:
1557 err_reg_set:
1558         if (fwd_and_modify_cap)
1559                 mlx5_chains_put_chain_mapping(esw_chains(esw), chain_mapping);
1560 err_get_chain:
1561         mlx5e_mod_hdr_dealloc(&mod_acts);
1562         kfree(slow_attr);
1563         return ERR_PTR(err);
1564 }
1565
1566 void mlx5e_tc_unoffload_from_slow_path(struct mlx5_eswitch *esw,
1567                                        struct mlx5e_tc_flow *flow)
1568 {
1569         struct mlx5e_mod_hdr_handle *slow_mh = flow->attr->slow_mh;
1570         struct mlx5_flow_attr *slow_attr;
1571
1572         slow_attr = mlx5_alloc_flow_attr(MLX5_FLOW_NAMESPACE_FDB);
1573         if (!slow_attr) {
1574                 mlx5_core_warn(flow->priv->mdev, "Unable to alloc attr to unoffload slow path rule\n");
1575                 return;
1576         }
1577
1578         memcpy(slow_attr, flow->attr, ESW_FLOW_ATTR_SZ);
1579         slow_attr->action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
1580         slow_attr->esw_attr->split_count = 0;
1581         slow_attr->flags |= MLX5_ATTR_FLAG_SLOW_PATH;
1582         if (slow_mh) {
1583                 slow_attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
1584                 slow_attr->modify_hdr = mlx5e_mod_hdr_get(slow_mh);
1585         }
1586         mlx5e_tc_unoffload_fdb_rules(esw, flow, slow_attr);
1587         if (slow_mh) {
1588                 mlx5e_mod_hdr_detach(esw->dev, get_mod_hdr_table(flow->priv, flow), slow_mh);
1589                 mlx5_chains_put_chain_mapping(esw_chains(esw), flow->chain_mapping);
1590                 flow->chain_mapping = 0;
1591                 flow->attr->slow_mh = NULL;
1592         }
1593         flow_flag_clear(flow, SLOW);
1594         kfree(slow_attr);
1595 }
1596
1597 /* Caller must obtain uplink_priv->unready_flows_lock mutex before calling this
1598  * function.
1599  */
1600 static void unready_flow_add(struct mlx5e_tc_flow *flow,
1601                              struct list_head *unready_flows)
1602 {
1603         flow_flag_set(flow, NOT_READY);
1604         list_add_tail(&flow->unready, unready_flows);
1605 }
1606
1607 /* Caller must obtain uplink_priv->unready_flows_lock mutex before calling this
1608  * function.
1609  */
1610 static void unready_flow_del(struct mlx5e_tc_flow *flow)
1611 {
1612         list_del(&flow->unready);
1613         flow_flag_clear(flow, NOT_READY);
1614 }
1615
1616 static void add_unready_flow(struct mlx5e_tc_flow *flow)
1617 {
1618         struct mlx5_rep_uplink_priv *uplink_priv;
1619         struct mlx5e_rep_priv *rpriv;
1620         struct mlx5_eswitch *esw;
1621
1622         esw = flow->priv->mdev->priv.eswitch;
1623         rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
1624         uplink_priv = &rpriv->uplink_priv;
1625
1626         mutex_lock(&uplink_priv->unready_flows_lock);
1627         unready_flow_add(flow, &uplink_priv->unready_flows);
1628         mutex_unlock(&uplink_priv->unready_flows_lock);
1629 }
1630
1631 static void remove_unready_flow(struct mlx5e_tc_flow *flow)
1632 {
1633         struct mlx5_rep_uplink_priv *uplink_priv;
1634         struct mlx5e_rep_priv *rpriv;
1635         struct mlx5_eswitch *esw;
1636
1637         esw = flow->priv->mdev->priv.eswitch;
1638         rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
1639         uplink_priv = &rpriv->uplink_priv;
1640
1641         mutex_lock(&uplink_priv->unready_flows_lock);
1642         if (flow_flag_test(flow, NOT_READY))
1643                 unready_flow_del(flow);
1644         mutex_unlock(&uplink_priv->unready_flows_lock);
1645 }
1646
1647 bool mlx5e_tc_is_vf_tunnel(struct net_device *out_dev, struct net_device *route_dev)
1648 {
1649         struct mlx5_core_dev *out_mdev, *route_mdev;
1650         struct mlx5e_priv *out_priv, *route_priv;
1651
1652         out_priv = netdev_priv(out_dev);
1653         out_mdev = out_priv->mdev;
1654         route_priv = netdev_priv(route_dev);
1655         route_mdev = route_priv->mdev;
1656
1657         if (out_mdev->coredev_type != MLX5_COREDEV_PF)
1658                 return false;
1659
1660         if (route_mdev->coredev_type != MLX5_COREDEV_VF &&
1661             route_mdev->coredev_type != MLX5_COREDEV_SF)
1662                 return false;
1663
1664         return mlx5e_same_hw_devs(out_priv, route_priv);
1665 }
1666
1667 int mlx5e_tc_query_route_vport(struct net_device *out_dev, struct net_device *route_dev, u16 *vport)
1668 {
1669         struct mlx5e_priv *out_priv, *route_priv;
1670         struct mlx5_core_dev *route_mdev;
1671         struct mlx5_devcom_comp_dev *pos;
1672         struct mlx5_eswitch *esw;
1673         u16 vhca_id;
1674         int err;
1675
1676         out_priv = netdev_priv(out_dev);
1677         esw = out_priv->mdev->priv.eswitch;
1678         route_priv = netdev_priv(route_dev);
1679         route_mdev = route_priv->mdev;
1680
1681         vhca_id = MLX5_CAP_GEN(route_mdev, vhca_id);
1682         err = mlx5_eswitch_vhca_id_to_vport(esw, vhca_id, vport);
1683         if (!err)
1684                 return err;
1685
1686         if (!mlx5_lag_is_active(out_priv->mdev))
1687                 return err;
1688
1689         rcu_read_lock();
1690         err = -ENODEV;
1691         mlx5_devcom_for_each_peer_entry_rcu(esw->devcom, esw, pos) {
1692                 err = mlx5_eswitch_vhca_id_to_vport(esw, vhca_id, vport);
1693                 if (!err)
1694                         break;
1695         }
1696         rcu_read_unlock();
1697
1698         return err;
1699 }
1700
1701 static int
1702 verify_attr_actions(u32 actions, struct netlink_ext_ack *extack)
1703 {
1704         if (!(actions &
1705               (MLX5_FLOW_CONTEXT_ACTION_FWD_DEST | MLX5_FLOW_CONTEXT_ACTION_DROP))) {
1706                 NL_SET_ERR_MSG_MOD(extack, "Rule must have at least one forward/drop action");
1707                 return -EOPNOTSUPP;
1708         }
1709
1710         if (!(~actions &
1711               (MLX5_FLOW_CONTEXT_ACTION_FWD_DEST | MLX5_FLOW_CONTEXT_ACTION_DROP))) {
1712                 NL_SET_ERR_MSG_MOD(extack, "Rule cannot support forward+drop action");
1713                 return -EOPNOTSUPP;
1714         }
1715
1716         if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR &&
1717             actions & MLX5_FLOW_CONTEXT_ACTION_DROP) {
1718                 NL_SET_ERR_MSG_MOD(extack, "Drop with modify header action is not supported");
1719                 return -EOPNOTSUPP;
1720         }
1721
1722         return 0;
1723 }
1724
1725 static int
1726 post_process_attr(struct mlx5e_tc_flow *flow,
1727                   struct mlx5_flow_attr *attr,
1728                   struct netlink_ext_ack *extack)
1729 {
1730         bool vf_tun;
1731         int err = 0;
1732
1733         err = verify_attr_actions(attr->action, extack);
1734         if (err)
1735                 goto err_out;
1736
1737         err = mlx5e_tc_tun_encap_dests_set(flow->priv, flow, attr, extack, &vf_tun);
1738         if (err)
1739                 goto err_out;
1740
1741         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
1742                 err = mlx5e_tc_attach_mod_hdr(flow->priv, flow, attr);
1743                 if (err)
1744                         goto err_out;
1745         }
1746
1747         if (attr->branch_true &&
1748             attr->branch_true->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
1749                 err = mlx5e_tc_attach_mod_hdr(flow->priv, flow, attr->branch_true);
1750                 if (err)
1751                         goto err_out;
1752         }
1753
1754         if (attr->branch_false &&
1755             attr->branch_false->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
1756                 err = mlx5e_tc_attach_mod_hdr(flow->priv, flow, attr->branch_false);
1757                 if (err)
1758                         goto err_out;
1759         }
1760
1761         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
1762                 err = alloc_flow_attr_counter(get_flow_counter_dev(flow), attr);
1763                 if (err)
1764                         goto err_out;
1765         }
1766
1767 err_out:
1768         return err;
1769 }
1770
1771 static int
1772 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
1773                       struct mlx5e_tc_flow *flow,
1774                       struct netlink_ext_ack *extack)
1775 {
1776         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1777         struct mlx5e_tc_flow_parse_attr *parse_attr;
1778         struct mlx5_flow_attr *attr = flow->attr;
1779         struct mlx5_esw_flow_attr *esw_attr;
1780         u32 max_prio, max_chain;
1781         int err = 0;
1782
1783         parse_attr = attr->parse_attr;
1784         esw_attr = attr->esw_attr;
1785
1786         /* We check chain range only for tc flows.
1787          * For ft flows, we checked attr->chain was originally 0 and set it to
1788          * FDB_FT_CHAIN which is outside tc range.
1789          * See mlx5e_rep_setup_ft_cb().
1790          */
1791         max_chain = mlx5_chains_get_chain_range(esw_chains(esw));
1792         if (!mlx5e_is_ft_flow(flow) && attr->chain > max_chain) {
1793                 NL_SET_ERR_MSG_MOD(extack,
1794                                    "Requested chain is out of supported range");
1795                 err = -EOPNOTSUPP;
1796                 goto err_out;
1797         }
1798
1799         max_prio = mlx5_chains_get_prio_range(esw_chains(esw));
1800         if (attr->prio > max_prio) {
1801                 NL_SET_ERR_MSG_MOD(extack,
1802                                    "Requested priority is out of supported range");
1803                 err = -EOPNOTSUPP;
1804                 goto err_out;
1805         }
1806
1807         if (flow_flag_test(flow, TUN_RX)) {
1808                 err = mlx5e_attach_decap_route(priv, flow);
1809                 if (err)
1810                         goto err_out;
1811
1812                 if (!attr->chain && esw_attr->int_port &&
1813                     attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
1814                         /* If decap route device is internal port, change the
1815                          * source vport value in reg_c0 back to uplink just in
1816                          * case the rule performs goto chain > 0. If we have a miss
1817                          * on chain > 0 we want the metadata regs to hold the
1818                          * chain id so SW will resume handling of this packet
1819                          * from the proper chain.
1820                          */
1821                         u32 metadata = mlx5_eswitch_get_vport_metadata_for_set(esw,
1822                                                                         esw_attr->in_rep->vport);
1823
1824                         err = mlx5e_tc_match_to_reg_set(priv->mdev, &parse_attr->mod_hdr_acts,
1825                                                         MLX5_FLOW_NAMESPACE_FDB, VPORT_TO_REG,
1826                                                         metadata);
1827                         if (err)
1828                                 goto err_out;
1829
1830                         attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
1831                 }
1832         }
1833
1834         if (flow_flag_test(flow, L3_TO_L2_DECAP)) {
1835                 err = mlx5e_attach_decap(priv, flow, extack);
1836                 if (err)
1837                         goto err_out;
1838         }
1839
1840         if (netif_is_ovs_master(parse_attr->filter_dev)) {
1841                 struct mlx5e_tc_int_port *int_port;
1842
1843                 if (attr->chain) {
1844                         NL_SET_ERR_MSG_MOD(extack,
1845                                            "Internal port rule is only supported on chain 0");
1846                         err = -EOPNOTSUPP;
1847                         goto err_out;
1848                 }
1849
1850                 if (attr->dest_chain) {
1851                         NL_SET_ERR_MSG_MOD(extack,
1852                                            "Internal port rule offload doesn't support goto action");
1853                         err = -EOPNOTSUPP;
1854                         goto err_out;
1855                 }
1856
1857                 int_port = mlx5e_tc_int_port_get(mlx5e_get_int_port_priv(priv),
1858                                                  parse_attr->filter_dev->ifindex,
1859                                                  flow_flag_test(flow, EGRESS) ?
1860                                                  MLX5E_TC_INT_PORT_EGRESS :
1861                                                  MLX5E_TC_INT_PORT_INGRESS);
1862                 if (IS_ERR(int_port)) {
1863                         err = PTR_ERR(int_port);
1864                         goto err_out;
1865                 }
1866
1867                 esw_attr->int_port = int_port;
1868         }
1869
1870         err = post_process_attr(flow, attr, extack);
1871         if (err)
1872                 goto err_out;
1873
1874         err = mlx5e_tc_act_stats_add_flow(get_act_stats_handle(priv), flow);
1875         if (err)
1876                 goto err_out;
1877
1878         /* we get here if one of the following takes place:
1879          * (1) there's no error
1880          * (2) there's an encap action and we don't have valid neigh
1881          */
1882         if (flow_flag_test(flow, SLOW))
1883                 flow->rule[0] = mlx5e_tc_offload_to_slow_path(esw, flow, &parse_attr->spec);
1884         else
1885                 flow->rule[0] = mlx5e_tc_offload_fdb_rules(esw, flow, &parse_attr->spec, attr);
1886
1887         if (IS_ERR(flow->rule[0])) {
1888                 err = PTR_ERR(flow->rule[0]);
1889                 goto err_out;
1890         }
1891         flow_flag_set(flow, OFFLOADED);
1892
1893         return 0;
1894
1895 err_out:
1896         flow_flag_set(flow, FAILED);
1897         return err;
1898 }
1899
1900 static bool mlx5_flow_has_geneve_opt(struct mlx5e_tc_flow *flow)
1901 {
1902         struct mlx5_flow_spec *spec = &flow->attr->parse_attr->spec;
1903         void *headers_v = MLX5_ADDR_OF(fte_match_param,
1904                                        spec->match_value,
1905                                        misc_parameters_3);
1906         u32 geneve_tlv_opt_0_data = MLX5_GET(fte_match_set_misc3,
1907                                              headers_v,
1908                                              geneve_tlv_option_0_data);
1909
1910         return !!geneve_tlv_opt_0_data;
1911 }
1912
1913 static void free_branch_attr(struct mlx5e_tc_flow *flow, struct mlx5_flow_attr *attr)
1914 {
1915         if (!attr)
1916                 return;
1917
1918         mlx5_free_flow_attr_actions(flow, attr);
1919         kvfree(attr->parse_attr);
1920         kfree(attr);
1921 }
1922
1923 static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
1924                                   struct mlx5e_tc_flow *flow)
1925 {
1926         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1927         struct mlx5_flow_attr *attr = flow->attr;
1928         struct mlx5_esw_flow_attr *esw_attr;
1929
1930         esw_attr = attr->esw_attr;
1931         mlx5e_put_flow_tunnel_id(flow);
1932
1933         remove_unready_flow(flow);
1934
1935         if (mlx5e_is_offloaded_flow(flow)) {
1936                 if (flow_flag_test(flow, SLOW))
1937                         mlx5e_tc_unoffload_from_slow_path(esw, flow);
1938                 else
1939                         mlx5e_tc_unoffload_fdb_rules(esw, flow, attr);
1940         }
1941         complete_all(&flow->del_hw_done);
1942
1943         if (mlx5_flow_has_geneve_opt(flow))
1944                 mlx5_geneve_tlv_option_del(priv->mdev->geneve);
1945
1946         if (flow->decap_route)
1947                 mlx5e_detach_decap_route(priv, flow);
1948
1949         mlx5_tc_ct_match_del(get_ct_priv(priv), &flow->attr->ct_attr);
1950
1951         if (esw_attr->int_port)
1952                 mlx5e_tc_int_port_put(mlx5e_get_int_port_priv(priv), esw_attr->int_port);
1953
1954         if (esw_attr->dest_int_port)
1955                 mlx5e_tc_int_port_put(mlx5e_get_int_port_priv(priv), esw_attr->dest_int_port);
1956
1957         if (flow_flag_test(flow, L3_TO_L2_DECAP))
1958                 mlx5e_detach_decap(priv, flow);
1959
1960         mlx5e_tc_act_stats_del_flow(get_act_stats_handle(priv), flow);
1961
1962         free_flow_post_acts(flow);
1963         mlx5_free_flow_attr_actions(flow, attr);
1964
1965         kvfree(attr->esw_attr->rx_tun_attr);
1966         kvfree(attr->parse_attr);
1967         kfree(flow->attr);
1968 }
1969
1970 struct mlx5_fc *mlx5e_tc_get_counter(struct mlx5e_tc_flow *flow)
1971 {
1972         struct mlx5_flow_attr *attr;
1973
1974         attr = list_first_entry(&flow->attrs, struct mlx5_flow_attr, list);
1975         return attr->counter;
1976 }
1977
1978 /* Iterate over tmp_list of flows attached to flow_list head. */
1979 void mlx5e_put_flow_list(struct mlx5e_priv *priv, struct list_head *flow_list)
1980 {
1981         struct mlx5e_tc_flow *flow, *tmp;
1982
1983         list_for_each_entry_safe(flow, tmp, flow_list, tmp_list)
1984                 mlx5e_flow_put(priv, flow);
1985 }
1986
1987 static void mlx5e_tc_del_fdb_peer_flow(struct mlx5e_tc_flow *flow,
1988                                        int peer_index)
1989 {
1990         struct mlx5_eswitch *esw = flow->priv->mdev->priv.eswitch;
1991         struct mlx5e_tc_flow *peer_flow;
1992         struct mlx5e_tc_flow *tmp;
1993
1994         if (!flow_flag_test(flow, ESWITCH) ||
1995             !flow_flag_test(flow, DUP))
1996                 return;
1997
1998         mutex_lock(&esw->offloads.peer_mutex);
1999         list_del(&flow->peer[peer_index]);
2000         mutex_unlock(&esw->offloads.peer_mutex);
2001
2002         list_for_each_entry_safe(peer_flow, tmp, &flow->peer_flows, peer_flows) {
2003                 if (peer_index != mlx5_get_dev_index(peer_flow->priv->mdev))
2004                         continue;
2005                 if (refcount_dec_and_test(&peer_flow->refcnt)) {
2006                         mlx5e_tc_del_fdb_flow(peer_flow->priv, peer_flow);
2007                         list_del(&peer_flow->peer_flows);
2008                         kfree(peer_flow);
2009                 }
2010         }
2011
2012         if (list_empty(&flow->peer_flows))
2013                 flow_flag_clear(flow, DUP);
2014 }
2015
2016 static void mlx5e_tc_del_fdb_peers_flow(struct mlx5e_tc_flow *flow)
2017 {
2018         int i;
2019
2020         for (i = 0; i < MLX5_MAX_PORTS; i++) {
2021                 if (i == mlx5_get_dev_index(flow->priv->mdev))
2022                         continue;
2023                 mlx5e_tc_del_fdb_peer_flow(flow, i);
2024         }
2025 }
2026
2027 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
2028                               struct mlx5e_tc_flow *flow)
2029 {
2030         if (mlx5e_is_eswitch_flow(flow)) {
2031                 struct mlx5_devcom_comp_dev *devcom = flow->priv->mdev->priv.eswitch->devcom;
2032
2033                 if (!mlx5_devcom_for_each_peer_begin(devcom)) {
2034                         mlx5e_tc_del_fdb_flow(priv, flow);
2035                         return;
2036                 }
2037
2038                 mlx5e_tc_del_fdb_peers_flow(flow);
2039                 mlx5_devcom_for_each_peer_end(devcom);
2040                 mlx5e_tc_del_fdb_flow(priv, flow);
2041         } else {
2042                 mlx5e_tc_del_nic_flow(priv, flow);
2043         }
2044 }
2045
2046 static bool flow_requires_tunnel_mapping(u32 chain, struct flow_cls_offload *f)
2047 {
2048         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
2049         struct flow_action *flow_action = &rule->action;
2050         const struct flow_action_entry *act;
2051         int i;
2052
2053         if (chain)
2054                 return false;
2055
2056         flow_action_for_each(i, act, flow_action) {
2057                 switch (act->id) {
2058                 case FLOW_ACTION_GOTO:
2059                         return true;
2060                 case FLOW_ACTION_SAMPLE:
2061                         return true;
2062                 default:
2063                         continue;
2064                 }
2065         }
2066
2067         return false;
2068 }
2069
2070 static int
2071 enc_opts_is_dont_care_or_full_match(struct mlx5e_priv *priv,
2072                                     struct flow_dissector_key_enc_opts *opts,
2073                                     struct netlink_ext_ack *extack,
2074                                     bool *dont_care)
2075 {
2076         struct geneve_opt *opt;
2077         int off = 0;
2078
2079         *dont_care = true;
2080
2081         while (opts->len > off) {
2082                 opt = (struct geneve_opt *)&opts->data[off];
2083
2084                 if (!(*dont_care) || opt->opt_class || opt->type ||
2085                     memchr_inv(opt->opt_data, 0, opt->length * 4)) {
2086                         *dont_care = false;
2087
2088                         if (opt->opt_class != htons(U16_MAX) ||
2089                             opt->type != U8_MAX) {
2090                                 NL_SET_ERR_MSG_MOD(extack,
2091                                                    "Partial match of tunnel options in chain > 0 isn't supported");
2092                                 netdev_warn(priv->netdev,
2093                                             "Partial match of tunnel options in chain > 0 isn't supported");
2094                                 return -EOPNOTSUPP;
2095                         }
2096                 }
2097
2098                 off += sizeof(struct geneve_opt) + opt->length * 4;
2099         }
2100
2101         return 0;
2102 }
2103
2104 #define COPY_DISSECTOR(rule, diss_key, dst)\
2105 ({ \
2106         struct flow_rule *__rule = (rule);\
2107         typeof(dst) __dst = dst;\
2108 \
2109         memcpy(__dst,\
2110                skb_flow_dissector_target(__rule->match.dissector,\
2111                                          diss_key,\
2112                                          __rule->match.key),\
2113                sizeof(*__dst));\
2114 })
2115
2116 static int mlx5e_get_flow_tunnel_id(struct mlx5e_priv *priv,
2117                                     struct mlx5e_tc_flow *flow,
2118                                     struct flow_cls_offload *f,
2119                                     struct net_device *filter_dev)
2120 {
2121         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
2122         struct netlink_ext_ack *extack = f->common.extack;
2123         struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts;
2124         struct flow_match_enc_opts enc_opts_match;
2125         struct tunnel_match_enc_opts tun_enc_opts;
2126         struct mlx5_rep_uplink_priv *uplink_priv;
2127         struct mlx5_flow_attr *attr = flow->attr;
2128         struct mlx5e_rep_priv *uplink_rpriv;
2129         struct tunnel_match_key tunnel_key;
2130         bool enc_opts_is_dont_care = true;
2131         u32 tun_id, enc_opts_id = 0;
2132         struct mlx5_eswitch *esw;
2133         u32 value, mask;
2134         int err;
2135
2136         esw = priv->mdev->priv.eswitch;
2137         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2138         uplink_priv = &uplink_rpriv->uplink_priv;
2139
2140         memset(&tunnel_key, 0, sizeof(tunnel_key));
2141         COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_CONTROL,
2142                        &tunnel_key.enc_control);
2143         if (tunnel_key.enc_control.addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS)
2144                 COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
2145                                &tunnel_key.enc_ipv4);
2146         else
2147                 COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
2148                                &tunnel_key.enc_ipv6);
2149         COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_IP, &tunnel_key.enc_ip);
2150         COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_PORTS,
2151                        &tunnel_key.enc_tp);
2152         COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_KEYID,
2153                        &tunnel_key.enc_key_id);
2154         tunnel_key.filter_ifindex = filter_dev->ifindex;
2155
2156         err = mapping_add(uplink_priv->tunnel_mapping, &tunnel_key, &tun_id);
2157         if (err)
2158                 return err;
2159
2160         flow_rule_match_enc_opts(rule, &enc_opts_match);
2161         err = enc_opts_is_dont_care_or_full_match(priv,
2162                                                   enc_opts_match.mask,
2163                                                   extack,
2164                                                   &enc_opts_is_dont_care);
2165         if (err)
2166                 goto err_enc_opts;
2167
2168         if (!enc_opts_is_dont_care) {
2169                 memset(&tun_enc_opts, 0, sizeof(tun_enc_opts));
2170                 memcpy(&tun_enc_opts.key, enc_opts_match.key,
2171                        sizeof(*enc_opts_match.key));
2172                 memcpy(&tun_enc_opts.mask, enc_opts_match.mask,
2173                        sizeof(*enc_opts_match.mask));
2174
2175                 err = mapping_add(uplink_priv->tunnel_enc_opts_mapping,
2176                                   &tun_enc_opts, &enc_opts_id);
2177                 if (err)
2178                         goto err_enc_opts;
2179         }
2180
2181         value = tun_id << ENC_OPTS_BITS | enc_opts_id;
2182         mask = enc_opts_id ? TUNNEL_ID_MASK :
2183                              (TUNNEL_ID_MASK & ~ENC_OPTS_BITS_MASK);
2184
2185         if (attr->chain) {
2186                 mlx5e_tc_match_to_reg_match(&attr->parse_attr->spec,
2187                                             TUNNEL_TO_REG, value, mask);
2188         } else {
2189                 mod_hdr_acts = &attr->parse_attr->mod_hdr_acts;
2190                 err = mlx5e_tc_match_to_reg_set(priv->mdev,
2191                                                 mod_hdr_acts, MLX5_FLOW_NAMESPACE_FDB,
2192                                                 TUNNEL_TO_REG, value);
2193                 if (err)
2194                         goto err_set;
2195
2196                 attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
2197         }
2198
2199         flow->attr->tunnel_id = value;
2200         return 0;
2201
2202 err_set:
2203         if (enc_opts_id)
2204                 mapping_remove(uplink_priv->tunnel_enc_opts_mapping,
2205                                enc_opts_id);
2206 err_enc_opts:
2207         mapping_remove(uplink_priv->tunnel_mapping, tun_id);
2208         return err;
2209 }
2210
2211 static void mlx5e_put_flow_tunnel_id(struct mlx5e_tc_flow *flow)
2212 {
2213         u32 enc_opts_id = flow->attr->tunnel_id & ENC_OPTS_BITS_MASK;
2214         u32 tun_id = flow->attr->tunnel_id >> ENC_OPTS_BITS;
2215         struct mlx5_rep_uplink_priv *uplink_priv;
2216         struct mlx5e_rep_priv *uplink_rpriv;
2217         struct mlx5_eswitch *esw;
2218
2219         esw = flow->priv->mdev->priv.eswitch;
2220         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2221         uplink_priv = &uplink_rpriv->uplink_priv;
2222
2223         if (tun_id)
2224                 mapping_remove(uplink_priv->tunnel_mapping, tun_id);
2225         if (enc_opts_id)
2226                 mapping_remove(uplink_priv->tunnel_enc_opts_mapping,
2227                                enc_opts_id);
2228 }
2229
2230 void mlx5e_tc_set_ethertype(struct mlx5_core_dev *mdev,
2231                             struct flow_match_basic *match, bool outer,
2232                             void *headers_c, void *headers_v)
2233 {
2234         bool ip_version_cap;
2235
2236         ip_version_cap = outer ?
2237                 MLX5_CAP_FLOWTABLE_NIC_RX(mdev,
2238                                           ft_field_support.outer_ip_version) :
2239                 MLX5_CAP_FLOWTABLE_NIC_RX(mdev,
2240                                           ft_field_support.inner_ip_version);
2241
2242         if (ip_version_cap && match->mask->n_proto == htons(0xFFFF) &&
2243             (match->key->n_proto == htons(ETH_P_IP) ||
2244              match->key->n_proto == htons(ETH_P_IPV6))) {
2245                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_version);
2246                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version,
2247                          match->key->n_proto == htons(ETH_P_IP) ? 4 : 6);
2248         } else {
2249                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
2250                          ntohs(match->mask->n_proto));
2251                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
2252                          ntohs(match->key->n_proto));
2253         }
2254 }
2255
2256 u8 mlx5e_tc_get_ip_version(struct mlx5_flow_spec *spec, bool outer)
2257 {
2258         void *headers_v;
2259         u16 ethertype;
2260         u8 ip_version;
2261
2262         if (outer)
2263                 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
2264         else
2265                 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, inner_headers);
2266
2267         ip_version = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_version);
2268         /* Return ip_version converted from ethertype anyway */
2269         if (!ip_version) {
2270                 ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
2271                 if (ethertype == ETH_P_IP || ethertype == ETH_P_ARP)
2272                         ip_version = 4;
2273                 else if (ethertype == ETH_P_IPV6)
2274                         ip_version = 6;
2275         }
2276         return ip_version;
2277 }
2278
2279 /* Tunnel device follows RFC 6040, see include/net/inet_ecn.h.
2280  * And changes inner ip_ecn depending on inner and outer ip_ecn as follows:
2281  *      +---------+----------------------------------------+
2282  *      |Arriving |         Arriving Outer Header          |
2283  *      |   Inner +---------+---------+---------+----------+
2284  *      |  Header | Not-ECT | ECT(0)  | ECT(1)  |   CE     |
2285  *      +---------+---------+---------+---------+----------+
2286  *      | Not-ECT | Not-ECT | Not-ECT | Not-ECT | <drop>   |
2287  *      |  ECT(0) |  ECT(0) | ECT(0)  | ECT(1)  |   CE*    |
2288  *      |  ECT(1) |  ECT(1) | ECT(1)  | ECT(1)* |   CE*    |
2289  *      |    CE   |   CE    |  CE     | CE      |   CE     |
2290  *      +---------+---------+---------+---------+----------+
2291  *
2292  * Tc matches on inner after decapsulation on tunnel device, but hw offload matches
2293  * the inner ip_ecn value before hardware decap action.
2294  *
2295  * Cells marked are changed from original inner packet ip_ecn value during decap, and
2296  * so matching those values on inner ip_ecn before decap will fail.
2297  *
2298  * The following helper allows offload when inner ip_ecn won't be changed by outer ip_ecn,
2299  * except for the outer ip_ecn = CE, where in all cases inner ip_ecn will be changed to CE,
2300  * and such we can drop the inner ip_ecn=CE match.
2301  */
2302
2303 static int mlx5e_tc_verify_tunnel_ecn(struct mlx5e_priv *priv,
2304                                       struct flow_cls_offload *f,
2305                                       bool *match_inner_ecn)
2306 {
2307         u8 outer_ecn_mask = 0, outer_ecn_key = 0, inner_ecn_mask = 0, inner_ecn_key = 0;
2308         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
2309         struct netlink_ext_ack *extack = f->common.extack;
2310         struct flow_match_ip match;
2311
2312         *match_inner_ecn = true;
2313
2314         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_IP)) {
2315                 flow_rule_match_enc_ip(rule, &match);
2316                 outer_ecn_key = match.key->tos & INET_ECN_MASK;
2317                 outer_ecn_mask = match.mask->tos & INET_ECN_MASK;
2318         }
2319
2320         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_IP)) {
2321                 flow_rule_match_ip(rule, &match);
2322                 inner_ecn_key = match.key->tos & INET_ECN_MASK;
2323                 inner_ecn_mask = match.mask->tos & INET_ECN_MASK;
2324         }
2325
2326         if (outer_ecn_mask != 0 && outer_ecn_mask != INET_ECN_MASK) {
2327                 NL_SET_ERR_MSG_MOD(extack, "Partial match on enc_tos ecn bits isn't supported");
2328                 netdev_warn(priv->netdev, "Partial match on enc_tos ecn bits isn't supported");
2329                 return -EOPNOTSUPP;
2330         }
2331
2332         if (!outer_ecn_mask) {
2333                 if (!inner_ecn_mask)
2334                         return 0;
2335
2336                 NL_SET_ERR_MSG_MOD(extack,
2337                                    "Matching on tos ecn bits without also matching enc_tos ecn bits isn't supported");
2338                 netdev_warn(priv->netdev,
2339                             "Matching on tos ecn bits without also matching enc_tos ecn bits isn't supported");
2340                 return -EOPNOTSUPP;
2341         }
2342
2343         if (inner_ecn_mask && inner_ecn_mask != INET_ECN_MASK) {
2344                 NL_SET_ERR_MSG_MOD(extack,
2345                                    "Partial match on tos ecn bits with match on enc_tos ecn bits isn't supported");
2346                 netdev_warn(priv->netdev,
2347                             "Partial match on tos ecn bits with match on enc_tos ecn bits isn't supported");
2348                 return -EOPNOTSUPP;
2349         }
2350
2351         if (!inner_ecn_mask)
2352                 return 0;
2353
2354         /* Both inner and outer have full mask on ecn */
2355
2356         if (outer_ecn_key == INET_ECN_ECT_1) {
2357                 /* inner ecn might change by DECAP action */
2358
2359                 NL_SET_ERR_MSG_MOD(extack, "Match on enc_tos ecn = ECT(1) isn't supported");
2360                 netdev_warn(priv->netdev, "Match on enc_tos ecn = ECT(1) isn't supported");
2361                 return -EOPNOTSUPP;
2362         }
2363
2364         if (outer_ecn_key != INET_ECN_CE)
2365                 return 0;
2366
2367         if (inner_ecn_key != INET_ECN_CE) {
2368                 /* Can't happen in software, as packet ecn will be changed to CE after decap */
2369                 NL_SET_ERR_MSG_MOD(extack,
2370                                    "Match on tos enc_tos ecn = CE while match on tos ecn != CE isn't supported");
2371                 netdev_warn(priv->netdev,
2372                             "Match on tos enc_tos ecn = CE while match on tos ecn != CE isn't supported");
2373                 return -EOPNOTSUPP;
2374         }
2375
2376         /* outer ecn = CE, inner ecn = CE, as decap will change inner ecn to CE in anycase,
2377          * drop match on inner ecn
2378          */
2379         *match_inner_ecn = false;
2380
2381         return 0;
2382 }
2383
2384 static int parse_tunnel_attr(struct mlx5e_priv *priv,
2385                              struct mlx5e_tc_flow *flow,
2386                              struct mlx5_flow_spec *spec,
2387                              struct flow_cls_offload *f,
2388                              struct net_device *filter_dev,
2389                              u8 *match_level,
2390                              bool *match_inner)
2391 {
2392         struct mlx5e_tc_tunnel *tunnel = mlx5e_get_tc_tun(filter_dev);
2393         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2394         struct netlink_ext_ack *extack = f->common.extack;
2395         bool needs_mapping, sets_mapping;
2396         int err;
2397
2398         if (!mlx5e_is_eswitch_flow(flow)) {
2399                 NL_SET_ERR_MSG_MOD(extack, "Match on tunnel is not supported");
2400                 return -EOPNOTSUPP;
2401         }
2402
2403         needs_mapping = !!flow->attr->chain;
2404         sets_mapping = flow_requires_tunnel_mapping(flow->attr->chain, f);
2405         *match_inner = !needs_mapping;
2406
2407         if ((needs_mapping || sets_mapping) &&
2408             !mlx5_eswitch_reg_c1_loopback_enabled(esw)) {
2409                 NL_SET_ERR_MSG_MOD(extack,
2410                                    "Chains on tunnel devices isn't supported without register loopback support");
2411                 netdev_warn(priv->netdev,
2412                             "Chains on tunnel devices isn't supported without register loopback support");
2413                 return -EOPNOTSUPP;
2414         }
2415
2416         if (!flow->attr->chain) {
2417                 err = mlx5e_tc_tun_parse(filter_dev, priv, spec, f,
2418                                          match_level);
2419                 if (err) {
2420                         NL_SET_ERR_MSG_MOD(extack,
2421                                            "Failed to parse tunnel attributes");
2422                         netdev_warn(priv->netdev,
2423                                     "Failed to parse tunnel attributes");
2424                         return err;
2425                 }
2426
2427                 /* With mpls over udp we decapsulate using packet reformat
2428                  * object
2429                  */
2430                 if (!netif_is_bareudp(filter_dev))
2431                         flow->attr->action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
2432                 err = mlx5e_tc_set_attr_rx_tun(flow, spec);
2433                 if (err)
2434                         return err;
2435         } else if (tunnel) {
2436                 struct mlx5_flow_spec *tmp_spec;
2437
2438                 tmp_spec = kvzalloc(sizeof(*tmp_spec), GFP_KERNEL);
2439                 if (!tmp_spec) {
2440                         NL_SET_ERR_MSG_MOD(extack, "Failed to allocate memory for tunnel tmp spec");
2441                         netdev_warn(priv->netdev, "Failed to allocate memory for tunnel tmp spec");
2442                         return -ENOMEM;
2443                 }
2444                 memcpy(tmp_spec, spec, sizeof(*tmp_spec));
2445
2446                 err = mlx5e_tc_tun_parse(filter_dev, priv, tmp_spec, f, match_level);
2447                 if (err) {
2448                         kvfree(tmp_spec);
2449                         NL_SET_ERR_MSG_MOD(extack, "Failed to parse tunnel attributes");
2450                         netdev_warn(priv->netdev, "Failed to parse tunnel attributes");
2451                         return err;
2452                 }
2453                 err = mlx5e_tc_set_attr_rx_tun(flow, tmp_spec);
2454                 kvfree(tmp_spec);
2455                 if (err)
2456                         return err;
2457         }
2458
2459         if (!needs_mapping && !sets_mapping)
2460                 return 0;
2461
2462         return mlx5e_get_flow_tunnel_id(priv, flow, f, filter_dev);
2463 }
2464
2465 static void *get_match_inner_headers_criteria(struct mlx5_flow_spec *spec)
2466 {
2467         return MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
2468                             inner_headers);
2469 }
2470
2471 static void *get_match_inner_headers_value(struct mlx5_flow_spec *spec)
2472 {
2473         return MLX5_ADDR_OF(fte_match_param, spec->match_value,
2474                             inner_headers);
2475 }
2476
2477 static void *get_match_outer_headers_criteria(struct mlx5_flow_spec *spec)
2478 {
2479         return MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
2480                             outer_headers);
2481 }
2482
2483 static void *get_match_outer_headers_value(struct mlx5_flow_spec *spec)
2484 {
2485         return MLX5_ADDR_OF(fte_match_param, spec->match_value,
2486                             outer_headers);
2487 }
2488
2489 void *mlx5e_get_match_headers_value(u32 flags, struct mlx5_flow_spec *spec)
2490 {
2491         return (flags & MLX5_FLOW_CONTEXT_ACTION_DECAP) ?
2492                 get_match_inner_headers_value(spec) :
2493                 get_match_outer_headers_value(spec);
2494 }
2495
2496 void *mlx5e_get_match_headers_criteria(u32 flags, struct mlx5_flow_spec *spec)
2497 {
2498         return (flags & MLX5_FLOW_CONTEXT_ACTION_DECAP) ?
2499                 get_match_inner_headers_criteria(spec) :
2500                 get_match_outer_headers_criteria(spec);
2501 }
2502
2503 static int mlx5e_flower_parse_meta(struct net_device *filter_dev,
2504                                    struct flow_cls_offload *f)
2505 {
2506         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
2507         struct netlink_ext_ack *extack = f->common.extack;
2508         struct net_device *ingress_dev;
2509         struct flow_match_meta match;
2510
2511         if (!flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_META))
2512                 return 0;
2513
2514         flow_rule_match_meta(rule, &match);
2515
2516         if (match.mask->l2_miss) {
2517                 NL_SET_ERR_MSG_MOD(f->common.extack, "Can't match on \"l2_miss\"");
2518                 return -EOPNOTSUPP;
2519         }
2520
2521         if (!match.mask->ingress_ifindex)
2522                 return 0;
2523
2524         if (match.mask->ingress_ifindex != 0xFFFFFFFF) {
2525                 NL_SET_ERR_MSG_MOD(extack, "Unsupported ingress ifindex mask");
2526                 return -EOPNOTSUPP;
2527         }
2528
2529         ingress_dev = __dev_get_by_index(dev_net(filter_dev),
2530                                          match.key->ingress_ifindex);
2531         if (!ingress_dev) {
2532                 NL_SET_ERR_MSG_MOD(extack,
2533                                    "Can't find the ingress port to match on");
2534                 return -ENOENT;
2535         }
2536
2537         if (ingress_dev != filter_dev) {
2538                 NL_SET_ERR_MSG_MOD(extack,
2539                                    "Can't match on the ingress filter port");
2540                 return -EOPNOTSUPP;
2541         }
2542
2543         return 0;
2544 }
2545
2546 static bool skip_key_basic(struct net_device *filter_dev,
2547                            struct flow_cls_offload *f)
2548 {
2549         /* When doing mpls over udp decap, the user needs to provide
2550          * MPLS_UC as the protocol in order to be able to match on mpls
2551          * label fields.  However, the actual ethertype is IP so we want to
2552          * avoid matching on this, otherwise we'll fail the match.
2553          */
2554         if (netif_is_bareudp(filter_dev) && f->common.chain_index == 0)
2555                 return true;
2556
2557         return false;
2558 }
2559
2560 static int __parse_cls_flower(struct mlx5e_priv *priv,
2561                               struct mlx5e_tc_flow *flow,
2562                               struct mlx5_flow_spec *spec,
2563                               struct flow_cls_offload *f,
2564                               struct net_device *filter_dev,
2565                               u8 *inner_match_level, u8 *outer_match_level)
2566 {
2567         struct netlink_ext_ack *extack = f->common.extack;
2568         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
2569                                        outer_headers);
2570         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
2571                                        outer_headers);
2572         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
2573                                     misc_parameters);
2574         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
2575                                     misc_parameters);
2576         void *misc_c_3 = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
2577                                     misc_parameters_3);
2578         void *misc_v_3 = MLX5_ADDR_OF(fte_match_param, spec->match_value,
2579                                     misc_parameters_3);
2580         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
2581         struct flow_dissector *dissector = rule->match.dissector;
2582         enum fs_flow_table_type fs_type;
2583         bool match_inner_ecn = true;
2584         u16 addr_type = 0;
2585         u8 ip_proto = 0;
2586         u8 *match_level;
2587         int err;
2588
2589         fs_type = mlx5e_is_eswitch_flow(flow) ? FS_FT_FDB : FS_FT_NIC_RX;
2590         match_level = outer_match_level;
2591
2592         if (dissector->used_keys &
2593             ~(BIT_ULL(FLOW_DISSECTOR_KEY_META) |
2594               BIT_ULL(FLOW_DISSECTOR_KEY_CONTROL) |
2595               BIT_ULL(FLOW_DISSECTOR_KEY_BASIC) |
2596               BIT_ULL(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
2597               BIT_ULL(FLOW_DISSECTOR_KEY_VLAN) |
2598               BIT_ULL(FLOW_DISSECTOR_KEY_CVLAN) |
2599               BIT_ULL(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
2600               BIT_ULL(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
2601               BIT_ULL(FLOW_DISSECTOR_KEY_PORTS) |
2602               BIT_ULL(FLOW_DISSECTOR_KEY_ENC_KEYID) |
2603               BIT_ULL(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
2604               BIT_ULL(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
2605               BIT_ULL(FLOW_DISSECTOR_KEY_ENC_PORTS)     |
2606               BIT_ULL(FLOW_DISSECTOR_KEY_ENC_CONTROL) |
2607               BIT_ULL(FLOW_DISSECTOR_KEY_TCP) |
2608               BIT_ULL(FLOW_DISSECTOR_KEY_IP)  |
2609               BIT_ULL(FLOW_DISSECTOR_KEY_CT) |
2610               BIT_ULL(FLOW_DISSECTOR_KEY_ENC_IP) |
2611               BIT_ULL(FLOW_DISSECTOR_KEY_ENC_OPTS) |
2612               BIT_ULL(FLOW_DISSECTOR_KEY_ICMP) |
2613               BIT_ULL(FLOW_DISSECTOR_KEY_MPLS))) {
2614                 NL_SET_ERR_MSG_MOD(extack, "Unsupported key");
2615                 netdev_dbg(priv->netdev, "Unsupported key used: 0x%llx\n",
2616                            dissector->used_keys);
2617                 return -EOPNOTSUPP;
2618         }
2619
2620         if (mlx5e_get_tc_tun(filter_dev)) {
2621                 bool match_inner = false;
2622
2623                 err = parse_tunnel_attr(priv, flow, spec, f, filter_dev,
2624                                         outer_match_level, &match_inner);
2625                 if (err)
2626                         return err;
2627
2628                 if (match_inner) {
2629                         /* header pointers should point to the inner headers
2630                          * if the packet was decapsulated already.
2631                          * outer headers are set by parse_tunnel_attr.
2632                          */
2633                         match_level = inner_match_level;
2634                         headers_c = get_match_inner_headers_criteria(spec);
2635                         headers_v = get_match_inner_headers_value(spec);
2636                 }
2637
2638                 err = mlx5e_tc_verify_tunnel_ecn(priv, f, &match_inner_ecn);
2639                 if (err)
2640                         return err;
2641         }
2642
2643         err = mlx5e_flower_parse_meta(filter_dev, f);
2644         if (err)
2645                 return err;
2646
2647         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC) &&
2648             !skip_key_basic(filter_dev, f)) {
2649                 struct flow_match_basic match;
2650
2651                 flow_rule_match_basic(rule, &match);
2652                 mlx5e_tc_set_ethertype(priv->mdev, &match,
2653                                        match_level == outer_match_level,
2654                                        headers_c, headers_v);
2655
2656                 if (match.mask->n_proto)
2657                         *match_level = MLX5_MATCH_L2;
2658         }
2659         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN) ||
2660             is_vlan_dev(filter_dev)) {
2661                 struct flow_dissector_key_vlan filter_dev_mask;
2662                 struct flow_dissector_key_vlan filter_dev_key;
2663                 struct flow_match_vlan match;
2664
2665                 if (is_vlan_dev(filter_dev)) {
2666                         match.key = &filter_dev_key;
2667                         match.key->vlan_id = vlan_dev_vlan_id(filter_dev);
2668                         match.key->vlan_tpid = vlan_dev_vlan_proto(filter_dev);
2669                         match.key->vlan_priority = 0;
2670                         match.mask = &filter_dev_mask;
2671                         memset(match.mask, 0xff, sizeof(*match.mask));
2672                         match.mask->vlan_priority = 0;
2673                 } else {
2674                         flow_rule_match_vlan(rule, &match);
2675                 }
2676                 if (match.mask->vlan_id ||
2677                     match.mask->vlan_priority ||
2678                     match.mask->vlan_tpid) {
2679                         if (match.key->vlan_tpid == htons(ETH_P_8021AD)) {
2680                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2681                                          svlan_tag, 1);
2682                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2683                                          svlan_tag, 1);
2684                         } else {
2685                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2686                                          cvlan_tag, 1);
2687                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2688                                          cvlan_tag, 1);
2689                         }
2690
2691                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid,
2692                                  match.mask->vlan_id);
2693                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid,
2694                                  match.key->vlan_id);
2695
2696                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio,
2697                                  match.mask->vlan_priority);
2698                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio,
2699                                  match.key->vlan_priority);
2700
2701                         *match_level = MLX5_MATCH_L2;
2702
2703                         if (!flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CVLAN) &&
2704                             match.mask->vlan_eth_type &&
2705                             MLX5_CAP_FLOWTABLE_TYPE(priv->mdev,
2706                                                     ft_field_support.outer_second_vid,
2707                                                     fs_type)) {
2708                                 MLX5_SET(fte_match_set_misc, misc_c,
2709                                          outer_second_cvlan_tag, 1);
2710                                 spec->match_criteria_enable |=
2711                                         MLX5_MATCH_MISC_PARAMETERS;
2712                         }
2713                 }
2714         } else if (*match_level != MLX5_MATCH_NONE) {
2715                 /* cvlan_tag enabled in match criteria and
2716                  * disabled in match value means both S & C tags
2717                  * don't exist (untagged of both)
2718                  */
2719                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, cvlan_tag, 1);
2720                 *match_level = MLX5_MATCH_L2;
2721         }
2722
2723         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CVLAN)) {
2724                 struct flow_match_vlan match;
2725
2726                 flow_rule_match_cvlan(rule, &match);
2727                 if (match.mask->vlan_id ||
2728                     match.mask->vlan_priority ||
2729                     match.mask->vlan_tpid) {
2730                         if (!MLX5_CAP_FLOWTABLE_TYPE(priv->mdev, ft_field_support.outer_second_vid,
2731                                                      fs_type)) {
2732                                 NL_SET_ERR_MSG_MOD(extack,
2733                                                    "Matching on CVLAN is not supported");
2734                                 return -EOPNOTSUPP;
2735                         }
2736
2737                         if (match.key->vlan_tpid == htons(ETH_P_8021AD)) {
2738                                 MLX5_SET(fte_match_set_misc, misc_c,
2739                                          outer_second_svlan_tag, 1);
2740                                 MLX5_SET(fte_match_set_misc, misc_v,
2741                                          outer_second_svlan_tag, 1);
2742                         } else {
2743                                 MLX5_SET(fte_match_set_misc, misc_c,
2744                                          outer_second_cvlan_tag, 1);
2745                                 MLX5_SET(fte_match_set_misc, misc_v,
2746                                          outer_second_cvlan_tag, 1);
2747                         }
2748
2749                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_vid,
2750                                  match.mask->vlan_id);
2751                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_vid,
2752                                  match.key->vlan_id);
2753                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_prio,
2754                                  match.mask->vlan_priority);
2755                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_prio,
2756                                  match.key->vlan_priority);
2757
2758                         *match_level = MLX5_MATCH_L2;
2759                         spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS;
2760                 }
2761         }
2762
2763         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
2764                 struct flow_match_eth_addrs match;
2765
2766                 flow_rule_match_eth_addrs(rule, &match);
2767                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2768                                              dmac_47_16),
2769                                 match.mask->dst);
2770                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2771                                              dmac_47_16),
2772                                 match.key->dst);
2773
2774                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2775                                              smac_47_16),
2776                                 match.mask->src);
2777                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2778                                              smac_47_16),
2779                                 match.key->src);
2780
2781                 if (!is_zero_ether_addr(match.mask->src) ||
2782                     !is_zero_ether_addr(match.mask->dst))
2783                         *match_level = MLX5_MATCH_L2;
2784         }
2785
2786         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {
2787                 struct flow_match_control match;
2788
2789                 flow_rule_match_control(rule, &match);
2790                 addr_type = match.key->addr_type;
2791
2792                 /* the HW doesn't support frag first/later */
2793                 if (match.mask->flags & FLOW_DIS_FIRST_FRAG) {
2794                         NL_SET_ERR_MSG_MOD(extack, "Match on frag first/later is not supported");
2795                         return -EOPNOTSUPP;
2796                 }
2797
2798                 if (match.mask->flags & FLOW_DIS_IS_FRAGMENT) {
2799                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
2800                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
2801                                  match.key->flags & FLOW_DIS_IS_FRAGMENT);
2802
2803                         /* the HW doesn't need L3 inline to match on frag=no */
2804                         if (!(match.key->flags & FLOW_DIS_IS_FRAGMENT))
2805                                 *match_level = MLX5_MATCH_L2;
2806         /* ***  L2 attributes parsing up to here *** */
2807                         else
2808                                 *match_level = MLX5_MATCH_L3;
2809                 }
2810         }
2811
2812         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
2813                 struct flow_match_basic match;
2814
2815                 flow_rule_match_basic(rule, &match);
2816                 ip_proto = match.key->ip_proto;
2817
2818                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
2819                          match.mask->ip_proto);
2820                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
2821                          match.key->ip_proto);
2822
2823                 if (match.mask->ip_proto)
2824                         *match_level = MLX5_MATCH_L3;
2825         }
2826
2827         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
2828                 struct flow_match_ipv4_addrs match;
2829
2830                 flow_rule_match_ipv4_addrs(rule, &match);
2831                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2832                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
2833                        &match.mask->src, sizeof(match.mask->src));
2834                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2835                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
2836                        &match.key->src, sizeof(match.key->src));
2837                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2838                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
2839                        &match.mask->dst, sizeof(match.mask->dst));
2840                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2841                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
2842                        &match.key->dst, sizeof(match.key->dst));
2843
2844                 if (match.mask->src || match.mask->dst)
2845                         *match_level = MLX5_MATCH_L3;
2846         }
2847
2848         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
2849                 struct flow_match_ipv6_addrs match;
2850
2851                 flow_rule_match_ipv6_addrs(rule, &match);
2852                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2853                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
2854                        &match.mask->src, sizeof(match.mask->src));
2855                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2856                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
2857                        &match.key->src, sizeof(match.key->src));
2858
2859                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2860                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
2861                        &match.mask->dst, sizeof(match.mask->dst));
2862                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2863                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
2864                        &match.key->dst, sizeof(match.key->dst));
2865
2866                 if (ipv6_addr_type(&match.mask->src) != IPV6_ADDR_ANY ||
2867                     ipv6_addr_type(&match.mask->dst) != IPV6_ADDR_ANY)
2868                         *match_level = MLX5_MATCH_L3;
2869         }
2870
2871         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_IP)) {
2872                 struct flow_match_ip match;
2873
2874                 flow_rule_match_ip(rule, &match);
2875                 if (match_inner_ecn) {
2876                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn,
2877                                  match.mask->tos & 0x3);
2878                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn,
2879                                  match.key->tos & 0x3);
2880                 }
2881
2882                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp,
2883                          match.mask->tos >> 2);
2884                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp,
2885                          match.key->tos  >> 2);
2886
2887                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit,
2888                          match.mask->ttl);
2889                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit,
2890                          match.key->ttl);
2891
2892                 if (match.mask->ttl &&
2893                     !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
2894                                                 ft_field_support.outer_ipv4_ttl)) {
2895                         NL_SET_ERR_MSG_MOD(extack,
2896                                            "Matching on TTL is not supported");
2897                         return -EOPNOTSUPP;
2898                 }
2899
2900                 if (match.mask->tos || match.mask->ttl)
2901                         *match_level = MLX5_MATCH_L3;
2902         }
2903
2904         /* ***  L3 attributes parsing up to here *** */
2905
2906         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
2907                 struct flow_match_ports match;
2908
2909                 flow_rule_match_ports(rule, &match);
2910                 switch (ip_proto) {
2911                 case IPPROTO_TCP:
2912                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2913                                  tcp_sport, ntohs(match.mask->src));
2914                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2915                                  tcp_sport, ntohs(match.key->src));
2916
2917                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2918                                  tcp_dport, ntohs(match.mask->dst));
2919                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2920                                  tcp_dport, ntohs(match.key->dst));
2921                         break;
2922
2923                 case IPPROTO_UDP:
2924                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2925                                  udp_sport, ntohs(match.mask->src));
2926                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2927                                  udp_sport, ntohs(match.key->src));
2928
2929                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2930                                  udp_dport, ntohs(match.mask->dst));
2931                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2932                                  udp_dport, ntohs(match.key->dst));
2933                         break;
2934                 default:
2935                         NL_SET_ERR_MSG_MOD(extack,
2936                                            "Only UDP and TCP transports are supported for L4 matching");
2937                         netdev_err(priv->netdev,
2938                                    "Only UDP and TCP transport are supported\n");
2939                         return -EINVAL;
2940                 }
2941
2942                 if (match.mask->src || match.mask->dst)
2943                         *match_level = MLX5_MATCH_L4;
2944         }
2945
2946         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_TCP)) {
2947                 struct flow_match_tcp match;
2948
2949                 flow_rule_match_tcp(rule, &match);
2950                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags,
2951                          ntohs(match.mask->flags));
2952                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
2953                          ntohs(match.key->flags));
2954
2955                 if (match.mask->flags)
2956                         *match_level = MLX5_MATCH_L4;
2957         }
2958         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ICMP)) {
2959                 struct flow_match_icmp match;
2960
2961                 flow_rule_match_icmp(rule, &match);
2962                 switch (ip_proto) {
2963                 case IPPROTO_ICMP:
2964                         if (!(MLX5_CAP_GEN(priv->mdev, flex_parser_protocols) &
2965                               MLX5_FLEX_PROTO_ICMP)) {
2966                                 NL_SET_ERR_MSG_MOD(extack,
2967                                                    "Match on Flex protocols for ICMP is not supported");
2968                                 return -EOPNOTSUPP;
2969                         }
2970                         MLX5_SET(fte_match_set_misc3, misc_c_3, icmp_type,
2971                                  match.mask->type);
2972                         MLX5_SET(fte_match_set_misc3, misc_v_3, icmp_type,
2973                                  match.key->type);
2974                         MLX5_SET(fte_match_set_misc3, misc_c_3, icmp_code,
2975                                  match.mask->code);
2976                         MLX5_SET(fte_match_set_misc3, misc_v_3, icmp_code,
2977                                  match.key->code);
2978                         break;
2979                 case IPPROTO_ICMPV6:
2980                         if (!(MLX5_CAP_GEN(priv->mdev, flex_parser_protocols) &
2981                               MLX5_FLEX_PROTO_ICMPV6)) {
2982                                 NL_SET_ERR_MSG_MOD(extack,
2983                                                    "Match on Flex protocols for ICMPV6 is not supported");
2984                                 return -EOPNOTSUPP;
2985                         }
2986                         MLX5_SET(fte_match_set_misc3, misc_c_3, icmpv6_type,
2987                                  match.mask->type);
2988                         MLX5_SET(fte_match_set_misc3, misc_v_3, icmpv6_type,
2989                                  match.key->type);
2990                         MLX5_SET(fte_match_set_misc3, misc_c_3, icmpv6_code,
2991                                  match.mask->code);
2992                         MLX5_SET(fte_match_set_misc3, misc_v_3, icmpv6_code,
2993                                  match.key->code);
2994                         break;
2995                 default:
2996                         NL_SET_ERR_MSG_MOD(extack,
2997                                            "Code and type matching only with ICMP and ICMPv6");
2998                         netdev_err(priv->netdev,
2999                                    "Code and type matching only with ICMP and ICMPv6\n");
3000                         return -EINVAL;
3001                 }
3002                 if (match.mask->code || match.mask->type) {
3003                         *match_level = MLX5_MATCH_L4;
3004                         spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_3;
3005                 }
3006         }
3007         /* Currently supported only for MPLS over UDP */
3008         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_MPLS) &&
3009             !netif_is_bareudp(filter_dev)) {
3010                 NL_SET_ERR_MSG_MOD(extack,
3011                                    "Matching on MPLS is supported only for MPLS over UDP");
3012                 netdev_err(priv->netdev,
3013                            "Matching on MPLS is supported only for MPLS over UDP\n");
3014                 return -EOPNOTSUPP;
3015         }
3016
3017         return 0;
3018 }
3019
3020 static int parse_cls_flower(struct mlx5e_priv *priv,
3021                             struct mlx5e_tc_flow *flow,
3022                             struct mlx5_flow_spec *spec,
3023                             struct flow_cls_offload *f,
3024                             struct net_device *filter_dev)
3025 {
3026         u8 inner_match_level, outer_match_level, non_tunnel_match_level;
3027         struct netlink_ext_ack *extack = f->common.extack;
3028         struct mlx5_core_dev *dev = priv->mdev;
3029         struct mlx5_eswitch *esw = dev->priv.eswitch;
3030         struct mlx5e_rep_priv *rpriv = priv->ppriv;
3031         struct mlx5_eswitch_rep *rep;
3032         bool is_eswitch_flow;
3033         int err;
3034
3035         inner_match_level = MLX5_MATCH_NONE;
3036         outer_match_level = MLX5_MATCH_NONE;
3037
3038         err = __parse_cls_flower(priv, flow, spec, f, filter_dev,
3039                                  &inner_match_level, &outer_match_level);
3040         non_tunnel_match_level = (inner_match_level == MLX5_MATCH_NONE) ?
3041                                  outer_match_level : inner_match_level;
3042
3043         is_eswitch_flow = mlx5e_is_eswitch_flow(flow);
3044         if (!err && is_eswitch_flow) {
3045                 rep = rpriv->rep;
3046                 if (rep->vport != MLX5_VPORT_UPLINK &&
3047                     (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
3048                     esw->offloads.inline_mode < non_tunnel_match_level)) {
3049                         NL_SET_ERR_MSG_MOD(extack,
3050                                            "Flow is not offloaded due to min inline setting");
3051                         netdev_warn(priv->netdev,
3052                                     "Flow is not offloaded due to min inline setting, required %d actual %d\n",
3053                                     non_tunnel_match_level, esw->offloads.inline_mode);
3054                         return -EOPNOTSUPP;
3055                 }
3056         }
3057
3058         flow->attr->inner_match_level = inner_match_level;
3059         flow->attr->outer_match_level = outer_match_level;
3060
3061
3062         return err;
3063 }
3064
3065 struct mlx5_fields {
3066         u8  field;
3067         u8  field_bsize;
3068         u32 field_mask;
3069         u32 offset;
3070         u32 match_offset;
3071 };
3072
3073 #define OFFLOAD(fw_field, field_bsize, field_mask, field, off, match_field) \
3074                 {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, field_bsize, field_mask, \
3075                  offsetof(struct pedit_headers, field) + (off), \
3076                  MLX5_BYTE_OFF(fte_match_set_lyr_2_4, match_field)}
3077
3078 /* masked values are the same and there are no rewrites that do not have a
3079  * match.
3080  */
3081 #define SAME_VAL_MASK(type, valp, maskp, matchvalp, matchmaskp) ({ \
3082         type matchmaskx = *(type *)(matchmaskp); \
3083         type matchvalx = *(type *)(matchvalp); \
3084         type maskx = *(type *)(maskp); \
3085         type valx = *(type *)(valp); \
3086         \
3087         (valx & maskx) == (matchvalx & matchmaskx) && !(maskx & (maskx ^ \
3088                                                                  matchmaskx)); \
3089 })
3090
3091 static bool cmp_val_mask(void *valp, void *maskp, void *matchvalp,
3092                          void *matchmaskp, u8 bsize)
3093 {
3094         bool same = false;
3095
3096         switch (bsize) {
3097         case 8:
3098                 same = SAME_VAL_MASK(u8, valp, maskp, matchvalp, matchmaskp);
3099                 break;
3100         case 16:
3101                 same = SAME_VAL_MASK(u16, valp, maskp, matchvalp, matchmaskp);
3102                 break;
3103         case 32:
3104                 same = SAME_VAL_MASK(u32, valp, maskp, matchvalp, matchmaskp);
3105                 break;
3106         }
3107
3108         return same;
3109 }
3110
3111 static struct mlx5_fields fields[] = {
3112         OFFLOAD(DMAC_47_16, 32, U32_MAX, eth.h_dest[0], 0, dmac_47_16),
3113         OFFLOAD(DMAC_15_0,  16, U16_MAX, eth.h_dest[4], 0, dmac_15_0),
3114         OFFLOAD(SMAC_47_16, 32, U32_MAX, eth.h_source[0], 0, smac_47_16),
3115         OFFLOAD(SMAC_15_0,  16, U16_MAX, eth.h_source[4], 0, smac_15_0),
3116         OFFLOAD(ETHERTYPE,  16, U16_MAX, eth.h_proto, 0, ethertype),
3117         OFFLOAD(FIRST_VID,  16, U16_MAX, vlan.h_vlan_TCI, 0, first_vid),
3118
3119         OFFLOAD(IP_DSCP, 8,    0xfc, ip4.tos,   0, ip_dscp),
3120         OFFLOAD(IP_TTL,  8,  U8_MAX, ip4.ttl,   0, ttl_hoplimit),
3121         OFFLOAD(SIPV4,  32, U32_MAX, ip4.saddr, 0, src_ipv4_src_ipv6.ipv4_layout.ipv4),
3122         OFFLOAD(DIPV4,  32, U32_MAX, ip4.daddr, 0, dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
3123
3124         OFFLOAD(SIPV6_127_96, 32, U32_MAX, ip6.saddr.s6_addr32[0], 0,
3125                 src_ipv4_src_ipv6.ipv6_layout.ipv6[0]),
3126         OFFLOAD(SIPV6_95_64,  32, U32_MAX, ip6.saddr.s6_addr32[1], 0,
3127                 src_ipv4_src_ipv6.ipv6_layout.ipv6[4]),
3128         OFFLOAD(SIPV6_63_32,  32, U32_MAX, ip6.saddr.s6_addr32[2], 0,
3129                 src_ipv4_src_ipv6.ipv6_layout.ipv6[8]),
3130         OFFLOAD(SIPV6_31_0,   32, U32_MAX, ip6.saddr.s6_addr32[3], 0,
3131                 src_ipv4_src_ipv6.ipv6_layout.ipv6[12]),
3132         OFFLOAD(DIPV6_127_96, 32, U32_MAX, ip6.daddr.s6_addr32[0], 0,
3133                 dst_ipv4_dst_ipv6.ipv6_layout.ipv6[0]),
3134         OFFLOAD(DIPV6_95_64,  32, U32_MAX, ip6.daddr.s6_addr32[1], 0,
3135                 dst_ipv4_dst_ipv6.ipv6_layout.ipv6[4]),
3136         OFFLOAD(DIPV6_63_32,  32, U32_MAX, ip6.daddr.s6_addr32[2], 0,
3137                 dst_ipv4_dst_ipv6.ipv6_layout.ipv6[8]),
3138         OFFLOAD(DIPV6_31_0,   32, U32_MAX, ip6.daddr.s6_addr32[3], 0,
3139                 dst_ipv4_dst_ipv6.ipv6_layout.ipv6[12]),
3140         OFFLOAD(IPV6_HOPLIMIT, 8,  U8_MAX, ip6.hop_limit, 0, ttl_hoplimit),
3141         OFFLOAD(IP_DSCP, 16,  0xc00f, ip6, 0, ip_dscp),
3142
3143         OFFLOAD(TCP_SPORT, 16, U16_MAX, tcp.source,  0, tcp_sport),
3144         OFFLOAD(TCP_DPORT, 16, U16_MAX, tcp.dest,    0, tcp_dport),
3145         /* in linux iphdr tcp_flags is 8 bits long */
3146         OFFLOAD(TCP_FLAGS,  8,  U8_MAX, tcp.ack_seq, 5, tcp_flags),
3147
3148         OFFLOAD(UDP_SPORT, 16, U16_MAX, udp.source, 0, udp_sport),
3149         OFFLOAD(UDP_DPORT, 16, U16_MAX, udp.dest,   0, udp_dport),
3150 };
3151
3152 static unsigned long mask_to_le(unsigned long mask, int size)
3153 {
3154         __be32 mask_be32;
3155         __be16 mask_be16;
3156
3157         if (size == 32) {
3158                 mask_be32 = (__force __be32)(mask);
3159                 mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
3160         } else if (size == 16) {
3161                 mask_be32 = (__force __be32)(mask);
3162                 mask_be16 = *(__be16 *)&mask_be32;
3163                 mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
3164         }
3165
3166         return mask;
3167 }
3168
3169 static int offload_pedit_fields(struct mlx5e_priv *priv,
3170                                 int namespace,
3171                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
3172                                 u32 *action_flags,
3173                                 struct netlink_ext_ack *extack)
3174 {
3175         struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
3176         struct pedit_headers_action *hdrs = parse_attr->hdrs;
3177         void *headers_c, *headers_v, *action, *vals_p;
3178         u32 *s_masks_p, *a_masks_p, s_mask, a_mask;
3179         struct mlx5e_tc_mod_hdr_acts *mod_acts;
3180         unsigned long mask, field_mask;
3181         int i, first, last, next_z;
3182         struct mlx5_fields *f;
3183         u8 cmd;
3184
3185         mod_acts = &parse_attr->mod_hdr_acts;
3186         headers_c = mlx5e_get_match_headers_criteria(*action_flags, &parse_attr->spec);
3187         headers_v = mlx5e_get_match_headers_value(*action_flags, &parse_attr->spec);
3188
3189         set_masks = &hdrs[0].masks;
3190         add_masks = &hdrs[1].masks;
3191         set_vals = &hdrs[0].vals;
3192         add_vals = &hdrs[1].vals;
3193
3194         for (i = 0; i < ARRAY_SIZE(fields); i++) {
3195                 bool skip;
3196
3197                 f = &fields[i];
3198                 /* avoid seeing bits set from previous iterations */
3199                 s_mask = 0;
3200                 a_mask = 0;
3201
3202                 s_masks_p = (void *)set_masks + f->offset;
3203                 a_masks_p = (void *)add_masks + f->offset;
3204
3205                 s_mask = *s_masks_p & f->field_mask;
3206                 a_mask = *a_masks_p & f->field_mask;
3207
3208                 if (!s_mask && !a_mask) /* nothing to offload here */
3209                         continue;
3210
3211                 if (s_mask && a_mask) {
3212                         NL_SET_ERR_MSG_MOD(extack,
3213                                            "can't set and add to the same HW field");
3214                         netdev_warn(priv->netdev,
3215                                     "mlx5: can't set and add to the same HW field (%x)\n",
3216                                     f->field);
3217                         return -EOPNOTSUPP;
3218                 }
3219
3220                 skip = false;
3221                 if (s_mask) {
3222                         void *match_mask = headers_c + f->match_offset;
3223                         void *match_val = headers_v + f->match_offset;
3224
3225                         cmd  = MLX5_ACTION_TYPE_SET;
3226                         mask = s_mask;
3227                         vals_p = (void *)set_vals + f->offset;
3228                         /* don't rewrite if we have a match on the same value */
3229                         if (cmp_val_mask(vals_p, s_masks_p, match_val,
3230                                          match_mask, f->field_bsize))
3231                                 skip = true;
3232                         /* clear to denote we consumed this field */
3233                         *s_masks_p &= ~f->field_mask;
3234                 } else {
3235                         cmd  = MLX5_ACTION_TYPE_ADD;
3236                         mask = a_mask;
3237                         vals_p = (void *)add_vals + f->offset;
3238                         /* add 0 is no change */
3239                         if ((*(u32 *)vals_p & f->field_mask) == 0)
3240                                 skip = true;
3241                         /* clear to denote we consumed this field */
3242                         *a_masks_p &= ~f->field_mask;
3243                 }
3244                 if (skip)
3245                         continue;
3246
3247                 mask = mask_to_le(mask, f->field_bsize);
3248
3249                 first = find_first_bit(&mask, f->field_bsize);
3250                 next_z = find_next_zero_bit(&mask, f->field_bsize, first);
3251                 last  = find_last_bit(&mask, f->field_bsize);
3252                 if (first < next_z && next_z < last) {
3253                         NL_SET_ERR_MSG_MOD(extack,
3254                                            "rewrite of few sub-fields isn't supported");
3255                         netdev_warn(priv->netdev,
3256                                     "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n",
3257                                     mask);
3258                         return -EOPNOTSUPP;
3259                 }
3260
3261                 action = mlx5e_mod_hdr_alloc(priv->mdev, namespace, mod_acts);
3262                 if (IS_ERR(action)) {
3263                         NL_SET_ERR_MSG_MOD(extack,
3264                                            "too many pedit actions, can't offload");
3265                         mlx5_core_warn(priv->mdev,
3266                                        "mlx5: parsed %d pedit actions, can't do more\n",
3267                                        mod_acts->num_actions);
3268                         return PTR_ERR(action);
3269                 }
3270
3271                 MLX5_SET(set_action_in, action, action_type, cmd);
3272                 MLX5_SET(set_action_in, action, field, f->field);
3273
3274                 if (cmd == MLX5_ACTION_TYPE_SET) {
3275                         int start;
3276
3277                         field_mask = mask_to_le(f->field_mask, f->field_bsize);
3278
3279                         /* if field is bit sized it can start not from first bit */
3280                         start = find_first_bit(&field_mask, f->field_bsize);
3281
3282                         MLX5_SET(set_action_in, action, offset, first - start);
3283                         /* length is num of bits to be written, zero means length of 32 */
3284                         MLX5_SET(set_action_in, action, length, (last - first + 1));
3285                 }
3286
3287                 if (f->field_bsize == 32)
3288                         MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first);
3289                 else if (f->field_bsize == 16)
3290                         MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first);
3291                 else if (f->field_bsize == 8)
3292                         MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first);
3293
3294                 ++mod_acts->num_actions;
3295         }
3296
3297         return 0;
3298 }
3299
3300 static const struct pedit_headers zero_masks = {};
3301
3302 static int verify_offload_pedit_fields(struct mlx5e_priv *priv,
3303                                        struct mlx5e_tc_flow_parse_attr *parse_attr,
3304                                        struct netlink_ext_ack *extack)
3305 {
3306         struct pedit_headers *cmd_masks;
3307         u8 cmd;
3308
3309         for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) {
3310                 cmd_masks = &parse_attr->hdrs[cmd].masks;
3311                 if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) {
3312                         NL_SET_ERR_MSG_MOD(extack, "attempt to offload an unsupported field");
3313                         netdev_warn(priv->netdev, "attempt to offload an unsupported field (cmd %d)\n", cmd);
3314                         print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS,
3315                                        16, 1, cmd_masks, sizeof(zero_masks), true);
3316                         return -EOPNOTSUPP;
3317                 }
3318         }
3319
3320         return 0;
3321 }
3322
3323 static int alloc_tc_pedit_action(struct mlx5e_priv *priv, int namespace,
3324                                  struct mlx5e_tc_flow_parse_attr *parse_attr,
3325                                  u32 *action_flags,
3326                                  struct netlink_ext_ack *extack)
3327 {
3328         int err;
3329
3330         err = offload_pedit_fields(priv, namespace, parse_attr, action_flags, extack);
3331         if (err)
3332                 goto out_dealloc_parsed_actions;
3333
3334         err = verify_offload_pedit_fields(priv, parse_attr, extack);
3335         if (err)
3336                 goto out_dealloc_parsed_actions;
3337
3338         return 0;
3339
3340 out_dealloc_parsed_actions:
3341         mlx5e_mod_hdr_dealloc(&parse_attr->mod_hdr_acts);
3342         return err;
3343 }
3344
3345 struct ip_ttl_word {
3346         __u8    ttl;
3347         __u8    protocol;
3348         __sum16 check;
3349 };
3350
3351 struct ipv6_hoplimit_word {
3352         __be16  payload_len;
3353         __u8    nexthdr;
3354         __u8    hop_limit;
3355 };
3356
3357 static bool
3358 is_flow_action_modify_ip_header(struct flow_action *flow_action)
3359 {
3360         const struct flow_action_entry *act;
3361         u32 mask, offset;
3362         u8 htype;
3363         int i;
3364
3365         /* For IPv4 & IPv6 header check 4 byte word,
3366          * to determine that modified fields
3367          * are NOT ttl & hop_limit only.
3368          */
3369         flow_action_for_each(i, act, flow_action) {
3370                 if (act->id != FLOW_ACTION_MANGLE &&
3371                     act->id != FLOW_ACTION_ADD)
3372                         continue;
3373
3374                 htype = act->mangle.htype;
3375                 offset = act->mangle.offset;
3376                 mask = ~act->mangle.mask;
3377
3378                 if (htype == FLOW_ACT_MANGLE_HDR_TYPE_IP4) {
3379                         struct ip_ttl_word *ttl_word =
3380                                 (struct ip_ttl_word *)&mask;
3381
3382                         if (offset != offsetof(struct iphdr, ttl) ||
3383                             ttl_word->protocol ||
3384                             ttl_word->check)
3385                                 return true;
3386                 } else if (htype == FLOW_ACT_MANGLE_HDR_TYPE_IP6) {
3387                         struct ipv6_hoplimit_word *hoplimit_word =
3388                                 (struct ipv6_hoplimit_word *)&mask;
3389
3390                         if (offset != offsetof(struct ipv6hdr, payload_len) ||
3391                             hoplimit_word->payload_len ||
3392                             hoplimit_word->nexthdr)
3393                                 return true;
3394                 }
3395         }
3396
3397         return false;
3398 }
3399
3400 static bool modify_header_match_supported(struct mlx5e_priv *priv,
3401                                           struct mlx5_flow_spec *spec,
3402                                           struct flow_action *flow_action,
3403                                           u32 actions,
3404                                           struct netlink_ext_ack *extack)
3405 {
3406         bool modify_ip_header;
3407         void *headers_c;
3408         void *headers_v;
3409         u16 ethertype;
3410         u8 ip_proto;
3411
3412         headers_c = mlx5e_get_match_headers_criteria(actions, spec);
3413         headers_v = mlx5e_get_match_headers_value(actions, spec);
3414         ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
3415
3416         /* for non-IP we only re-write MACs, so we're okay */
3417         if (MLX5_GET(fte_match_set_lyr_2_4, headers_c, ip_version) == 0 &&
3418             ethertype != ETH_P_IP && ethertype != ETH_P_IPV6)
3419                 goto out_ok;
3420
3421         modify_ip_header = is_flow_action_modify_ip_header(flow_action);
3422         ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol);
3423         if (modify_ip_header && ip_proto != IPPROTO_TCP &&
3424             ip_proto != IPPROTO_UDP && ip_proto != IPPROTO_ICMP) {
3425                 NL_SET_ERR_MSG_MOD(extack,
3426                                    "can't offload re-write of non TCP/UDP");
3427                 netdev_info(priv->netdev, "can't offload re-write of ip proto %d\n",
3428                             ip_proto);
3429                 return false;
3430         }
3431
3432 out_ok:
3433         return true;
3434 }
3435
3436 static bool
3437 actions_match_supported_fdb(struct mlx5e_priv *priv,
3438                             struct mlx5e_tc_flow *flow,
3439                             struct netlink_ext_ack *extack)
3440 {
3441         struct mlx5_esw_flow_attr *esw_attr = flow->attr->esw_attr;
3442
3443         if (esw_attr->split_count > 0 && !mlx5_esw_has_fwd_fdb(priv->mdev)) {
3444                 NL_SET_ERR_MSG_MOD(extack,
3445                                    "current firmware doesn't support split rule for port mirroring");
3446                 netdev_warn_once(priv->netdev,
3447                                  "current firmware doesn't support split rule for port mirroring\n");
3448                 return false;
3449         }
3450
3451         return true;
3452 }
3453
3454 static bool
3455 actions_match_supported(struct mlx5e_priv *priv,
3456                         struct flow_action *flow_action,
3457                         u32 actions,
3458                         struct mlx5e_tc_flow_parse_attr *parse_attr,
3459                         struct mlx5e_tc_flow *flow,
3460                         struct netlink_ext_ack *extack)
3461 {
3462         if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR &&
3463             !modify_header_match_supported(priv, &parse_attr->spec, flow_action, actions,
3464                                            extack))
3465                 return false;
3466
3467         if (mlx5e_is_eswitch_flow(flow) &&
3468             !actions_match_supported_fdb(priv, flow, extack))
3469                 return false;
3470
3471         return true;
3472 }
3473
3474 static bool same_port_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
3475 {
3476         return priv->mdev == peer_priv->mdev;
3477 }
3478
3479 bool mlx5e_same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
3480 {
3481         struct mlx5_core_dev *fmdev, *pmdev;
3482         u64 fsystem_guid, psystem_guid;
3483
3484         fmdev = priv->mdev;
3485         pmdev = peer_priv->mdev;
3486
3487         fsystem_guid = mlx5_query_nic_system_image_guid(fmdev);
3488         psystem_guid = mlx5_query_nic_system_image_guid(pmdev);
3489
3490         return (fsystem_guid == psystem_guid);
3491 }
3492
3493 static int
3494 actions_prepare_mod_hdr_actions(struct mlx5e_priv *priv,
3495                                 struct mlx5e_tc_flow *flow,
3496                                 struct mlx5_flow_attr *attr,
3497                                 struct netlink_ext_ack *extack)
3498 {
3499         struct mlx5e_tc_flow_parse_attr *parse_attr = attr->parse_attr;
3500         struct pedit_headers_action *hdrs = parse_attr->hdrs;
3501         enum mlx5_flow_namespace_type ns_type;
3502         int err;
3503
3504         if (!hdrs[TCA_PEDIT_KEY_EX_CMD_SET].pedits &&
3505             !hdrs[TCA_PEDIT_KEY_EX_CMD_ADD].pedits)
3506                 return 0;
3507
3508         ns_type = mlx5e_get_flow_namespace(flow);
3509
3510         err = alloc_tc_pedit_action(priv, ns_type, parse_attr, &attr->action, extack);
3511         if (err)
3512                 return err;
3513
3514         if (parse_attr->mod_hdr_acts.num_actions > 0)
3515                 return 0;
3516
3517         /* In case all pedit actions are skipped, remove the MOD_HDR flag. */
3518         attr->action &= ~MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
3519         mlx5e_mod_hdr_dealloc(&parse_attr->mod_hdr_acts);
3520
3521         if (ns_type != MLX5_FLOW_NAMESPACE_FDB)
3522                 return 0;
3523
3524         if (!((attr->action & MLX5_FLOW_CONTEXT_ACTION_VLAN_POP) ||
3525               (attr->action & MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH)))
3526                 attr->esw_attr->split_count = 0;
3527
3528         return 0;
3529 }
3530
3531 static struct mlx5_flow_attr*
3532 mlx5e_clone_flow_attr_for_post_act(struct mlx5_flow_attr *attr,
3533                                    enum mlx5_flow_namespace_type ns_type)
3534 {
3535         struct mlx5e_tc_flow_parse_attr *parse_attr;
3536         u32 attr_sz = ns_to_attr_sz(ns_type);
3537         struct mlx5_flow_attr *attr2;
3538
3539         attr2 = mlx5_alloc_flow_attr(ns_type);
3540         parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL);
3541         if (!attr2 || !parse_attr) {
3542                 kvfree(parse_attr);
3543                 kfree(attr2);
3544                 return NULL;
3545         }
3546
3547         memcpy(attr2, attr, attr_sz);
3548         INIT_LIST_HEAD(&attr2->list);
3549         parse_attr->filter_dev = attr->parse_attr->filter_dev;
3550         attr2->action = 0;
3551         attr2->counter = NULL;
3552         attr2->tc_act_cookies_count = 0;
3553         attr2->flags = 0;
3554         attr2->parse_attr = parse_attr;
3555         attr2->dest_chain = 0;
3556         attr2->dest_ft = NULL;
3557         attr2->act_id_restore_rule = NULL;
3558         memset(&attr2->ct_attr, 0, sizeof(attr2->ct_attr));
3559
3560         if (ns_type == MLX5_FLOW_NAMESPACE_FDB) {
3561                 attr2->esw_attr->out_count = 0;
3562                 attr2->esw_attr->split_count = 0;
3563         }
3564
3565         attr2->branch_true = NULL;
3566         attr2->branch_false = NULL;
3567         attr2->jumping_attr = NULL;
3568         return attr2;
3569 }
3570
3571 struct mlx5_flow_attr *
3572 mlx5e_tc_get_encap_attr(struct mlx5e_tc_flow *flow)
3573 {
3574         struct mlx5_esw_flow_attr *esw_attr;
3575         struct mlx5_flow_attr *attr;
3576         int i;
3577
3578         list_for_each_entry(attr, &flow->attrs, list) {
3579                 esw_attr = attr->esw_attr;
3580                 for (i = 0; i < MLX5_MAX_FLOW_FWD_VPORTS; i++) {
3581                         if (esw_attr->dests[i].flags & MLX5_ESW_DEST_ENCAP)
3582                                 return attr;
3583                 }
3584         }
3585
3586         return NULL;
3587 }
3588
3589 void
3590 mlx5e_tc_unoffload_flow_post_acts(struct mlx5e_tc_flow *flow)
3591 {
3592         struct mlx5e_post_act *post_act = get_post_action(flow->priv);
3593         struct mlx5_flow_attr *attr;
3594
3595         list_for_each_entry(attr, &flow->attrs, list) {
3596                 if (list_is_last(&attr->list, &flow->attrs))
3597                         break;
3598
3599                 mlx5e_tc_post_act_unoffload(post_act, attr->post_act_handle);
3600         }
3601 }
3602
3603 static void
3604 free_flow_post_acts(struct mlx5e_tc_flow *flow)
3605 {
3606         struct mlx5_flow_attr *attr, *tmp;
3607
3608         list_for_each_entry_safe(attr, tmp, &flow->attrs, list) {
3609                 if (list_is_last(&attr->list, &flow->attrs))
3610                         break;
3611
3612                 mlx5_free_flow_attr_actions(flow, attr);
3613
3614                 list_del(&attr->list);
3615                 kvfree(attr->parse_attr);
3616                 kfree(attr);
3617         }
3618 }
3619
3620 int
3621 mlx5e_tc_offload_flow_post_acts(struct mlx5e_tc_flow *flow)
3622 {
3623         struct mlx5e_post_act *post_act = get_post_action(flow->priv);
3624         struct mlx5_flow_attr *attr;
3625         int err = 0;
3626
3627         list_for_each_entry(attr, &flow->attrs, list) {
3628                 if (list_is_last(&attr->list, &flow->attrs))
3629                         break;
3630
3631                 err = mlx5e_tc_post_act_offload(post_act, attr->post_act_handle);
3632                 if (err)
3633                         break;
3634         }
3635
3636         return err;
3637 }
3638
3639 /* TC filter rule HW translation:
3640  *
3641  * +---------------------+
3642  * + ft prio (tc chain)  +
3643  * + original match      +
3644  * +---------------------+
3645  *           |
3646  *           | if multi table action
3647  *           |
3648  *           v
3649  * +---------------------+
3650  * + post act ft         |<----.
3651  * + match fte id        |     | split on multi table action
3652  * + do actions          |-----'
3653  * +---------------------+
3654  *           |
3655  *           |
3656  *           v
3657  * Do rest of the actions after last multi table action.
3658  */
3659 static int
3660 alloc_flow_post_acts(struct mlx5e_tc_flow *flow, struct netlink_ext_ack *extack)
3661 {
3662         struct mlx5e_post_act *post_act = get_post_action(flow->priv);
3663         struct mlx5_flow_attr *attr, *next_attr = NULL;
3664         struct mlx5e_post_act_handle *handle;
3665         int err;
3666
3667         /* This is going in reverse order as needed.
3668          * The first entry is the last attribute.
3669          */
3670         list_for_each_entry(attr, &flow->attrs, list) {
3671                 if (!next_attr) {
3672                         /* Set counter action on last post act rule. */
3673                         attr->action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
3674                 }
3675
3676                 if (next_attr && !(attr->flags & MLX5_ATTR_FLAG_TERMINATING)) {
3677                         err = mlx5e_tc_act_set_next_post_act(flow, attr, next_attr);
3678                         if (err)
3679                                 goto out_free;
3680                 }
3681
3682                 /* Don't add post_act rule for first attr (last in the list).
3683                  * It's being handled by the caller.
3684                  */
3685                 if (list_is_last(&attr->list, &flow->attrs))
3686                         break;
3687
3688                 err = actions_prepare_mod_hdr_actions(flow->priv, flow, attr, extack);
3689                 if (err)
3690                         goto out_free;
3691
3692                 err = post_process_attr(flow, attr, extack);
3693                 if (err)
3694                         goto out_free;
3695
3696                 handle = mlx5e_tc_post_act_add(post_act, attr);
3697                 if (IS_ERR(handle)) {
3698                         err = PTR_ERR(handle);
3699                         goto out_free;
3700                 }
3701
3702                 attr->post_act_handle = handle;
3703
3704                 if (attr->jumping_attr) {
3705                         err = mlx5e_tc_act_set_next_post_act(flow, attr->jumping_attr, attr);
3706                         if (err)
3707                                 goto out_free;
3708                 }
3709
3710                 next_attr = attr;
3711         }
3712
3713         if (flow_flag_test(flow, SLOW))
3714                 goto out;
3715
3716         err = mlx5e_tc_offload_flow_post_acts(flow);
3717         if (err)
3718                 goto out_free;
3719
3720 out:
3721         return 0;
3722
3723 out_free:
3724         free_flow_post_acts(flow);
3725         return err;
3726 }
3727
3728 static int
3729 alloc_branch_attr(struct mlx5e_tc_flow *flow,
3730                   struct mlx5e_tc_act_branch_ctrl *cond,
3731                   struct mlx5_flow_attr **cond_attr,
3732                   u32 *jump_count,
3733                   struct netlink_ext_ack *extack)
3734 {
3735         struct mlx5_flow_attr *attr;
3736         int err = 0;
3737
3738         *cond_attr = mlx5e_clone_flow_attr_for_post_act(flow->attr,
3739                                                         mlx5e_get_flow_namespace(flow));
3740         if (!(*cond_attr))
3741                 return -ENOMEM;
3742
3743         attr = *cond_attr;
3744
3745         switch (cond->act_id) {
3746         case FLOW_ACTION_DROP:
3747                 attr->action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
3748                 break;
3749         case FLOW_ACTION_ACCEPT:
3750         case FLOW_ACTION_PIPE:
3751                 attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
3752                 attr->dest_ft = mlx5e_tc_post_act_get_ft(get_post_action(flow->priv));
3753                 break;
3754         case FLOW_ACTION_JUMP:
3755                 if (*jump_count) {
3756                         NL_SET_ERR_MSG_MOD(extack, "Cannot offload flows with nested jumps");
3757                         err = -EOPNOTSUPP;
3758                         goto out_err;
3759                 }
3760                 *jump_count = cond->extval;
3761                 attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
3762                 attr->dest_ft = mlx5e_tc_post_act_get_ft(get_post_action(flow->priv));
3763                 break;
3764         default:
3765                 err = -EOPNOTSUPP;
3766                 goto out_err;
3767         }
3768
3769         return err;
3770 out_err:
3771         kfree(*cond_attr);
3772         *cond_attr = NULL;
3773         return err;
3774 }
3775
3776 static void
3777 dec_jump_count(struct flow_action_entry *act, struct mlx5e_tc_act *tc_act,
3778                struct mlx5_flow_attr *attr, struct mlx5e_priv *priv,
3779                struct mlx5e_tc_jump_state *jump_state)
3780 {
3781         if (!jump_state->jump_count)
3782                 return;
3783
3784         /* Single tc action can instantiate multiple offload actions (e.g. pedit)
3785          * Jump only over a tc action
3786          */
3787         if (act->id == jump_state->last_id && act->hw_index == jump_state->last_index)
3788                 return;
3789
3790         jump_state->last_id = act->id;
3791         jump_state->last_index = act->hw_index;
3792
3793         /* nothing to do for intermediate actions */
3794         if (--jump_state->jump_count > 1)
3795                 return;
3796
3797         if (jump_state->jump_count == 1) { /* last action in the jump action list */
3798
3799                 /* create a new attribute after this action */
3800                 jump_state->jump_target = true;
3801
3802                 if (tc_act->is_terminating_action) { /* the branch ends here */
3803                         attr->flags |= MLX5_ATTR_FLAG_TERMINATING;
3804                         attr->action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
3805                 } else { /* the branch continues executing the rest of the actions */
3806                         struct mlx5e_post_act *post_act;
3807
3808                         attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
3809                         post_act = get_post_action(priv);
3810                         attr->dest_ft = mlx5e_tc_post_act_get_ft(post_act);
3811                 }
3812         } else if (jump_state->jump_count == 0) { /* first attr after the jump action list */
3813                 /* This is the post action for the jumping attribute (either red or green)
3814                  * Use the stored jumping_attr to set the post act id on the jumping attribute
3815                  */
3816                 attr->jumping_attr = jump_state->jumping_attr;
3817         }
3818 }
3819
3820 static int
3821 parse_branch_ctrl(struct flow_action_entry *act, struct mlx5e_tc_act *tc_act,
3822                   struct mlx5e_tc_flow *flow, struct mlx5_flow_attr *attr,
3823                   struct mlx5e_tc_jump_state *jump_state,
3824                   struct netlink_ext_ack *extack)
3825 {
3826         struct mlx5e_tc_act_branch_ctrl cond_true, cond_false;
3827         u32 jump_count = jump_state->jump_count;
3828         int err;
3829
3830         if (!tc_act->get_branch_ctrl)
3831                 return 0;
3832
3833         tc_act->get_branch_ctrl(act, &cond_true, &cond_false);
3834
3835         err = alloc_branch_attr(flow, &cond_true,
3836                                 &attr->branch_true, &jump_count, extack);
3837         if (err)
3838                 goto out_err;
3839
3840         if (jump_count)
3841                 jump_state->jumping_attr = attr->branch_true;
3842
3843         err = alloc_branch_attr(flow, &cond_false,
3844                                 &attr->branch_false, &jump_count, extack);
3845         if (err)
3846                 goto err_branch_false;
3847
3848         if (jump_count && !jump_state->jumping_attr)
3849                 jump_state->jumping_attr = attr->branch_false;
3850
3851         jump_state->jump_count = jump_count;
3852
3853         /* branching action requires its own counter */
3854         attr->action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
3855         flow_flag_set(flow, USE_ACT_STATS);
3856
3857         return 0;
3858
3859 err_branch_false:
3860         free_branch_attr(flow, attr->branch_true);
3861 out_err:
3862         return err;
3863 }
3864
3865 static int
3866 parse_tc_actions(struct mlx5e_tc_act_parse_state *parse_state,
3867                  struct flow_action *flow_action)
3868 {
3869         struct netlink_ext_ack *extack = parse_state->extack;
3870         struct mlx5e_tc_flow *flow = parse_state->flow;
3871         struct mlx5e_tc_jump_state jump_state = {};
3872         struct mlx5_flow_attr *attr = flow->attr;
3873         enum mlx5_flow_namespace_type ns_type;
3874         struct mlx5e_priv *priv = flow->priv;
3875         struct mlx5_flow_attr *prev_attr;
3876         struct flow_action_entry *act;
3877         struct mlx5e_tc_act *tc_act;
3878         int err, i, i_split = 0;
3879         bool is_missable;
3880
3881         ns_type = mlx5e_get_flow_namespace(flow);
3882         list_add(&attr->list, &flow->attrs);
3883
3884         flow_action_for_each(i, act, flow_action) {
3885                 jump_state.jump_target = false;
3886                 is_missable = false;
3887                 prev_attr = attr;
3888
3889                 tc_act = mlx5e_tc_act_get(act->id, ns_type);
3890                 if (!tc_act) {
3891                         NL_SET_ERR_MSG_MOD(extack, "Not implemented offload action");
3892                         err = -EOPNOTSUPP;
3893                         goto out_free_post_acts;
3894                 }
3895
3896                 if (tc_act->can_offload && !tc_act->can_offload(parse_state, act, i, attr)) {
3897                         err = -EOPNOTSUPP;
3898                         goto out_free_post_acts;
3899                 }
3900
3901                 err = tc_act->parse_action(parse_state, act, priv, attr);
3902                 if (err)
3903                         goto out_free_post_acts;
3904
3905                 dec_jump_count(act, tc_act, attr, priv, &jump_state);
3906
3907                 err = parse_branch_ctrl(act, tc_act, flow, attr, &jump_state, extack);
3908                 if (err)
3909                         goto out_free_post_acts;
3910
3911                 parse_state->actions |= attr->action;
3912
3913                 /* Split attr for multi table act if not the last act. */
3914                 if (jump_state.jump_target ||
3915                     (tc_act->is_multi_table_act &&
3916                     tc_act->is_multi_table_act(priv, act, attr) &&
3917                     i < flow_action->num_entries - 1)) {
3918                         is_missable = tc_act->is_missable ? tc_act->is_missable(act) : false;
3919
3920                         err = mlx5e_tc_act_post_parse(parse_state, flow_action, i_split, i, attr,
3921                                                       ns_type);
3922                         if (err)
3923                                 goto out_free_post_acts;
3924
3925                         attr = mlx5e_clone_flow_attr_for_post_act(flow->attr, ns_type);
3926                         if (!attr) {
3927                                 err = -ENOMEM;
3928                                 goto out_free_post_acts;
3929                         }
3930
3931                         i_split = i + 1;
3932                         list_add(&attr->list, &flow->attrs);
3933                 }
3934
3935                 if (is_missable) {
3936                         /* Add counter to prev, and assign act to new (next) attr */
3937                         prev_attr->action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
3938                         flow_flag_set(flow, USE_ACT_STATS);
3939
3940                         attr->tc_act_cookies[attr->tc_act_cookies_count++] = act->cookie;
3941                 } else if (!tc_act->stats_action) {
3942                         prev_attr->tc_act_cookies[prev_attr->tc_act_cookies_count++] = act->cookie;
3943                 }
3944         }
3945
3946         err = mlx5e_tc_act_post_parse(parse_state, flow_action, i_split, i, attr, ns_type);
3947         if (err)
3948                 goto out_free_post_acts;
3949
3950         err = alloc_flow_post_acts(flow, extack);
3951         if (err)
3952                 goto out_free_post_acts;
3953
3954         return 0;
3955
3956 out_free_post_acts:
3957         free_flow_post_acts(flow);
3958
3959         return err;
3960 }
3961
3962 static int
3963 flow_action_supported(struct flow_action *flow_action,
3964                       struct netlink_ext_ack *extack)
3965 {
3966         if (!flow_action_has_entries(flow_action)) {
3967                 NL_SET_ERR_MSG_MOD(extack, "Flow action doesn't have any entries");
3968                 return -EINVAL;
3969         }
3970
3971         if (!flow_action_hw_stats_check(flow_action, extack,
3972                                         FLOW_ACTION_HW_STATS_DELAYED_BIT)) {
3973                 NL_SET_ERR_MSG_MOD(extack, "Flow action HW stats type is not supported");
3974                 return -EOPNOTSUPP;
3975         }
3976
3977         return 0;
3978 }
3979
3980 static int
3981 parse_tc_nic_actions(struct mlx5e_priv *priv,
3982                      struct flow_action *flow_action,
3983                      struct mlx5e_tc_flow *flow,
3984                      struct netlink_ext_ack *extack)
3985 {
3986         struct mlx5e_tc_act_parse_state *parse_state;
3987         struct mlx5e_tc_flow_parse_attr *parse_attr;
3988         struct mlx5_flow_attr *attr = flow->attr;
3989         int err;
3990
3991         err = flow_action_supported(flow_action, extack);
3992         if (err)
3993                 return err;
3994
3995         attr->nic_attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
3996         parse_attr = attr->parse_attr;
3997         parse_state = &parse_attr->parse_state;
3998         mlx5e_tc_act_init_parse_state(parse_state, flow, flow_action, extack);
3999         parse_state->ct_priv = get_ct_priv(priv);
4000
4001         err = parse_tc_actions(parse_state, flow_action);
4002         if (err)
4003                 return err;
4004
4005         err = actions_prepare_mod_hdr_actions(priv, flow, attr, extack);
4006         if (err)
4007                 return err;
4008
4009         err = verify_attr_actions(attr->action, extack);
4010         if (err)
4011                 return err;
4012
4013         if (!actions_match_supported(priv, flow_action, parse_state->actions,
4014                                      parse_attr, flow, extack))
4015                 return -EOPNOTSUPP;
4016
4017         return 0;
4018 }
4019
4020 static bool is_merged_eswitch_vfs(struct mlx5e_priv *priv,
4021                                   struct net_device *peer_netdev)
4022 {
4023         struct mlx5e_priv *peer_priv;
4024
4025         peer_priv = netdev_priv(peer_netdev);
4026
4027         return (MLX5_CAP_ESW(priv->mdev, merged_eswitch) &&
4028                 mlx5e_eswitch_vf_rep(priv->netdev) &&
4029                 mlx5e_eswitch_vf_rep(peer_netdev) &&
4030                 mlx5e_same_hw_devs(priv, peer_priv));
4031 }
4032
4033 static bool same_hw_reps(struct mlx5e_priv *priv,
4034                          struct net_device *peer_netdev)
4035 {
4036         struct mlx5e_priv *peer_priv;
4037
4038         peer_priv = netdev_priv(peer_netdev);
4039
4040         return mlx5e_eswitch_rep(priv->netdev) &&
4041                mlx5e_eswitch_rep(peer_netdev) &&
4042                mlx5e_same_hw_devs(priv, peer_priv);
4043 }
4044
4045 static bool is_lag_dev(struct mlx5e_priv *priv,
4046                        struct net_device *peer_netdev)
4047 {
4048         return ((mlx5_lag_is_sriov(priv->mdev) ||
4049                  mlx5_lag_is_multipath(priv->mdev)) &&
4050                  same_hw_reps(priv, peer_netdev));
4051 }
4052
4053 static bool is_multiport_eligible(struct mlx5e_priv *priv, struct net_device *out_dev)
4054 {
4055         return same_hw_reps(priv, out_dev) && mlx5_lag_is_mpesw(priv->mdev);
4056 }
4057
4058 bool mlx5e_is_valid_eswitch_fwd_dev(struct mlx5e_priv *priv,
4059                                     struct net_device *out_dev)
4060 {
4061         if (is_merged_eswitch_vfs(priv, out_dev))
4062                 return true;
4063
4064         if (is_multiport_eligible(priv, out_dev))
4065                 return true;
4066
4067         if (is_lag_dev(priv, out_dev))
4068                 return true;
4069
4070         return mlx5e_eswitch_rep(out_dev) &&
4071                same_port_devs(priv, netdev_priv(out_dev));
4072 }
4073
4074 int mlx5e_set_fwd_to_int_port_actions(struct mlx5e_priv *priv,
4075                                       struct mlx5_flow_attr *attr,
4076                                       int ifindex,
4077                                       enum mlx5e_tc_int_port_type type,
4078                                       u32 *action,
4079                                       int out_index)
4080 {
4081         struct mlx5_esw_flow_attr *esw_attr = attr->esw_attr;
4082         struct mlx5e_tc_int_port_priv *int_port_priv;
4083         struct mlx5e_tc_flow_parse_attr *parse_attr;
4084         struct mlx5e_tc_int_port *dest_int_port;
4085         int err;
4086
4087         parse_attr = attr->parse_attr;
4088         int_port_priv = mlx5e_get_int_port_priv(priv);
4089
4090         dest_int_port = mlx5e_tc_int_port_get(int_port_priv, ifindex, type);
4091         if (IS_ERR(dest_int_port))
4092                 return PTR_ERR(dest_int_port);
4093
4094         err = mlx5e_tc_match_to_reg_set(priv->mdev, &parse_attr->mod_hdr_acts,
4095                                         MLX5_FLOW_NAMESPACE_FDB, VPORT_TO_REG,
4096                                         mlx5e_tc_int_port_get_metadata(dest_int_port));
4097         if (err) {
4098                 mlx5e_tc_int_port_put(int_port_priv, dest_int_port);
4099                 return err;
4100         }
4101
4102         *action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
4103
4104         esw_attr->dest_int_port = dest_int_port;
4105         esw_attr->dests[out_index].flags |= MLX5_ESW_DEST_CHAIN_WITH_SRC_PORT_CHANGE;
4106         esw_attr->split_count = out_index;
4107
4108         /* Forward to root fdb for matching against the new source vport */
4109         attr->dest_chain = 0;
4110
4111         return 0;
4112 }
4113
4114 static int
4115 parse_tc_fdb_actions(struct mlx5e_priv *priv,
4116                      struct flow_action *flow_action,
4117                      struct mlx5e_tc_flow *flow,
4118                      struct netlink_ext_ack *extack)
4119 {
4120         struct mlx5e_tc_act_parse_state *parse_state;
4121         struct mlx5e_tc_flow_parse_attr *parse_attr;
4122         struct mlx5_flow_attr *attr = flow->attr;
4123         struct mlx5_esw_flow_attr *esw_attr;
4124         struct net_device *filter_dev;
4125         int err;
4126
4127         err = flow_action_supported(flow_action, extack);
4128         if (err)
4129                 return err;
4130
4131         esw_attr = attr->esw_attr;
4132         parse_attr = attr->parse_attr;
4133         filter_dev = parse_attr->filter_dev;
4134         parse_state = &parse_attr->parse_state;
4135         mlx5e_tc_act_init_parse_state(parse_state, flow, flow_action, extack);
4136         parse_state->ct_priv = get_ct_priv(priv);
4137
4138         err = parse_tc_actions(parse_state, flow_action);
4139         if (err)
4140                 return err;
4141
4142         /* Forward to/from internal port can only have 1 dest */
4143         if ((netif_is_ovs_master(filter_dev) || esw_attr->dest_int_port) &&
4144             esw_attr->out_count > 1) {
4145                 NL_SET_ERR_MSG_MOD(extack,
4146                                    "Rules with internal port can have only one destination");
4147                 return -EOPNOTSUPP;
4148         }
4149
4150         /* Forward from tunnel/internal port to internal port is not supported */
4151         if ((mlx5e_get_tc_tun(filter_dev) || netif_is_ovs_master(filter_dev)) &&
4152             esw_attr->dest_int_port) {
4153                 NL_SET_ERR_MSG_MOD(extack,
4154                                    "Forwarding from tunnel/internal port to internal port is not supported");
4155                 return -EOPNOTSUPP;
4156         }
4157
4158         err = actions_prepare_mod_hdr_actions(priv, flow, attr, extack);
4159         if (err)
4160                 return err;
4161
4162         if (!actions_match_supported(priv, flow_action, parse_state->actions,
4163                                      parse_attr, flow, extack))
4164                 return -EOPNOTSUPP;
4165
4166         return 0;
4167 }
4168
4169 static void get_flags(int flags, unsigned long *flow_flags)
4170 {
4171         unsigned long __flow_flags = 0;
4172
4173         if (flags & MLX5_TC_FLAG(INGRESS))
4174                 __flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_INGRESS);
4175         if (flags & MLX5_TC_FLAG(EGRESS))
4176                 __flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_EGRESS);
4177
4178         if (flags & MLX5_TC_FLAG(ESW_OFFLOAD))
4179                 __flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_ESWITCH);
4180         if (flags & MLX5_TC_FLAG(NIC_OFFLOAD))
4181                 __flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_NIC);
4182         if (flags & MLX5_TC_FLAG(FT_OFFLOAD))
4183                 __flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_FT);
4184
4185         *flow_flags = __flow_flags;
4186 }
4187
4188 static const struct rhashtable_params tc_ht_params = {
4189         .head_offset = offsetof(struct mlx5e_tc_flow, node),
4190         .key_offset = offsetof(struct mlx5e_tc_flow, cookie),
4191         .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
4192         .automatic_shrinking = true,
4193 };
4194
4195 static struct rhashtable *get_tc_ht(struct mlx5e_priv *priv,
4196                                     unsigned long flags)
4197 {
4198         struct mlx5e_tc_table *tc = mlx5e_fs_get_tc(priv->fs);
4199         struct mlx5e_rep_priv *rpriv;
4200
4201         if (flags & MLX5_TC_FLAG(ESW_OFFLOAD)) {
4202                 rpriv = priv->ppriv;
4203                 return &rpriv->tc_ht;
4204         } else /* NIC offload */
4205                 return &tc->ht;
4206 }
4207
4208 static bool is_peer_flow_needed(struct mlx5e_tc_flow *flow)
4209 {
4210         struct mlx5_esw_flow_attr *esw_attr = flow->attr->esw_attr;
4211         struct mlx5_flow_attr *attr = flow->attr;
4212         bool is_rep_ingress = esw_attr->in_rep->vport != MLX5_VPORT_UPLINK &&
4213                 flow_flag_test(flow, INGRESS);
4214         bool act_is_encap = !!(attr->action &
4215                                MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT);
4216         bool esw_paired = mlx5_devcom_comp_is_ready(esw_attr->in_mdev->priv.eswitch->devcom);
4217
4218         if (!esw_paired)
4219                 return false;
4220
4221         if ((mlx5_lag_is_sriov(esw_attr->in_mdev) ||
4222              mlx5_lag_is_multipath(esw_attr->in_mdev)) &&
4223             (is_rep_ingress || act_is_encap))
4224                 return true;
4225
4226         if (mlx5_lag_is_mpesw(esw_attr->in_mdev))
4227                 return true;
4228
4229         return false;
4230 }
4231
4232 struct mlx5_flow_attr *
4233 mlx5_alloc_flow_attr(enum mlx5_flow_namespace_type type)
4234 {
4235         u32 ex_attr_size = (type == MLX5_FLOW_NAMESPACE_FDB)  ?
4236                                 sizeof(struct mlx5_esw_flow_attr) :
4237                                 sizeof(struct mlx5_nic_flow_attr);
4238         struct mlx5_flow_attr *attr;
4239
4240         attr = kzalloc(sizeof(*attr) + ex_attr_size, GFP_KERNEL);
4241         if (!attr)
4242                 return attr;
4243
4244         INIT_LIST_HEAD(&attr->list);
4245         return attr;
4246 }
4247
4248 static void
4249 mlx5_free_flow_attr_actions(struct mlx5e_tc_flow *flow, struct mlx5_flow_attr *attr)
4250 {
4251         struct mlx5_core_dev *counter_dev = get_flow_counter_dev(flow);
4252
4253         if (!attr)
4254                 return;
4255
4256         if (attr->post_act_handle)
4257                 mlx5e_tc_post_act_del(get_post_action(flow->priv), attr->post_act_handle);
4258
4259         mlx5e_tc_tun_encap_dests_unset(flow->priv, flow, attr);
4260
4261         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT)
4262                 mlx5_fc_destroy(counter_dev, attr->counter);
4263
4264         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
4265                 mlx5e_mod_hdr_dealloc(&attr->parse_attr->mod_hdr_acts);
4266                 mlx5e_tc_detach_mod_hdr(flow->priv, flow, attr);
4267         }
4268
4269         mlx5_tc_ct_delete_flow(get_ct_priv(flow->priv), attr);
4270
4271         free_branch_attr(flow, attr->branch_true);
4272         free_branch_attr(flow, attr->branch_false);
4273 }
4274
4275 static int
4276 mlx5e_alloc_flow(struct mlx5e_priv *priv, int attr_size,
4277                  struct flow_cls_offload *f, unsigned long flow_flags,
4278                  struct mlx5e_tc_flow_parse_attr **__parse_attr,
4279                  struct mlx5e_tc_flow **__flow)
4280 {
4281         struct mlx5e_tc_flow_parse_attr *parse_attr;
4282         struct mlx5_flow_attr *attr;
4283         struct mlx5e_tc_flow *flow;
4284         int err = -ENOMEM;
4285         int out_index;
4286
4287         flow = kzalloc(sizeof(*flow), GFP_KERNEL);
4288         parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL);
4289         if (!parse_attr || !flow)
4290                 goto err_free;
4291
4292         flow->flags = flow_flags;
4293         flow->cookie = f->cookie;
4294         flow->priv = priv;
4295
4296         attr = mlx5_alloc_flow_attr(mlx5e_get_flow_namespace(flow));
4297         if (!attr)
4298                 goto err_free;
4299
4300         flow->attr = attr;
4301
4302         for (out_index = 0; out_index < MLX5_MAX_FLOW_FWD_VPORTS; out_index++)
4303                 INIT_LIST_HEAD(&flow->encaps[out_index].list);
4304         INIT_LIST_HEAD(&flow->hairpin);
4305         INIT_LIST_HEAD(&flow->l3_to_l2_reformat);
4306         INIT_LIST_HEAD(&flow->attrs);
4307         INIT_LIST_HEAD(&flow->peer_flows);
4308         refcount_set(&flow->refcnt, 1);
4309         init_completion(&flow->init_done);
4310         init_completion(&flow->del_hw_done);
4311
4312         *__flow = flow;
4313         *__parse_attr = parse_attr;
4314
4315         return 0;
4316
4317 err_free:
4318         kfree(flow);
4319         kvfree(parse_attr);
4320         return err;
4321 }
4322
4323 static void
4324 mlx5e_flow_attr_init(struct mlx5_flow_attr *attr,
4325                      struct mlx5e_tc_flow_parse_attr *parse_attr,
4326                      struct flow_cls_offload *f)
4327 {
4328         attr->parse_attr = parse_attr;
4329         attr->chain = f->common.chain_index;
4330         attr->prio = f->common.prio;
4331 }
4332
4333 static void
4334 mlx5e_flow_esw_attr_init(struct mlx5_flow_attr *attr,
4335                          struct mlx5e_priv *priv,
4336                          struct mlx5e_tc_flow_parse_attr *parse_attr,
4337                          struct flow_cls_offload *f,
4338                          struct mlx5_eswitch_rep *in_rep,
4339                          struct mlx5_core_dev *in_mdev)
4340 {
4341         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
4342         struct mlx5_esw_flow_attr *esw_attr = attr->esw_attr;
4343
4344         mlx5e_flow_attr_init(attr, parse_attr, f);
4345
4346         esw_attr->in_rep = in_rep;
4347         esw_attr->in_mdev = in_mdev;
4348
4349         if (MLX5_CAP_ESW(esw->dev, counter_eswitch_affinity) ==
4350             MLX5_COUNTER_SOURCE_ESWITCH)
4351                 esw_attr->counter_dev = in_mdev;
4352         else
4353                 esw_attr->counter_dev = priv->mdev;
4354 }
4355
4356 static struct mlx5e_tc_flow *
4357 __mlx5e_add_fdb_flow(struct mlx5e_priv *priv,
4358                      struct flow_cls_offload *f,
4359                      unsigned long flow_flags,
4360                      struct net_device *filter_dev,
4361                      struct mlx5_eswitch_rep *in_rep,
4362                      struct mlx5_core_dev *in_mdev)
4363 {
4364         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
4365         struct netlink_ext_ack *extack = f->common.extack;
4366         struct mlx5e_tc_flow_parse_attr *parse_attr;
4367         struct mlx5e_tc_flow *flow;
4368         int attr_size, err;
4369
4370         flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_ESWITCH);
4371         attr_size  = sizeof(struct mlx5_esw_flow_attr);
4372         err = mlx5e_alloc_flow(priv, attr_size, f, flow_flags,
4373                                &parse_attr, &flow);
4374         if (err)
4375                 goto out;
4376
4377         parse_attr->filter_dev = filter_dev;
4378         mlx5e_flow_esw_attr_init(flow->attr,
4379                                  priv, parse_attr,
4380                                  f, in_rep, in_mdev);
4381
4382         err = parse_cls_flower(flow->priv, flow, &parse_attr->spec,
4383                                f, filter_dev);
4384         if (err)
4385                 goto err_free;
4386
4387         /* actions validation depends on parsing the ct matches first */
4388         err = mlx5_tc_ct_match_add(get_ct_priv(priv), &parse_attr->spec, f,
4389                                    &flow->attr->ct_attr, extack);
4390         if (err)
4391                 goto err_free;
4392
4393         err = parse_tc_fdb_actions(priv, &rule->action, flow, extack);
4394         if (err)
4395                 goto err_free;
4396
4397         err = mlx5e_tc_add_fdb_flow(priv, flow, extack);
4398         complete_all(&flow->init_done);
4399         if (err) {
4400                 if (!(err == -ENETUNREACH && mlx5_lag_is_multipath(in_mdev)))
4401                         goto err_free;
4402
4403                 add_unready_flow(flow);
4404         }
4405
4406         return flow;
4407
4408 err_free:
4409         mlx5e_flow_put(priv, flow);
4410 out:
4411         return ERR_PTR(err);
4412 }
4413
4414 static int mlx5e_tc_add_fdb_peer_flow(struct flow_cls_offload *f,
4415                                       struct mlx5e_tc_flow *flow,
4416                                       unsigned long flow_flags,
4417                                       struct mlx5_eswitch *peer_esw)
4418 {
4419         struct mlx5e_priv *priv = flow->priv, *peer_priv;
4420         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
4421         struct mlx5_esw_flow_attr *attr = flow->attr->esw_attr;
4422         struct mlx5e_tc_flow_parse_attr *parse_attr;
4423         int i = mlx5_get_dev_index(peer_esw->dev);
4424         struct mlx5e_rep_priv *peer_urpriv;
4425         struct mlx5e_tc_flow *peer_flow;
4426         struct mlx5_core_dev *in_mdev;
4427         int err = 0;
4428
4429         peer_urpriv = mlx5_eswitch_get_uplink_priv(peer_esw, REP_ETH);
4430         peer_priv = netdev_priv(peer_urpriv->netdev);
4431
4432         /* in_mdev is assigned of which the packet originated from.
4433          * So packets redirected to uplink use the same mdev of the
4434          * original flow and packets redirected from uplink use the
4435          * peer mdev.
4436          * In multiport eswitch it's a special case that we need to
4437          * keep the original mdev.
4438          */
4439         if (attr->in_rep->vport == MLX5_VPORT_UPLINK && !mlx5_lag_is_mpesw(priv->mdev))
4440                 in_mdev = peer_priv->mdev;
4441         else
4442                 in_mdev = priv->mdev;
4443
4444         parse_attr = flow->attr->parse_attr;
4445         peer_flow = __mlx5e_add_fdb_flow(peer_priv, f, flow_flags,
4446                                          parse_attr->filter_dev,
4447                                          attr->in_rep, in_mdev);
4448         if (IS_ERR(peer_flow)) {
4449                 err = PTR_ERR(peer_flow);
4450                 goto out;
4451         }
4452
4453         list_add_tail(&peer_flow->peer_flows, &flow->peer_flows);
4454         flow_flag_set(flow, DUP);
4455         mutex_lock(&esw->offloads.peer_mutex);
4456         list_add_tail(&flow->peer[i], &esw->offloads.peer_flows[i]);
4457         mutex_unlock(&esw->offloads.peer_mutex);
4458
4459 out:
4460         return err;
4461 }
4462
4463 static int
4464 mlx5e_add_fdb_flow(struct mlx5e_priv *priv,
4465                    struct flow_cls_offload *f,
4466                    unsigned long flow_flags,
4467                    struct net_device *filter_dev,
4468                    struct mlx5e_tc_flow **__flow)
4469 {
4470         struct mlx5_devcom_comp_dev *devcom = priv->mdev->priv.eswitch->devcom, *pos;
4471         struct mlx5e_rep_priv *rpriv = priv->ppriv;
4472         struct mlx5_eswitch_rep *in_rep = rpriv->rep;
4473         struct mlx5_core_dev *in_mdev = priv->mdev;
4474         struct mlx5_eswitch *peer_esw;
4475         struct mlx5e_tc_flow *flow;
4476         int err;
4477
4478         flow = __mlx5e_add_fdb_flow(priv, f, flow_flags, filter_dev, in_rep,
4479                                     in_mdev);
4480         if (IS_ERR(flow))
4481                 return PTR_ERR(flow);
4482
4483         if (!is_peer_flow_needed(flow)) {
4484                 *__flow = flow;
4485                 return 0;
4486         }
4487
4488         if (!mlx5_devcom_for_each_peer_begin(devcom)) {
4489                 err = -ENODEV;
4490                 goto clean_flow;
4491         }
4492
4493         mlx5_devcom_for_each_peer_entry(devcom, peer_esw, pos) {
4494                 err = mlx5e_tc_add_fdb_peer_flow(f, flow, flow_flags, peer_esw);
4495                 if (err)
4496                         goto peer_clean;
4497         }
4498
4499         mlx5_devcom_for_each_peer_end(devcom);
4500
4501         *__flow = flow;
4502         return 0;
4503
4504 peer_clean:
4505         mlx5e_tc_del_fdb_peers_flow(flow);
4506         mlx5_devcom_for_each_peer_end(devcom);
4507 clean_flow:
4508         mlx5e_tc_del_fdb_flow(priv, flow);
4509         return err;
4510 }
4511
4512 static int
4513 mlx5e_add_nic_flow(struct mlx5e_priv *priv,
4514                    struct flow_cls_offload *f,
4515                    unsigned long flow_flags,
4516                    struct net_device *filter_dev,
4517                    struct mlx5e_tc_flow **__flow)
4518 {
4519         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
4520         struct netlink_ext_ack *extack = f->common.extack;
4521         struct mlx5e_tc_flow_parse_attr *parse_attr;
4522         struct mlx5e_tc_flow *flow;
4523         int attr_size, err;
4524
4525         if (!MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, ignore_flow_level)) {
4526                 if (!tc_cls_can_offload_and_chain0(priv->netdev, &f->common))
4527                         return -EOPNOTSUPP;
4528         } else if (!tc_can_offload_extack(priv->netdev, f->common.extack)) {
4529                 return -EOPNOTSUPP;
4530         }
4531
4532         flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_NIC);
4533         attr_size  = sizeof(struct mlx5_nic_flow_attr);
4534         err = mlx5e_alloc_flow(priv, attr_size, f, flow_flags,
4535                                &parse_attr, &flow);
4536         if (err)
4537                 goto out;
4538
4539         parse_attr->filter_dev = filter_dev;
4540         mlx5e_flow_attr_init(flow->attr, parse_attr, f);
4541
4542         err = parse_cls_flower(flow->priv, flow, &parse_attr->spec,
4543                                f, filter_dev);
4544         if (err)
4545                 goto err_free;
4546
4547         err = mlx5_tc_ct_match_add(get_ct_priv(priv), &parse_attr->spec, f,
4548                                    &flow->attr->ct_attr, extack);
4549         if (err)
4550                 goto err_free;
4551
4552         err = parse_tc_nic_actions(priv, &rule->action, flow, extack);
4553         if (err)
4554                 goto err_free;
4555
4556         err = mlx5e_tc_add_nic_flow(priv, flow, extack);
4557         if (err)
4558                 goto err_free;
4559
4560         flow_flag_set(flow, OFFLOADED);
4561         *__flow = flow;
4562
4563         return 0;
4564
4565 err_free:
4566         flow_flag_set(flow, FAILED);
4567         mlx5e_mod_hdr_dealloc(&parse_attr->mod_hdr_acts);
4568         mlx5e_flow_put(priv, flow);
4569 out:
4570         return err;
4571 }
4572
4573 static int
4574 mlx5e_tc_add_flow(struct mlx5e_priv *priv,
4575                   struct flow_cls_offload *f,
4576                   unsigned long flags,
4577                   struct net_device *filter_dev,
4578                   struct mlx5e_tc_flow **flow)
4579 {
4580         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
4581         unsigned long flow_flags;
4582         int err;
4583
4584         get_flags(flags, &flow_flags);
4585
4586         if (!tc_can_offload_extack(priv->netdev, f->common.extack))
4587                 return -EOPNOTSUPP;
4588
4589         if (esw && esw->mode == MLX5_ESWITCH_OFFLOADS)
4590                 err = mlx5e_add_fdb_flow(priv, f, flow_flags,
4591                                          filter_dev, flow);
4592         else
4593                 err = mlx5e_add_nic_flow(priv, f, flow_flags,
4594                                          filter_dev, flow);
4595
4596         return err;
4597 }
4598
4599 static bool is_flow_rule_duplicate_allowed(struct net_device *dev,
4600                                            struct mlx5e_rep_priv *rpriv)
4601 {
4602         /* Offloaded flow rule is allowed to duplicate on non-uplink representor
4603          * sharing tc block with other slaves of a lag device. Rpriv can be NULL if this
4604          * function is called from NIC mode.
4605          */
4606         return netif_is_lag_port(dev) && rpriv && rpriv->rep->vport != MLX5_VPORT_UPLINK;
4607 }
4608
4609 int mlx5e_configure_flower(struct net_device *dev, struct mlx5e_priv *priv,
4610                            struct flow_cls_offload *f, unsigned long flags)
4611 {
4612         struct netlink_ext_ack *extack = f->common.extack;
4613         struct rhashtable *tc_ht = get_tc_ht(priv, flags);
4614         struct mlx5e_rep_priv *rpriv = priv->ppriv;
4615         struct mlx5e_tc_flow *flow;
4616         int err = 0;
4617
4618         if (!mlx5_esw_hold(priv->mdev))
4619                 return -EBUSY;
4620
4621         mlx5_esw_get(priv->mdev);
4622
4623         rcu_read_lock();
4624         flow = rhashtable_lookup(tc_ht, &f->cookie, tc_ht_params);
4625         if (flow) {
4626                 /* Same flow rule offloaded to non-uplink representor sharing tc block,
4627                  * just return 0.
4628                  */
4629                 if (is_flow_rule_duplicate_allowed(dev, rpriv) && flow->orig_dev != dev)
4630                         goto rcu_unlock;
4631
4632                 NL_SET_ERR_MSG_MOD(extack,
4633                                    "flow cookie already exists, ignoring");
4634                 netdev_warn_once(priv->netdev,
4635                                  "flow cookie %lx already exists, ignoring\n",
4636                                  f->cookie);
4637                 err = -EEXIST;
4638                 goto rcu_unlock;
4639         }
4640 rcu_unlock:
4641         rcu_read_unlock();
4642         if (flow)
4643                 goto out;
4644
4645         trace_mlx5e_configure_flower(f);
4646         err = mlx5e_tc_add_flow(priv, f, flags, dev, &flow);
4647         if (err)
4648                 goto out;
4649
4650         /* Flow rule offloaded to non-uplink representor sharing tc block,
4651          * set the flow's owner dev.
4652          */
4653         if (is_flow_rule_duplicate_allowed(dev, rpriv))
4654                 flow->orig_dev = dev;
4655
4656         err = rhashtable_lookup_insert_fast(tc_ht, &flow->node, tc_ht_params);
4657         if (err)
4658                 goto err_free;
4659
4660         mlx5_esw_release(priv->mdev);
4661         return 0;
4662
4663 err_free:
4664         mlx5e_flow_put(priv, flow);
4665 out:
4666         mlx5_esw_put(priv->mdev);
4667         mlx5_esw_release(priv->mdev);
4668         return err;
4669 }
4670
4671 static bool same_flow_direction(struct mlx5e_tc_flow *flow, int flags)
4672 {
4673         bool dir_ingress = !!(flags & MLX5_TC_FLAG(INGRESS));
4674         bool dir_egress = !!(flags & MLX5_TC_FLAG(EGRESS));
4675
4676         return flow_flag_test(flow, INGRESS) == dir_ingress &&
4677                 flow_flag_test(flow, EGRESS) == dir_egress;
4678 }
4679
4680 int mlx5e_delete_flower(struct net_device *dev, struct mlx5e_priv *priv,
4681                         struct flow_cls_offload *f, unsigned long flags)
4682 {
4683         struct rhashtable *tc_ht = get_tc_ht(priv, flags);
4684         struct mlx5e_tc_flow *flow;
4685         int err;
4686
4687         rcu_read_lock();
4688         flow = rhashtable_lookup(tc_ht, &f->cookie, tc_ht_params);
4689         if (!flow || !same_flow_direction(flow, flags)) {
4690                 err = -EINVAL;
4691                 goto errout;
4692         }
4693
4694         /* Only delete the flow if it doesn't have MLX5E_TC_FLOW_DELETED flag
4695          * set.
4696          */
4697         if (flow_flag_test_and_set(flow, DELETED)) {
4698                 err = -EINVAL;
4699                 goto errout;
4700         }
4701         rhashtable_remove_fast(tc_ht, &flow->node, tc_ht_params);
4702         rcu_read_unlock();
4703
4704         trace_mlx5e_delete_flower(f);
4705         mlx5e_flow_put(priv, flow);
4706
4707         mlx5_esw_put(priv->mdev);
4708         return 0;
4709
4710 errout:
4711         rcu_read_unlock();
4712         return err;
4713 }
4714
4715 int mlx5e_tc_fill_action_stats(struct mlx5e_priv *priv,
4716                                struct flow_offload_action *fl_act)
4717 {
4718         return mlx5e_tc_act_stats_fill_stats(get_act_stats_handle(priv), fl_act);
4719 }
4720
4721 int mlx5e_stats_flower(struct net_device *dev, struct mlx5e_priv *priv,
4722                        struct flow_cls_offload *f, unsigned long flags)
4723 {
4724         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
4725         struct rhashtable *tc_ht = get_tc_ht(priv, flags);
4726         struct mlx5e_tc_flow *flow;
4727         struct mlx5_fc *counter;
4728         u64 lastuse = 0;
4729         u64 packets = 0;
4730         u64 bytes = 0;
4731         int err = 0;
4732
4733         rcu_read_lock();
4734         flow = mlx5e_flow_get(rhashtable_lookup(tc_ht, &f->cookie,
4735                                                 tc_ht_params));
4736         rcu_read_unlock();
4737         if (IS_ERR(flow))
4738                 return PTR_ERR(flow);
4739
4740         if (!same_flow_direction(flow, flags)) {
4741                 err = -EINVAL;
4742                 goto errout;
4743         }
4744
4745         if (mlx5e_is_offloaded_flow(flow)) {
4746                 if (flow_flag_test(flow, USE_ACT_STATS)) {
4747                         f->use_act_stats = true;
4748                 } else {
4749                         counter = mlx5e_tc_get_counter(flow);
4750                         if (!counter)
4751                                 goto errout;
4752
4753                         mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
4754                 }
4755         }
4756
4757         /* Under multipath it's possible for one rule to be currently
4758          * un-offloaded while the other rule is offloaded.
4759          */
4760         if (esw && !mlx5_devcom_for_each_peer_begin(esw->devcom))
4761                 goto out;
4762
4763         if (flow_flag_test(flow, DUP)) {
4764                 struct mlx5e_tc_flow *peer_flow;
4765
4766                 list_for_each_entry(peer_flow, &flow->peer_flows, peer_flows) {
4767                         u64 packets2;
4768                         u64 lastuse2;
4769                         u64 bytes2;
4770
4771                         if (!flow_flag_test(peer_flow, OFFLOADED))
4772                                 continue;
4773                         if (flow_flag_test(flow, USE_ACT_STATS)) {
4774                                 f->use_act_stats = true;
4775                                 break;
4776                         }
4777
4778                         counter = mlx5e_tc_get_counter(peer_flow);
4779                         if (!counter)
4780                                 goto no_peer_counter;
4781                         mlx5_fc_query_cached(counter, &bytes2, &packets2,
4782                                              &lastuse2);
4783
4784                         bytes += bytes2;
4785                         packets += packets2;
4786                         lastuse = max_t(u64, lastuse, lastuse2);
4787                 }
4788         }
4789
4790 no_peer_counter:
4791         if (esw)
4792                 mlx5_devcom_for_each_peer_end(esw->devcom);
4793 out:
4794         flow_stats_update(&f->stats, bytes, packets, 0, lastuse,
4795                           FLOW_ACTION_HW_STATS_DELAYED);
4796         trace_mlx5e_stats_flower(f);
4797 errout:
4798         mlx5e_flow_put(priv, flow);
4799         return err;
4800 }
4801
4802 static int apply_police_params(struct mlx5e_priv *priv, u64 rate,
4803                                struct netlink_ext_ack *extack)
4804 {
4805         struct mlx5e_rep_priv *rpriv = priv->ppriv;
4806         struct mlx5_eswitch *esw;
4807         u32 rate_mbps = 0;
4808         u16 vport_num;
4809         int err;
4810
4811         vport_num = rpriv->rep->vport;
4812         if (vport_num >= MLX5_VPORT_ECPF) {
4813                 NL_SET_ERR_MSG_MOD(extack,
4814                                    "Ingress rate limit is supported only for Eswitch ports connected to VFs");
4815                 return -EOPNOTSUPP;
4816         }
4817
4818         esw = priv->mdev->priv.eswitch;
4819         /* rate is given in bytes/sec.
4820          * First convert to bits/sec and then round to the nearest mbit/secs.
4821          * mbit means million bits.
4822          * Moreover, if rate is non zero we choose to configure to a minimum of
4823          * 1 mbit/sec.
4824          */
4825         if (rate) {
4826                 rate = (rate * BITS_PER_BYTE) + 500000;
4827                 do_div(rate, 1000000);
4828                 rate_mbps = max_t(u32, rate, 1);
4829         }
4830
4831         err = mlx5_esw_qos_modify_vport_rate(esw, vport_num, rate_mbps);
4832         if (err)
4833                 NL_SET_ERR_MSG_MOD(extack, "failed applying action to hardware");
4834
4835         return err;
4836 }
4837
4838 static int
4839 tc_matchall_police_validate(const struct flow_action *action,
4840                             const struct flow_action_entry *act,
4841                             struct netlink_ext_ack *extack)
4842 {
4843         if (act->police.notexceed.act_id != FLOW_ACTION_CONTINUE) {
4844                 NL_SET_ERR_MSG_MOD(extack,
4845                                    "Offload not supported when conform action is not continue");
4846                 return -EOPNOTSUPP;
4847         }
4848
4849         if (act->police.exceed.act_id != FLOW_ACTION_DROP) {
4850                 NL_SET_ERR_MSG_MOD(extack,
4851                                    "Offload not supported when exceed action is not drop");
4852                 return -EOPNOTSUPP;
4853         }
4854
4855         if (act->police.notexceed.act_id == FLOW_ACTION_ACCEPT &&
4856             !flow_action_is_last_entry(action, act)) {
4857                 NL_SET_ERR_MSG_MOD(extack,
4858                                    "Offload not supported when conform action is ok, but action is not last");
4859                 return -EOPNOTSUPP;
4860         }
4861
4862         if (act->police.peakrate_bytes_ps ||
4863             act->police.avrate || act->police.overhead) {
4864                 NL_SET_ERR_MSG_MOD(extack,
4865                                    "Offload not supported when peakrate/avrate/overhead is configured");
4866                 return -EOPNOTSUPP;
4867         }
4868
4869         return 0;
4870 }
4871
4872 static int scan_tc_matchall_fdb_actions(struct mlx5e_priv *priv,
4873                                         struct flow_action *flow_action,
4874                                         struct netlink_ext_ack *extack)
4875 {
4876         struct mlx5e_rep_priv *rpriv = priv->ppriv;
4877         const struct flow_action_entry *act;
4878         int err;
4879         int i;
4880
4881         if (!flow_action_has_entries(flow_action)) {
4882                 NL_SET_ERR_MSG_MOD(extack, "matchall called with no action");
4883                 return -EINVAL;
4884         }
4885
4886         if (!flow_offload_has_one_action(flow_action)) {
4887                 NL_SET_ERR_MSG_MOD(extack, "matchall policing support only a single action");
4888                 return -EOPNOTSUPP;
4889         }
4890
4891         if (!flow_action_basic_hw_stats_check(flow_action, extack)) {
4892                 NL_SET_ERR_MSG_MOD(extack, "Flow action HW stats type is not supported");
4893                 return -EOPNOTSUPP;
4894         }
4895
4896         flow_action_for_each(i, act, flow_action) {
4897                 switch (act->id) {
4898                 case FLOW_ACTION_POLICE:
4899                         err = tc_matchall_police_validate(flow_action, act, extack);
4900                         if (err)
4901                                 return err;
4902
4903                         err = apply_police_params(priv, act->police.rate_bytes_ps, extack);
4904                         if (err)
4905                                 return err;
4906
4907                         rpriv->prev_vf_vport_stats = priv->stats.vf_vport;
4908                         break;
4909                 default:
4910                         NL_SET_ERR_MSG_MOD(extack, "mlx5 supports only police action for matchall");
4911                         return -EOPNOTSUPP;
4912                 }
4913         }
4914
4915         return 0;
4916 }
4917
4918 int mlx5e_tc_configure_matchall(struct mlx5e_priv *priv,
4919                                 struct tc_cls_matchall_offload *ma)
4920 {
4921         struct netlink_ext_ack *extack = ma->common.extack;
4922
4923         if (ma->common.prio != 1) {
4924                 NL_SET_ERR_MSG_MOD(extack, "only priority 1 is supported");
4925                 return -EINVAL;
4926         }
4927
4928         return scan_tc_matchall_fdb_actions(priv, &ma->rule->action, extack);
4929 }
4930
4931 int mlx5e_tc_delete_matchall(struct mlx5e_priv *priv,
4932                              struct tc_cls_matchall_offload *ma)
4933 {
4934         struct netlink_ext_ack *extack = ma->common.extack;
4935
4936         return apply_police_params(priv, 0, extack);
4937 }
4938
4939 void mlx5e_tc_stats_matchall(struct mlx5e_priv *priv,
4940                              struct tc_cls_matchall_offload *ma)
4941 {
4942         struct mlx5e_rep_priv *rpriv = priv->ppriv;
4943         struct rtnl_link_stats64 cur_stats;
4944         u64 dbytes;
4945         u64 dpkts;
4946
4947         cur_stats = priv->stats.vf_vport;
4948         dpkts = cur_stats.rx_packets - rpriv->prev_vf_vport_stats.rx_packets;
4949         dbytes = cur_stats.rx_bytes - rpriv->prev_vf_vport_stats.rx_bytes;
4950         rpriv->prev_vf_vport_stats = cur_stats;
4951         flow_stats_update(&ma->stats, dbytes, dpkts, 0, jiffies,
4952                           FLOW_ACTION_HW_STATS_DELAYED);
4953 }
4954
4955 static void mlx5e_tc_hairpin_update_dead_peer(struct mlx5e_priv *priv,
4956                                               struct mlx5e_priv *peer_priv)
4957 {
4958         struct mlx5e_tc_table *tc = mlx5e_fs_get_tc(priv->fs);
4959         struct mlx5_core_dev *peer_mdev = peer_priv->mdev;
4960         struct mlx5e_hairpin_entry *hpe, *tmp;
4961         LIST_HEAD(init_wait_list);
4962         u16 peer_vhca_id;
4963         int bkt;
4964
4965         if (!mlx5e_same_hw_devs(priv, peer_priv))
4966                 return;
4967
4968         peer_vhca_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
4969
4970         mutex_lock(&tc->hairpin_tbl_lock);
4971         hash_for_each(tc->hairpin_tbl, bkt, hpe, hairpin_hlist)
4972                 if (refcount_inc_not_zero(&hpe->refcnt))
4973                         list_add(&hpe->dead_peer_wait_list, &init_wait_list);
4974         mutex_unlock(&tc->hairpin_tbl_lock);
4975
4976         list_for_each_entry_safe(hpe, tmp, &init_wait_list, dead_peer_wait_list) {
4977                 wait_for_completion(&hpe->res_ready);
4978                 if (!IS_ERR_OR_NULL(hpe->hp) && hpe->peer_vhca_id == peer_vhca_id)
4979                         mlx5_core_hairpin_clear_dead_peer(hpe->hp->pair);
4980
4981                 mlx5e_hairpin_put(priv, hpe);
4982         }
4983 }
4984
4985 static int mlx5e_tc_netdev_event(struct notifier_block *this,
4986                                  unsigned long event, void *ptr)
4987 {
4988         struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
4989         struct mlx5e_priv *peer_priv;
4990         struct mlx5e_tc_table *tc;
4991         struct mlx5e_priv *priv;
4992
4993         if (ndev->netdev_ops != &mlx5e_netdev_ops ||
4994             event != NETDEV_UNREGISTER ||
4995             ndev->reg_state == NETREG_REGISTERED)
4996                 return NOTIFY_DONE;
4997
4998         tc = container_of(this, struct mlx5e_tc_table, netdevice_nb);
4999         priv = tc->priv;
5000         peer_priv = netdev_priv(ndev);
5001         if (priv == peer_priv ||
5002             !(priv->netdev->features & NETIF_F_HW_TC))
5003                 return NOTIFY_DONE;
5004
5005         mlx5e_tc_hairpin_update_dead_peer(priv, peer_priv);
5006
5007         return NOTIFY_DONE;
5008 }
5009
5010 static int mlx5e_tc_nic_create_miss_table(struct mlx5e_priv *priv)
5011 {
5012         struct mlx5e_tc_table *tc = mlx5e_fs_get_tc(priv->fs);
5013         struct mlx5_flow_table **ft = &tc->miss_t;
5014         struct mlx5_flow_table_attr ft_attr = {};
5015         struct mlx5_flow_namespace *ns;
5016         int err = 0;
5017
5018         ft_attr.max_fte = 1;
5019         ft_attr.autogroup.max_num_groups = 1;
5020         ft_attr.level = MLX5E_TC_MISS_LEVEL;
5021         ft_attr.prio = 0;
5022         ns = mlx5_get_flow_namespace(priv->mdev, MLX5_FLOW_NAMESPACE_KERNEL);
5023
5024         *ft = mlx5_create_auto_grouped_flow_table(ns, &ft_attr);
5025         if (IS_ERR(*ft)) {
5026                 err = PTR_ERR(*ft);
5027                 netdev_err(priv->netdev, "failed to create tc nic miss table err=%d\n", err);
5028         }
5029
5030         return err;
5031 }
5032
5033 static void mlx5e_tc_nic_destroy_miss_table(struct mlx5e_priv *priv)
5034 {
5035         struct mlx5e_tc_table *tc = mlx5e_fs_get_tc(priv->fs);
5036
5037         mlx5_destroy_flow_table(tc->miss_t);
5038 }
5039
5040 int mlx5e_tc_nic_init(struct mlx5e_priv *priv)
5041 {
5042         struct mlx5e_tc_table *tc = mlx5e_fs_get_tc(priv->fs);
5043         struct mlx5_core_dev *dev = priv->mdev;
5044         struct mapping_ctx *chains_mapping;
5045         struct mlx5_chains_attr attr = {};
5046         u64 mapping_id;
5047         int err;
5048
5049         mlx5e_mod_hdr_tbl_init(&tc->mod_hdr);
5050         mutex_init(&tc->t_lock);
5051         mutex_init(&tc->hairpin_tbl_lock);
5052         hash_init(tc->hairpin_tbl);
5053         tc->priv = priv;
5054
5055         err = rhashtable_init(&tc->ht, &tc_ht_params);
5056         if (err)
5057                 return err;
5058
5059         lockdep_set_class(&tc->ht.mutex, &tc_ht_lock_key);
5060         lockdep_init_map(&tc->ht.run_work.lockdep_map, "tc_ht_wq_key", &tc_ht_wq_key, 0);
5061
5062         mapping_id = mlx5_query_nic_system_image_guid(dev);
5063
5064         chains_mapping = mapping_create_for_id(mapping_id, MAPPING_TYPE_CHAIN,
5065                                                sizeof(struct mlx5_mapped_obj),
5066                                                MLX5E_TC_TABLE_CHAIN_TAG_MASK, true);
5067
5068         if (IS_ERR(chains_mapping)) {
5069                 err = PTR_ERR(chains_mapping);
5070                 goto err_mapping;
5071         }
5072         tc->mapping = chains_mapping;
5073
5074         err = mlx5e_tc_nic_create_miss_table(priv);
5075         if (err)
5076                 goto err_chains;
5077
5078         if (MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, ignore_flow_level))
5079                 attr.flags = MLX5_CHAINS_AND_PRIOS_SUPPORTED |
5080                         MLX5_CHAINS_IGNORE_FLOW_LEVEL_SUPPORTED;
5081         attr.ns = MLX5_FLOW_NAMESPACE_KERNEL;
5082         attr.max_grp_num = MLX5E_TC_TABLE_NUM_GROUPS;
5083         attr.default_ft = tc->miss_t;
5084         attr.mapping = chains_mapping;
5085         attr.fs_base_prio = MLX5E_TC_PRIO;
5086
5087         tc->chains = mlx5_chains_create(dev, &attr);
5088         if (IS_ERR(tc->chains)) {
5089                 err = PTR_ERR(tc->chains);
5090                 goto err_miss;
5091         }
5092
5093         mlx5_chains_print_info(tc->chains);
5094
5095         tc->post_act = mlx5e_tc_post_act_init(priv, tc->chains, MLX5_FLOW_NAMESPACE_KERNEL);
5096         tc->ct = mlx5_tc_ct_init(priv, tc->chains, &tc->mod_hdr,
5097                                  MLX5_FLOW_NAMESPACE_KERNEL, tc->post_act);
5098
5099         tc->netdevice_nb.notifier_call = mlx5e_tc_netdev_event;
5100         err = register_netdevice_notifier_dev_net(priv->netdev,
5101                                                   &tc->netdevice_nb,
5102                                                   &tc->netdevice_nn);
5103         if (err) {
5104                 tc->netdevice_nb.notifier_call = NULL;
5105                 mlx5_core_warn(priv->mdev, "Failed to register netdev notifier\n");
5106                 goto err_reg;
5107         }
5108
5109         mlx5e_tc_debugfs_init(tc, mlx5e_fs_get_debugfs_root(priv->fs));
5110
5111         tc->action_stats_handle = mlx5e_tc_act_stats_create();
5112         if (IS_ERR(tc->action_stats_handle)) {
5113                 err = PTR_ERR(tc->action_stats_handle);
5114                 goto err_act_stats;
5115         }
5116
5117         return 0;
5118
5119 err_act_stats:
5120         unregister_netdevice_notifier_dev_net(priv->netdev,
5121                                               &tc->netdevice_nb,
5122                                               &tc->netdevice_nn);
5123 err_reg:
5124         mlx5_tc_ct_clean(tc->ct);
5125         mlx5e_tc_post_act_destroy(tc->post_act);
5126         mlx5_chains_destroy(tc->chains);
5127 err_miss:
5128         mlx5e_tc_nic_destroy_miss_table(priv);
5129 err_chains:
5130         mapping_destroy(chains_mapping);
5131 err_mapping:
5132         rhashtable_destroy(&tc->ht);
5133         return err;
5134 }
5135
5136 static void _mlx5e_tc_del_flow(void *ptr, void *arg)
5137 {
5138         struct mlx5e_tc_flow *flow = ptr;
5139         struct mlx5e_priv *priv = flow->priv;
5140
5141         mlx5e_tc_del_flow(priv, flow);
5142         kfree(flow);
5143 }
5144
5145 void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv)
5146 {
5147         struct mlx5e_tc_table *tc = mlx5e_fs_get_tc(priv->fs);
5148
5149         debugfs_remove_recursive(tc->dfs_root);
5150
5151         if (tc->netdevice_nb.notifier_call)
5152                 unregister_netdevice_notifier_dev_net(priv->netdev,
5153                                                       &tc->netdevice_nb,
5154                                                       &tc->netdevice_nn);
5155
5156         mlx5e_mod_hdr_tbl_destroy(&tc->mod_hdr);
5157         mutex_destroy(&tc->hairpin_tbl_lock);
5158
5159         rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, NULL);
5160
5161         if (!IS_ERR_OR_NULL(tc->t)) {
5162                 mlx5_chains_put_table(tc->chains, 0, 1, MLX5E_TC_FT_LEVEL);
5163                 tc->t = NULL;
5164         }
5165         mutex_destroy(&tc->t_lock);
5166
5167         mlx5_tc_ct_clean(tc->ct);
5168         mlx5e_tc_post_act_destroy(tc->post_act);
5169         mapping_destroy(tc->mapping);
5170         mlx5_chains_destroy(tc->chains);
5171         mlx5e_tc_nic_destroy_miss_table(priv);
5172         mlx5e_tc_act_stats_free(tc->action_stats_handle);
5173 }
5174
5175 int mlx5e_tc_ht_init(struct rhashtable *tc_ht)
5176 {
5177         int err;
5178
5179         err = rhashtable_init(tc_ht, &tc_ht_params);
5180         if (err)
5181                 return err;
5182
5183         lockdep_set_class(&tc_ht->mutex, &tc_ht_lock_key);
5184         lockdep_init_map(&tc_ht->run_work.lockdep_map, "tc_ht_wq_key", &tc_ht_wq_key, 0);
5185
5186         return 0;
5187 }
5188
5189 void mlx5e_tc_ht_cleanup(struct rhashtable *tc_ht)
5190 {
5191         rhashtable_free_and_destroy(tc_ht, _mlx5e_tc_del_flow, NULL);
5192 }
5193
5194 int mlx5e_tc_esw_init(struct mlx5_rep_uplink_priv *uplink_priv)
5195 {
5196         const size_t sz_enc_opts = sizeof(struct tunnel_match_enc_opts);
5197         struct netdev_phys_item_id ppid;
5198         struct mlx5e_rep_priv *rpriv;
5199         struct mapping_ctx *mapping;
5200         struct mlx5_eswitch *esw;
5201         struct mlx5e_priv *priv;
5202         u64 mapping_id, key;
5203         int err = 0;
5204
5205         rpriv = container_of(uplink_priv, struct mlx5e_rep_priv, uplink_priv);
5206         priv = netdev_priv(rpriv->netdev);
5207         esw = priv->mdev->priv.eswitch;
5208
5209         uplink_priv->post_act = mlx5e_tc_post_act_init(priv, esw_chains(esw),
5210                                                        MLX5_FLOW_NAMESPACE_FDB);
5211         uplink_priv->ct_priv = mlx5_tc_ct_init(netdev_priv(priv->netdev),
5212                                                esw_chains(esw),
5213                                                &esw->offloads.mod_hdr,
5214                                                MLX5_FLOW_NAMESPACE_FDB,
5215                                                uplink_priv->post_act);
5216
5217         uplink_priv->int_port_priv = mlx5e_tc_int_port_init(netdev_priv(priv->netdev));
5218
5219         uplink_priv->tc_psample = mlx5e_tc_sample_init(esw, uplink_priv->post_act);
5220
5221         mapping_id = mlx5_query_nic_system_image_guid(esw->dev);
5222
5223         mapping = mapping_create_for_id(mapping_id, MAPPING_TYPE_TUNNEL,
5224                                         sizeof(struct tunnel_match_key),
5225                                         TUNNEL_INFO_BITS_MASK, true);
5226
5227         if (IS_ERR(mapping)) {
5228                 err = PTR_ERR(mapping);
5229                 goto err_tun_mapping;
5230         }
5231         uplink_priv->tunnel_mapping = mapping;
5232
5233         /* Two last values are reserved for stack devices slow path table mark
5234          * and bridge ingress push mark.
5235          */
5236         mapping = mapping_create_for_id(mapping_id, MAPPING_TYPE_TUNNEL_ENC_OPTS,
5237                                         sz_enc_opts, ENC_OPTS_BITS_MASK - 2, true);
5238         if (IS_ERR(mapping)) {
5239                 err = PTR_ERR(mapping);
5240                 goto err_enc_opts_mapping;
5241         }
5242         uplink_priv->tunnel_enc_opts_mapping = mapping;
5243
5244         uplink_priv->encap = mlx5e_tc_tun_init(priv);
5245         if (IS_ERR(uplink_priv->encap)) {
5246                 err = PTR_ERR(uplink_priv->encap);
5247                 goto err_register_fib_notifier;
5248         }
5249
5250         uplink_priv->action_stats_handle = mlx5e_tc_act_stats_create();
5251         if (IS_ERR(uplink_priv->action_stats_handle)) {
5252                 err = PTR_ERR(uplink_priv->action_stats_handle);
5253                 goto err_action_counter;
5254         }
5255
5256         err = dev_get_port_parent_id(priv->netdev, &ppid, false);
5257         if (!err) {
5258                 memcpy(&key, &ppid.id, sizeof(key));
5259                 mlx5_esw_offloads_devcom_init(esw, key);
5260         }
5261
5262         return 0;
5263
5264 err_action_counter:
5265         mlx5e_tc_tun_cleanup(uplink_priv->encap);
5266 err_register_fib_notifier:
5267         mapping_destroy(uplink_priv->tunnel_enc_opts_mapping);
5268 err_enc_opts_mapping:
5269         mapping_destroy(uplink_priv->tunnel_mapping);
5270 err_tun_mapping:
5271         mlx5e_tc_sample_cleanup(uplink_priv->tc_psample);
5272         mlx5e_tc_int_port_cleanup(uplink_priv->int_port_priv);
5273         mlx5_tc_ct_clean(uplink_priv->ct_priv);
5274         netdev_warn(priv->netdev,
5275                     "Failed to initialize tc (eswitch), err: %d", err);
5276         mlx5e_tc_post_act_destroy(uplink_priv->post_act);
5277         return err;
5278 }
5279
5280 void mlx5e_tc_esw_cleanup(struct mlx5_rep_uplink_priv *uplink_priv)
5281 {
5282         struct mlx5e_rep_priv *rpriv;
5283         struct mlx5_eswitch *esw;
5284         struct mlx5e_priv *priv;
5285
5286         rpriv = container_of(uplink_priv, struct mlx5e_rep_priv, uplink_priv);
5287         priv = netdev_priv(rpriv->netdev);
5288         esw = priv->mdev->priv.eswitch;
5289
5290         mlx5_esw_offloads_devcom_cleanup(esw);
5291
5292         mlx5e_tc_tun_cleanup(uplink_priv->encap);
5293
5294         mapping_destroy(uplink_priv->tunnel_enc_opts_mapping);
5295         mapping_destroy(uplink_priv->tunnel_mapping);
5296
5297         mlx5e_tc_sample_cleanup(uplink_priv->tc_psample);
5298         mlx5e_tc_int_port_cleanup(uplink_priv->int_port_priv);
5299         mlx5_tc_ct_clean(uplink_priv->ct_priv);
5300         mlx5e_flow_meters_cleanup(uplink_priv->flow_meters);
5301         mlx5e_tc_post_act_destroy(uplink_priv->post_act);
5302         mlx5e_tc_act_stats_free(uplink_priv->action_stats_handle);
5303 }
5304
5305 int mlx5e_tc_num_filters(struct mlx5e_priv *priv, unsigned long flags)
5306 {
5307         struct rhashtable *tc_ht = get_tc_ht(priv, flags);
5308
5309         return atomic_read(&tc_ht->nelems);
5310 }
5311
5312 void mlx5e_tc_clean_fdb_peer_flows(struct mlx5_eswitch *esw)
5313 {
5314         struct mlx5e_tc_flow *flow, *tmp;
5315         int i;
5316
5317         for (i = 0; i < MLX5_MAX_PORTS; i++) {
5318                 if (i == mlx5_get_dev_index(esw->dev))
5319                         continue;
5320                 list_for_each_entry_safe(flow, tmp, &esw->offloads.peer_flows[i], peer[i])
5321                         mlx5e_tc_del_fdb_peers_flow(flow);
5322         }
5323 }
5324
5325 void mlx5e_tc_reoffload_flows_work(struct work_struct *work)
5326 {
5327         struct mlx5_rep_uplink_priv *rpriv =
5328                 container_of(work, struct mlx5_rep_uplink_priv,
5329                              reoffload_flows_work);
5330         struct mlx5e_tc_flow *flow, *tmp;
5331
5332         mutex_lock(&rpriv->unready_flows_lock);
5333         list_for_each_entry_safe(flow, tmp, &rpriv->unready_flows, unready) {
5334                 if (!mlx5e_tc_add_fdb_flow(flow->priv, flow, NULL))
5335                         unready_flow_del(flow);
5336         }
5337         mutex_unlock(&rpriv->unready_flows_lock);
5338 }
5339
5340 static int mlx5e_setup_tc_cls_flower(struct mlx5e_priv *priv,
5341                                      struct flow_cls_offload *cls_flower,
5342                                      unsigned long flags)
5343 {
5344         switch (cls_flower->command) {
5345         case FLOW_CLS_REPLACE:
5346                 return mlx5e_configure_flower(priv->netdev, priv, cls_flower,
5347                                               flags);
5348         case FLOW_CLS_DESTROY:
5349                 return mlx5e_delete_flower(priv->netdev, priv, cls_flower,
5350                                            flags);
5351         case FLOW_CLS_STATS:
5352                 return mlx5e_stats_flower(priv->netdev, priv, cls_flower,
5353                                           flags);
5354         default:
5355                 return -EOPNOTSUPP;
5356         }
5357 }
5358
5359 int mlx5e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
5360                             void *cb_priv)
5361 {
5362         unsigned long flags = MLX5_TC_FLAG(INGRESS);
5363         struct mlx5e_priv *priv = cb_priv;
5364
5365         if (!priv->netdev || !netif_device_present(priv->netdev))
5366                 return -EOPNOTSUPP;
5367
5368         if (mlx5e_is_uplink_rep(priv))
5369                 flags |= MLX5_TC_FLAG(ESW_OFFLOAD);
5370         else
5371                 flags |= MLX5_TC_FLAG(NIC_OFFLOAD);
5372
5373         switch (type) {
5374         case TC_SETUP_CLSFLOWER:
5375                 return mlx5e_setup_tc_cls_flower(priv, type_data, flags);
5376         default:
5377                 return -EOPNOTSUPP;
5378         }
5379 }
5380
5381 static bool mlx5e_tc_restore_tunnel(struct mlx5e_priv *priv, struct sk_buff *skb,
5382                                     struct mlx5e_tc_update_priv *tc_priv,
5383                                     u32 tunnel_id)
5384 {
5385         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
5386         struct tunnel_match_enc_opts enc_opts = {};
5387         struct mlx5_rep_uplink_priv *uplink_priv;
5388         struct mlx5e_rep_priv *uplink_rpriv;
5389         struct metadata_dst *tun_dst;
5390         struct tunnel_match_key key;
5391         u32 tun_id, enc_opts_id;
5392         struct net_device *dev;
5393         int err;
5394
5395         enc_opts_id = tunnel_id & ENC_OPTS_BITS_MASK;
5396         tun_id = tunnel_id >> ENC_OPTS_BITS;
5397
5398         if (!tun_id)
5399                 return true;
5400
5401         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
5402         uplink_priv = &uplink_rpriv->uplink_priv;
5403
5404         err = mapping_find(uplink_priv->tunnel_mapping, tun_id, &key);
5405         if (err) {
5406                 netdev_dbg(priv->netdev,
5407                            "Couldn't find tunnel for tun_id: %d, err: %d\n",
5408                            tun_id, err);
5409                 return false;
5410         }
5411
5412         if (enc_opts_id) {
5413                 err = mapping_find(uplink_priv->tunnel_enc_opts_mapping,
5414                                    enc_opts_id, &enc_opts);
5415                 if (err) {
5416                         netdev_dbg(priv->netdev,
5417                                    "Couldn't find tunnel (opts) for tun_id: %d, err: %d\n",
5418                                    enc_opts_id, err);
5419                         return false;
5420                 }
5421         }
5422
5423         switch (key.enc_control.addr_type) {
5424         case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
5425                 tun_dst = __ip_tun_set_dst(key.enc_ipv4.src, key.enc_ipv4.dst,
5426                                            key.enc_ip.tos, key.enc_ip.ttl,
5427                                            key.enc_tp.dst, TUNNEL_KEY,
5428                                            key32_to_tunnel_id(key.enc_key_id.keyid),
5429                                            enc_opts.key.len);
5430                 break;
5431         case FLOW_DISSECTOR_KEY_IPV6_ADDRS:
5432                 tun_dst = __ipv6_tun_set_dst(&key.enc_ipv6.src, &key.enc_ipv6.dst,
5433                                              key.enc_ip.tos, key.enc_ip.ttl,
5434                                              key.enc_tp.dst, 0, TUNNEL_KEY,
5435                                              key32_to_tunnel_id(key.enc_key_id.keyid),
5436                                              enc_opts.key.len);
5437                 break;
5438         default:
5439                 netdev_dbg(priv->netdev,
5440                            "Couldn't restore tunnel, unsupported addr_type: %d\n",
5441                            key.enc_control.addr_type);
5442                 return false;
5443         }
5444
5445         if (!tun_dst) {
5446                 netdev_dbg(priv->netdev, "Couldn't restore tunnel, no tun_dst\n");
5447                 return false;
5448         }
5449
5450         tun_dst->u.tun_info.key.tp_src = key.enc_tp.src;
5451
5452         if (enc_opts.key.len)
5453                 ip_tunnel_info_opts_set(&tun_dst->u.tun_info,
5454                                         enc_opts.key.data,
5455                                         enc_opts.key.len,
5456                                         enc_opts.key.dst_opt_type);
5457
5458         skb_dst_set(skb, (struct dst_entry *)tun_dst);
5459         dev = dev_get_by_index(&init_net, key.filter_ifindex);
5460         if (!dev) {
5461                 netdev_dbg(priv->netdev,
5462                            "Couldn't find tunnel device with ifindex: %d\n",
5463                            key.filter_ifindex);
5464                 return false;
5465         }
5466
5467         /* Set fwd_dev so we do dev_put() after datapath */
5468         tc_priv->fwd_dev = dev;
5469
5470         skb->dev = dev;
5471
5472         return true;
5473 }
5474
5475 static bool mlx5e_tc_restore_skb_tc_meta(struct sk_buff *skb, struct mlx5_tc_ct_priv *ct_priv,
5476                                          struct mlx5_mapped_obj *mapped_obj, u32 zone_restore_id,
5477                                          u32 tunnel_id,  struct mlx5e_tc_update_priv *tc_priv)
5478 {
5479         struct mlx5e_priv *priv = netdev_priv(skb->dev);
5480         struct tc_skb_ext *tc_skb_ext;
5481         u64 act_miss_cookie;
5482         u32 chain;
5483
5484         chain = mapped_obj->type == MLX5_MAPPED_OBJ_CHAIN ? mapped_obj->chain : 0;
5485         act_miss_cookie = mapped_obj->type == MLX5_MAPPED_OBJ_ACT_MISS ?
5486                           mapped_obj->act_miss_cookie : 0;
5487         if (chain || act_miss_cookie) {
5488                 if (!mlx5e_tc_ct_restore_flow(ct_priv, skb, zone_restore_id))
5489                         return false;
5490
5491                 tc_skb_ext = tc_skb_ext_alloc(skb);
5492                 if (!tc_skb_ext) {
5493                         WARN_ON(1);
5494                         return false;
5495                 }
5496
5497                 if (act_miss_cookie) {
5498                         tc_skb_ext->act_miss_cookie = act_miss_cookie;
5499                         tc_skb_ext->act_miss = 1;
5500                 } else {
5501                         tc_skb_ext->chain = chain;
5502                 }
5503         }
5504
5505         if (tc_priv)
5506                 return mlx5e_tc_restore_tunnel(priv, skb, tc_priv, tunnel_id);
5507
5508         return true;
5509 }
5510
5511 static void mlx5e_tc_restore_skb_sample(struct mlx5e_priv *priv, struct sk_buff *skb,
5512                                         struct mlx5_mapped_obj *mapped_obj,
5513                                         struct mlx5e_tc_update_priv *tc_priv)
5514 {
5515         if (!mlx5e_tc_restore_tunnel(priv, skb, tc_priv, mapped_obj->sample.tunnel_id)) {
5516                 netdev_dbg(priv->netdev,
5517                            "Failed to restore tunnel info for sampled packet\n");
5518                 return;
5519         }
5520         mlx5e_tc_sample_skb(skb, mapped_obj);
5521 }
5522
5523 static bool mlx5e_tc_restore_skb_int_port(struct mlx5e_priv *priv, struct sk_buff *skb,
5524                                           struct mlx5_mapped_obj *mapped_obj,
5525                                           struct mlx5e_tc_update_priv *tc_priv,
5526                                           u32 tunnel_id)
5527 {
5528         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
5529         struct mlx5_rep_uplink_priv *uplink_priv;
5530         struct mlx5e_rep_priv *uplink_rpriv;
5531         bool forward_tx = false;
5532
5533         /* Tunnel restore takes precedence over int port restore */
5534         if (tunnel_id)
5535                 return mlx5e_tc_restore_tunnel(priv, skb, tc_priv, tunnel_id);
5536
5537         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
5538         uplink_priv = &uplink_rpriv->uplink_priv;
5539
5540         if (mlx5e_tc_int_port_dev_fwd(uplink_priv->int_port_priv, skb,
5541                                       mapped_obj->int_port_metadata, &forward_tx)) {
5542                 /* Set fwd_dev for future dev_put */
5543                 tc_priv->fwd_dev = skb->dev;
5544                 tc_priv->forward_tx = forward_tx;
5545
5546                 return true;
5547         }
5548
5549         return false;
5550 }
5551
5552 bool mlx5e_tc_update_skb(struct mlx5_cqe64 *cqe, struct sk_buff *skb,
5553                          struct mapping_ctx *mapping_ctx, u32 mapped_obj_id,
5554                          struct mlx5_tc_ct_priv *ct_priv,
5555                          u32 zone_restore_id, u32 tunnel_id,
5556                          struct mlx5e_tc_update_priv *tc_priv)
5557 {
5558         struct mlx5e_priv *priv = netdev_priv(skb->dev);
5559         struct mlx5_mapped_obj mapped_obj;
5560         int err;
5561
5562         err = mapping_find(mapping_ctx, mapped_obj_id, &mapped_obj);
5563         if (err) {
5564                 netdev_dbg(skb->dev,
5565                            "Couldn't find mapped object for mapped_obj_id: %d, err: %d\n",
5566                            mapped_obj_id, err);
5567                 return false;
5568         }
5569
5570         switch (mapped_obj.type) {
5571         case MLX5_MAPPED_OBJ_CHAIN:
5572         case MLX5_MAPPED_OBJ_ACT_MISS:
5573                 return mlx5e_tc_restore_skb_tc_meta(skb, ct_priv, &mapped_obj, zone_restore_id,
5574                                                     tunnel_id, tc_priv);
5575         case MLX5_MAPPED_OBJ_SAMPLE:
5576                 mlx5e_tc_restore_skb_sample(priv, skb, &mapped_obj, tc_priv);
5577                 tc_priv->skb_done = true;
5578                 return true;
5579         case MLX5_MAPPED_OBJ_INT_PORT_METADATA:
5580                 return mlx5e_tc_restore_skb_int_port(priv, skb, &mapped_obj, tc_priv, tunnel_id);
5581         default:
5582                 netdev_dbg(priv->netdev, "Invalid mapped object type: %d\n", mapped_obj.type);
5583                 return false;
5584         }
5585
5586         return false;
5587 }
5588
5589 bool mlx5e_tc_update_skb_nic(struct mlx5_cqe64 *cqe, struct sk_buff *skb)
5590 {
5591         struct mlx5e_priv *priv = netdev_priv(skb->dev);
5592         u32 mapped_obj_id, reg_b, zone_restore_id;
5593         struct mlx5_tc_ct_priv *ct_priv;
5594         struct mapping_ctx *mapping_ctx;
5595         struct mlx5e_tc_table *tc;
5596
5597         reg_b = be32_to_cpu(cqe->ft_metadata);
5598         tc = mlx5e_fs_get_tc(priv->fs);
5599         mapped_obj_id = reg_b & MLX5E_TC_TABLE_CHAIN_TAG_MASK;
5600         zone_restore_id = (reg_b >> MLX5_REG_MAPPING_MOFFSET(NIC_ZONE_RESTORE_TO_REG)) &
5601                           ESW_ZONE_ID_MASK;
5602         ct_priv = tc->ct;
5603         mapping_ctx = tc->mapping;
5604
5605         return mlx5e_tc_update_skb(cqe, skb, mapping_ctx, mapped_obj_id, ct_priv, zone_restore_id,
5606                                    0, NULL);
5607 }
5608
5609 static struct mapping_ctx *
5610 mlx5e_get_priv_obj_mapping(struct mlx5e_priv *priv)
5611 {
5612         struct mlx5e_tc_table *tc;
5613         struct mlx5_eswitch *esw;
5614         struct mapping_ctx *ctx;
5615
5616         if (is_mdev_switchdev_mode(priv->mdev)) {
5617                 esw = priv->mdev->priv.eswitch;
5618                 ctx = esw->offloads.reg_c0_obj_pool;
5619         } else {
5620                 tc = mlx5e_fs_get_tc(priv->fs);
5621                 ctx = tc->mapping;
5622         }
5623
5624         return ctx;
5625 }
5626
5627 int mlx5e_tc_action_miss_mapping_get(struct mlx5e_priv *priv, struct mlx5_flow_attr *attr,
5628                                      u64 act_miss_cookie, u32 *act_miss_mapping)
5629 {
5630         struct mlx5_mapped_obj mapped_obj = {};
5631         struct mlx5_eswitch *esw;
5632         struct mapping_ctx *ctx;
5633         int err;
5634
5635         ctx = mlx5e_get_priv_obj_mapping(priv);
5636         mapped_obj.type = MLX5_MAPPED_OBJ_ACT_MISS;
5637         mapped_obj.act_miss_cookie = act_miss_cookie;
5638         err = mapping_add(ctx, &mapped_obj, act_miss_mapping);
5639         if (err)
5640                 return err;
5641
5642         if (!is_mdev_switchdev_mode(priv->mdev))
5643                 return 0;
5644
5645         esw = priv->mdev->priv.eswitch;
5646         attr->act_id_restore_rule = esw_add_restore_rule(esw, *act_miss_mapping);
5647         if (IS_ERR(attr->act_id_restore_rule))
5648                 goto err_rule;
5649
5650         return 0;
5651
5652 err_rule:
5653         mapping_remove(ctx, *act_miss_mapping);
5654         return err;
5655 }
5656
5657 void mlx5e_tc_action_miss_mapping_put(struct mlx5e_priv *priv, struct mlx5_flow_attr *attr,
5658                                       u32 act_miss_mapping)
5659 {
5660         struct mapping_ctx *ctx = mlx5e_get_priv_obj_mapping(priv);
5661
5662         if (is_mdev_switchdev_mode(priv->mdev))
5663                 mlx5_del_flow_rules(attr->act_id_restore_rule);
5664         mapping_remove(ctx, act_miss_mapping);
5665 }