drivers/net/ethernet/mellanox/mlx5/core/en_tc.c

   1 /*
   2  * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <net/flow_dissector.h>
  34 #include <net/sch_generic.h>
  35 #include <net/pkt_cls.h>
  36 #include <net/tc_act/tc_gact.h>
  37 #include <net/tc_act/tc_skbedit.h>
  38 #include <linux/mlx5/fs.h>
  39 #include <linux/mlx5/device.h>
  40 #include <linux/rhashtable.h>
  41 #include <net/tc_act/tc_mirred.h>
  42 #include <net/tc_act/tc_vlan.h>
  43 #include <net/tc_act/tc_tunnel_key.h>
  44 #include <net/tc_act/tc_pedit.h>
  45 #include <net/tc_act/tc_csum.h>
  46 #include <net/arp.h>
  47 #include <net/ipv6_stubs.h>
  48 #include "en.h"
  49 #include "en_rep.h"
  50 #include "en_tc.h"
  51 #include "eswitch.h"
  52 #include "fs_core.h"
  53 #include "en/port.h"
  54 #include "en/tc_tun.h"
  55 #include "lib/devcom.h"
  56
  57 struct mlx5_nic_flow_attr {
  58         u32 action;
  59         u32 flow_tag;
  60         u32 mod_hdr_id;
  61         u32 hairpin_tirn;
  62         u8 match_level;
  63         struct mlx5_flow_table  *hairpin_ft;
  64         struct mlx5_fc          *counter;
  65 };
  66
  67 #define MLX5E_TC_FLOW_BASE (MLX5E_TC_LAST_EXPORTED_BIT + 1)
  68
  69 enum {
  70         MLX5E_TC_FLOW_INGRESS   = MLX5E_TC_INGRESS,
  71         MLX5E_TC_FLOW_EGRESS    = MLX5E_TC_EGRESS,
  72         MLX5E_TC_FLOW_ESWITCH   = MLX5E_TC_ESW_OFFLOAD,
  73         MLX5E_TC_FLOW_NIC       = MLX5E_TC_NIC_OFFLOAD,
  74         MLX5E_TC_FLOW_OFFLOADED = BIT(MLX5E_TC_FLOW_BASE),
  75         MLX5E_TC_FLOW_HAIRPIN   = BIT(MLX5E_TC_FLOW_BASE + 1),
  76         MLX5E_TC_FLOW_HAIRPIN_RSS = BIT(MLX5E_TC_FLOW_BASE + 2),
  77         MLX5E_TC_FLOW_SLOW        = BIT(MLX5E_TC_FLOW_BASE + 3),
  78         MLX5E_TC_FLOW_DUP         = BIT(MLX5E_TC_FLOW_BASE + 4),
  79         MLX5E_TC_FLOW_NOT_READY   = BIT(MLX5E_TC_FLOW_BASE + 5),
  80 };
  81
  82 #define MLX5E_TC_MAX_SPLITS 1
  83
  84 /* Helper struct for accessing a struct containing list_head array.
  85  * Containing struct
  86  *   |- Helper array
  87  *      [0] Helper item 0
  88  *          |- list_head item 0
  89  *          |- index (0)
  90  *      [1] Helper item 1
  91  *          |- list_head item 1
  92  *          |- index (1)
  93  * To access the containing struct from one of the list_head items:
  94  * 1. Get the helper item from the list_head item using
  95  *    helper item =
  96  *        container_of(list_head item, helper struct type, list_head field)
  97  * 2. Get the contining struct from the helper item and its index in the array:
  98  *    containing struct =
  99  *        container_of(helper item, containing struct type, helper field[index])
 100  */
 101 struct encap_flow_item {
 102         struct list_head list;
 103         int index;
 104 };
 105
 106 struct mlx5e_tc_flow {
 107         struct rhash_head       node;
 108         struct mlx5e_priv       *priv;
 109         u64                     cookie;
 110         u16                     flags;
 111         struct mlx5_flow_handle *rule[MLX5E_TC_MAX_SPLITS + 1];
 112         /* Flow can be associated with multiple encap IDs.
 113          * The number of encaps is bounded by the number of supported
 114          * destinations.
 115          */
 116         struct encap_flow_item encaps[MLX5_MAX_FLOW_FWD_VPORTS];
 117         struct mlx5e_tc_flow    *peer_flow;
 118         struct list_head        mod_hdr; /* flows sharing the same mod hdr ID */
 119         struct list_head        hairpin; /* flows sharing the same hairpin */
 120         struct list_head        peer;    /* flows with peer flow */
 121         struct list_head        unready; /* flows not ready to be offloaded (e.g due to missing route) */
 122         union {
 123                 struct mlx5_esw_flow_attr esw_attr[0];
 124                 struct mlx5_nic_flow_attr nic_attr[0];
 125         };
 126 };
 127
 128 struct mlx5e_tc_flow_parse_attr {
 129         struct ip_tunnel_info tun_info[MLX5_MAX_FLOW_FWD_VPORTS];
 130         struct net_device *filter_dev;
 131         struct mlx5_flow_spec spec;
 132         int num_mod_hdr_actions;
 133         int max_mod_hdr_actions;
 134         void *mod_hdr_actions;
 135         int mirred_ifindex[MLX5_MAX_FLOW_FWD_VPORTS];
 136 };
 137
 138 #define MLX5E_TC_TABLE_NUM_GROUPS 4
 139 #define MLX5E_TC_TABLE_MAX_GROUP_SIZE BIT(16)
 140
 141 struct mlx5e_hairpin {
 142         struct mlx5_hairpin *pair;
 143
 144         struct mlx5_core_dev *func_mdev;
 145         struct mlx5e_priv *func_priv;
 146         u32 tdn;
 147         u32 tirn;
 148
 149         int num_channels;
 150         struct mlx5e_rqt indir_rqt;
 151         u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];
 152         struct mlx5e_ttc_table ttc;
 153 };
 154
 155 struct mlx5e_hairpin_entry {
 156         /* a node of a hash table which keeps all the  hairpin entries */
 157         struct hlist_node hairpin_hlist;
 158
 159         /* flows sharing the same hairpin */
 160         struct list_head flows;
 161
 162         u16 peer_vhca_id;
 163         u8 prio;
 164         struct mlx5e_hairpin *hp;
 165 };
 166
 167 struct mod_hdr_key {
 168         int num_actions;
 169         void *actions;
 170 };
 171
 172 struct mlx5e_mod_hdr_entry {
 173         /* a node of a hash table which keeps all the mod_hdr entries */
 174         struct hlist_node mod_hdr_hlist;
 175
 176         /* flows sharing the same mod_hdr entry */
 177         struct list_head flows;
 178
 179         struct mod_hdr_key key;
 180
 181         u32 mod_hdr_id;
 182 };
 183
 184 #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto)
 185
 186 static inline u32 hash_mod_hdr_info(struct mod_hdr_key *key)
 187 {
 188         return jhash(key->actions,
 189                      key->num_actions * MLX5_MH_ACT_SZ, 0);
 190 }
 191
 192 static inline int cmp_mod_hdr_info(struct mod_hdr_key *a,
 193                                    struct mod_hdr_key *b)
 194 {
 195         if (a->num_actions != b->num_actions)
 196                 return 1;
 197
 198         return memcmp(a->actions, b->actions, a->num_actions * MLX5_MH_ACT_SZ);
 199 }
 200
 201 static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv,
 202                                 struct mlx5e_tc_flow *flow,
 203                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
 204 {
 205         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 206         int num_actions, actions_size, namespace, err;
 207         struct mlx5e_mod_hdr_entry *mh;
 208         struct mod_hdr_key key;
 209         bool found = false;
 210         u32 hash_key;
 211
 212         num_actions  = parse_attr->num_mod_hdr_actions;
 213         actions_size = MLX5_MH_ACT_SZ * num_actions;
 214
 215         key.actions = parse_attr->mod_hdr_actions;
 216         key.num_actions = num_actions;
 217
 218         hash_key = hash_mod_hdr_info(&key);
 219
 220         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
 221                 namespace = MLX5_FLOW_NAMESPACE_FDB;
 222                 hash_for_each_possible(esw->offloads.mod_hdr_tbl, mh,
 223                                        mod_hdr_hlist, hash_key) {
 224                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
 225                                 found = true;
 226                                 break;
 227                         }
 228                 }
 229         } else {
 230                 namespace = MLX5_FLOW_NAMESPACE_KERNEL;
 231                 hash_for_each_possible(priv->fs.tc.mod_hdr_tbl, mh,
 232                                        mod_hdr_hlist, hash_key) {
 233                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
 234                                 found = true;
 235                                 break;
 236                         }
 237                 }
 238         }
 239
 240         if (found)
 241                 goto attach_flow;
 242
 243         mh = kzalloc(sizeof(*mh) + actions_size, GFP_KERNEL);
 244         if (!mh)
 245                 return -ENOMEM;
 246
 247         mh->key.actions = (void *)mh + sizeof(*mh);
 248         memcpy(mh->key.actions, key.actions, actions_size);
 249         mh->key.num_actions = num_actions;
 250         INIT_LIST_HEAD(&mh->flows);
 251
 252         err = mlx5_modify_header_alloc(priv->mdev, namespace,
 253                                        mh->key.num_actions,
 254                                        mh->key.actions,
 255                                        &mh->mod_hdr_id);
 256         if (err)
 257                 goto out_err;
 258
 259         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
 260                 hash_add(esw->offloads.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
 261         else
 262                 hash_add(priv->fs.tc.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
 263
 264 attach_flow:
 265         list_add(&flow->mod_hdr, &mh->flows);
 266         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
 267                 flow->esw_attr->mod_hdr_id = mh->mod_hdr_id;
 268         else
 269                 flow->nic_attr->mod_hdr_id = mh->mod_hdr_id;
 270
 271         return 0;
 272
 273 out_err:
 274         kfree(mh);
 275         return err;
 276 }
 277
 278 static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv,
 279                                  struct mlx5e_tc_flow *flow)
 280 {
 281         struct list_head *next = flow->mod_hdr.next;
 282
 283         list_del(&flow->mod_hdr);
 284
 285         if (list_empty(next)) {
 286                 struct mlx5e_mod_hdr_entry *mh;
 287
 288                 mh = list_entry(next, struct mlx5e_mod_hdr_entry, flows);
 289
 290                 mlx5_modify_header_dealloc(priv->mdev, mh->mod_hdr_id);
 291                 hash_del(&mh->mod_hdr_hlist);
 292                 kfree(mh);
 293         }
 294 }
 295
 296 static
 297 struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex)
 298 {
 299         struct net_device *netdev;
 300         struct mlx5e_priv *priv;
 301
 302         netdev = __dev_get_by_index(net, ifindex);
 303         priv = netdev_priv(netdev);
 304         return priv->mdev;
 305 }
 306
 307 static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
 308 {
 309         u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {0};
 310         void *tirc;
 311         int err;
 312
 313         err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn);
 314         if (err)
 315                 goto alloc_tdn_err;
 316
 317         tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 318
 319         MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
 320         MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]);
 321         MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 322
 323         err = mlx5_core_create_tir(hp->func_mdev, in, MLX5_ST_SZ_BYTES(create_tir_in), &hp->tirn);
 324         if (err)
 325                 goto create_tir_err;
 326
 327         return 0;
 328
 329 create_tir_err:
 330         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 331 alloc_tdn_err:
 332         return err;
 333 }
 334
 335 static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp)
 336 {
 337         mlx5_core_destroy_tir(hp->func_mdev, hp->tirn);
 338         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 339 }
 340
 341 static void mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc)
 342 {
 343         u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE], rqn;
 344         struct mlx5e_priv *priv = hp->func_priv;
 345         int i, ix, sz = MLX5E_INDIR_RQT_SIZE;
 346
 347         mlx5e_build_default_indir_rqt(indirection_rqt, sz,
 348                                       hp->num_channels);
 349
 350         for (i = 0; i < sz; i++) {
 351                 ix = i;
 352                 if (priv->rss_params.hfunc == ETH_RSS_HASH_XOR)
 353                         ix = mlx5e_bits_invert(i, ilog2(sz));
 354                 ix = indirection_rqt[ix];
 355                 rqn = hp->pair->rqn[ix];
 356                 MLX5_SET(rqtc, rqtc, rq_num[i], rqn);
 357         }
 358 }
 359
 360 static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)
 361 {
 362         int inlen, err, sz = MLX5E_INDIR_RQT_SIZE;
 363         struct mlx5e_priv *priv = hp->func_priv;
 364         struct mlx5_core_dev *mdev = priv->mdev;
 365         void *rqtc;
 366         u32 *in;
 367
 368         inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
 369         in = kvzalloc(inlen, GFP_KERNEL);
 370         if (!in)
 371                 return -ENOMEM;
 372
 373         rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
 374
 375         MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
 376         MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
 377
 378         mlx5e_hairpin_fill_rqt_rqns(hp, rqtc);
 379
 380         err = mlx5_core_create_rqt(mdev, in, inlen, &hp->indir_rqt.rqtn);
 381         if (!err)
 382                 hp->indir_rqt.enabled = true;
 383
 384         kvfree(in);
 385         return err;
 386 }
 387
 388 static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
 389 {
 390         struct mlx5e_priv *priv = hp->func_priv;
 391         u32 in[MLX5_ST_SZ_DW(create_tir_in)];
 392         int tt, i, err;
 393         void *tirc;
 394
 395         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
 396                 struct mlx5e_tirc_config ttconfig = mlx5e_tirc_get_default_config(tt);
 397
 398                 memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in));
 399                 tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 400
 401                 MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 402                 MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
 403                 MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
 404                 mlx5e_build_indir_tir_ctx_hash(&priv->rss_params, &ttconfig, tirc, false);
 405
 406                 err = mlx5_core_create_tir(hp->func_mdev, in,
 407                                            MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]);
 408                 if (err) {
 409                         mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err);
 410                         goto err_destroy_tirs;
 411                 }
 412         }
 413         return 0;
 414
 415 err_destroy_tirs:
 416         for (i = 0; i < tt; i++)
 417                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[i]);
 418         return err;
 419 }
 420
 421 static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp)
 422 {
 423         int tt;
 424
 425         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 426                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[tt]);
 427 }
 428
 429 static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp,
 430                                          struct ttc_params *ttc_params)
 431 {
 432         struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr;
 433         int tt;
 434
 435         memset(ttc_params, 0, sizeof(*ttc_params));
 436
 437         ttc_params->any_tt_tirn = hp->tirn;
 438
 439         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 440                 ttc_params->indir_tirn[tt] = hp->indir_tirn[tt];
 441
 442         ft_attr->max_fte = MLX5E_NUM_TT;
 443         ft_attr->level = MLX5E_TC_TTC_FT_LEVEL;
 444         ft_attr->prio = MLX5E_TC_PRIO;
 445 }
 446
 447 static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp)
 448 {
 449         struct mlx5e_priv *priv = hp->func_priv;
 450         struct ttc_params ttc_params;
 451         int err;
 452
 453         err = mlx5e_hairpin_create_indirect_rqt(hp);
 454         if (err)
 455                 return err;
 456
 457         err = mlx5e_hairpin_create_indirect_tirs(hp);
 458         if (err)
 459                 goto err_create_indirect_tirs;
 460
 461         mlx5e_hairpin_set_ttc_params(hp, &ttc_params);
 462         err = mlx5e_create_ttc_table(priv, &ttc_params, &hp->ttc);
 463         if (err)
 464                 goto err_create_ttc_table;
 465
 466         netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n",
 467                    hp->num_channels, hp->ttc.ft.t->id);
 468
 469         return 0;
 470
 471 err_create_ttc_table:
 472         mlx5e_hairpin_destroy_indirect_tirs(hp);
 473 err_create_indirect_tirs:
 474         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
 475
 476         return err;
 477 }
 478
 479 static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp)
 480 {
 481         struct mlx5e_priv *priv = hp->func_priv;
 482
 483         mlx5e_destroy_ttc_table(priv, &hp->ttc);
 484         mlx5e_hairpin_destroy_indirect_tirs(hp);
 485         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
 486 }
 487
 488 static struct mlx5e_hairpin *
 489 mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params,
 490                      int peer_ifindex)
 491 {
 492         struct mlx5_core_dev *func_mdev, *peer_mdev;
 493         struct mlx5e_hairpin *hp;
 494         struct mlx5_hairpin *pair;
 495         int err;
 496
 497         hp = kzalloc(sizeof(*hp), GFP_KERNEL);
 498         if (!hp)
 499                 return ERR_PTR(-ENOMEM);
 500
 501         func_mdev = priv->mdev;
 502         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 503
 504         pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params);
 505         if (IS_ERR(pair)) {
 506                 err = PTR_ERR(pair);
 507                 goto create_pair_err;
 508         }
 509         hp->pair = pair;
 510         hp->func_mdev = func_mdev;
 511         hp->func_priv = priv;
 512         hp->num_channels = params->num_channels;
 513
 514         err = mlx5e_hairpin_create_transport(hp);
 515         if (err)
 516                 goto create_transport_err;
 517
 518         if (hp->num_channels > 1) {
 519                 err = mlx5e_hairpin_rss_init(hp);
 520                 if (err)
 521                         goto rss_init_err;
 522         }
 523
 524         return hp;
 525
 526 rss_init_err:
 527         mlx5e_hairpin_destroy_transport(hp);
 528 create_transport_err:
 529         mlx5_core_hairpin_destroy(hp->pair);
 530 create_pair_err:
 531         kfree(hp);
 532         return ERR_PTR(err);
 533 }
 534
 535 static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp)
 536 {
 537         if (hp->num_channels > 1)
 538                 mlx5e_hairpin_rss_cleanup(hp);
 539         mlx5e_hairpin_destroy_transport(hp);
 540         mlx5_core_hairpin_destroy(hp->pair);
 541         kvfree(hp);
 542 }
 543
 544 static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio)
 545 {
 546         return (peer_vhca_id << 16 | prio);
 547 }
 548
 549 static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv,
 550                                                      u16 peer_vhca_id, u8 prio)
 551 {
 552         struct mlx5e_hairpin_entry *hpe;
 553         u32 hash_key = hash_hairpin_info(peer_vhca_id, prio);
 554
 555         hash_for_each_possible(priv->fs.tc.hairpin_tbl, hpe,
 556                                hairpin_hlist, hash_key) {
 557                 if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio)
 558                         return hpe;
 559         }
 560
 561         return NULL;
 562 }
 563
 564 #define UNKNOWN_MATCH_PRIO 8
 565
 566 static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv,
 567                                   struct mlx5_flow_spec *spec, u8 *match_prio,
 568                                   struct netlink_ext_ack *extack)
 569 {
 570         void *headers_c, *headers_v;
 571         u8 prio_val, prio_mask = 0;
 572         bool vlan_present;
 573
 574 #ifdef CONFIG_MLX5_CORE_EN_DCB
 575         if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) {
 576                 NL_SET_ERR_MSG_MOD(extack,
 577                                    "only PCP trust state supported for hairpin");
 578                 return -EOPNOTSUPP;
 579         }
 580 #endif
 581         headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers);
 582         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
 583
 584         vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag);
 585         if (vlan_present) {
 586                 prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
 587                 prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
 588         }
 589
 590         if (!vlan_present || !prio_mask) {
 591                 prio_val = UNKNOWN_MATCH_PRIO;
 592         } else if (prio_mask != 0x7) {
 593                 NL_SET_ERR_MSG_MOD(extack,
 594                                    "masked priority match not supported for hairpin");
 595                 return -EOPNOTSUPP;
 596         }
 597
 598         *match_prio = prio_val;
 599         return 0;
 600 }
 601
 602 static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv,
 603                                   struct mlx5e_tc_flow *flow,
 604                                   struct mlx5e_tc_flow_parse_attr *parse_attr,
 605                                   struct netlink_ext_ack *extack)
 606 {
 607         int peer_ifindex = parse_attr->mirred_ifindex[0];
 608         struct mlx5_hairpin_params params;
 609         struct mlx5_core_dev *peer_mdev;
 610         struct mlx5e_hairpin_entry *hpe;
 611         struct mlx5e_hairpin *hp;
 612         u64 link_speed64;
 613         u32 link_speed;
 614         u8 match_prio;
 615         u16 peer_id;
 616         int err;
 617
 618         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 619         if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) {
 620                 NL_SET_ERR_MSG_MOD(extack, "hairpin is not supported");
 621                 return -EOPNOTSUPP;
 622         }
 623
 624         peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
 625         err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio,
 626                                      extack);
 627         if (err)
 628                 return err;
 629         hpe = mlx5e_hairpin_get(priv, peer_id, match_prio);
 630         if (hpe)
 631                 goto attach_flow;
 632
 633         hpe = kzalloc(sizeof(*hpe), GFP_KERNEL);
 634         if (!hpe)
 635                 return -ENOMEM;
 636
 637         INIT_LIST_HEAD(&hpe->flows);
 638         hpe->peer_vhca_id = peer_id;
 639         hpe->prio = match_prio;
 640
 641         params.log_data_size = 15;
 642         params.log_data_size = min_t(u8, params.log_data_size,
 643                                      MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz));
 644         params.log_data_size = max_t(u8, params.log_data_size,
 645                                      MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz));
 646
 647         params.log_num_packets = params.log_data_size -
 648                                  MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev);
 649         params.log_num_packets = min_t(u8, params.log_num_packets,
 650                                        MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets));
 651
 652         params.q_counter = priv->q_counter;
 653         /* set hairpin pair per each 50Gbs share of the link */
 654         mlx5e_port_max_linkspeed(priv->mdev, &link_speed);
 655         link_speed = max_t(u32, link_speed, 50000);
 656         link_speed64 = link_speed;
 657         do_div(link_speed64, 50000);
 658         params.num_channels = link_speed64;
 659
 660         hp = mlx5e_hairpin_create(priv, &params, peer_ifindex);
 661         if (IS_ERR(hp)) {
 662                 err = PTR_ERR(hp);
 663                 goto create_hairpin_err;
 664         }
 665
 666         netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n",
 667                    hp->tirn, hp->pair->rqn[0],
 668                    dev_name(hp->pair->peer_mdev->device),
 669                    hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets);
 670
 671         hpe->hp = hp;
 672         hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist,
 673                  hash_hairpin_info(peer_id, match_prio));
 674
 675 attach_flow:
 676         if (hpe->hp->num_channels > 1) {
 677                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN_RSS;
 678                 flow->nic_attr->hairpin_ft = hpe->hp->ttc.ft.t;
 679         } else {
 680                 flow->nic_attr->hairpin_tirn = hpe->hp->tirn;
 681         }
 682         list_add(&flow->hairpin, &hpe->flows);
 683
 684         return 0;
 685
 686 create_hairpin_err:
 687         kfree(hpe);
 688         return err;
 689 }
 690
 691 static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv,
 692                                    struct mlx5e_tc_flow *flow)
 693 {
 694         struct list_head *next = flow->hairpin.next;
 695
 696         list_del(&flow->hairpin);
 697
 698         /* no more hairpin flows for us, release the hairpin pair */
 699         if (list_empty(next)) {
 700                 struct mlx5e_hairpin_entry *hpe;
 701
 702                 hpe = list_entry(next, struct mlx5e_hairpin_entry, flows);
 703
 704                 netdev_dbg(priv->netdev, "del hairpin: peer %s\n",
 705                            dev_name(hpe->hp->pair->peer_mdev->device));
 706
 707                 mlx5e_hairpin_destroy(hpe->hp);
 708                 hash_del(&hpe->hairpin_hlist);
 709                 kfree(hpe);
 710         }
 711 }
 712
 713 static int
 714 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
 715                       struct mlx5e_tc_flow_parse_attr *parse_attr,
 716                       struct mlx5e_tc_flow *flow,
 717                       struct netlink_ext_ack *extack)
 718 {
 719         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
 720         struct mlx5_core_dev *dev = priv->mdev;
 721         struct mlx5_flow_destination dest[2] = {};
 722         struct mlx5_flow_act flow_act = {
 723                 .action = attr->action,
 724                 .flow_tag = attr->flow_tag,
 725                 .reformat_id = 0,
 726                 .flags    = FLOW_ACT_HAS_TAG | FLOW_ACT_NO_APPEND,
 727         };
 728         struct mlx5_fc *counter = NULL;
 729         bool table_created = false;
 730         int err, dest_ix = 0;
 731
 732         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) {
 733                 err = mlx5e_hairpin_flow_add(priv, flow, parse_attr, extack);
 734                 if (err) {
 735                         goto err_add_hairpin_flow;
 736                 }
 737                 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN_RSS) {
 738                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 739                         dest[dest_ix].ft = attr->hairpin_ft;
 740                 } else {
 741                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR;
 742                         dest[dest_ix].tir_num = attr->hairpin_tirn;
 743                 }
 744                 dest_ix++;
 745         } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
 746                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 747                 dest[dest_ix].ft = priv->fs.vlan.ft.t;
 748                 dest_ix++;
 749         }
 750
 751         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
 752                 counter = mlx5_fc_create(dev, true);
 753                 if (IS_ERR(counter)) {
 754                         err = PTR_ERR(counter);
 755                         goto err_fc_create;
 756                 }
 757                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
 758                 dest[dest_ix].counter_id = mlx5_fc_id(counter);
 759                 dest_ix++;
 760                 attr->counter = counter;
 761         }
 762
 763         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
 764                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
 765                 flow_act.modify_id = attr->mod_hdr_id;
 766                 kfree(parse_attr->mod_hdr_actions);
 767                 if (err)
 768                         goto err_create_mod_hdr_id;
 769         }
 770
 771         if (IS_ERR_OR_NULL(priv->fs.tc.t)) {
 772                 int tc_grp_size, tc_tbl_size;
 773                 u32 max_flow_counter;
 774
 775                 max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) |
 776                                     MLX5_CAP_GEN(dev, max_flow_counter_15_0);
 777
 778                 tc_grp_size = min_t(int, max_flow_counter, MLX5E_TC_TABLE_MAX_GROUP_SIZE);
 779
 780                 tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS,
 781                                     BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size)));
 782
 783                 priv->fs.tc.t =
 784                         mlx5_create_auto_grouped_flow_table(priv->fs.ns,
 785                                                             MLX5E_TC_PRIO,
 786                                                             tc_tbl_size,
 787                                                             MLX5E_TC_TABLE_NUM_GROUPS,
 788                                                             MLX5E_TC_FT_LEVEL, 0);
 789                 if (IS_ERR(priv->fs.tc.t)) {
 790                         NL_SET_ERR_MSG_MOD(extack,
 791                                            "Failed to create tc offload table\n");
 792                         netdev_err(priv->netdev,
 793                                    "Failed to create tc offload table\n");
 794                         err = PTR_ERR(priv->fs.tc.t);
 795                         goto err_create_ft;
 796                 }
 797
 798                 table_created = true;
 799         }
 800
 801         if (attr->match_level != MLX5_MATCH_NONE)
 802                 parse_attr->spec.match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
 803
 804         flow->rule[0] = mlx5_add_flow_rules(priv->fs.tc.t, &parse_attr->spec,
 805                                             &flow_act, dest, dest_ix);
 806
 807         if (IS_ERR(flow->rule[0])) {
 808                 err = PTR_ERR(flow->rule[0]);
 809                 goto err_add_rule;
 810         }
 811
 812         return 0;
 813
 814 err_add_rule:
 815         if (table_created) {
 816                 mlx5_destroy_flow_table(priv->fs.tc.t);
 817                 priv->fs.tc.t = NULL;
 818         }
 819 err_create_ft:
 820         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 821                 mlx5e_detach_mod_hdr(priv, flow);
 822 err_create_mod_hdr_id:
 823         mlx5_fc_destroy(dev, counter);
 824 err_fc_create:
 825         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
 826                 mlx5e_hairpin_flow_del(priv, flow);
 827 err_add_hairpin_flow:
 828         return err;
 829 }
 830
 831 static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv,
 832                                   struct mlx5e_tc_flow *flow)
 833 {
 834         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
 835         struct mlx5_fc *counter = NULL;
 836
 837         counter = attr->counter;
 838         mlx5_del_flow_rules(flow->rule[0]);
 839         mlx5_fc_destroy(priv->mdev, counter);
 840
 841         if (!mlx5e_tc_num_filters(priv, MLX5E_TC_NIC_OFFLOAD)  && priv->fs.tc.t) {
 842                 mlx5_destroy_flow_table(priv->fs.tc.t);
 843                 priv->fs.tc.t = NULL;
 844         }
 845
 846         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 847                 mlx5e_detach_mod_hdr(priv, flow);
 848
 849         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
 850                 mlx5e_hairpin_flow_del(priv, flow);
 851 }
 852
 853 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
 854                                struct mlx5e_tc_flow *flow, int out_index);
 855
 856 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
 857                               struct mlx5e_tc_flow *flow,
 858                               struct net_device *mirred_dev,
 859                               int out_index,
 860                               struct netlink_ext_ack *extack,
 861                               struct net_device **encap_dev,
 862                               bool *encap_valid);
 863
 864 static struct mlx5_flow_handle *
 865 mlx5e_tc_offload_fdb_rules(struct mlx5_eswitch *esw,
 866                            struct mlx5e_tc_flow *flow,
 867                            struct mlx5_flow_spec *spec,
 868                            struct mlx5_esw_flow_attr *attr)
 869 {
 870         struct mlx5_flow_handle *rule;
 871
 872         rule = mlx5_eswitch_add_offloaded_rule(esw, spec, attr);
 873         if (IS_ERR(rule))
 874                 return rule;
 875
 876         if (attr->split_count) {
 877                 flow->rule[1] = mlx5_eswitch_add_fwd_rule(esw, spec, attr);
 878                 if (IS_ERR(flow->rule[1])) {
 879                         mlx5_eswitch_del_offloaded_rule(esw, rule, attr);
 880                         return flow->rule[1];
 881                 }
 882         }
 883
 884         flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
 885         return rule;
 886 }
 887
 888 static void
 889 mlx5e_tc_unoffload_fdb_rules(struct mlx5_eswitch *esw,
 890                              struct mlx5e_tc_flow *flow,
 891                            struct mlx5_esw_flow_attr *attr)
 892 {
 893         flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
 894
 895         if (attr->split_count)
 896                 mlx5_eswitch_del_fwd_rule(esw, flow->rule[1], attr);
 897
 898         mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], attr);
 899 }
 900
 901 static struct mlx5_flow_handle *
 902 mlx5e_tc_offload_to_slow_path(struct mlx5_eswitch *esw,
 903                               struct mlx5e_tc_flow *flow,
 904                               struct mlx5_flow_spec *spec,
 905                               struct mlx5_esw_flow_attr *slow_attr)
 906 {
 907         struct mlx5_flow_handle *rule;
 908
 909         memcpy(slow_attr, flow->esw_attr, sizeof(*slow_attr));
 910         slow_attr->action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
 911         slow_attr->split_count = 0;
 912         slow_attr->dest_chain = FDB_SLOW_PATH_CHAIN;
 913
 914         rule = mlx5e_tc_offload_fdb_rules(esw, flow, spec, slow_attr);
 915         if (!IS_ERR(rule))
 916                 flow->flags |= MLX5E_TC_FLOW_SLOW;
 917
 918         return rule;
 919 }
 920
 921 static void
 922 mlx5e_tc_unoffload_from_slow_path(struct mlx5_eswitch *esw,
 923                                   struct mlx5e_tc_flow *flow,
 924                                   struct mlx5_esw_flow_attr *slow_attr)
 925 {
 926         memcpy(slow_attr, flow->esw_attr, sizeof(*slow_attr));
 927         slow_attr->action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
 928         slow_attr->split_count = 0;
 929         slow_attr->dest_chain = FDB_SLOW_PATH_CHAIN;
 930         mlx5e_tc_unoffload_fdb_rules(esw, flow, slow_attr);
 931         flow->flags &= ~MLX5E_TC_FLOW_SLOW;
 932 }
 933
 934 static void add_unready_flow(struct mlx5e_tc_flow *flow)
 935 {
 936         struct mlx5_rep_uplink_priv *uplink_priv;
 937         struct mlx5e_rep_priv *rpriv;
 938         struct mlx5_eswitch *esw;
 939
 940         esw = flow->priv->mdev->priv.eswitch;
 941         rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
 942         uplink_priv = &rpriv->uplink_priv;
 943
 944         flow->flags |= MLX5E_TC_FLOW_NOT_READY;
 945         list_add_tail(&flow->unready, &uplink_priv->unready_flows);
 946 }
 947
 948 static void remove_unready_flow(struct mlx5e_tc_flow *flow)
 949 {
 950         list_del(&flow->unready);
 951         flow->flags &= ~MLX5E_TC_FLOW_NOT_READY;
 952 }
 953
 954 static int
 955 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
 956                       struct mlx5e_tc_flow *flow,
 957                       struct netlink_ext_ack *extack)
 958 {
 959         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 960         u32 max_chain = mlx5_eswitch_get_chain_range(esw);
 961         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
 962         struct mlx5e_tc_flow_parse_attr *parse_attr = attr->parse_attr;
 963         u16 max_prio = mlx5_eswitch_get_prio_range(esw);
 964         struct net_device *out_dev, *encap_dev = NULL;
 965         struct mlx5_fc *counter = NULL;
 966         struct mlx5e_rep_priv *rpriv;
 967         struct mlx5e_priv *out_priv;
 968         bool encap_valid = true;
 969         int err = 0;
 970         int out_index;
 971
 972         if (!mlx5_eswitch_prios_supported(esw) && attr->prio != 1) {
 973                 NL_SET_ERR_MSG(extack, "E-switch priorities unsupported, upgrade FW");
 974                 return -EOPNOTSUPP;
 975         }
 976
 977         if (attr->chain > max_chain) {
 978                 NL_SET_ERR_MSG(extack, "Requested chain is out of supported range");
 979                 err = -EOPNOTSUPP;
 980                 goto err_max_prio_chain;
 981         }
 982
 983         if (attr->prio > max_prio) {
 984                 NL_SET_ERR_MSG(extack, "Requested priority is out of supported range");
 985                 err = -EOPNOTSUPP;
 986                 goto err_max_prio_chain;
 987         }
 988
 989         for (out_index = 0; out_index < MLX5_MAX_FLOW_FWD_VPORTS; out_index++) {
 990                 int mirred_ifindex;
 991
 992                 if (!(attr->dests[out_index].flags & MLX5_ESW_DEST_ENCAP))
 993                         continue;
 994
 995                 mirred_ifindex = parse_attr->mirred_ifindex[out_index];
 996                 out_dev = __dev_get_by_index(dev_net(priv->netdev),
 997                                              mirred_ifindex);
 998                 err = mlx5e_attach_encap(priv, flow, out_dev, out_index,
 999                                          extack, &encap_dev, &encap_valid);
1000                 if (err)
1001                         goto err_attach_encap;
1002
1003                 out_priv = netdev_priv(encap_dev);
1004                 rpriv = out_priv->ppriv;
1005                 attr->dests[out_index].rep = rpriv->rep;
1006                 attr->dests[out_index].mdev = out_priv->mdev;
1007         }
1008
1009         err = mlx5_eswitch_add_vlan_action(esw, attr);
1010         if (err)
1011                 goto err_add_vlan;
1012
1013         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
1014                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
1015                 kfree(parse_attr->mod_hdr_actions);
1016                 if (err)
1017                         goto err_mod_hdr;
1018         }
1019
1020         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
1021                 counter = mlx5_fc_create(attr->counter_dev, true);
1022                 if (IS_ERR(counter)) {
1023                         err = PTR_ERR(counter);
1024                         goto err_create_counter;
1025                 }
1026
1027                 attr->counter = counter;
1028         }
1029
1030         /* we get here if one of the following takes place:
1031          * (1) there's no error
1032          * (2) there's an encap action and we don't have valid neigh
1033          */
1034         if (!encap_valid) {
1035                 /* continue with goto slow path rule instead */
1036                 struct mlx5_esw_flow_attr slow_attr;
1037
1038                 flow->rule[0] = mlx5e_tc_offload_to_slow_path(esw, flow, &parse_attr->spec, &slow_attr);
1039         } else {
1040                 flow->rule[0] = mlx5e_tc_offload_fdb_rules(esw, flow, &parse_attr->spec, attr);
1041         }
1042
1043         if (IS_ERR(flow->rule[0])) {
1044                 err = PTR_ERR(flow->rule[0]);
1045                 goto err_add_rule;
1046         }
1047
1048         return 0;
1049
1050 err_add_rule:
1051         mlx5_fc_destroy(attr->counter_dev, counter);
1052 err_create_counter:
1053         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
1054                 mlx5e_detach_mod_hdr(priv, flow);
1055 err_mod_hdr:
1056         mlx5_eswitch_del_vlan_action(esw, attr);
1057 err_add_vlan:
1058         for (out_index = 0; out_index < MLX5_MAX_FLOW_FWD_VPORTS; out_index++)
1059                 if (attr->dests[out_index].flags & MLX5_ESW_DEST_ENCAP)
1060                         mlx5e_detach_encap(priv, flow, out_index);
1061 err_attach_encap:
1062 err_max_prio_chain:
1063         return err;
1064 }
1065
1066 static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
1067                                   struct mlx5e_tc_flow *flow)
1068 {
1069         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1070         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
1071         struct mlx5_esw_flow_attr slow_attr;
1072         int out_index;
1073
1074         if (flow->flags & MLX5E_TC_FLOW_NOT_READY) {
1075                 remove_unready_flow(flow);
1076                 kvfree(attr->parse_attr);
1077                 return;
1078         }
1079
1080         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
1081                 if (flow->flags & MLX5E_TC_FLOW_SLOW)
1082                         mlx5e_tc_unoffload_from_slow_path(esw, flow, &slow_attr);
1083                 else
1084                         mlx5e_tc_unoffload_fdb_rules(esw, flow, attr);
1085         }
1086
1087         mlx5_eswitch_del_vlan_action(esw, attr);
1088
1089         for (out_index = 0; out_index < MLX5_MAX_FLOW_FWD_VPORTS; out_index++)
1090                 if (attr->dests[out_index].flags & MLX5_ESW_DEST_ENCAP)
1091                         mlx5e_detach_encap(priv, flow, out_index);
1092         kvfree(attr->parse_attr);
1093
1094         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
1095                 mlx5e_detach_mod_hdr(priv, flow);
1096
1097         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT)
1098                 mlx5_fc_destroy(attr->counter_dev, attr->counter);
1099 }
1100
1101 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
1102                               struct mlx5e_encap_entry *e)
1103 {
1104         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1105         struct mlx5_esw_flow_attr slow_attr, *esw_attr;
1106         struct mlx5_flow_handle *rule;
1107         struct mlx5_flow_spec *spec;
1108         struct encap_flow_item *efi;
1109         struct mlx5e_tc_flow *flow;
1110         int err;
1111
1112         err = mlx5_packet_reformat_alloc(priv->mdev,
1113                                          e->reformat_type,
1114                                          e->encap_size, e->encap_header,
1115                                          MLX5_FLOW_NAMESPACE_FDB,
1116                                          &e->encap_id);
1117         if (err) {
1118                 mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %d\n",
1119                                err);
1120                 return;
1121         }
1122         e->flags |= MLX5_ENCAP_ENTRY_VALID;
1123         mlx5e_rep_queue_neigh_stats_work(priv);
1124
1125         list_for_each_entry(efi, &e->flows, list) {
1126                 bool all_flow_encaps_valid = true;
1127                 int i;
1128
1129                 flow = container_of(efi, struct mlx5e_tc_flow, encaps[efi->index]);
1130                 esw_attr = flow->esw_attr;
1131                 spec = &esw_attr->parse_attr->spec;
1132
1133                 esw_attr->dests[efi->index].encap_id = e->encap_id;
1134                 esw_attr->dests[efi->index].flags |= MLX5_ESW_DEST_ENCAP_VALID;
1135                 /* Flow can be associated with multiple encap entries.
1136                  * Before offloading the flow verify that all of them have
1137                  * a valid neighbour.
1138                  */
1139                 for (i = 0; i < MLX5_MAX_FLOW_FWD_VPORTS; i++) {
1140                         if (!(esw_attr->dests[i].flags & MLX5_ESW_DEST_ENCAP))
1141                                 continue;
1142                         if (!(esw_attr->dests[i].flags & MLX5_ESW_DEST_ENCAP_VALID)) {
1143                                 all_flow_encaps_valid = false;
1144                                 break;
1145                         }
1146                 }
1147                 /* Do not offload flows with unresolved neighbors */
1148                 if (!all_flow_encaps_valid)
1149                         continue;
1150                 /* update from slow path rule to encap rule */
1151                 rule = mlx5e_tc_offload_fdb_rules(esw, flow, spec, esw_attr);
1152                 if (IS_ERR(rule)) {
1153                         err = PTR_ERR(rule);
1154                         mlx5_core_warn(priv->mdev, "Failed to update cached encapsulation flow, %d\n",
1155                                        err);
1156                         continue;
1157                 }
1158
1159                 mlx5e_tc_unoffload_from_slow_path(esw, flow, &slow_attr);
1160                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED; /* was unset when slow path rule removed */
1161                 flow->rule[0] = rule;
1162         }
1163 }
1164
1165 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
1166                               struct mlx5e_encap_entry *e)
1167 {
1168         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1169         struct mlx5_esw_flow_attr slow_attr;
1170         struct mlx5_flow_handle *rule;
1171         struct mlx5_flow_spec *spec;
1172         struct encap_flow_item *efi;
1173         struct mlx5e_tc_flow *flow;
1174         int err;
1175
1176         list_for_each_entry(efi, &e->flows, list) {
1177                 flow = container_of(efi, struct mlx5e_tc_flow, encaps[efi->index]);
1178                 spec = &flow->esw_attr->parse_attr->spec;
1179
1180                 /* update from encap rule to slow path rule */
1181                 rule = mlx5e_tc_offload_to_slow_path(esw, flow, spec, &slow_attr);
1182                 /* mark the flow's encap dest as non-valid */
1183                 flow->esw_attr->dests[efi->index].flags &= ~MLX5_ESW_DEST_ENCAP_VALID;
1184
1185                 if (IS_ERR(rule)) {
1186                         err = PTR_ERR(rule);
1187                         mlx5_core_warn(priv->mdev, "Failed to update slow path (encap) flow, %d\n",
1188                                        err);
1189                         continue;
1190                 }
1191
1192                 mlx5e_tc_unoffload_fdb_rules(esw, flow, flow->esw_attr);
1193                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED; /* was unset when fast path rule removed */
1194                 flow->rule[0] = rule;
1195         }
1196
1197         /* we know that the encap is valid */
1198         e->flags &= ~MLX5_ENCAP_ENTRY_VALID;
1199         mlx5_packet_reformat_dealloc(priv->mdev, e->encap_id);
1200 }
1201
1202 static struct mlx5_fc *mlx5e_tc_get_counter(struct mlx5e_tc_flow *flow)
1203 {
1204         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1205                 return flow->esw_attr->counter;
1206         else
1207                 return flow->nic_attr->counter;
1208 }
1209
1210 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe)
1211 {
1212         struct mlx5e_neigh *m_neigh = &nhe->m_neigh;
1213         u64 bytes, packets, lastuse = 0;
1214         struct mlx5e_tc_flow *flow;
1215         struct mlx5e_encap_entry *e;
1216         struct mlx5_fc *counter;
1217         struct neigh_table *tbl;
1218         bool neigh_used = false;
1219         struct neighbour *n;
1220
1221         if (m_neigh->family == AF_INET)
1222                 tbl = &arp_tbl;
1223 #if IS_ENABLED(CONFIG_IPV6)
1224         else if (m_neigh->family == AF_INET6)
1225                 tbl = &nd_tbl;
1226 #endif
1227         else
1228                 return;
1229
1230         list_for_each_entry(e, &nhe->encap_list, encap_list) {
1231                 struct encap_flow_item *efi;
1232                 if (!(e->flags & MLX5_ENCAP_ENTRY_VALID))
1233                         continue;
1234                 list_for_each_entry(efi, &e->flows, list) {
1235                         flow = container_of(efi, struct mlx5e_tc_flow,
1236                                             encaps[efi->index]);
1237                         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
1238                                 counter = mlx5e_tc_get_counter(flow);
1239                                 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
1240                                 if (time_after((unsigned long)lastuse, nhe->reported_lastuse)) {
1241                                         neigh_used = true;
1242                                         break;
1243                                 }
1244                         }
1245                 }
1246                 if (neigh_used)
1247                         break;
1248         }
1249
1250         if (neigh_used) {
1251                 nhe->reported_lastuse = jiffies;
1252
1253                 /* find the relevant neigh according to the cached device and
1254                  * dst ip pair
1255                  */
1256                 n = neigh_lookup(tbl, &m_neigh->dst_ip, m_neigh->dev);
1257                 if (!n)
1258                         return;
1259
1260                 neigh_event_send(n, NULL);
1261                 neigh_release(n);
1262         }
1263 }
1264
1265 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
1266                                struct mlx5e_tc_flow *flow, int out_index)
1267 {
1268         struct list_head *next = flow->encaps[out_index].list.next;
1269
1270         list_del(&flow->encaps[out_index].list);
1271         if (list_empty(next)) {
1272                 struct mlx5e_encap_entry *e;
1273
1274                 e = list_entry(next, struct mlx5e_encap_entry, flows);
1275                 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
1276
1277                 if (e->flags & MLX5_ENCAP_ENTRY_VALID)
1278                         mlx5_packet_reformat_dealloc(priv->mdev, e->encap_id);
1279
1280                 hash_del_rcu(&e->encap_hlist);
1281                 kfree(e->encap_header);
1282                 kfree(e);
1283         }
1284 }
1285
1286 static void __mlx5e_tc_del_fdb_peer_flow(struct mlx5e_tc_flow *flow)
1287 {
1288         struct mlx5_eswitch *esw = flow->priv->mdev->priv.eswitch;
1289
1290         if (!(flow->flags & MLX5E_TC_FLOW_ESWITCH) ||
1291             !(flow->flags & MLX5E_TC_FLOW_DUP))
1292                 return;
1293
1294         mutex_lock(&esw->offloads.peer_mutex);
1295         list_del(&flow->peer);
1296         mutex_unlock(&esw->offloads.peer_mutex);
1297
1298         flow->flags &= ~MLX5E_TC_FLOW_DUP;
1299
1300         mlx5e_tc_del_fdb_flow(flow->peer_flow->priv, flow->peer_flow);
1301         kvfree(flow->peer_flow);
1302         flow->peer_flow = NULL;
1303 }
1304
1305 static void mlx5e_tc_del_fdb_peer_flow(struct mlx5e_tc_flow *flow)
1306 {
1307         struct mlx5_core_dev *dev = flow->priv->mdev;
1308         struct mlx5_devcom *devcom = dev->priv.devcom;
1309         struct mlx5_eswitch *peer_esw;
1310
1311         peer_esw = mlx5_devcom_get_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
1312         if (!peer_esw)
1313                 return;
1314
1315         __mlx5e_tc_del_fdb_peer_flow(flow);
1316         mlx5_devcom_release_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
1317 }
1318
1319 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
1320                               struct mlx5e_tc_flow *flow)
1321 {
1322         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
1323                 mlx5e_tc_del_fdb_peer_flow(flow);
1324                 mlx5e_tc_del_fdb_flow(priv, flow);
1325         } else {
1326                 mlx5e_tc_del_nic_flow(priv, flow);
1327         }
1328 }
1329
1330
1331 static int parse_tunnel_attr(struct mlx5e_priv *priv,
1332                              struct mlx5_flow_spec *spec,
1333                              struct tc_cls_flower_offload *f,
1334                              struct net_device *filter_dev, u8 *match_level)
1335 {
1336         struct netlink_ext_ack *extack = f->common.extack;
1337         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1338                                        outer_headers);
1339         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1340                                        outer_headers);
1341         struct flow_rule *rule = tc_cls_flower_offload_flow_rule(f);
1342         struct flow_match_control enc_control;
1343         int err;
1344
1345         err = mlx5e_tc_tun_parse(filter_dev, priv, spec, f,
1346                                  headers_c, headers_v, match_level);
1347         if (err) {
1348                 NL_SET_ERR_MSG_MOD(extack,
1349                                    "failed to parse tunnel attributes");
1350                 return err;
1351         }
1352
1353         flow_rule_match_enc_control(rule, &enc_control);
1354
1355         if (enc_control.key->addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1356                 struct flow_match_ipv4_addrs match;
1357
1358                 flow_rule_match_enc_ipv4_addrs(rule, &match);
1359                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1360                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1361                          ntohl(match.mask->src));
1362                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1363                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1364                          ntohl(match.key->src));
1365
1366                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1367                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1368                          ntohl(match.mask->dst));
1369                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1370                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1371                          ntohl(match.key->dst));
1372
1373                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1374                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP);
1375         } else if (enc_control.key->addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1376                 struct flow_match_ipv6_addrs match;
1377
1378                 flow_rule_match_enc_ipv6_addrs(rule, &match);
1379                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1380                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1381                        &match.mask->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1382                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1383                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1384                        &match.key->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1385
1386                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1387                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1388                        &match.mask->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1389                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1390                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1391                        &match.key->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1392
1393                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1394                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IPV6);
1395         }
1396
1397         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_IP)) {
1398                 struct flow_match_ip match;
1399
1400                 flow_rule_match_enc_ip(rule, &match);
1401                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn,
1402                          match.mask->tos & 0x3);
1403                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn,
1404                          match.key->tos & 0x3);
1405
1406                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp,
1407                          match.mask->tos >> 2);
1408                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp,
1409                          match.key->tos  >> 2);
1410
1411                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit,
1412                          match.mask->ttl);
1413                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit,
1414                          match.key->ttl);
1415
1416                 if (match.mask->ttl &&
1417                     !MLX5_CAP_ESW_FLOWTABLE_FDB
1418                         (priv->mdev,
1419                          ft_field_support.outer_ipv4_ttl)) {
1420                         NL_SET_ERR_MSG_MOD(extack,
1421                                            "Matching on TTL is not supported");
1422                         return -EOPNOTSUPP;
1423                 }
1424
1425         }
1426
1427         /* Enforce DMAC when offloading incoming tunneled flows.
1428          * Flow counters require a match on the DMAC.
1429          */
1430         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_47_16);
1431         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_15_0);
1432         ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1433                                      dmac_47_16), priv->netdev->dev_addr);
1434
1435         /* let software handle IP fragments */
1436         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1437         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
1438
1439         return 0;
1440 }
1441
1442 static void *get_match_headers_criteria(u32 flags,
1443                                         struct mlx5_flow_spec *spec)
1444 {
1445         return (flags & MLX5_FLOW_CONTEXT_ACTION_DECAP) ?
1446                 MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1447                              inner_headers) :
1448                 MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1449                              outer_headers);
1450 }
1451
1452 static void *get_match_headers_value(u32 flags,
1453                                      struct mlx5_flow_spec *spec)
1454 {
1455         return (flags & MLX5_FLOW_CONTEXT_ACTION_DECAP) ?
1456                 MLX5_ADDR_OF(fte_match_param, spec->match_value,
1457                              inner_headers) :
1458                 MLX5_ADDR_OF(fte_match_param, spec->match_value,
1459                              outer_headers);
1460 }
1461
1462 static int __parse_cls_flower(struct mlx5e_priv *priv,
1463                               struct mlx5_flow_spec *spec,
1464                               struct tc_cls_flower_offload *f,
1465                               struct net_device *filter_dev,
1466                               u8 *match_level, u8 *tunnel_match_level)
1467 {
1468         struct netlink_ext_ack *extack = f->common.extack;
1469         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1470                                        outer_headers);
1471         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1472                                        outer_headers);
1473         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1474                                     misc_parameters);
1475         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1476                                     misc_parameters);
1477         struct flow_rule *rule = tc_cls_flower_offload_flow_rule(f);
1478         struct flow_dissector *dissector = rule->match.dissector;
1479         u16 addr_type = 0;
1480         u8 ip_proto = 0;
1481
1482         *match_level = MLX5_MATCH_NONE;
1483
1484         if (dissector->used_keys &
1485             ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
1486               BIT(FLOW_DISSECTOR_KEY_BASIC) |
1487               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
1488               BIT(FLOW_DISSECTOR_KEY_VLAN) |
1489               BIT(FLOW_DISSECTOR_KEY_CVLAN) |
1490               BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
1491               BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
1492               BIT(FLOW_DISSECTOR_KEY_PORTS) |
1493               BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
1494               BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
1495               BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
1496               BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) |
1497               BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) |
1498               BIT(FLOW_DISSECTOR_KEY_TCP) |
1499               BIT(FLOW_DISSECTOR_KEY_IP)  |
1500               BIT(FLOW_DISSECTOR_KEY_ENC_IP))) {
1501                 NL_SET_ERR_MSG_MOD(extack, "Unsupported key");
1502                 netdev_warn(priv->netdev, "Unsupported key used: 0x%x\n",
1503                             dissector->used_keys);
1504                 return -EOPNOTSUPP;
1505         }
1506
1507         if ((flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) ||
1508              flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_KEYID) ||
1509              flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_PORTS)) &&
1510             flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_CONTROL)) {
1511                 struct flow_match_control match;
1512
1513                 flow_rule_match_enc_control(rule, &match);
1514                 switch (match.key->addr_type) {
1515                 case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
1516                 case FLOW_DISSECTOR_KEY_IPV6_ADDRS:
1517                         if (parse_tunnel_attr(priv, spec, f, filter_dev, tunnel_match_level))
1518                                 return -EOPNOTSUPP;
1519                         break;
1520                 default:
1521                         return -EOPNOTSUPP;
1522                 }
1523
1524                 /* In decap flow, header pointers should point to the inner
1525                  * headers, outer header were already set by parse_tunnel_attr
1526                  */
1527                 headers_c = get_match_headers_criteria(MLX5_FLOW_CONTEXT_ACTION_DECAP,
1528                                                        spec);
1529                 headers_v = get_match_headers_value(MLX5_FLOW_CONTEXT_ACTION_DECAP,
1530                                                     spec);
1531         }
1532
1533         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
1534                 struct flow_match_basic match;
1535
1536                 flow_rule_match_basic(rule, &match);
1537                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
1538                          ntohs(match.mask->n_proto));
1539                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
1540                          ntohs(match.key->n_proto));
1541
1542                 if (match.mask->n_proto)
1543                         *match_level = MLX5_MATCH_L2;
1544         }
1545         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN) ||
1546             is_vlan_dev(filter_dev)) {
1547                 struct flow_dissector_key_vlan filter_dev_mask;
1548                 struct flow_dissector_key_vlan filter_dev_key;
1549                 struct flow_match_vlan match;
1550
1551                 if (is_vlan_dev(filter_dev)) {
1552                         match.key = &filter_dev_key;
1553                         match.key->vlan_id = vlan_dev_vlan_id(filter_dev);
1554                         match.key->vlan_tpid = vlan_dev_vlan_proto(filter_dev);
1555                         match.key->vlan_priority = 0;
1556                         match.mask = &filter_dev_mask;
1557                         memset(match.mask, 0xff, sizeof(*match.mask));
1558                         match.mask->vlan_priority = 0;
1559                 } else {
1560                         flow_rule_match_vlan(rule, &match);
1561                 }
1562                 if (match.mask->vlan_id ||
1563                     match.mask->vlan_priority ||
1564                     match.mask->vlan_tpid) {
1565                         if (match.key->vlan_tpid == htons(ETH_P_8021AD)) {
1566                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1567                                          svlan_tag, 1);
1568                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1569                                          svlan_tag, 1);
1570                         } else {
1571                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1572                                          cvlan_tag, 1);
1573                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1574                                          cvlan_tag, 1);
1575                         }
1576
1577                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid,
1578                                  match.mask->vlan_id);
1579                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid,
1580                                  match.key->vlan_id);
1581
1582                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio,
1583                                  match.mask->vlan_priority);
1584                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio,
1585                                  match.key->vlan_priority);
1586
1587                         *match_level = MLX5_MATCH_L2;
1588                 }
1589         } else if (*match_level != MLX5_MATCH_NONE) {
1590                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, svlan_tag, 1);
1591                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, cvlan_tag, 1);
1592                 *match_level = MLX5_MATCH_L2;
1593         }
1594
1595         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CVLAN)) {
1596                 struct flow_match_vlan match;
1597
1598                 flow_rule_match_vlan(rule, &match);
1599                 if (match.mask->vlan_id ||
1600                     match.mask->vlan_priority ||
1601                     match.mask->vlan_tpid) {
1602                         if (match.key->vlan_tpid == htons(ETH_P_8021AD)) {
1603                                 MLX5_SET(fte_match_set_misc, misc_c,
1604                                          outer_second_svlan_tag, 1);
1605                                 MLX5_SET(fte_match_set_misc, misc_v,
1606                                          outer_second_svlan_tag, 1);
1607                         } else {
1608                                 MLX5_SET(fte_match_set_misc, misc_c,
1609                                          outer_second_cvlan_tag, 1);
1610                                 MLX5_SET(fte_match_set_misc, misc_v,
1611                                          outer_second_cvlan_tag, 1);
1612                         }
1613
1614                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_vid,
1615                                  match.mask->vlan_id);
1616                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_vid,
1617                                  match.key->vlan_id);
1618                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_prio,
1619                                  match.mask->vlan_priority);
1620                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_prio,
1621                                  match.key->vlan_priority);
1622
1623                         *match_level = MLX5_MATCH_L2;
1624                 }
1625         }
1626
1627         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
1628                 struct flow_match_eth_addrs match;
1629
1630                 flow_rule_match_eth_addrs(rule, &match);
1631                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1632                                              dmac_47_16),
1633                                 match.mask->dst);
1634                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1635                                              dmac_47_16),
1636                                 match.key->dst);
1637
1638                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1639                                              smac_47_16),
1640                                 match.mask->src);
1641                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1642                                              smac_47_16),
1643                                 match.key->src);
1644
1645                 if (!is_zero_ether_addr(match.mask->src) ||
1646                     !is_zero_ether_addr(match.mask->dst))
1647                         *match_level = MLX5_MATCH_L2;
1648         }
1649
1650         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {
1651                 struct flow_match_control match;
1652
1653                 flow_rule_match_control(rule, &match);
1654                 addr_type = match.key->addr_type;
1655
1656                 /* the HW doesn't support frag first/later */
1657                 if (match.mask->flags & FLOW_DIS_FIRST_FRAG)
1658                         return -EOPNOTSUPP;
1659
1660                 if (match.mask->flags & FLOW_DIS_IS_FRAGMENT) {
1661                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1662                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
1663                                  match.key->flags & FLOW_DIS_IS_FRAGMENT);
1664
1665                         /* the HW doesn't need L3 inline to match on frag=no */
1666                         if (!(match.key->flags & FLOW_DIS_IS_FRAGMENT))
1667                                 *match_level = MLX5_MATCH_L2;
1668         /* ***  L2 attributes parsing up to here *** */
1669                         else
1670                                 *match_level = MLX5_MATCH_L3;
1671                 }
1672         }
1673
1674         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
1675                 struct flow_match_basic match;
1676
1677                 flow_rule_match_basic(rule, &match);
1678                 ip_proto = match.key->ip_proto;
1679
1680                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
1681                          match.mask->ip_proto);
1682                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
1683                          match.key->ip_proto);
1684
1685                 if (match.mask->ip_proto)
1686                         *match_level = MLX5_MATCH_L3;
1687         }
1688
1689         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1690                 struct flow_match_ipv4_addrs match;
1691
1692                 flow_rule_match_ipv4_addrs(rule, &match);
1693                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1694                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1695                        &match.mask->src, sizeof(match.mask->src));
1696                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1697                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1698                        &match.key->src, sizeof(match.key->src));
1699                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1700                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1701                        &match.mask->dst, sizeof(match.mask->dst));
1702                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1703                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1704                        &match.key->dst, sizeof(match.key->dst));
1705
1706                 if (match.mask->src || match.mask->dst)
1707                         *match_level = MLX5_MATCH_L3;
1708         }
1709
1710         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1711                 struct flow_match_ipv6_addrs match;
1712
1713                 flow_rule_match_ipv6_addrs(rule, &match);
1714                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1715                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1716                        &match.mask->src, sizeof(match.mask->src));
1717                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1718                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1719                        &match.key->src, sizeof(match.key->src));
1720
1721                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1722                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1723                        &match.mask->dst, sizeof(match.mask->dst));
1724                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1725                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1726                        &match.key->dst, sizeof(match.key->dst));
1727
1728                 if (ipv6_addr_type(&match.mask->src) != IPV6_ADDR_ANY ||
1729                     ipv6_addr_type(&match.mask->dst) != IPV6_ADDR_ANY)
1730                         *match_level = MLX5_MATCH_L3;
1731         }
1732
1733         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_IP)) {
1734                 struct flow_match_ip match;
1735
1736                 flow_rule_match_ip(rule, &match);
1737                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn,
1738                          match.mask->tos & 0x3);
1739                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn,
1740                          match.key->tos & 0x3);
1741
1742                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp,
1743                          match.mask->tos >> 2);
1744                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp,
1745                          match.key->tos  >> 2);
1746
1747                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit,
1748                          match.mask->ttl);
1749                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit,
1750                          match.key->ttl);
1751
1752                 if (match.mask->ttl &&
1753                     !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
1754                                                 ft_field_support.outer_ipv4_ttl)) {
1755                         NL_SET_ERR_MSG_MOD(extack,
1756                                            "Matching on TTL is not supported");
1757                         return -EOPNOTSUPP;
1758                 }
1759
1760                 if (match.mask->tos || match.mask->ttl)
1761                         *match_level = MLX5_MATCH_L3;
1762         }
1763
1764         /* ***  L3 attributes parsing up to here *** */
1765
1766         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
1767                 struct flow_match_ports match;
1768
1769                 flow_rule_match_ports(rule, &match);
1770                 switch (ip_proto) {
1771                 case IPPROTO_TCP:
1772                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1773                                  tcp_sport, ntohs(match.mask->src));
1774                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1775                                  tcp_sport, ntohs(match.key->src));
1776
1777                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1778                                  tcp_dport, ntohs(match.mask->dst));
1779                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1780                                  tcp_dport, ntohs(match.key->dst));
1781                         break;
1782
1783                 case IPPROTO_UDP:
1784                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1785                                  udp_sport, ntohs(match.mask->src));
1786                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1787                                  udp_sport, ntohs(match.key->src));
1788
1789                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1790                                  udp_dport, ntohs(match.mask->dst));
1791                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1792                                  udp_dport, ntohs(match.key->dst));
1793                         break;
1794                 default:
1795                         NL_SET_ERR_MSG_MOD(extack,
1796                                            "Only UDP and TCP transports are supported for L4 matching");
1797                         netdev_err(priv->netdev,
1798                                    "Only UDP and TCP transport are supported\n");
1799                         return -EINVAL;
1800                 }
1801
1802                 if (match.mask->src || match.mask->dst)
1803                         *match_level = MLX5_MATCH_L4;
1804         }
1805
1806         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_TCP)) {
1807                 struct flow_match_tcp match;
1808
1809                 flow_rule_match_tcp(rule, &match);
1810                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags,
1811                          ntohs(match.mask->flags));
1812                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
1813                          ntohs(match.key->flags));
1814
1815                 if (match.mask->flags)
1816                         *match_level = MLX5_MATCH_L4;
1817         }
1818
1819         return 0;
1820 }
1821
1822 static int parse_cls_flower(struct mlx5e_priv *priv,
1823                             struct mlx5e_tc_flow *flow,
1824                             struct mlx5_flow_spec *spec,
1825                             struct tc_cls_flower_offload *f,
1826                             struct net_device *filter_dev)
1827 {
1828         struct netlink_ext_ack *extack = f->common.extack;
1829         struct mlx5_core_dev *dev = priv->mdev;
1830         struct mlx5_eswitch *esw = dev->priv.eswitch;
1831         struct mlx5e_rep_priv *rpriv = priv->ppriv;
1832         u8 match_level, tunnel_match_level = MLX5_MATCH_NONE;
1833         struct mlx5_eswitch_rep *rep;
1834         int err;
1835
1836         err = __parse_cls_flower(priv, spec, f, filter_dev, &match_level, &tunnel_match_level);
1837
1838         if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH)) {
1839                 rep = rpriv->rep;
1840                 if (rep->vport != MLX5_VPORT_UPLINK &&
1841                     (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
1842                     esw->offloads.inline_mode < match_level)) {
1843                         NL_SET_ERR_MSG_MOD(extack,
1844                                            "Flow is not offloaded due to min inline setting");
1845                         netdev_warn(priv->netdev,
1846                                     "Flow is not offloaded due to min inline setting, required %d actual %d\n",
1847                                     match_level, esw->offloads.inline_mode);
1848                         return -EOPNOTSUPP;
1849                 }
1850         }
1851
1852         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
1853                 flow->esw_attr->match_level = match_level;
1854                 flow->esw_attr->tunnel_match_level = tunnel_match_level;
1855         } else {
1856                 flow->nic_attr->match_level = match_level;
1857         }
1858
1859         return err;
1860 }
1861
1862 struct pedit_headers {
1863         struct ethhdr  eth;
1864         struct vlan_hdr vlan;
1865         struct iphdr   ip4;
1866         struct ipv6hdr ip6;
1867         struct tcphdr  tcp;
1868         struct udphdr  udp;
1869 };
1870
1871 struct pedit_headers_action {
1872         struct pedit_headers    vals;
1873         struct pedit_headers    masks;
1874         u32                     pedits;
1875 };
1876
1877 static int pedit_header_offsets[] = {
1878         [FLOW_ACT_MANGLE_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth),
1879         [FLOW_ACT_MANGLE_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4),
1880         [FLOW_ACT_MANGLE_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6),
1881         [FLOW_ACT_MANGLE_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp),
1882         [FLOW_ACT_MANGLE_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp),
1883 };
1884
1885 #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype])
1886
1887 static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset,
1888                          struct pedit_headers_action *hdrs)
1889 {
1890         u32 *curr_pmask, *curr_pval;
1891
1892         curr_pmask = (u32 *)(pedit_header(&hdrs->masks, hdr_type) + offset);
1893         curr_pval  = (u32 *)(pedit_header(&hdrs->vals, hdr_type) + offset);
1894
1895         if (*curr_pmask & mask)  /* disallow acting twice on the same location */
1896                 goto out_err;
1897
1898         *curr_pmask |= mask;
1899         *curr_pval  |= (val & mask);
1900
1901         return 0;
1902
1903 out_err:
1904         return -EOPNOTSUPP;
1905 }
1906
1907 struct mlx5_fields {
1908         u8  field;
1909         u8  size;
1910         u32 offset;
1911         u32 match_offset;
1912 };
1913
1914 #define OFFLOAD(fw_field, size, field, off, match_field) \
1915                 {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, size, \
1916                  offsetof(struct pedit_headers, field) + (off), \
1917                  MLX5_BYTE_OFF(fte_match_set_lyr_2_4, match_field)}
1918
1919 static bool cmp_val_mask(void *valp, void *maskp, void *matchvalp,
1920                          void *matchmaskp, int size)
1921 {
1922         bool same = false;
1923
1924         switch (size) {
1925         case sizeof(u8):
1926                 same = ((*(u8 *)valp) & (*(u8 *)maskp)) ==
1927                        ((*(u8 *)matchvalp) & (*(u8 *)matchmaskp));
1928                 break;
1929         case sizeof(u16):
1930                 same = ((*(u16 *)valp) & (*(u16 *)maskp)) ==
1931                        ((*(u16 *)matchvalp) & (*(u16 *)matchmaskp));
1932                 break;
1933         case sizeof(u32):
1934                 same = ((*(u32 *)valp) & (*(u32 *)maskp)) ==
1935                        ((*(u32 *)matchvalp) & (*(u32 *)matchmaskp));
1936                 break;
1937         }
1938
1939         return same;
1940 }
1941
1942 static struct mlx5_fields fields[] = {
1943         OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0, dmac_47_16),
1944         OFFLOAD(DMAC_15_0,  2, eth.h_dest[4], 0, dmac_15_0),
1945         OFFLOAD(SMAC_47_16, 4, eth.h_source[0], 0, smac_47_16),
1946         OFFLOAD(SMAC_15_0,  2, eth.h_source[4], 0, smac_15_0),
1947         OFFLOAD(ETHERTYPE,  2, eth.h_proto, 0, ethertype),
1948         OFFLOAD(FIRST_VID,  2, vlan.h_vlan_TCI, 0, first_vid),
1949
1950         OFFLOAD(IP_TTL, 1, ip4.ttl,   0, ttl_hoplimit),
1951         OFFLOAD(SIPV4,  4, ip4.saddr, 0, src_ipv4_src_ipv6.ipv4_layout.ipv4),
1952         OFFLOAD(DIPV4,  4, ip4.daddr, 0, dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1953
1954         OFFLOAD(SIPV6_127_96, 4, ip6.saddr.s6_addr32[0], 0,
1955                 src_ipv4_src_ipv6.ipv6_layout.ipv6[0]),
1956         OFFLOAD(SIPV6_95_64,  4, ip6.saddr.s6_addr32[1], 0,
1957                 src_ipv4_src_ipv6.ipv6_layout.ipv6[4]),
1958         OFFLOAD(SIPV6_63_32,  4, ip6.saddr.s6_addr32[2], 0,
1959                 src_ipv4_src_ipv6.ipv6_layout.ipv6[8]),
1960         OFFLOAD(SIPV6_31_0,   4, ip6.saddr.s6_addr32[3], 0,
1961                 src_ipv4_src_ipv6.ipv6_layout.ipv6[12]),
1962         OFFLOAD(DIPV6_127_96, 4, ip6.daddr.s6_addr32[0], 0,
1963                 dst_ipv4_dst_ipv6.ipv6_layout.ipv6[0]),
1964         OFFLOAD(DIPV6_95_64,  4, ip6.daddr.s6_addr32[1], 0,
1965                 dst_ipv4_dst_ipv6.ipv6_layout.ipv6[4]),
1966         OFFLOAD(DIPV6_63_32,  4, ip6.daddr.s6_addr32[2], 0,
1967                 dst_ipv4_dst_ipv6.ipv6_layout.ipv6[8]),
1968         OFFLOAD(DIPV6_31_0,   4, ip6.daddr.s6_addr32[3], 0,
1969                 dst_ipv4_dst_ipv6.ipv6_layout.ipv6[12]),
1970         OFFLOAD(IPV6_HOPLIMIT, 1, ip6.hop_limit, 0, ttl_hoplimit),
1971
1972         OFFLOAD(TCP_SPORT, 2, tcp.source,  0, tcp_sport),
1973         OFFLOAD(TCP_DPORT, 2, tcp.dest,    0, tcp_dport),
1974         OFFLOAD(TCP_FLAGS, 1, tcp.ack_seq, 5, tcp_flags),
1975
1976         OFFLOAD(UDP_SPORT, 2, udp.source, 0, udp_sport),
1977         OFFLOAD(UDP_DPORT, 2, udp.dest,   0, udp_dport),
1978 };
1979
1980 /* On input attr->max_mod_hdr_actions tells how many HW actions can be parsed at
1981  * max from the SW pedit action. On success, attr->num_mod_hdr_actions
1982  * says how many HW actions were actually parsed.
1983  */
1984 static int offload_pedit_fields(struct pedit_headers_action *hdrs,
1985                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
1986                                 u32 *action_flags,
1987                                 struct netlink_ext_ack *extack)
1988 {
1989         struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
1990         void *headers_c = get_match_headers_criteria(*action_flags,
1991                                                      &parse_attr->spec);
1992         void *headers_v = get_match_headers_value(*action_flags,
1993                                                   &parse_attr->spec);
1994         int i, action_size, nactions, max_actions, first, last, next_z;
1995         void *s_masks_p, *a_masks_p, *vals_p;
1996         struct mlx5_fields *f;
1997         u8 cmd, field_bsize;
1998         u32 s_mask, a_mask;
1999         unsigned long mask;
2000         __be32 mask_be32;
2001         __be16 mask_be16;
2002         void *action;
2003
2004         set_masks = &hdrs[0].masks;
2005         add_masks = &hdrs[1].masks;
2006         set_vals = &hdrs[0].vals;
2007         add_vals = &hdrs[1].vals;
2008
2009         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
2010         action = parse_attr->mod_hdr_actions +
2011                  parse_attr->num_mod_hdr_actions * action_size;
2012
2013         max_actions = parse_attr->max_mod_hdr_actions;
2014         nactions = parse_attr->num_mod_hdr_actions;
2015
2016         for (i = 0; i < ARRAY_SIZE(fields); i++) {
2017                 bool skip;
2018
2019                 f = &fields[i];
2020                 /* avoid seeing bits set from previous iterations */
2021                 s_mask = 0;
2022                 a_mask = 0;
2023
2024                 s_masks_p = (void *)set_masks + f->offset;
2025                 a_masks_p = (void *)add_masks + f->offset;
2026
2027                 memcpy(&s_mask, s_masks_p, f->size);
2028                 memcpy(&a_mask, a_masks_p, f->size);
2029
2030                 if (!s_mask && !a_mask) /* nothing to offload here */
2031                         continue;
2032
2033                 if (s_mask && a_mask) {
2034                         NL_SET_ERR_MSG_MOD(extack,
2035                                            "can't set and add to the same HW field");
2036                         printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field);
2037                         return -EOPNOTSUPP;
2038                 }
2039
2040                 if (nactions == max_actions) {
2041                         NL_SET_ERR_MSG_MOD(extack,
2042                                            "too many pedit actions, can't offload");
2043                         printk(KERN_WARNING "mlx5: parsed %d pedit actions, can't do more\n", nactions);
2044                         return -EOPNOTSUPP;
2045                 }
2046
2047                 skip = false;
2048                 if (s_mask) {
2049                         void *match_mask = headers_c + f->match_offset;
2050                         void *match_val = headers_v + f->match_offset;
2051
2052                         cmd  = MLX5_ACTION_TYPE_SET;
2053                         mask = s_mask;
2054                         vals_p = (void *)set_vals + f->offset;
2055                         /* don't rewrite if we have a match on the same value */
2056                         if (cmp_val_mask(vals_p, s_masks_p, match_val,
2057                                          match_mask, f->size))
2058                                 skip = true;
2059                         /* clear to denote we consumed this field */
2060                         memset(s_masks_p, 0, f->size);
2061                 } else {
2062                         u32 zero = 0;
2063
2064                         cmd  = MLX5_ACTION_TYPE_ADD;
2065                         mask = a_mask;
2066                         vals_p = (void *)add_vals + f->offset;
2067                         /* add 0 is no change */
2068                         if (!memcmp(vals_p, &zero, f->size))
2069                                 skip = true;
2070                         /* clear to denote we consumed this field */
2071                         memset(a_masks_p, 0, f->size);
2072                 }
2073                 if (skip)
2074                         continue;
2075
2076                 field_bsize = f->size * BITS_PER_BYTE;
2077
2078                 if (field_bsize == 32) {
2079                         mask_be32 = *(__be32 *)&mask;
2080                         mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
2081                 } else if (field_bsize == 16) {
2082                         mask_be16 = *(__be16 *)&mask;
2083                         mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
2084                 }
2085
2086                 first = find_first_bit(&mask, field_bsize);
2087                 next_z = find_next_zero_bit(&mask, field_bsize, first);
2088                 last  = find_last_bit(&mask, field_bsize);
2089                 if (first < next_z && next_z < last) {
2090                         NL_SET_ERR_MSG_MOD(extack,
2091                                            "rewrite of few sub-fields isn't supported");
2092                         printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n",
2093                                mask);
2094                         return -EOPNOTSUPP;
2095                 }
2096
2097                 MLX5_SET(set_action_in, action, action_type, cmd);
2098                 MLX5_SET(set_action_in, action, field, f->field);
2099
2100                 if (cmd == MLX5_ACTION_TYPE_SET) {
2101                         MLX5_SET(set_action_in, action, offset, first);
2102                         /* length is num of bits to be written, zero means length of 32 */
2103                         MLX5_SET(set_action_in, action, length, (last - first + 1));
2104                 }
2105
2106                 if (field_bsize == 32)
2107                         MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first);
2108                 else if (field_bsize == 16)
2109                         MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first);
2110                 else if (field_bsize == 8)
2111                         MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first);
2112
2113                 action += action_size;
2114                 nactions++;
2115         }
2116
2117         parse_attr->num_mod_hdr_actions = nactions;
2118         return 0;
2119 }
2120
2121 static int mlx5e_flow_namespace_max_modify_action(struct mlx5_core_dev *mdev,
2122                                                   int namespace)
2123 {
2124         if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */
2125                 return MLX5_CAP_ESW_FLOWTABLE_FDB(mdev, max_modify_header_actions);
2126         else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */
2127                 return MLX5_CAP_FLOWTABLE_NIC_RX(mdev, max_modify_header_actions);
2128 }
2129
2130 static int alloc_mod_hdr_actions(struct mlx5e_priv *priv,
2131                                  struct pedit_headers_action *hdrs,
2132                                  int namespace,
2133                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
2134 {
2135         int nkeys, action_size, max_actions;
2136
2137         nkeys = hdrs[TCA_PEDIT_KEY_EX_CMD_SET].pedits +
2138                 hdrs[TCA_PEDIT_KEY_EX_CMD_ADD].pedits;
2139         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
2140
2141         max_actions = mlx5e_flow_namespace_max_modify_action(priv->mdev, namespace);
2142         /* can get up to crazingly 16 HW actions in 32 bits pedit SW key */
2143         max_actions = min(max_actions, nkeys * 16);
2144
2145         parse_attr->mod_hdr_actions = kcalloc(max_actions, action_size, GFP_KERNEL);
2146         if (!parse_attr->mod_hdr_actions)
2147                 return -ENOMEM;
2148
2149         parse_attr->max_mod_hdr_actions = max_actions;
2150         return 0;
2151 }
2152
2153 static const struct pedit_headers zero_masks = {};
2154
2155 static int parse_tc_pedit_action(struct mlx5e_priv *priv,
2156                                  const struct flow_action_entry *act, int namespace,
2157                                  struct mlx5e_tc_flow_parse_attr *parse_attr,
2158                                  struct pedit_headers_action *hdrs,
2159                                  struct netlink_ext_ack *extack)
2160 {
2161         u8 cmd = (act->id == FLOW_ACTION_MANGLE) ? 0 : 1;
2162         int err = -EOPNOTSUPP;
2163         u32 mask, val, offset;
2164         u8 htype;
2165
2166         htype = act->mangle.htype;
2167         err = -EOPNOTSUPP; /* can't be all optimistic */
2168
2169         if (htype == FLOW_ACT_MANGLE_UNSPEC) {
2170                 NL_SET_ERR_MSG_MOD(extack, "legacy pedit isn't offloaded");
2171                 goto out_err;
2172         }
2173
2174         if (!mlx5e_flow_namespace_max_modify_action(priv->mdev, namespace)) {
2175                 NL_SET_ERR_MSG_MOD(extack,
2176                                    "The pedit offload action is not supported");
2177                 goto out_err;
2178         }
2179
2180         mask = act->mangle.mask;
2181         val = act->mangle.val;
2182         offset = act->mangle.offset;
2183
2184         err = set_pedit_val(htype, ~mask, val, offset, &hdrs[cmd]);
2185         if (err)
2186                 goto out_err;
2187
2188         hdrs[cmd].pedits++;
2189
2190         return 0;
2191 out_err:
2192         return err;
2193 }
2194
2195 static int alloc_tc_pedit_action(struct mlx5e_priv *priv, int namespace,
2196                                  struct mlx5e_tc_flow_parse_attr *parse_attr,
2197                                  struct pedit_headers_action *hdrs,
2198                                  u32 *action_flags,
2199                                  struct netlink_ext_ack *extack)
2200 {
2201         struct pedit_headers *cmd_masks;
2202         int err;
2203         u8 cmd;
2204
2205         if (!parse_attr->mod_hdr_actions) {
2206                 err = alloc_mod_hdr_actions(priv, hdrs, namespace, parse_attr);
2207                 if (err)
2208                         goto out_err;
2209         }
2210
2211         err = offload_pedit_fields(hdrs, parse_attr, action_flags, extack);
2212         if (err < 0)
2213                 goto out_dealloc_parsed_actions;
2214
2215         for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) {
2216                 cmd_masks = &hdrs[cmd].masks;
2217                 if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) {
2218                         NL_SET_ERR_MSG_MOD(extack,
2219                                            "attempt to offload an unsupported field");
2220                         netdev_warn(priv->netdev, "attempt to offload an unsupported field (cmd %d)\n", cmd);
2221                         print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS,
2222                                        16, 1, cmd_masks, sizeof(zero_masks), true);
2223                         err = -EOPNOTSUPP;
2224                         goto out_dealloc_parsed_actions;
2225                 }
2226         }
2227
2228         return 0;
2229
2230 out_dealloc_parsed_actions:
2231         kfree(parse_attr->mod_hdr_actions);
2232 out_err:
2233         return err;
2234 }
2235
2236 static bool csum_offload_supported(struct mlx5e_priv *priv,
2237                                    u32 action,
2238                                    u32 update_flags,
2239                                    struct netlink_ext_ack *extack)
2240 {
2241         u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP |
2242                          TCA_CSUM_UPDATE_FLAG_UDP;
2243
2244         /*  The HW recalcs checksums only if re-writing headers */
2245         if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) {
2246                 NL_SET_ERR_MSG_MOD(extack,
2247                                    "TC csum action is only offloaded with pedit");
2248                 netdev_warn(priv->netdev,
2249                             "TC csum action is only offloaded with pedit\n");
2250                 return false;
2251         }
2252
2253         if (update_flags & ~prot_flags) {
2254                 NL_SET_ERR_MSG_MOD(extack,
2255                                    "can't offload TC csum action for some header/s");
2256                 netdev_warn(priv->netdev,
2257                             "can't offload TC csum action for some header/s - flags %#x\n",
2258                             update_flags);
2259                 return false;
2260         }
2261
2262         return true;
2263 }
2264
2265 struct ip_ttl_word {
2266         __u8    ttl;
2267         __u8    protocol;
2268         __sum16 check;
2269 };
2270
2271 struct ipv6_hoplimit_word {
2272         __be16  payload_len;
2273         __u8    nexthdr;
2274         __u8    hop_limit;
2275 };
2276
2277 static bool is_action_keys_supported(const struct flow_action_entry *act)
2278 {
2279         u32 mask, offset;
2280         u8 htype;
2281
2282         htype = act->mangle.htype;
2283         offset = act->mangle.offset;
2284         mask = ~act->mangle.mask;
2285         /* For IPv4 & IPv6 header check 4 byte word,
2286          * to determine that modified fields
2287          * are NOT ttl & hop_limit only.
2288          */
2289         if (htype == FLOW_ACT_MANGLE_HDR_TYPE_IP4) {
2290                 struct ip_ttl_word *ttl_word =
2291                         (struct ip_ttl_word *)&mask;
2292
2293                 if (offset != offsetof(struct iphdr, ttl) ||
2294                     ttl_word->protocol ||
2295                     ttl_word->check) {
2296                         return true;
2297                 }
2298         } else if (htype == FLOW_ACT_MANGLE_HDR_TYPE_IP6) {
2299                 struct ipv6_hoplimit_word *hoplimit_word =
2300                         (struct ipv6_hoplimit_word *)&mask;
2301
2302                 if (offset != offsetof(struct ipv6hdr, payload_len) ||
2303                     hoplimit_word->payload_len ||
2304                     hoplimit_word->nexthdr) {
2305                         return true;
2306                 }
2307         }
2308         return false;
2309 }
2310
2311 static bool modify_header_match_supported(struct mlx5_flow_spec *spec,
2312                                           struct flow_action *flow_action,
2313                                           u32 actions,
2314                                           struct netlink_ext_ack *extack)
2315 {
2316         const struct flow_action_entry *act;
2317         bool modify_ip_header;
2318         void *headers_v;
2319         u16 ethertype;
2320         u8 ip_proto;
2321         int i;
2322
2323         headers_v = get_match_headers_value(actions, spec);
2324         ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
2325
2326         /* for non-IP we only re-write MACs, so we're okay */
2327         if (ethertype != ETH_P_IP && ethertype != ETH_P_IPV6)
2328                 goto out_ok;
2329
2330         modify_ip_header = false;
2331         flow_action_for_each(i, act, flow_action) {
2332                 if (act->id != FLOW_ACTION_MANGLE &&
2333                     act->id != FLOW_ACTION_ADD)
2334                         continue;
2335
2336                 if (is_action_keys_supported(act)) {
2337                         modify_ip_header = true;
2338                         break;
2339                 }
2340         }
2341
2342         ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol);
2343         if (modify_ip_header && ip_proto != IPPROTO_TCP &&
2344             ip_proto != IPPROTO_UDP && ip_proto != IPPROTO_ICMP) {
2345                 NL_SET_ERR_MSG_MOD(extack,
2346                                    "can't offload re-write of non TCP/UDP");
2347                 pr_info("can't offload re-write of ip proto %d\n", ip_proto);
2348                 return false;
2349         }
2350
2351 out_ok:
2352         return true;
2353 }
2354
2355 static bool actions_match_supported(struct mlx5e_priv *priv,
2356                                     struct flow_action *flow_action,
2357                                     struct mlx5e_tc_flow_parse_attr *parse_attr,
2358                                     struct mlx5e_tc_flow *flow,
2359                                     struct netlink_ext_ack *extack)
2360 {
2361         u32 actions;
2362
2363         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
2364                 actions = flow->esw_attr->action;
2365         else
2366                 actions = flow->nic_attr->action;
2367
2368         if (flow->flags & MLX5E_TC_FLOW_EGRESS &&
2369             !((actions & MLX5_FLOW_CONTEXT_ACTION_DECAP) ||
2370               (actions & MLX5_FLOW_CONTEXT_ACTION_VLAN_POP)))
2371                 return false;
2372
2373         if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
2374                 return modify_header_match_supported(&parse_attr->spec,
2375                                                      flow_action, actions,
2376                                                      extack);
2377
2378         return true;
2379 }
2380
2381 static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
2382 {
2383         struct mlx5_core_dev *fmdev, *pmdev;
2384         u64 fsystem_guid, psystem_guid;
2385
2386         fmdev = priv->mdev;
2387         pmdev = peer_priv->mdev;
2388
2389         fsystem_guid = mlx5_query_nic_system_image_guid(fmdev);
2390         psystem_guid = mlx5_query_nic_system_image_guid(pmdev);
2391
2392         return (fsystem_guid == psystem_guid);
2393 }
2394
2395 static int add_vlan_rewrite_action(struct mlx5e_priv *priv, int namespace,
2396                                    const struct flow_action_entry *act,
2397                                    struct mlx5e_tc_flow_parse_attr *parse_attr,
2398                                    struct pedit_headers_action *hdrs,
2399                                    u32 *action, struct netlink_ext_ack *extack)
2400 {
2401         u16 mask16 = VLAN_VID_MASK;
2402         u16 val16 = act->vlan.vid & VLAN_VID_MASK;
2403         const struct flow_action_entry pedit_act = {
2404                 .id = FLOW_ACTION_MANGLE,
2405                 .mangle.htype = FLOW_ACT_MANGLE_HDR_TYPE_ETH,
2406                 .mangle.offset = offsetof(struct vlan_ethhdr, h_vlan_TCI),
2407                 .mangle.mask = ~(u32)be16_to_cpu(*(__be16 *)&mask16),
2408                 .mangle.val = (u32)be16_to_cpu(*(__be16 *)&val16),
2409         };
2410         u8 match_prio_mask, match_prio_val;
2411         void *headers_c, *headers_v;
2412         int err;
2413
2414         headers_c = get_match_headers_criteria(*action, &parse_attr->spec);
2415         headers_v = get_match_headers_value(*action, &parse_attr->spec);
2416
2417         if (!(MLX5_GET(fte_match_set_lyr_2_4, headers_c, cvlan_tag) &&
2418               MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag))) {
2419                 NL_SET_ERR_MSG_MOD(extack,
2420                                    "VLAN rewrite action must have VLAN protocol match");
2421                 return -EOPNOTSUPP;
2422         }
2423
2424         match_prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
2425         match_prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
2426         if (act->vlan.prio != (match_prio_val & match_prio_mask)) {
2427                 NL_SET_ERR_MSG_MOD(extack,
2428                                    "Changing VLAN prio is not supported");
2429                 return -EOPNOTSUPP;
2430         }
2431
2432         err = parse_tc_pedit_action(priv, &pedit_act, namespace, parse_attr,
2433                                     hdrs, NULL);
2434         *action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
2435
2436         return err;
2437 }
2438
2439 static int
2440 add_vlan_prio_tag_rewrite_action(struct mlx5e_priv *priv,
2441                                  struct mlx5e_tc_flow_parse_attr *parse_attr,
2442                                  struct pedit_headers_action *hdrs,
2443                                  u32 *action, struct netlink_ext_ack *extack)
2444 {
2445         const struct flow_action_entry prio_tag_act = {
2446                 .vlan.vid = 0,
2447                 .vlan.prio =
2448                         MLX5_GET(fte_match_set_lyr_2_4,
2449                                  get_match_headers_value(*action,
2450                                                          &parse_attr->spec),
2451                                  first_prio) &
2452                         MLX5_GET(fte_match_set_lyr_2_4,
2453                                  get_match_headers_criteria(*action,
2454                                                             &parse_attr->spec),
2455                                  first_prio),
2456         };
2457
2458         return add_vlan_rewrite_action(priv, MLX5_FLOW_NAMESPACE_FDB,
2459                                        &prio_tag_act, parse_attr, hdrs, action,
2460                                        extack);
2461 }
2462
2463 static int parse_tc_nic_actions(struct mlx5e_priv *priv,
2464                                 struct flow_action *flow_action,
2465                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2466                                 struct mlx5e_tc_flow *flow,
2467                                 struct netlink_ext_ack *extack)
2468 {
2469         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
2470         struct pedit_headers_action hdrs[2] = {};
2471         const struct flow_action_entry *act;
2472         u32 action = 0;
2473         int err, i;
2474
2475         if (!flow_action_has_entries(flow_action))
2476                 return -EINVAL;
2477
2478         attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
2479
2480         flow_action_for_each(i, act, flow_action) {
2481                 switch (act->id) {
2482                 case FLOW_ACTION_DROP:
2483                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
2484                         if (MLX5_CAP_FLOWTABLE(priv->mdev,
2485                                                flow_table_properties_nic_receive.flow_counter))
2486                                 action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
2487                         break;
2488                 case FLOW_ACTION_MANGLE:
2489                 case FLOW_ACTION_ADD:
2490                         err = parse_tc_pedit_action(priv, act, MLX5_FLOW_NAMESPACE_KERNEL,
2491                                                     parse_attr, hdrs, extack);
2492                         if (err)
2493                                 return err;
2494
2495                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR |
2496                                   MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2497                         break;
2498                 case FLOW_ACTION_VLAN_MANGLE:
2499                         err = add_vlan_rewrite_action(priv,
2500                                                       MLX5_FLOW_NAMESPACE_KERNEL,
2501                                                       act, parse_attr, hdrs,
2502                                                       &action, extack);
2503                         if (err)
2504                                 return err;
2505
2506                         break;
2507                 case FLOW_ACTION_CSUM:
2508                         if (csum_offload_supported(priv, action,
2509                                                    act->csum_flags,
2510                                                    extack))
2511                                 break;
2512
2513                         return -EOPNOTSUPP;
2514                 case FLOW_ACTION_REDIRECT: {
2515                         struct net_device *peer_dev = act->dev;
2516
2517                         if (priv->netdev->netdev_ops == peer_dev->netdev_ops &&
2518                             same_hw_devs(priv, netdev_priv(peer_dev))) {
2519                                 parse_attr->mirred_ifindex[0] = peer_dev->ifindex;
2520                                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN;
2521                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2522                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2523                         } else {
2524                                 NL_SET_ERR_MSG_MOD(extack,
2525                                                    "device is not on same HW, can't offload");
2526                                 netdev_warn(priv->netdev, "device %s not on same HW, can't offload\n",
2527                                             peer_dev->name);
2528                                 return -EINVAL;
2529                         }
2530                         }
2531                         break;
2532                 case FLOW_ACTION_MARK: {
2533                         u32 mark = act->mark;
2534
2535                         if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
2536                                 NL_SET_ERR_MSG_MOD(extack,
2537                                                    "Bad flow mark - only 16 bit is supported");
2538                                 return -EINVAL;
2539                         }
2540
2541                         attr->flow_tag = mark;
2542                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2543                         }
2544                         break;
2545                 default:
2546                         NL_SET_ERR_MSG_MOD(extack, "The offload action is not supported");
2547                         return -EOPNOTSUPP;
2548                 }
2549         }
2550
2551         if (hdrs[TCA_PEDIT_KEY_EX_CMD_SET].pedits ||
2552             hdrs[TCA_PEDIT_KEY_EX_CMD_ADD].pedits) {
2553                 err = alloc_tc_pedit_action(priv, MLX5_FLOW_NAMESPACE_KERNEL,
2554                                             parse_attr, hdrs, &action, extack);
2555                 if (err)
2556                         return err;
2557                 /* in case all pedit actions are skipped, remove the MOD_HDR
2558                  * flag.
2559                  */
2560                 if (parse_attr->num_mod_hdr_actions == 0)
2561                         action &= ~MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
2562         }
2563
2564         attr->action = action;
2565         if (!actions_match_supported(priv, flow_action, parse_attr, flow, extack))
2566                 return -EOPNOTSUPP;
2567
2568         return 0;
2569 }
2570
2571 struct encap_key {
2572         struct ip_tunnel_key *ip_tun_key;
2573         int tunnel_type;
2574 };
2575
2576 static inline int cmp_encap_info(struct encap_key *a,
2577                                  struct encap_key *b)
2578 {
2579         return memcmp(a->ip_tun_key, b->ip_tun_key, sizeof(*a->ip_tun_key)) ||
2580                a->tunnel_type != b->tunnel_type;
2581 }
2582
2583 static inline int hash_encap_info(struct encap_key *key)
2584 {
2585         return jhash(key->ip_tun_key, sizeof(*key->ip_tun_key),
2586                      key->tunnel_type);
2587 }
2588
2589
2590 static bool is_merged_eswitch_dev(struct mlx5e_priv *priv,
2591                                   struct net_device *peer_netdev)
2592 {
2593         struct mlx5e_priv *peer_priv;
2594
2595         peer_priv = netdev_priv(peer_netdev);
2596
2597         return (MLX5_CAP_ESW(priv->mdev, merged_eswitch) &&
2598                 mlx5e_eswitch_rep(priv->netdev) &&
2599                 mlx5e_eswitch_rep(peer_netdev) &&
2600                 same_hw_devs(priv, peer_priv));
2601 }
2602
2603
2604
2605 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
2606                               struct mlx5e_tc_flow *flow,
2607                               struct net_device *mirred_dev,
2608                               int out_index,
2609                               struct netlink_ext_ack *extack,
2610                               struct net_device **encap_dev,
2611                               bool *encap_valid)
2612 {
2613         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2614         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2615         struct mlx5e_tc_flow_parse_attr *parse_attr;
2616         struct ip_tunnel_info *tun_info;
2617         struct encap_key key, e_key;
2618         struct mlx5e_encap_entry *e;
2619         unsigned short family;
2620         uintptr_t hash_key;
2621         bool found = false;
2622         int err = 0;
2623
2624         parse_attr = attr->parse_attr;
2625         tun_info = &parse_attr->tun_info[out_index];
2626         family = ip_tunnel_info_af(tun_info);
2627         key.ip_tun_key = &tun_info->key;
2628         key.tunnel_type = mlx5e_tc_tun_get_type(mirred_dev);
2629
2630         hash_key = hash_encap_info(&key);
2631
2632         hash_for_each_possible_rcu(esw->offloads.encap_tbl, e,
2633                                    encap_hlist, hash_key) {
2634                 e_key.ip_tun_key = &e->tun_info.key;
2635                 e_key.tunnel_type = e->tunnel_type;
2636                 if (!cmp_encap_info(&e_key, &key)) {
2637                         found = true;
2638                         break;
2639                 }
2640         }
2641
2642         /* must verify if encap is valid or not */
2643         if (found)
2644                 goto attach_flow;
2645
2646         e = kzalloc(sizeof(*e), GFP_KERNEL);
2647         if (!e)
2648                 return -ENOMEM;
2649
2650         e->tun_info = *tun_info;
2651         err = mlx5e_tc_tun_init_encap_attr(mirred_dev, priv, e, extack);
2652         if (err)
2653                 goto out_err;
2654
2655         INIT_LIST_HEAD(&e->flows);
2656
2657         if (family == AF_INET)
2658                 err = mlx5e_tc_tun_create_header_ipv4(priv, mirred_dev, e);
2659         else if (family == AF_INET6)
2660                 err = mlx5e_tc_tun_create_header_ipv6(priv, mirred_dev, e);
2661
2662         if (err)
2663                 goto out_err;
2664
2665         hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key);
2666
2667 attach_flow:
2668         list_add(&flow->encaps[out_index].list, &e->flows);
2669         flow->encaps[out_index].index = out_index;
2670         *encap_dev = e->out_dev;
2671         if (e->flags & MLX5_ENCAP_ENTRY_VALID) {
2672                 attr->dests[out_index].encap_id = e->encap_id;
2673                 attr->dests[out_index].flags |= MLX5_ESW_DEST_ENCAP_VALID;
2674                 *encap_valid = true;
2675         } else {
2676                 *encap_valid = false;
2677         }
2678
2679         return err;
2680
2681 out_err:
2682         kfree(e);
2683         return err;
2684 }
2685
2686 static int parse_tc_vlan_action(struct mlx5e_priv *priv,
2687                                 const struct flow_action_entry *act,
2688                                 struct mlx5_esw_flow_attr *attr,
2689                                 u32 *action)
2690 {
2691         u8 vlan_idx = attr->total_vlan;
2692
2693         if (vlan_idx >= MLX5_FS_VLAN_DEPTH)
2694                 return -EOPNOTSUPP;
2695
2696         switch (act->id) {
2697         case FLOW_ACTION_VLAN_POP:
2698                 if (vlan_idx) {
2699                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
2700                                                                  MLX5_FS_VLAN_DEPTH))
2701                                 return -EOPNOTSUPP;
2702
2703                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP_2;
2704                 } else {
2705                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
2706                 }
2707                 break;
2708         case FLOW_ACTION_VLAN_PUSH:
2709                 attr->vlan_vid[vlan_idx] = act->vlan.vid;
2710                 attr->vlan_prio[vlan_idx] = act->vlan.prio;
2711                 attr->vlan_proto[vlan_idx] = act->vlan.proto;
2712                 if (!attr->vlan_proto[vlan_idx])
2713                         attr->vlan_proto[vlan_idx] = htons(ETH_P_8021Q);
2714
2715                 if (vlan_idx) {
2716                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
2717                                                                  MLX5_FS_VLAN_DEPTH))
2718                                 return -EOPNOTSUPP;
2719
2720                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2;
2721                 } else {
2722                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev, 1) &&
2723                             (act->vlan.proto != htons(ETH_P_8021Q) ||
2724                              act->vlan.prio))
2725                                 return -EOPNOTSUPP;
2726
2727                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
2728                 }
2729                 break;
2730         default:
2731                 return -EINVAL;
2732         }
2733
2734         attr->total_vlan = vlan_idx + 1;
2735
2736         return 0;
2737 }
2738
2739 static int add_vlan_push_action(struct mlx5e_priv *priv,
2740                                 struct mlx5_esw_flow_attr *attr,
2741                                 struct net_device **out_dev,
2742                                 u32 *action)
2743 {
2744         struct net_device *vlan_dev = *out_dev;
2745         struct flow_action_entry vlan_act = {
2746                 .id = FLOW_ACTION_VLAN_PUSH,
2747                 .vlan.vid = vlan_dev_vlan_id(vlan_dev),
2748                 .vlan.proto = vlan_dev_vlan_proto(vlan_dev),
2749                 .vlan.prio = 0,
2750         };
2751         int err;
2752
2753         err = parse_tc_vlan_action(priv, &vlan_act, attr, action);
2754         if (err)
2755                 return err;
2756
2757         *out_dev = dev_get_by_index_rcu(dev_net(vlan_dev),
2758                                         dev_get_iflink(vlan_dev));
2759         if (is_vlan_dev(*out_dev))
2760                 err = add_vlan_push_action(priv, attr, out_dev, action);
2761
2762         return err;
2763 }
2764
2765 static int add_vlan_pop_action(struct mlx5e_priv *priv,
2766                                struct mlx5_esw_flow_attr *attr,
2767                                u32 *action)
2768 {
2769         int nest_level = vlan_get_encap_level(attr->parse_attr->filter_dev);
2770         struct flow_action_entry vlan_act = {
2771                 .id = FLOW_ACTION_VLAN_POP,
2772         };
2773         int err = 0;
2774
2775         while (nest_level--) {
2776                 err = parse_tc_vlan_action(priv, &vlan_act, attr, action);
2777                 if (err)
2778                         return err;
2779         }
2780
2781         return err;
2782 }
2783
2784 static int parse_tc_fdb_actions(struct mlx5e_priv *priv,
2785                                 struct flow_action *flow_action,
2786                                 struct mlx5e_tc_flow *flow,
2787                                 struct netlink_ext_ack *extack)
2788 {
2789         struct pedit_headers_action hdrs[2] = {};
2790         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2791         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2792         struct mlx5e_tc_flow_parse_attr *parse_attr = attr->parse_attr;
2793         struct mlx5e_rep_priv *rpriv = priv->ppriv;
2794         const struct ip_tunnel_info *info = NULL;
2795         const struct flow_action_entry *act;
2796         bool encap = false;
2797         u32 action = 0;
2798         int err, i;
2799
2800         if (!flow_action_has_entries(flow_action))
2801                 return -EINVAL;
2802
2803         attr->in_rep = rpriv->rep;
2804         attr->in_mdev = priv->mdev;
2805
2806         flow_action_for_each(i, act, flow_action) {
2807                 switch (act->id) {
2808                 case FLOW_ACTION_DROP:
2809                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
2810                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
2811                         break;
2812                 case FLOW_ACTION_MANGLE:
2813                 case FLOW_ACTION_ADD:
2814                         err = parse_tc_pedit_action(priv, act, MLX5_FLOW_NAMESPACE_FDB,
2815                                                     parse_attr, hdrs, extack);
2816                         if (err)
2817                                 return err;
2818
2819                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
2820                         attr->split_count = attr->out_count;
2821                         break;
2822                 case FLOW_ACTION_CSUM:
2823                         if (csum_offload_supported(priv, action,
2824                                                    act->csum_flags, extack))
2825                                 break;
2826
2827                         return -EOPNOTSUPP;
2828                 case FLOW_ACTION_REDIRECT:
2829                 case FLOW_ACTION_MIRRED: {
2830                         struct mlx5e_priv *out_priv;
2831                         struct net_device *out_dev;
2832
2833                         out_dev = act->dev;
2834                         if (!out_dev) {
2835                                 /* out_dev is NULL when filters with
2836                                  * non-existing mirred device are replayed to
2837                                  * the driver.
2838                                  */
2839                                 return -EINVAL;
2840                         }
2841
2842                         if (attr->out_count >= MLX5_MAX_FLOW_FWD_VPORTS) {
2843                                 NL_SET_ERR_MSG_MOD(extack,
2844                                                    "can't support more output ports, can't offload forwarding");
2845                                 pr_err("can't support more than %d output ports, can't offload forwarding\n",
2846                                        attr->out_count);
2847                                 return -EOPNOTSUPP;
2848                         }
2849
2850                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2851                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
2852                         if (netdev_port_same_parent_id(priv->netdev,
2853                                                        out_dev) ||
2854                             is_merged_eswitch_dev(priv, out_dev)) {
2855                                 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2856                                 struct net_device *uplink_dev = mlx5_eswitch_uplink_get_proto_dev(esw, REP_ETH);
2857                                 struct net_device *uplink_upper = netdev_master_upper_dev_get(uplink_dev);
2858
2859                                 if (uplink_upper &&
2860                                     netif_is_lag_master(uplink_upper) &&
2861                                     uplink_upper == out_dev)
2862                                         out_dev = uplink_dev;
2863
2864                                 if (is_vlan_dev(out_dev)) {
2865                                         err = add_vlan_push_action(priv, attr,
2866                                                                    &out_dev,
2867                                                                    &action);
2868                                         if (err)
2869                                                 return err;
2870                                 }
2871                                 if (is_vlan_dev(parse_attr->filter_dev)) {
2872                                         err = add_vlan_pop_action(priv, attr,
2873                                                                   &action);
2874                                         if (err)
2875                                                 return err;
2876                                 }
2877
2878                                 if (!mlx5e_eswitch_rep(out_dev))
2879                                         return -EOPNOTSUPP;
2880
2881                                 out_priv = netdev_priv(out_dev);
2882                                 rpriv = out_priv->ppriv;
2883                                 attr->dests[attr->out_count].rep = rpriv->rep;
2884                                 attr->dests[attr->out_count].mdev = out_priv->mdev;
2885                                 attr->out_count++;
2886                         } else if (encap) {
2887                                 parse_attr->mirred_ifindex[attr->out_count] =
2888                                         out_dev->ifindex;
2889                                 parse_attr->tun_info[attr->out_count] = *info;
2890                                 encap = false;
2891                                 attr->dests[attr->out_count].flags |=
2892                                         MLX5_ESW_DEST_ENCAP;
2893                                 attr->out_count++;
2894                                 /* attr->dests[].rep is resolved when we
2895                                  * handle encap
2896                                  */
2897                         } else if (parse_attr->filter_dev != priv->netdev) {
2898                                 /* All mlx5 devices are called to configure
2899                                  * high level device filters. Therefore, the
2900                                  * *attempt* to  install a filter on invalid
2901                                  * eswitch should not trigger an explicit error
2902                                  */
2903                                 return -EINVAL;
2904                         } else {
2905                                 NL_SET_ERR_MSG_MOD(extack,
2906                                                    "devices are not on same switch HW, can't offload forwarding");
2907                                 pr_err("devices %s %s not on same switch HW, can't offload forwarding\n",
2908                                        priv->netdev->name, out_dev->name);
2909                                 return -EINVAL;
2910                         }
2911                         }
2912                         break;
2913                 case FLOW_ACTION_TUNNEL_ENCAP:
2914                         info = act->tunnel;
2915                         if (info)
2916                                 encap = true;
2917                         else
2918                                 return -EOPNOTSUPP;
2919
2920                         break;
2921                 case FLOW_ACTION_VLAN_PUSH:
2922                 case FLOW_ACTION_VLAN_POP:
2923                         if (act->id == FLOW_ACTION_VLAN_PUSH &&
2924                             (action & MLX5_FLOW_CONTEXT_ACTION_VLAN_POP)) {
2925                                 /* Replace vlan pop+push with vlan modify */
2926                                 action &= ~MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
2927                                 err = add_vlan_rewrite_action(priv,
2928                                                               MLX5_FLOW_NAMESPACE_FDB,
2929                                                               act, parse_attr, hdrs,
2930                                                               &action, extack);
2931                         } else {
2932                                 err = parse_tc_vlan_action(priv, act, attr, &action);
2933                         }
2934                         if (err)
2935                                 return err;
2936
2937                         attr->split_count = attr->out_count;
2938                         break;
2939                 case FLOW_ACTION_VLAN_MANGLE:
2940                         err = add_vlan_rewrite_action(priv,
2941                                                       MLX5_FLOW_NAMESPACE_FDB,
2942                                                       act, parse_attr, hdrs,
2943                                                       &action, extack);
2944                         if (err)
2945                                 return err;
2946
2947                         attr->split_count = attr->out_count;
2948                         break;
2949                 case FLOW_ACTION_TUNNEL_DECAP:
2950                         action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
2951                         break;
2952                 case FLOW_ACTION_GOTO: {
2953                         u32 dest_chain = act->chain_index;
2954                         u32 max_chain = mlx5_eswitch_get_chain_range(esw);
2955
2956                         if (dest_chain <= attr->chain) {
2957                                 NL_SET_ERR_MSG(extack, "Goto earlier chain isn't supported");
2958                                 return -EOPNOTSUPP;
2959                         }
2960                         if (dest_chain > max_chain) {
2961                                 NL_SET_ERR_MSG(extack, "Requested destination chain is out of supported range");
2962                                 return -EOPNOTSUPP;
2963                         }
2964                         action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
2965                         attr->dest_chain = dest_chain;
2966                         break;
2967                         }
2968                 default:
2969                         NL_SET_ERR_MSG_MOD(extack, "The offload action is not supported");
2970                         return -EOPNOTSUPP;
2971                 }
2972         }
2973
2974         if (MLX5_CAP_GEN(esw->dev, prio_tag_required) &&
2975             action & MLX5_FLOW_CONTEXT_ACTION_VLAN_POP) {
2976                 /* For prio tag mode, replace vlan pop with rewrite vlan prio
2977                  * tag rewrite.
2978                  */
2979                 action &= ~MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
2980                 err = add_vlan_prio_tag_rewrite_action(priv, parse_attr, hdrs,
2981                                                        &action, extack);
2982                 if (err)
2983                         return err;
2984         }
2985
2986         if (hdrs[TCA_PEDIT_KEY_EX_CMD_SET].pedits ||
2987             hdrs[TCA_PEDIT_KEY_EX_CMD_ADD].pedits) {
2988                 err = alloc_tc_pedit_action(priv, MLX5_FLOW_NAMESPACE_FDB,
2989                                             parse_attr, hdrs, &action, extack);
2990                 if (err)
2991                         return err;
2992                 /* in case all pedit actions are skipped, remove the MOD_HDR
2993                  * flag. we might have set split_count either by pedit or
2994                  * pop/push. if there is no pop/push either, reset it too.
2995                  */
2996                 if (parse_attr->num_mod_hdr_actions == 0) {
2997                         action &= ~MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
2998                         if (!((action & MLX5_FLOW_CONTEXT_ACTION_VLAN_POP) ||
2999                               (action & MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH)))
3000                                 attr->split_count = 0;
3001                 }
3002         }
3003
3004         attr->action = action;
3005         if (!actions_match_supported(priv, flow_action, parse_attr, flow, extack))
3006                 return -EOPNOTSUPP;
3007
3008         if (attr->dest_chain) {
3009                 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
3010                         NL_SET_ERR_MSG(extack, "Mirroring goto chain rules isn't supported");
3011                         return -EOPNOTSUPP;
3012                 }
3013                 attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
3014         }
3015
3016         if (attr->split_count > 0 && !mlx5_esw_has_fwd_fdb(priv->mdev)) {
3017                 NL_SET_ERR_MSG_MOD(extack,
3018                                    "current firmware doesn't support split rule for port mirroring");
3019                 netdev_warn_once(priv->netdev, "current firmware doesn't support split rule for port mirroring\n");
3020                 return -EOPNOTSUPP;
3021         }
3022
3023         return 0;
3024 }
3025
3026 static void get_flags(int flags, u16 *flow_flags)
3027 {
3028         u16 __flow_flags = 0;
3029
3030         if (flags & MLX5E_TC_INGRESS)
3031                 __flow_flags |= MLX5E_TC_FLOW_INGRESS;
3032         if (flags & MLX5E_TC_EGRESS)
3033                 __flow_flags |= MLX5E_TC_FLOW_EGRESS;
3034
3035         if (flags & MLX5E_TC_ESW_OFFLOAD)
3036                 __flow_flags |= MLX5E_TC_FLOW_ESWITCH;
3037         if (flags & MLX5E_TC_NIC_OFFLOAD)
3038                 __flow_flags |= MLX5E_TC_FLOW_NIC;
3039
3040         *flow_flags = __flow_flags;
3041 }
3042
3043 static const struct rhashtable_params tc_ht_params = {
3044         .head_offset = offsetof(struct mlx5e_tc_flow, node),
3045         .key_offset = offsetof(struct mlx5e_tc_flow, cookie),
3046         .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
3047         .automatic_shrinking = true,
3048 };
3049
3050 static struct rhashtable *get_tc_ht(struct mlx5e_priv *priv, int flags)
3051 {
3052         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
3053         struct mlx5e_rep_priv *uplink_rpriv;
3054
3055         if (flags & MLX5E_TC_ESW_OFFLOAD) {
3056                 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
3057                 return &uplink_rpriv->uplink_priv.tc_ht;
3058         } else /* NIC offload */
3059                 return &priv->fs.tc.ht;
3060 }
3061
3062 static bool is_peer_flow_needed(struct mlx5e_tc_flow *flow)
3063 {
3064         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
3065         bool is_rep_ingress = attr->in_rep->vport != MLX5_VPORT_UPLINK &&
3066                               flow->flags & MLX5E_TC_FLOW_INGRESS;
3067         bool act_is_encap = !!(attr->action &
3068                                MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT);
3069         bool esw_paired = mlx5_devcom_is_paired(attr->in_mdev->priv.devcom,
3070                                                 MLX5_DEVCOM_ESW_OFFLOADS);
3071
3072         if (!esw_paired)
3073                 return false;
3074
3075         if ((mlx5_lag_is_sriov(attr->in_mdev) ||
3076              mlx5_lag_is_multipath(attr->in_mdev)) &&
3077             (is_rep_ingress || act_is_encap))
3078                 return true;
3079
3080         return false;
3081 }
3082
3083 static int
3084 mlx5e_alloc_flow(struct mlx5e_priv *priv, int attr_size,
3085                  struct tc_cls_flower_offload *f, u16 flow_flags,
3086                  struct mlx5e_tc_flow_parse_attr **__parse_attr,
3087                  struct mlx5e_tc_flow **__flow)
3088 {
3089         struct mlx5e_tc_flow_parse_attr *parse_attr;
3090         struct mlx5e_tc_flow *flow;
3091         int err;
3092
3093         flow = kzalloc(sizeof(*flow) + attr_size, GFP_KERNEL);
3094         parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL);
3095         if (!parse_attr || !flow) {
3096                 err = -ENOMEM;
3097                 goto err_free;
3098         }
3099
3100         flow->cookie = f->cookie;
3101         flow->flags = flow_flags;
3102         flow->priv = priv;
3103
3104         *__flow = flow;
3105         *__parse_attr = parse_attr;
3106
3107         return 0;
3108
3109 err_free:
3110         kfree(flow);
3111         kvfree(parse_attr);
3112         return err;
3113 }
3114
3115 static void
3116 mlx5e_flow_esw_attr_init(struct mlx5_esw_flow_attr *esw_attr,
3117                          struct mlx5e_priv *priv,
3118                          struct mlx5e_tc_flow_parse_attr *parse_attr,
3119                          struct tc_cls_flower_offload *f,
3120                          struct mlx5_eswitch_rep *in_rep,
3121                          struct mlx5_core_dev *in_mdev)
3122 {
3123         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
3124
3125         esw_attr->parse_attr = parse_attr;
3126         esw_attr->chain = f->common.chain_index;
3127         esw_attr->prio = TC_H_MAJ(f->common.prio) >> 16;
3128
3129         esw_attr->in_rep = in_rep;
3130         esw_attr->in_mdev = in_mdev;
3131
3132         if (MLX5_CAP_ESW(esw->dev, counter_eswitch_affinity) ==
3133             MLX5_COUNTER_SOURCE_ESWITCH)
3134                 esw_attr->counter_dev = in_mdev;
3135         else
3136                 esw_attr->counter_dev = priv->mdev;
3137 }
3138
3139 static struct mlx5e_tc_flow *
3140 __mlx5e_add_fdb_flow(struct mlx5e_priv *priv,
3141                      struct tc_cls_flower_offload *f,
3142                      u16 flow_flags,
3143                      struct net_device *filter_dev,
3144                      struct mlx5_eswitch_rep *in_rep,
3145                      struct mlx5_core_dev *in_mdev)
3146 {
3147         struct flow_rule *rule = tc_cls_flower_offload_flow_rule(f);
3148         struct netlink_ext_ack *extack = f->common.extack;
3149         struct mlx5e_tc_flow_parse_attr *parse_attr;
3150         struct mlx5e_tc_flow *flow;
3151         int attr_size, err;
3152
3153         flow_flags |= MLX5E_TC_FLOW_ESWITCH;
3154         attr_size  = sizeof(struct mlx5_esw_flow_attr);
3155         err = mlx5e_alloc_flow(priv, attr_size, f, flow_flags,
3156                                &parse_attr, &flow);
3157         if (err)
3158                 goto out;
3159
3160         parse_attr->filter_dev = filter_dev;
3161         mlx5e_flow_esw_attr_init(flow->esw_attr,
3162                                  priv, parse_attr,
3163                                  f, in_rep, in_mdev);
3164
3165         err = parse_cls_flower(flow->priv, flow, &parse_attr->spec,
3166                                f, filter_dev);
3167         if (err)
3168                 goto err_free;
3169
3170         err = parse_tc_fdb_actions(priv, &rule->action, flow, extack);
3171         if (err)
3172                 goto err_free;
3173
3174         err = mlx5e_tc_add_fdb_flow(priv, flow, extack);
3175         if (err) {
3176                 if (!(err == -ENETUNREACH && mlx5_lag_is_multipath(in_mdev)))
3177                         goto err_free;
3178
3179                 add_unready_flow(flow);
3180         }
3181
3182         return flow;
3183
3184 err_free:
3185         kfree(flow);
3186         kvfree(parse_attr);
3187 out:
3188         return ERR_PTR(err);
3189 }
3190
3191 static int mlx5e_tc_add_fdb_peer_flow(struct tc_cls_flower_offload *f,
3192                                       struct mlx5e_tc_flow *flow,
3193                                       u16 flow_flags)
3194 {
3195         struct mlx5e_priv *priv = flow->priv, *peer_priv;
3196         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch, *peer_esw;
3197         struct mlx5_devcom *devcom = priv->mdev->priv.devcom;
3198         struct mlx5e_tc_flow_parse_attr *parse_attr;
3199         struct mlx5e_rep_priv *peer_urpriv;
3200         struct mlx5e_tc_flow *peer_flow;
3201         struct mlx5_core_dev *in_mdev;
3202         int err = 0;
3203
3204         peer_esw = mlx5_devcom_get_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
3205         if (!peer_esw)
3206                 return -ENODEV;
3207
3208         peer_urpriv = mlx5_eswitch_get_uplink_priv(peer_esw, REP_ETH);
3209         peer_priv = netdev_priv(peer_urpriv->netdev);
3210
3211         /* in_mdev is assigned of which the packet originated from.
3212          * So packets redirected to uplink use the same mdev of the
3213          * original flow and packets redirected from uplink use the
3214          * peer mdev.
3215          */
3216         if (flow->esw_attr->in_rep->vport == MLX5_VPORT_UPLINK)
3217                 in_mdev = peer_priv->mdev;
3218         else
3219                 in_mdev = priv->mdev;
3220
3221         parse_attr = flow->esw_attr->parse_attr;
3222         peer_flow = __mlx5e_add_fdb_flow(peer_priv, f, flow_flags,
3223                                          parse_attr->filter_dev,
3224                                          flow->esw_attr->in_rep, in_mdev);
3225         if (IS_ERR(peer_flow)) {
3226                 err = PTR_ERR(peer_flow);
3227                 goto out;
3228         }
3229
3230         flow->peer_flow = peer_flow;
3231         flow->flags |= MLX5E_TC_FLOW_DUP;
3232         mutex_lock(&esw->offloads.peer_mutex);
3233         list_add_tail(&flow->peer, &esw->offloads.peer_flows);
3234         mutex_unlock(&esw->offloads.peer_mutex);
3235
3236 out:
3237         mlx5_devcom_release_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
3238         return err;
3239 }
3240
3241 static int
3242 mlx5e_add_fdb_flow(struct mlx5e_priv *priv,
3243                    struct tc_cls_flower_offload *f,
3244                    u16 flow_flags,
3245                    struct net_device *filter_dev,
3246                    struct mlx5e_tc_flow **__flow)
3247 {
3248         struct mlx5e_rep_priv *rpriv = priv->ppriv;
3249         struct mlx5_eswitch_rep *in_rep = rpriv->rep;
3250         struct mlx5_core_dev *in_mdev = priv->mdev;
3251         struct mlx5e_tc_flow *flow;
3252         int err;
3253
3254         flow = __mlx5e_add_fdb_flow(priv, f, flow_flags, filter_dev, in_rep,
3255                                     in_mdev);
3256         if (IS_ERR(flow))
3257                 return PTR_ERR(flow);
3258
3259         if (is_peer_flow_needed(flow)) {
3260                 err = mlx5e_tc_add_fdb_peer_flow(f, flow, flow_flags);
3261                 if (err) {
3262                         mlx5e_tc_del_fdb_flow(priv, flow);
3263                         goto out;
3264                 }
3265         }
3266
3267         *__flow = flow;
3268
3269         return 0;
3270
3271 out:
3272         return err;
3273 }
3274
3275 static int
3276 mlx5e_add_nic_flow(struct mlx5e_priv *priv,
3277                    struct tc_cls_flower_offload *f,
3278                    u16 flow_flags,
3279                    struct net_device *filter_dev,
3280                    struct mlx5e_tc_flow **__flow)
3281 {
3282         struct flow_rule *rule = tc_cls_flower_offload_flow_rule(f);
3283         struct netlink_ext_ack *extack = f->common.extack;
3284         struct mlx5e_tc_flow_parse_attr *parse_attr;
3285         struct mlx5e_tc_flow *flow;
3286         int attr_size, err;
3287
3288         /* multi-chain not supported for NIC rules */
3289         if (!tc_cls_can_offload_and_chain0(priv->netdev, &f->common))
3290                 return -EOPNOTSUPP;
3291
3292         flow_flags |= MLX5E_TC_FLOW_NIC;
3293         attr_size  = sizeof(struct mlx5_nic_flow_attr);
3294         err = mlx5e_alloc_flow(priv, attr_size, f, flow_flags,
3295                                &parse_attr, &flow);
3296         if (err)
3297                 goto out;
3298
3299         parse_attr->filter_dev = filter_dev;
3300         err = parse_cls_flower(flow->priv, flow, &parse_attr->spec,
3301                                f, filter_dev);
3302         if (err)
3303                 goto err_free;
3304
3305         err = parse_tc_nic_actions(priv, &rule->action, parse_attr, flow, extack);
3306         if (err)
3307                 goto err_free;
3308
3309         err = mlx5e_tc_add_nic_flow(priv, parse_attr, flow, extack);
3310         if (err)
3311                 goto err_free;
3312
3313         flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
3314         kvfree(parse_attr);
3315         *__flow = flow;
3316
3317         return 0;
3318
3319 err_free:
3320         kfree(flow);
3321         kvfree(parse_attr);
3322 out:
3323         return err;
3324 }
3325
3326 static int
3327 mlx5e_tc_add_flow(struct mlx5e_priv *priv,
3328                   struct tc_cls_flower_offload *f,
3329                   int flags,
3330                   struct net_device *filter_dev,
3331                   struct mlx5e_tc_flow **flow)
3332 {
3333         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
3334         u16 flow_flags;
3335         int err;
3336
3337         get_flags(flags, &flow_flags);
3338
3339         if (!tc_can_offload_extack(priv->netdev, f->common.extack))
3340                 return -EOPNOTSUPP;
3341
3342         if (esw && esw->mode == SRIOV_OFFLOADS)
3343                 err = mlx5e_add_fdb_flow(priv, f, flow_flags,
3344                                          filter_dev, flow);
3345         else
3346                 err = mlx5e_add_nic_flow(priv, f, flow_flags,
3347                                          filter_dev, flow);
3348
3349         return err;
3350 }
3351
3352 int mlx5e_configure_flower(struct net_device *dev, struct mlx5e_priv *priv,
3353                            struct tc_cls_flower_offload *f, int flags)
3354 {
3355         struct netlink_ext_ack *extack = f->common.extack;
3356         struct rhashtable *tc_ht = get_tc_ht(priv, flags);
3357         struct mlx5e_tc_flow *flow;
3358         int err = 0;
3359
3360         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
3361         if (flow) {
3362                 NL_SET_ERR_MSG_MOD(extack,
3363                                    "flow cookie already exists, ignoring");
3364                 netdev_warn_once(priv->netdev,
3365                                  "flow cookie %lx already exists, ignoring\n",
3366                                  f->cookie);
3367                 err = -EEXIST;
3368                 goto out;
3369         }
3370
3371         err = mlx5e_tc_add_flow(priv, f, flags, dev, &flow);
3372         if (err)
3373                 goto out;
3374
3375         err = rhashtable_insert_fast(tc_ht, &flow->node, tc_ht_params);
3376         if (err)
3377                 goto err_free;
3378
3379         return 0;
3380
3381 err_free:
3382         mlx5e_tc_del_flow(priv, flow);
3383         kfree(flow);
3384 out:
3385         return err;
3386 }
3387
3388 #define DIRECTION_MASK (MLX5E_TC_INGRESS | MLX5E_TC_EGRESS)
3389 #define FLOW_DIRECTION_MASK (MLX5E_TC_FLOW_INGRESS | MLX5E_TC_FLOW_EGRESS)
3390
3391 static bool same_flow_direction(struct mlx5e_tc_flow *flow, int flags)
3392 {
3393         if ((flow->flags & FLOW_DIRECTION_MASK) == (flags & DIRECTION_MASK))
3394                 return true;
3395
3396         return false;
3397 }
3398
3399 int mlx5e_delete_flower(struct net_device *dev, struct mlx5e_priv *priv,
3400                         struct tc_cls_flower_offload *f, int flags)
3401 {
3402         struct rhashtable *tc_ht = get_tc_ht(priv, flags);
3403         struct mlx5e_tc_flow *flow;
3404
3405         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
3406         if (!flow || !same_flow_direction(flow, flags))
3407                 return -EINVAL;
3408
3409         rhashtable_remove_fast(tc_ht, &flow->node, tc_ht_params);
3410
3411         mlx5e_tc_del_flow(priv, flow);
3412
3413         kfree(flow);
3414
3415         return 0;
3416 }
3417
3418 int mlx5e_stats_flower(struct net_device *dev, struct mlx5e_priv *priv,
3419                        struct tc_cls_flower_offload *f, int flags)
3420 {
3421         struct mlx5_devcom *devcom = priv->mdev->priv.devcom;
3422         struct rhashtable *tc_ht = get_tc_ht(priv, flags);
3423         struct mlx5_eswitch *peer_esw;
3424         struct mlx5e_tc_flow *flow;
3425         struct mlx5_fc *counter;
3426         u64 lastuse = 0;
3427         u64 packets = 0;
3428         u64 bytes = 0;
3429
3430         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
3431         if (!flow || !same_flow_direction(flow, flags))
3432                 return -EINVAL;
3433
3434         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
3435                 counter = mlx5e_tc_get_counter(flow);
3436                 if (!counter)
3437                         return 0;
3438
3439                 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
3440         }
3441
3442         /* Under multipath it's possible for one rule to be currently
3443          * un-offloaded while the other rule is offloaded.
3444          */
3445         peer_esw = mlx5_devcom_get_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
3446         if (!peer_esw)
3447                 goto out;
3448
3449         if ((flow->flags & MLX5E_TC_FLOW_DUP) &&
3450             (flow->peer_flow->flags & MLX5E_TC_FLOW_OFFLOADED)) {
3451                 u64 bytes2;
3452                 u64 packets2;
3453                 u64 lastuse2;
3454
3455                 counter = mlx5e_tc_get_counter(flow->peer_flow);
3456                 if (!counter)
3457                         goto no_peer_counter;
3458                 mlx5_fc_query_cached(counter, &bytes2, &packets2, &lastuse2);
3459
3460                 bytes += bytes2;
3461                 packets += packets2;
3462                 lastuse = max_t(u64, lastuse, lastuse2);
3463         }
3464
3465 no_peer_counter:
3466         mlx5_devcom_release_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
3467 out:
3468         flow_stats_update(&f->stats, bytes, packets, lastuse);
3469
3470         return 0;
3471 }
3472
3473 static void mlx5e_tc_hairpin_update_dead_peer(struct mlx5e_priv *priv,
3474                                               struct mlx5e_priv *peer_priv)
3475 {
3476         struct mlx5_core_dev *peer_mdev = peer_priv->mdev;
3477         struct mlx5e_hairpin_entry *hpe;
3478         u16 peer_vhca_id;
3479         int bkt;
3480
3481         if (!same_hw_devs(priv, peer_priv))
3482                 return;
3483
3484         peer_vhca_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
3485
3486         hash_for_each(priv->fs.tc.hairpin_tbl, bkt, hpe, hairpin_hlist) {
3487                 if (hpe->peer_vhca_id == peer_vhca_id)
3488                         hpe->hp->pair->peer_gone = true;
3489         }
3490 }
3491
3492 static int mlx5e_tc_netdev_event(struct notifier_block *this,
3493                                  unsigned long event, void *ptr)
3494 {
3495         struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
3496         struct mlx5e_flow_steering *fs;
3497         struct mlx5e_priv *peer_priv;
3498         struct mlx5e_tc_table *tc;
3499         struct mlx5e_priv *priv;
3500
3501         if (ndev->netdev_ops != &mlx5e_netdev_ops ||
3502             event != NETDEV_UNREGISTER ||
3503             ndev->reg_state == NETREG_REGISTERED)
3504                 return NOTIFY_DONE;
3505
3506         tc = container_of(this, struct mlx5e_tc_table, netdevice_nb);
3507         fs = container_of(tc, struct mlx5e_flow_steering, tc);
3508         priv = container_of(fs, struct mlx5e_priv, fs);
3509         peer_priv = netdev_priv(ndev);
3510         if (priv == peer_priv ||
3511             !(priv->netdev->features & NETIF_F_HW_TC))
3512                 return NOTIFY_DONE;
3513
3514         mlx5e_tc_hairpin_update_dead_peer(priv, peer_priv);
3515
3516         return NOTIFY_DONE;
3517 }
3518
3519 int mlx5e_tc_nic_init(struct mlx5e_priv *priv)
3520 {
3521         struct mlx5e_tc_table *tc = &priv->fs.tc;
3522         int err;
3523
3524         hash_init(tc->mod_hdr_tbl);
3525         hash_init(tc->hairpin_tbl);
3526
3527         err = rhashtable_init(&tc->ht, &tc_ht_params);
3528         if (err)
3529                 return err;
3530
3531         tc->netdevice_nb.notifier_call = mlx5e_tc_netdev_event;
3532         if (register_netdevice_notifier(&tc->netdevice_nb)) {
3533                 tc->netdevice_nb.notifier_call = NULL;
3534                 mlx5_core_warn(priv->mdev, "Failed to register netdev notifier\n");
3535         }
3536
3537         return err;
3538 }
3539
3540 static void _mlx5e_tc_del_flow(void *ptr, void *arg)
3541 {
3542         struct mlx5e_tc_flow *flow = ptr;
3543         struct mlx5e_priv *priv = flow->priv;
3544
3545         mlx5e_tc_del_flow(priv, flow);
3546         kfree(flow);
3547 }
3548
3549 void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv)
3550 {
3551         struct mlx5e_tc_table *tc = &priv->fs.tc;
3552
3553         if (tc->netdevice_nb.notifier_call)
3554                 unregister_netdevice_notifier(&tc->netdevice_nb);
3555
3556         rhashtable_destroy(&tc->ht);
3557
3558         if (!IS_ERR_OR_NULL(tc->t)) {
3559                 mlx5_destroy_flow_table(tc->t);
3560                 tc->t = NULL;
3561         }
3562 }
3563
3564 int mlx5e_tc_esw_init(struct rhashtable *tc_ht)
3565 {
3566         return rhashtable_init(tc_ht, &tc_ht_params);
3567 }
3568
3569 void mlx5e_tc_esw_cleanup(struct rhashtable *tc_ht)
3570 {
3571         rhashtable_free_and_destroy(tc_ht, _mlx5e_tc_del_flow, NULL);
3572 }
3573
3574 int mlx5e_tc_num_filters(struct mlx5e_priv *priv, int flags)
3575 {
3576         struct rhashtable *tc_ht = get_tc_ht(priv, flags);
3577
3578         return atomic_read(&tc_ht->nelems);
3579 }
3580
3581 void mlx5e_tc_clean_fdb_peer_flows(struct mlx5_eswitch *esw)
3582 {
3583         struct mlx5e_tc_flow *flow, *tmp;
3584
3585         list_for_each_entry_safe(flow, tmp, &esw->offloads.peer_flows, peer)
3586                 __mlx5e_tc_del_fdb_peer_flow(flow);
3587 }
3588
3589 void mlx5e_tc_reoffload_flows_work(struct work_struct *work)
3590 {
3591         struct mlx5_rep_uplink_priv *rpriv =
3592                 container_of(work, struct mlx5_rep_uplink_priv,
3593                              reoffload_flows_work);
3594         struct mlx5e_tc_flow *flow, *tmp;
3595
3596         rtnl_lock();
3597         list_for_each_entry_safe(flow, tmp, &rpriv->unready_flows, unready) {
3598                 if (!mlx5e_tc_add_fdb_flow(flow->priv, flow, NULL))
3599                         remove_unready_flow(flow);
3600         }
3601         rtnl_unlock();
3602 }