1 /* Copyright 2008 - 2016 Freescale Semiconductor Inc.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above copyright
9 * notice, this list of conditions and the following disclaimer in the
10 * documentation and/or other materials provided with the distribution.
11 * * Neither the name of Freescale Semiconductor nor the
12 * names of its contributors may be used to endorse or promote products
13 * derived from this software without specific prior written permission.
15 * ALTERNATIVELY, this software may be distributed under the terms of the
16 * GNU General Public License ("GPL") as published by the Free Software
17 * Foundation, either version 2 of that License or (at your option) any
20 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
22 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
23 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
24 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
25 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
26 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
27 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
29 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34 #include <linux/init.h>
35 #include <linux/module.h>
36 #include <linux/of_platform.h>
37 #include <linux/of_mdio.h>
38 #include <linux/of_net.h>
40 #include <linux/if_arp.h>
41 #include <linux/if_vlan.h>
42 #include <linux/icmp.h>
44 #include <linux/ipv6.h>
45 #include <linux/udp.h>
46 #include <linux/tcp.h>
47 #include <linux/net.h>
48 #include <linux/skbuff.h>
49 #include <linux/etherdevice.h>
50 #include <linux/if_ether.h>
51 #include <linux/highmem.h>
52 #include <linux/percpu.h>
53 #include <linux/dma-mapping.h>
54 #include <linux/sort.h>
55 #include <linux/phy_fixed.h>
56 #include <linux/bpf.h>
57 #include <linux/bpf_trace.h>
58 #include <soc/fsl/bman.h>
59 #include <soc/fsl/qman.h>
61 #include "fman_port.h"
65 /* CREATE_TRACE_POINTS only needs to be defined once. Other dpaa files
66 * using trace events only need to #include <trace/events/sched.h>
68 #define CREATE_TRACE_POINTS
69 #include "dpaa_eth_trace.h"
71 static int debug = -1;
72 module_param(debug, int, 0444);
73 MODULE_PARM_DESC(debug, "Module/Driver verbosity level (0=none,...,16=all)");
75 static u16 tx_timeout = 1000;
76 module_param(tx_timeout, ushort, 0444);
77 MODULE_PARM_DESC(tx_timeout, "The Tx timeout in ms");
79 #define FM_FD_STAT_RX_ERRORS \
80 (FM_FD_ERR_DMA | FM_FD_ERR_PHYSICAL | \
81 FM_FD_ERR_SIZE | FM_FD_ERR_CLS_DISCARD | \
82 FM_FD_ERR_EXTRACTION | FM_FD_ERR_NO_SCHEME | \
83 FM_FD_ERR_PRS_TIMEOUT | FM_FD_ERR_PRS_ILL_INSTRUCT | \
84 FM_FD_ERR_PRS_HDR_ERR)
86 #define FM_FD_STAT_TX_ERRORS \
87 (FM_FD_ERR_UNSUPPORTED_FORMAT | \
88 FM_FD_ERR_LENGTH | FM_FD_ERR_DMA)
90 #define DPAA_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | \
91 NETIF_MSG_LINK | NETIF_MSG_IFUP | \
92 NETIF_MSG_IFDOWN | NETIF_MSG_HW)
94 #define DPAA_INGRESS_CS_THRESHOLD 0x10000000
95 /* Ingress congestion threshold on FMan ports
96 * The size in bytes of the ingress tail-drop threshold on FMan ports.
97 * Traffic piling up above this value will be rejected by QMan and discarded
101 /* Size in bytes of the FQ taildrop threshold */
102 #define DPAA_FQ_TD 0x200000
104 #define DPAA_CS_THRESHOLD_1G 0x06000000
105 /* Egress congestion threshold on 1G ports, range 0x1000 .. 0x10000000
106 * The size in bytes of the egress Congestion State notification threshold on
107 * 1G ports. The 1G dTSECs can quite easily be flooded by cores doing Tx in a
108 * tight loop (e.g. by sending UDP datagrams at "while(1) speed"),
109 * and the larger the frame size, the more acute the problem.
110 * So we have to find a balance between these factors:
111 * - avoiding the device staying congested for a prolonged time (risking
112 * the netdev watchdog to fire - see also the tx_timeout module param);
113 * - affecting performance of protocols such as TCP, which otherwise
114 * behave well under the congestion notification mechanism;
115 * - preventing the Tx cores from tightly-looping (as if the congestion
116 * threshold was too low to be effective);
117 * - running out of memory if the CS threshold is set too high.
120 #define DPAA_CS_THRESHOLD_10G 0x10000000
121 /* The size in bytes of the egress Congestion State notification threshold on
122 * 10G ports, range 0x1000 .. 0x10000000
125 /* Largest value that the FQD's OAL field can hold */
126 #define FSL_QMAN_MAX_OAL 127
128 /* Default alignment for start of data in an Rx FD */
129 #ifdef CONFIG_DPAA_ERRATUM_A050385
130 /* aligning data start to 64 avoids DMA transaction splits, unless the buffer
131 * is crossing a 4k page boundary
133 #define DPAA_FD_DATA_ALIGNMENT (fman_has_errata_a050385() ? 64 : 16)
134 /* aligning to 256 avoids DMA transaction splits caused by 4k page boundary
135 * crossings; also, all SG fragments except the last must have a size multiple
136 * of 256 to avoid DMA transaction splits
138 #define DPAA_A050385_ALIGN 256
139 #define DPAA_FD_RX_DATA_ALIGNMENT (fman_has_errata_a050385() ? \
140 DPAA_A050385_ALIGN : 16)
142 #define DPAA_FD_DATA_ALIGNMENT 16
143 #define DPAA_FD_RX_DATA_ALIGNMENT DPAA_FD_DATA_ALIGNMENT
146 /* The DPAA requires 256 bytes reserved and mapped for the SGT */
147 #define DPAA_SGT_SIZE 256
149 /* Values for the L3R field of the FM Parse Results
151 /* L3 Type field: First IP Present IPv4 */
152 #define FM_L3_PARSE_RESULT_IPV4 0x8000
153 /* L3 Type field: First IP Present IPv6 */
154 #define FM_L3_PARSE_RESULT_IPV6 0x4000
155 /* Values for the L4R field of the FM Parse Results */
156 /* L4 Type field: UDP */
157 #define FM_L4_PARSE_RESULT_UDP 0x40
158 /* L4 Type field: TCP */
159 #define FM_L4_PARSE_RESULT_TCP 0x20
161 /* FD status field indicating whether the FM Parser has attempted to validate
162 * the L4 csum of the frame.
163 * Note that having this bit set doesn't necessarily imply that the checksum
164 * is valid. One would have to check the parse results to find that out.
166 #define FM_FD_STAT_L4CV 0x00000004
168 #define DPAA_SGT_MAX_ENTRIES 16 /* maximum number of entries in SG Table */
169 #define DPAA_BUFF_RELEASE_MAX 8 /* maximum number of buffers released at once */
171 #define FSL_DPAA_BPID_INV 0xff
172 #define FSL_DPAA_ETH_MAX_BUF_COUNT 128
173 #define FSL_DPAA_ETH_REFILL_THRESHOLD 80
175 #define DPAA_TX_PRIV_DATA_SIZE 16
176 #define DPAA_PARSE_RESULTS_SIZE sizeof(struct fman_prs_result)
177 #define DPAA_TIME_STAMP_SIZE 8
178 #define DPAA_HASH_RESULTS_SIZE 8
179 #define DPAA_HWA_SIZE (DPAA_PARSE_RESULTS_SIZE + DPAA_TIME_STAMP_SIZE \
180 + DPAA_HASH_RESULTS_SIZE)
181 #define DPAA_RX_PRIV_DATA_DEFAULT_SIZE (DPAA_TX_PRIV_DATA_SIZE + \
182 XDP_PACKET_HEADROOM - DPAA_HWA_SIZE)
183 #ifdef CONFIG_DPAA_ERRATUM_A050385
184 #define DPAA_RX_PRIV_DATA_A050385_SIZE (DPAA_A050385_ALIGN - DPAA_HWA_SIZE)
185 #define DPAA_RX_PRIV_DATA_SIZE (fman_has_errata_a050385() ? \
186 DPAA_RX_PRIV_DATA_A050385_SIZE : \
187 DPAA_RX_PRIV_DATA_DEFAULT_SIZE)
189 #define DPAA_RX_PRIV_DATA_SIZE DPAA_RX_PRIV_DATA_DEFAULT_SIZE
192 #define DPAA_ETH_PCD_RXQ_NUM 128
194 #define DPAA_ENQUEUE_RETRIES 100000
196 enum port_type {RX, TX};
199 struct dpaa_fq *tx_defq;
200 struct dpaa_fq *tx_errq;
201 struct dpaa_fq *rx_defq;
202 struct dpaa_fq *rx_errq;
203 struct dpaa_fq *rx_pcdq;
206 /* All the dpa bps in use at any moment */
207 static struct dpaa_bp *dpaa_bp_array[BM_MAX_NUM_OF_POOLS];
209 #define DPAA_BP_RAW_SIZE 4096
211 #ifdef CONFIG_DPAA_ERRATUM_A050385
212 #define dpaa_bp_size(raw_size) (SKB_WITH_OVERHEAD(raw_size) & \
213 ~(DPAA_A050385_ALIGN - 1))
215 #define dpaa_bp_size(raw_size) SKB_WITH_OVERHEAD(raw_size)
218 static int dpaa_max_frm;
220 static int dpaa_rx_extra_headroom;
222 #define dpaa_get_max_mtu() \
223 (dpaa_max_frm - (VLAN_ETH_HLEN + ETH_FCS_LEN))
225 static int dpaa_netdev_init(struct net_device *net_dev,
226 const struct net_device_ops *dpaa_ops,
229 struct dpaa_priv *priv = netdev_priv(net_dev);
230 struct device *dev = net_dev->dev.parent;
231 struct dpaa_percpu_priv *percpu_priv;
235 /* Although we access another CPU's private data here
236 * we do it at initialization so it is safe
238 for_each_possible_cpu(i) {
239 percpu_priv = per_cpu_ptr(priv->percpu_priv, i);
240 percpu_priv->net_dev = net_dev;
243 net_dev->netdev_ops = dpaa_ops;
244 mac_addr = priv->mac_dev->addr;
246 net_dev->mem_start = priv->mac_dev->res->start;
247 net_dev->mem_end = priv->mac_dev->res->end;
249 net_dev->min_mtu = ETH_MIN_MTU;
250 net_dev->max_mtu = dpaa_get_max_mtu();
252 net_dev->hw_features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
253 NETIF_F_LLTX | NETIF_F_RXHASH);
255 net_dev->hw_features |= NETIF_F_SG | NETIF_F_HIGHDMA;
256 /* The kernels enables GSO automatically, if we declare NETIF_F_SG.
257 * For conformity, we'll still declare GSO explicitly.
259 net_dev->features |= NETIF_F_GSO;
260 net_dev->features |= NETIF_F_RXCSUM;
262 net_dev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
263 /* we do not want shared skbs on TX */
264 net_dev->priv_flags &= ~IFF_TX_SKB_SHARING;
266 net_dev->features |= net_dev->hw_features;
267 net_dev->vlan_features = net_dev->features;
269 if (is_valid_ether_addr(mac_addr)) {
270 memcpy(net_dev->perm_addr, mac_addr, net_dev->addr_len);
271 memcpy(net_dev->dev_addr, mac_addr, net_dev->addr_len);
273 eth_hw_addr_random(net_dev);
274 err = priv->mac_dev->change_addr(priv->mac_dev->fman_mac,
275 (enet_addr_t *)net_dev->dev_addr);
277 dev_err(dev, "Failed to set random MAC address\n");
280 dev_info(dev, "Using random MAC address: %pM\n",
284 net_dev->ethtool_ops = &dpaa_ethtool_ops;
286 net_dev->needed_headroom = priv->tx_headroom;
287 net_dev->watchdog_timeo = msecs_to_jiffies(tx_timeout);
289 /* start without the RUNNING flag, phylib controls it later */
290 netif_carrier_off(net_dev);
292 err = register_netdev(net_dev);
294 dev_err(dev, "register_netdev() = %d\n", err);
301 static int dpaa_stop(struct net_device *net_dev)
303 struct mac_device *mac_dev;
304 struct dpaa_priv *priv;
307 priv = netdev_priv(net_dev);
308 mac_dev = priv->mac_dev;
310 netif_tx_stop_all_queues(net_dev);
311 /* Allow the Fman (Tx) port to process in-flight frames before we
312 * try switching it off.
316 err = mac_dev->stop(mac_dev);
318 netif_err(priv, ifdown, net_dev, "mac_dev->stop() = %d\n",
321 for (i = 0; i < ARRAY_SIZE(mac_dev->port); i++) {
322 error = fman_port_disable(mac_dev->port[i]);
328 phy_disconnect(net_dev->phydev);
329 net_dev->phydev = NULL;
336 static void dpaa_tx_timeout(struct net_device *net_dev, unsigned int txqueue)
338 struct dpaa_percpu_priv *percpu_priv;
339 const struct dpaa_priv *priv;
341 priv = netdev_priv(net_dev);
342 percpu_priv = this_cpu_ptr(priv->percpu_priv);
344 netif_crit(priv, timer, net_dev, "Transmit timeout latency: %u ms\n",
345 jiffies_to_msecs(jiffies - dev_trans_start(net_dev)));
347 percpu_priv->stats.tx_errors++;
350 /* Calculates the statistics for the given device by adding the statistics
351 * collected by each CPU.
353 static void dpaa_get_stats64(struct net_device *net_dev,
354 struct rtnl_link_stats64 *s)
356 int numstats = sizeof(struct rtnl_link_stats64) / sizeof(u64);
357 struct dpaa_priv *priv = netdev_priv(net_dev);
358 struct dpaa_percpu_priv *percpu_priv;
359 u64 *netstats = (u64 *)s;
363 for_each_possible_cpu(i) {
364 percpu_priv = per_cpu_ptr(priv->percpu_priv, i);
366 cpustats = (u64 *)&percpu_priv->stats;
368 /* add stats from all CPUs */
369 for (j = 0; j < numstats; j++)
370 netstats[j] += cpustats[j];
374 static int dpaa_setup_tc(struct net_device *net_dev, enum tc_setup_type type,
377 struct dpaa_priv *priv = netdev_priv(net_dev);
378 struct tc_mqprio_qopt *mqprio = type_data;
382 if (type != TC_SETUP_QDISC_MQPRIO)
385 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
386 num_tc = mqprio->num_tc;
388 if (num_tc == priv->num_tc)
392 netdev_reset_tc(net_dev);
396 if (num_tc > DPAA_TC_NUM) {
397 netdev_err(net_dev, "Too many traffic classes: max %d supported.\n",
402 netdev_set_num_tc(net_dev, num_tc);
404 for (i = 0; i < num_tc; i++)
405 netdev_set_tc_queue(net_dev, i, DPAA_TC_TXQ_NUM,
406 i * DPAA_TC_TXQ_NUM);
409 priv->num_tc = num_tc ? : 1;
410 netif_set_real_num_tx_queues(net_dev, priv->num_tc * DPAA_TC_TXQ_NUM);
414 static struct mac_device *dpaa_mac_dev_get(struct platform_device *pdev)
416 struct dpaa_eth_data *eth_data;
417 struct device *dpaa_dev;
418 struct mac_device *mac_dev;
420 dpaa_dev = &pdev->dev;
421 eth_data = dpaa_dev->platform_data;
423 dev_err(dpaa_dev, "eth_data missing\n");
424 return ERR_PTR(-ENODEV);
426 mac_dev = eth_data->mac_dev;
428 dev_err(dpaa_dev, "mac_dev missing\n");
429 return ERR_PTR(-EINVAL);
435 static int dpaa_set_mac_address(struct net_device *net_dev, void *addr)
437 const struct dpaa_priv *priv;
438 struct mac_device *mac_dev;
439 struct sockaddr old_addr;
442 priv = netdev_priv(net_dev);
444 memcpy(old_addr.sa_data, net_dev->dev_addr, ETH_ALEN);
446 err = eth_mac_addr(net_dev, addr);
448 netif_err(priv, drv, net_dev, "eth_mac_addr() = %d\n", err);
452 mac_dev = priv->mac_dev;
454 err = mac_dev->change_addr(mac_dev->fman_mac,
455 (enet_addr_t *)net_dev->dev_addr);
457 netif_err(priv, drv, net_dev, "mac_dev->change_addr() = %d\n",
459 /* reverting to previous address */
460 eth_mac_addr(net_dev, &old_addr);
468 static void dpaa_set_rx_mode(struct net_device *net_dev)
470 const struct dpaa_priv *priv;
473 priv = netdev_priv(net_dev);
475 if (!!(net_dev->flags & IFF_PROMISC) != priv->mac_dev->promisc) {
476 priv->mac_dev->promisc = !priv->mac_dev->promisc;
477 err = priv->mac_dev->set_promisc(priv->mac_dev->fman_mac,
478 priv->mac_dev->promisc);
480 netif_err(priv, drv, net_dev,
481 "mac_dev->set_promisc() = %d\n",
485 if (!!(net_dev->flags & IFF_ALLMULTI) != priv->mac_dev->allmulti) {
486 priv->mac_dev->allmulti = !priv->mac_dev->allmulti;
487 err = priv->mac_dev->set_allmulti(priv->mac_dev->fman_mac,
488 priv->mac_dev->allmulti);
490 netif_err(priv, drv, net_dev,
491 "mac_dev->set_allmulti() = %d\n",
495 err = priv->mac_dev->set_multi(net_dev, priv->mac_dev);
497 netif_err(priv, drv, net_dev, "mac_dev->set_multi() = %d\n",
501 static struct dpaa_bp *dpaa_bpid2pool(int bpid)
503 if (WARN_ON(bpid < 0 || bpid >= BM_MAX_NUM_OF_POOLS))
506 return dpaa_bp_array[bpid];
509 /* checks if this bpool is already allocated */
510 static bool dpaa_bpid2pool_use(int bpid)
512 if (dpaa_bpid2pool(bpid)) {
513 refcount_inc(&dpaa_bp_array[bpid]->refs);
520 /* called only once per bpid by dpaa_bp_alloc_pool() */
521 static void dpaa_bpid2pool_map(int bpid, struct dpaa_bp *dpaa_bp)
523 dpaa_bp_array[bpid] = dpaa_bp;
524 refcount_set(&dpaa_bp->refs, 1);
527 static int dpaa_bp_alloc_pool(struct dpaa_bp *dpaa_bp)
531 if (dpaa_bp->size == 0 || dpaa_bp->config_count == 0) {
532 pr_err("%s: Buffer pool is not properly initialized! Missing size or initial number of buffers\n",
537 /* If the pool is already specified, we only create one per bpid */
538 if (dpaa_bp->bpid != FSL_DPAA_BPID_INV &&
539 dpaa_bpid2pool_use(dpaa_bp->bpid))
542 if (dpaa_bp->bpid == FSL_DPAA_BPID_INV) {
543 dpaa_bp->pool = bman_new_pool();
544 if (!dpaa_bp->pool) {
545 pr_err("%s: bman_new_pool() failed\n",
550 dpaa_bp->bpid = (u8)bman_get_bpid(dpaa_bp->pool);
553 if (dpaa_bp->seed_cb) {
554 err = dpaa_bp->seed_cb(dpaa_bp);
556 goto pool_seed_failed;
559 dpaa_bpid2pool_map(dpaa_bp->bpid, dpaa_bp);
564 pr_err("%s: pool seeding failed\n", __func__);
565 bman_free_pool(dpaa_bp->pool);
570 /* remove and free all the buffers from the given buffer pool */
571 static void dpaa_bp_drain(struct dpaa_bp *bp)
577 struct bm_buffer bmb[8];
580 ret = bman_acquire(bp->pool, bmb, num);
583 /* we have less than 8 buffers left;
584 * drain them one by one
590 /* Pool is fully drained */
596 for (i = 0; i < num; i++)
597 bp->free_buf_cb(bp, &bmb[i]);
601 static void dpaa_bp_free(struct dpaa_bp *dpaa_bp)
603 struct dpaa_bp *bp = dpaa_bpid2pool(dpaa_bp->bpid);
605 /* the mapping between bpid and dpaa_bp is done very late in the
606 * allocation procedure; if something failed before the mapping, the bp
607 * was not configured, therefore we don't need the below instructions
612 if (!refcount_dec_and_test(&bp->refs))
618 dpaa_bp_array[bp->bpid] = NULL;
619 bman_free_pool(bp->pool);
622 static void dpaa_bps_free(struct dpaa_priv *priv)
624 dpaa_bp_free(priv->dpaa_bp);
627 /* Use multiple WQs for FQ assignment:
628 * - Tx Confirmation queues go to WQ1.
629 * - Rx Error and Tx Error queues go to WQ5 (giving them a better chance
630 * to be scheduled, in case there are many more FQs in WQ6).
631 * - Rx Default goes to WQ6.
632 * - Tx queues go to different WQs depending on their priority. Equal
633 * chunks of NR_CPUS queues go to WQ6 (lowest priority), WQ2, WQ1 and
634 * WQ0 (highest priority).
635 * This ensures that Tx-confirmed buffers are timely released. In particular,
636 * it avoids congestion on the Tx Confirm FQs, which can pile up PFDRs if they
637 * are greatly outnumbered by other FQs in the system, while
638 * dequeue scheduling is round-robin.
640 static inline void dpaa_assign_wq(struct dpaa_fq *fq, int idx)
642 switch (fq->fq_type) {
643 case FQ_TYPE_TX_CONFIRM:
644 case FQ_TYPE_TX_CONF_MQ:
647 case FQ_TYPE_RX_ERROR:
648 case FQ_TYPE_TX_ERROR:
651 case FQ_TYPE_RX_DEFAULT:
656 switch (idx / DPAA_TC_TXQ_NUM) {
658 /* Low priority (best effort) */
662 /* Medium priority */
670 /* Very high priority */
674 WARN(1, "Too many TX FQs: more than %d!\n",
679 WARN(1, "Invalid FQ type %d for FQID %d!\n",
680 fq->fq_type, fq->fqid);
684 static struct dpaa_fq *dpaa_fq_alloc(struct device *dev,
685 u32 start, u32 count,
686 struct list_head *list,
687 enum dpaa_fq_type fq_type)
689 struct dpaa_fq *dpaa_fq;
692 dpaa_fq = devm_kcalloc(dev, count, sizeof(*dpaa_fq),
697 for (i = 0; i < count; i++) {
698 dpaa_fq[i].fq_type = fq_type;
699 dpaa_fq[i].fqid = start ? start + i : 0;
700 list_add_tail(&dpaa_fq[i].list, list);
703 for (i = 0; i < count; i++)
704 dpaa_assign_wq(dpaa_fq + i, i);
709 static int dpaa_alloc_all_fqs(struct device *dev, struct list_head *list,
710 struct fm_port_fqs *port_fqs)
712 struct dpaa_fq *dpaa_fq;
713 u32 fq_base, fq_base_aligned, i;
715 dpaa_fq = dpaa_fq_alloc(dev, 0, 1, list, FQ_TYPE_RX_ERROR);
717 goto fq_alloc_failed;
719 port_fqs->rx_errq = &dpaa_fq[0];
721 dpaa_fq = dpaa_fq_alloc(dev, 0, 1, list, FQ_TYPE_RX_DEFAULT);
723 goto fq_alloc_failed;
725 port_fqs->rx_defq = &dpaa_fq[0];
727 /* the PCD FQIDs range needs to be aligned for correct operation */
728 if (qman_alloc_fqid_range(&fq_base, 2 * DPAA_ETH_PCD_RXQ_NUM))
729 goto fq_alloc_failed;
731 fq_base_aligned = ALIGN(fq_base, DPAA_ETH_PCD_RXQ_NUM);
733 for (i = fq_base; i < fq_base_aligned; i++)
734 qman_release_fqid(i);
736 for (i = fq_base_aligned + DPAA_ETH_PCD_RXQ_NUM;
737 i < (fq_base + 2 * DPAA_ETH_PCD_RXQ_NUM); i++)
738 qman_release_fqid(i);
740 dpaa_fq = dpaa_fq_alloc(dev, fq_base_aligned, DPAA_ETH_PCD_RXQ_NUM,
741 list, FQ_TYPE_RX_PCD);
743 goto fq_alloc_failed;
745 port_fqs->rx_pcdq = &dpaa_fq[0];
747 if (!dpaa_fq_alloc(dev, 0, DPAA_ETH_TXQ_NUM, list, FQ_TYPE_TX_CONF_MQ))
748 goto fq_alloc_failed;
750 dpaa_fq = dpaa_fq_alloc(dev, 0, 1, list, FQ_TYPE_TX_ERROR);
752 goto fq_alloc_failed;
754 port_fqs->tx_errq = &dpaa_fq[0];
756 dpaa_fq = dpaa_fq_alloc(dev, 0, 1, list, FQ_TYPE_TX_CONFIRM);
758 goto fq_alloc_failed;
760 port_fqs->tx_defq = &dpaa_fq[0];
762 if (!dpaa_fq_alloc(dev, 0, DPAA_ETH_TXQ_NUM, list, FQ_TYPE_TX))
763 goto fq_alloc_failed;
768 dev_err(dev, "dpaa_fq_alloc() failed\n");
772 static u32 rx_pool_channel;
773 static DEFINE_SPINLOCK(rx_pool_channel_init);
775 static int dpaa_get_channel(void)
777 spin_lock(&rx_pool_channel_init);
778 if (!rx_pool_channel) {
782 ret = qman_alloc_pool(&pool);
785 rx_pool_channel = pool;
787 spin_unlock(&rx_pool_channel_init);
788 if (!rx_pool_channel)
790 return rx_pool_channel;
793 static void dpaa_release_channel(void)
795 qman_release_pool(rx_pool_channel);
798 static void dpaa_eth_add_channel(u16 channel, struct device *dev)
800 u32 pool = QM_SDQCR_CHANNELS_POOL_CONV(channel);
801 const cpumask_t *cpus = qman_affine_cpus();
802 struct qman_portal *portal;
805 for_each_cpu_and(cpu, cpus, cpu_online_mask) {
806 portal = qman_get_affine_portal(cpu);
807 qman_p_static_dequeue_add(portal, pool);
808 qman_start_using_portal(portal, dev);
812 /* Congestion group state change notification callback.
813 * Stops the device's egress queues while they are congested and
814 * wakes them upon exiting congested state.
815 * Also updates some CGR-related stats.
817 static void dpaa_eth_cgscn(struct qman_portal *qm, struct qman_cgr *cgr,
820 struct dpaa_priv *priv = (struct dpaa_priv *)container_of(cgr,
821 struct dpaa_priv, cgr_data.cgr);
824 priv->cgr_data.congestion_start_jiffies = jiffies;
825 netif_tx_stop_all_queues(priv->net_dev);
826 priv->cgr_data.cgr_congested_count++;
828 priv->cgr_data.congested_jiffies +=
829 (jiffies - priv->cgr_data.congestion_start_jiffies);
830 netif_tx_wake_all_queues(priv->net_dev);
834 static int dpaa_eth_cgr_init(struct dpaa_priv *priv)
836 struct qm_mcc_initcgr initcgr;
840 err = qman_alloc_cgrid(&priv->cgr_data.cgr.cgrid);
842 if (netif_msg_drv(priv))
843 pr_err("%s: Error %d allocating CGR ID\n",
847 priv->cgr_data.cgr.cb = dpaa_eth_cgscn;
849 /* Enable Congestion State Change Notifications and CS taildrop */
850 memset(&initcgr, 0, sizeof(initcgr));
851 initcgr.we_mask = cpu_to_be16(QM_CGR_WE_CSCN_EN | QM_CGR_WE_CS_THRES);
852 initcgr.cgr.cscn_en = QM_CGR_EN;
854 /* Set different thresholds based on the MAC speed.
855 * This may turn suboptimal if the MAC is reconfigured at a speed
856 * lower than its max, e.g. if a dTSEC later negotiates a 100Mbps link.
857 * In such cases, we ought to reconfigure the threshold, too.
859 if (priv->mac_dev->if_support & SUPPORTED_10000baseT_Full)
860 cs_th = DPAA_CS_THRESHOLD_10G;
862 cs_th = DPAA_CS_THRESHOLD_1G;
863 qm_cgr_cs_thres_set64(&initcgr.cgr.cs_thres, cs_th, 1);
865 initcgr.we_mask |= cpu_to_be16(QM_CGR_WE_CSTD_EN);
866 initcgr.cgr.cstd_en = QM_CGR_EN;
868 err = qman_create_cgr(&priv->cgr_data.cgr, QMAN_CGR_FLAG_USE_INIT,
871 if (netif_msg_drv(priv))
872 pr_err("%s: Error %d creating CGR with ID %d\n",
873 __func__, err, priv->cgr_data.cgr.cgrid);
874 qman_release_cgrid(priv->cgr_data.cgr.cgrid);
877 if (netif_msg_drv(priv))
878 pr_debug("Created CGR %d for netdev with hwaddr %pM on QMan channel %d\n",
879 priv->cgr_data.cgr.cgrid, priv->mac_dev->addr,
880 priv->cgr_data.cgr.chan);
886 static inline void dpaa_setup_ingress(const struct dpaa_priv *priv,
888 const struct qman_fq *template)
890 fq->fq_base = *template;
891 fq->net_dev = priv->net_dev;
893 fq->flags = QMAN_FQ_FLAG_NO_ENQUEUE;
894 fq->channel = priv->channel;
897 static inline void dpaa_setup_egress(const struct dpaa_priv *priv,
899 struct fman_port *port,
900 const struct qman_fq *template)
902 fq->fq_base = *template;
903 fq->net_dev = priv->net_dev;
906 fq->flags = QMAN_FQ_FLAG_TO_DCPORTAL;
907 fq->channel = (u16)fman_port_get_qman_channel_id(port);
909 fq->flags = QMAN_FQ_FLAG_NO_MODIFY;
913 static void dpaa_fq_setup(struct dpaa_priv *priv,
914 const struct dpaa_fq_cbs *fq_cbs,
915 struct fman_port *tx_port)
917 int egress_cnt = 0, conf_cnt = 0, num_portals = 0, portal_cnt = 0, cpu;
918 const cpumask_t *affine_cpus = qman_affine_cpus();
919 u16 channels[NR_CPUS];
922 for_each_cpu_and(cpu, affine_cpus, cpu_online_mask)
923 channels[num_portals++] = qman_affine_channel(cpu);
925 if (num_portals == 0)
926 dev_err(priv->net_dev->dev.parent,
927 "No Qman software (affine) channels found\n");
929 /* Initialize each FQ in the list */
930 list_for_each_entry(fq, &priv->dpaa_fq_list, list) {
931 switch (fq->fq_type) {
932 case FQ_TYPE_RX_DEFAULT:
933 dpaa_setup_ingress(priv, fq, &fq_cbs->rx_defq);
935 case FQ_TYPE_RX_ERROR:
936 dpaa_setup_ingress(priv, fq, &fq_cbs->rx_errq);
941 dpaa_setup_ingress(priv, fq, &fq_cbs->rx_defq);
942 fq->channel = channels[portal_cnt++ % num_portals];
945 dpaa_setup_egress(priv, fq, tx_port,
946 &fq_cbs->egress_ern);
947 /* If we have more Tx queues than the number of cores,
948 * just ignore the extra ones.
950 if (egress_cnt < DPAA_ETH_TXQ_NUM)
951 priv->egress_fqs[egress_cnt++] = &fq->fq_base;
953 case FQ_TYPE_TX_CONF_MQ:
954 priv->conf_fqs[conf_cnt++] = &fq->fq_base;
956 case FQ_TYPE_TX_CONFIRM:
957 dpaa_setup_ingress(priv, fq, &fq_cbs->tx_defq);
959 case FQ_TYPE_TX_ERROR:
960 dpaa_setup_ingress(priv, fq, &fq_cbs->tx_errq);
963 dev_warn(priv->net_dev->dev.parent,
964 "Unknown FQ type detected!\n");
969 /* Make sure all CPUs receive a corresponding Tx queue. */
970 while (egress_cnt < DPAA_ETH_TXQ_NUM) {
971 list_for_each_entry(fq, &priv->dpaa_fq_list, list) {
972 if (fq->fq_type != FQ_TYPE_TX)
974 priv->egress_fqs[egress_cnt++] = &fq->fq_base;
975 if (egress_cnt == DPAA_ETH_TXQ_NUM)
981 static inline int dpaa_tx_fq_to_id(const struct dpaa_priv *priv,
982 struct qman_fq *tx_fq)
986 for (i = 0; i < DPAA_ETH_TXQ_NUM; i++)
987 if (priv->egress_fqs[i] == tx_fq)
993 static int dpaa_fq_init(struct dpaa_fq *dpaa_fq, bool td_enable)
995 const struct dpaa_priv *priv;
996 struct qman_fq *confq = NULL;
997 struct qm_mcc_initfq initfq;
1003 priv = netdev_priv(dpaa_fq->net_dev);
1004 dev = dpaa_fq->net_dev->dev.parent;
1006 if (dpaa_fq->fqid == 0)
1007 dpaa_fq->flags |= QMAN_FQ_FLAG_DYNAMIC_FQID;
1009 dpaa_fq->init = !(dpaa_fq->flags & QMAN_FQ_FLAG_NO_MODIFY);
1011 err = qman_create_fq(dpaa_fq->fqid, dpaa_fq->flags, &dpaa_fq->fq_base);
1013 dev_err(dev, "qman_create_fq() failed\n");
1016 fq = &dpaa_fq->fq_base;
1018 if (dpaa_fq->init) {
1019 memset(&initfq, 0, sizeof(initfq));
1021 initfq.we_mask = cpu_to_be16(QM_INITFQ_WE_FQCTRL);
1022 /* Note: we may get to keep an empty FQ in cache */
1023 initfq.fqd.fq_ctrl = cpu_to_be16(QM_FQCTRL_PREFERINCACHE);
1025 /* Try to reduce the number of portal interrupts for
1026 * Tx Confirmation FQs.
1028 if (dpaa_fq->fq_type == FQ_TYPE_TX_CONFIRM)
1029 initfq.fqd.fq_ctrl |= cpu_to_be16(QM_FQCTRL_AVOIDBLOCK);
1032 initfq.we_mask |= cpu_to_be16(QM_INITFQ_WE_DESTWQ);
1034 qm_fqd_set_destwq(&initfq.fqd, dpaa_fq->channel, dpaa_fq->wq);
1036 /* Put all egress queues in a congestion group of their own.
1037 * Sensu stricto, the Tx confirmation queues are Rx FQs,
1038 * rather than Tx - but they nonetheless account for the
1039 * memory footprint on behalf of egress traffic. We therefore
1040 * place them in the netdev's CGR, along with the Tx FQs.
1042 if (dpaa_fq->fq_type == FQ_TYPE_TX ||
1043 dpaa_fq->fq_type == FQ_TYPE_TX_CONFIRM ||
1044 dpaa_fq->fq_type == FQ_TYPE_TX_CONF_MQ) {
1045 initfq.we_mask |= cpu_to_be16(QM_INITFQ_WE_CGID);
1046 initfq.fqd.fq_ctrl |= cpu_to_be16(QM_FQCTRL_CGE);
1047 initfq.fqd.cgid = (u8)priv->cgr_data.cgr.cgrid;
1048 /* Set a fixed overhead accounting, in an attempt to
1049 * reduce the impact of fixed-size skb shells and the
1050 * driver's needed headroom on system memory. This is
1051 * especially the case when the egress traffic is
1052 * composed of small datagrams.
1053 * Unfortunately, QMan's OAL value is capped to an
1054 * insufficient value, but even that is better than
1055 * no overhead accounting at all.
1057 initfq.we_mask |= cpu_to_be16(QM_INITFQ_WE_OAC);
1058 qm_fqd_set_oac(&initfq.fqd, QM_OAC_CG);
1059 qm_fqd_set_oal(&initfq.fqd,
1060 min(sizeof(struct sk_buff) +
1062 (size_t)FSL_QMAN_MAX_OAL));
1066 initfq.we_mask |= cpu_to_be16(QM_INITFQ_WE_TDTHRESH);
1067 qm_fqd_set_taildrop(&initfq.fqd, DPAA_FQ_TD, 1);
1068 initfq.fqd.fq_ctrl = cpu_to_be16(QM_FQCTRL_TDE);
1071 if (dpaa_fq->fq_type == FQ_TYPE_TX) {
1072 queue_id = dpaa_tx_fq_to_id(priv, &dpaa_fq->fq_base);
1074 confq = priv->conf_fqs[queue_id];
1077 cpu_to_be16(QM_INITFQ_WE_CONTEXTA);
1078 /* ContextA: OVOM=1(use contextA2 bits instead of ICAD)
1079 * A2V=1 (contextA A2 field is valid)
1080 * A0V=1 (contextA A0 field is valid)
1081 * B0V=1 (contextB field is valid)
1082 * ContextA A2: EBD=1 (deallocate buffers inside FMan)
1083 * ContextB B0(ASPID): 0 (absolute Virtual Storage ID)
1085 qm_fqd_context_a_set64(&initfq.fqd,
1086 0x1e00000080000000ULL);
1090 /* Put all the ingress queues in our "ingress CGR". */
1091 if (priv->use_ingress_cgr &&
1092 (dpaa_fq->fq_type == FQ_TYPE_RX_DEFAULT ||
1093 dpaa_fq->fq_type == FQ_TYPE_RX_ERROR ||
1094 dpaa_fq->fq_type == FQ_TYPE_RX_PCD)) {
1095 initfq.we_mask |= cpu_to_be16(QM_INITFQ_WE_CGID);
1096 initfq.fqd.fq_ctrl |= cpu_to_be16(QM_FQCTRL_CGE);
1097 initfq.fqd.cgid = (u8)priv->ingress_cgr.cgrid;
1098 /* Set a fixed overhead accounting, just like for the
1101 initfq.we_mask |= cpu_to_be16(QM_INITFQ_WE_OAC);
1102 qm_fqd_set_oac(&initfq.fqd, QM_OAC_CG);
1103 qm_fqd_set_oal(&initfq.fqd,
1104 min(sizeof(struct sk_buff) +
1106 (size_t)FSL_QMAN_MAX_OAL));
1109 /* Initialization common to all ingress queues */
1110 if (dpaa_fq->flags & QMAN_FQ_FLAG_NO_ENQUEUE) {
1111 initfq.we_mask |= cpu_to_be16(QM_INITFQ_WE_CONTEXTA);
1112 initfq.fqd.fq_ctrl |= cpu_to_be16(QM_FQCTRL_HOLDACTIVE |
1113 QM_FQCTRL_CTXASTASHING);
1114 initfq.fqd.context_a.stashing.exclusive =
1115 QM_STASHING_EXCL_DATA | QM_STASHING_EXCL_CTX |
1116 QM_STASHING_EXCL_ANNOTATION;
1117 qm_fqd_set_stashing(&initfq.fqd, 1, 2,
1118 DIV_ROUND_UP(sizeof(struct qman_fq),
1122 err = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &initfq);
1124 dev_err(dev, "qman_init_fq(%u) = %d\n",
1125 qman_fq_fqid(fq), err);
1126 qman_destroy_fq(fq);
1131 dpaa_fq->fqid = qman_fq_fqid(fq);
1133 if (dpaa_fq->fq_type == FQ_TYPE_RX_DEFAULT ||
1134 dpaa_fq->fq_type == FQ_TYPE_RX_PCD) {
1135 err = xdp_rxq_info_reg(&dpaa_fq->xdp_rxq, dpaa_fq->net_dev,
1138 dev_err(dev, "xdp_rxq_info_reg() = %d\n", err);
1142 err = xdp_rxq_info_reg_mem_model(&dpaa_fq->xdp_rxq,
1143 MEM_TYPE_PAGE_ORDER0, NULL);
1145 dev_err(dev, "xdp_rxq_info_reg_mem_model() = %d\n",
1147 xdp_rxq_info_unreg(&dpaa_fq->xdp_rxq);
1155 static int dpaa_fq_free_entry(struct device *dev, struct qman_fq *fq)
1157 const struct dpaa_priv *priv;
1158 struct dpaa_fq *dpaa_fq;
1163 dpaa_fq = container_of(fq, struct dpaa_fq, fq_base);
1164 priv = netdev_priv(dpaa_fq->net_dev);
1166 if (dpaa_fq->init) {
1167 err = qman_retire_fq(fq, NULL);
1168 if (err < 0 && netif_msg_drv(priv))
1169 dev_err(dev, "qman_retire_fq(%u) = %d\n",
1170 qman_fq_fqid(fq), err);
1172 error = qman_oos_fq(fq);
1173 if (error < 0 && netif_msg_drv(priv)) {
1174 dev_err(dev, "qman_oos_fq(%u) = %d\n",
1175 qman_fq_fqid(fq), error);
1181 if ((dpaa_fq->fq_type == FQ_TYPE_RX_DEFAULT ||
1182 dpaa_fq->fq_type == FQ_TYPE_RX_PCD) &&
1183 xdp_rxq_info_is_reg(&dpaa_fq->xdp_rxq))
1184 xdp_rxq_info_unreg(&dpaa_fq->xdp_rxq);
1186 qman_destroy_fq(fq);
1187 list_del(&dpaa_fq->list);
1192 static int dpaa_fq_free(struct device *dev, struct list_head *list)
1194 struct dpaa_fq *dpaa_fq, *tmp;
1198 list_for_each_entry_safe(dpaa_fq, tmp, list, list) {
1199 error = dpaa_fq_free_entry(dev, (struct qman_fq *)dpaa_fq);
1200 if (error < 0 && err >= 0)
1207 static int dpaa_eth_init_tx_port(struct fman_port *port, struct dpaa_fq *errq,
1208 struct dpaa_fq *defq,
1209 struct dpaa_buffer_layout *buf_layout)
1211 struct fman_buffer_prefix_content buf_prefix_content;
1212 struct fman_port_params params;
1215 memset(¶ms, 0, sizeof(params));
1216 memset(&buf_prefix_content, 0, sizeof(buf_prefix_content));
1218 buf_prefix_content.priv_data_size = buf_layout->priv_data_size;
1219 buf_prefix_content.pass_prs_result = true;
1220 buf_prefix_content.pass_hash_result = true;
1221 buf_prefix_content.pass_time_stamp = true;
1222 buf_prefix_content.data_align = DPAA_FD_DATA_ALIGNMENT;
1224 params.specific_params.non_rx_params.err_fqid = errq->fqid;
1225 params.specific_params.non_rx_params.dflt_fqid = defq->fqid;
1227 err = fman_port_config(port, ¶ms);
1229 pr_err("%s: fman_port_config failed\n", __func__);
1233 err = fman_port_cfg_buf_prefix_content(port, &buf_prefix_content);
1235 pr_err("%s: fman_port_cfg_buf_prefix_content failed\n",
1240 err = fman_port_init(port);
1242 pr_err("%s: fm_port_init failed\n", __func__);
1247 static int dpaa_eth_init_rx_port(struct fman_port *port, struct dpaa_bp *bp,
1248 struct dpaa_fq *errq,
1249 struct dpaa_fq *defq, struct dpaa_fq *pcdq,
1250 struct dpaa_buffer_layout *buf_layout)
1252 struct fman_buffer_prefix_content buf_prefix_content;
1253 struct fman_port_rx_params *rx_p;
1254 struct fman_port_params params;
1257 memset(¶ms, 0, sizeof(params));
1258 memset(&buf_prefix_content, 0, sizeof(buf_prefix_content));
1260 buf_prefix_content.priv_data_size = buf_layout->priv_data_size;
1261 buf_prefix_content.pass_prs_result = true;
1262 buf_prefix_content.pass_hash_result = true;
1263 buf_prefix_content.pass_time_stamp = true;
1264 buf_prefix_content.data_align = DPAA_FD_RX_DATA_ALIGNMENT;
1266 rx_p = ¶ms.specific_params.rx_params;
1267 rx_p->err_fqid = errq->fqid;
1268 rx_p->dflt_fqid = defq->fqid;
1270 rx_p->pcd_base_fqid = pcdq->fqid;
1271 rx_p->pcd_fqs_count = DPAA_ETH_PCD_RXQ_NUM;
1274 rx_p->ext_buf_pools.num_of_pools_used = 1;
1275 rx_p->ext_buf_pools.ext_buf_pool[0].id = bp->bpid;
1276 rx_p->ext_buf_pools.ext_buf_pool[0].size = (u16)bp->size;
1278 err = fman_port_config(port, ¶ms);
1280 pr_err("%s: fman_port_config failed\n", __func__);
1284 err = fman_port_cfg_buf_prefix_content(port, &buf_prefix_content);
1286 pr_err("%s: fman_port_cfg_buf_prefix_content failed\n",
1291 err = fman_port_init(port);
1293 pr_err("%s: fm_port_init failed\n", __func__);
1298 static int dpaa_eth_init_ports(struct mac_device *mac_dev,
1300 struct fm_port_fqs *port_fqs,
1301 struct dpaa_buffer_layout *buf_layout,
1304 struct fman_port *rxport = mac_dev->port[RX];
1305 struct fman_port *txport = mac_dev->port[TX];
1308 err = dpaa_eth_init_tx_port(txport, port_fqs->tx_errq,
1309 port_fqs->tx_defq, &buf_layout[TX]);
1313 err = dpaa_eth_init_rx_port(rxport, bp, port_fqs->rx_errq,
1314 port_fqs->rx_defq, port_fqs->rx_pcdq,
1320 static int dpaa_bman_release(const struct dpaa_bp *dpaa_bp,
1321 struct bm_buffer *bmb, int cnt)
1325 err = bman_release(dpaa_bp->pool, bmb, cnt);
1326 /* Should never occur, address anyway to avoid leaking the buffers */
1327 if (WARN_ON(err) && dpaa_bp->free_buf_cb)
1329 dpaa_bp->free_buf_cb(dpaa_bp, &bmb[cnt]);
1334 static void dpaa_release_sgt_members(struct qm_sg_entry *sgt)
1336 struct bm_buffer bmb[DPAA_BUFF_RELEASE_MAX];
1337 struct dpaa_bp *dpaa_bp;
1340 memset(bmb, 0, sizeof(bmb));
1343 dpaa_bp = dpaa_bpid2pool(sgt[i].bpid);
1349 WARN_ON(qm_sg_entry_is_ext(&sgt[i]));
1351 bm_buffer_set64(&bmb[j], qm_sg_entry_get64(&sgt[i]));
1354 } while (j < ARRAY_SIZE(bmb) &&
1355 !qm_sg_entry_is_final(&sgt[i - 1]) &&
1356 sgt[i - 1].bpid == sgt[i].bpid);
1358 dpaa_bman_release(dpaa_bp, bmb, j);
1359 } while (!qm_sg_entry_is_final(&sgt[i - 1]));
1362 static void dpaa_fd_release(const struct net_device *net_dev,
1363 const struct qm_fd *fd)
1365 struct qm_sg_entry *sgt;
1366 struct dpaa_bp *dpaa_bp;
1367 struct bm_buffer bmb;
1372 bm_buffer_set64(&bmb, qm_fd_addr(fd));
1374 dpaa_bp = dpaa_bpid2pool(fd->bpid);
1378 if (qm_fd_get_format(fd) == qm_fd_sg) {
1379 vaddr = phys_to_virt(qm_fd_addr(fd));
1380 sgt = vaddr + qm_fd_get_offset(fd);
1382 dma_unmap_page(dpaa_bp->priv->rx_dma_dev, qm_fd_addr(fd),
1383 DPAA_BP_RAW_SIZE, DMA_FROM_DEVICE);
1385 dpaa_release_sgt_members(sgt);
1387 addr = dma_map_page(dpaa_bp->priv->rx_dma_dev,
1388 virt_to_page(vaddr), 0, DPAA_BP_RAW_SIZE,
1390 if (dma_mapping_error(dpaa_bp->priv->rx_dma_dev, addr)) {
1391 netdev_err(net_dev, "DMA mapping failed\n");
1394 bm_buffer_set64(&bmb, addr);
1397 dpaa_bman_release(dpaa_bp, &bmb, 1);
1400 static void count_ern(struct dpaa_percpu_priv *percpu_priv,
1401 const union qm_mr_entry *msg)
1403 switch (msg->ern.rc & QM_MR_RC_MASK) {
1404 case QM_MR_RC_CGR_TAILDROP:
1405 percpu_priv->ern_cnt.cg_tdrop++;
1408 percpu_priv->ern_cnt.wred++;
1410 case QM_MR_RC_ERROR:
1411 percpu_priv->ern_cnt.err_cond++;
1413 case QM_MR_RC_ORPWINDOW_EARLY:
1414 percpu_priv->ern_cnt.early_window++;
1416 case QM_MR_RC_ORPWINDOW_LATE:
1417 percpu_priv->ern_cnt.late_window++;
1419 case QM_MR_RC_FQ_TAILDROP:
1420 percpu_priv->ern_cnt.fq_tdrop++;
1422 case QM_MR_RC_ORPWINDOW_RETIRED:
1423 percpu_priv->ern_cnt.fq_retired++;
1425 case QM_MR_RC_ORP_ZERO:
1426 percpu_priv->ern_cnt.orp_zero++;
1431 /* Turn on HW checksum computation for this outgoing frame.
1432 * If the current protocol is not something we support in this regard
1433 * (or if the stack has already computed the SW checksum), we do nothing.
1435 * Returns 0 if all goes well (or HW csum doesn't apply), and a negative value
1438 * Note that this function may modify the fd->cmd field and the skb data buffer
1439 * (the Parse Results area).
1441 static int dpaa_enable_tx_csum(struct dpaa_priv *priv,
1442 struct sk_buff *skb,
1444 void *parse_results)
1446 struct fman_prs_result *parse_result;
1447 u16 ethertype = ntohs(skb->protocol);
1448 struct ipv6hdr *ipv6h = NULL;
1453 if (skb->ip_summed != CHECKSUM_PARTIAL)
1456 /* Note: L3 csum seems to be already computed in sw, but we can't choose
1457 * L4 alone from the FM configuration anyway.
1460 /* Fill in some fields of the Parse Results array, so the FMan
1461 * can find them as if they came from the FMan Parser.
1463 parse_result = (struct fman_prs_result *)parse_results;
1465 /* If we're dealing with VLAN, get the real Ethernet type */
1466 if (ethertype == ETH_P_8021Q) {
1467 /* We can't always assume the MAC header is set correctly
1468 * by the stack, so reset to beginning of skb->data
1470 skb_reset_mac_header(skb);
1471 ethertype = ntohs(vlan_eth_hdr(skb)->h_vlan_encapsulated_proto);
1474 /* Fill in the relevant L3 parse result fields
1475 * and read the L4 protocol type
1477 switch (ethertype) {
1479 parse_result->l3r = cpu_to_be16(FM_L3_PARSE_RESULT_IPV4);
1482 l4_proto = iph->protocol;
1485 parse_result->l3r = cpu_to_be16(FM_L3_PARSE_RESULT_IPV6);
1486 ipv6h = ipv6_hdr(skb);
1488 l4_proto = ipv6h->nexthdr;
1491 /* We shouldn't even be here */
1492 if (net_ratelimit())
1493 netif_alert(priv, tx_err, priv->net_dev,
1494 "Can't compute HW csum for L3 proto 0x%x\n",
1495 ntohs(skb->protocol));
1500 /* Fill in the relevant L4 parse result fields */
1503 parse_result->l4r = FM_L4_PARSE_RESULT_UDP;
1506 parse_result->l4r = FM_L4_PARSE_RESULT_TCP;
1509 if (net_ratelimit())
1510 netif_alert(priv, tx_err, priv->net_dev,
1511 "Can't compute HW csum for L4 proto 0x%x\n",
1517 /* At index 0 is IPOffset_1 as defined in the Parse Results */
1518 parse_result->ip_off[0] = (u8)skb_network_offset(skb);
1519 parse_result->l4_off = (u8)skb_transport_offset(skb);
1521 /* Enable L3 (and L4, if TCP or UDP) HW checksum. */
1522 fd->cmd |= cpu_to_be32(FM_FD_CMD_RPD | FM_FD_CMD_DTC);
1524 /* On P1023 and similar platforms fd->cmd interpretation could
1525 * be disabled by setting CONTEXT_A bit ICMD; currently this bit
1526 * is not set so we do not need to check; in the future, if/when
1527 * using context_a we need to check this bit
1534 static int dpaa_bp_add_8_bufs(const struct dpaa_bp *dpaa_bp)
1536 struct net_device *net_dev = dpaa_bp->priv->net_dev;
1537 struct bm_buffer bmb[8];
1542 for (i = 0; i < 8; i++) {
1543 p = dev_alloc_pages(0);
1545 netdev_err(net_dev, "dev_alloc_pages() failed\n");
1546 goto release_previous_buffs;
1549 addr = dma_map_page(dpaa_bp->priv->rx_dma_dev, p, 0,
1550 DPAA_BP_RAW_SIZE, DMA_FROM_DEVICE);
1551 if (unlikely(dma_mapping_error(dpaa_bp->priv->rx_dma_dev,
1553 netdev_err(net_dev, "DMA map failed\n");
1554 goto release_previous_buffs;
1558 bm_buffer_set64(&bmb[i], addr);
1562 return dpaa_bman_release(dpaa_bp, bmb, i);
1564 release_previous_buffs:
1565 WARN_ONCE(1, "dpaa_eth: failed to add buffers on Rx\n");
1567 bm_buffer_set64(&bmb[i], 0);
1568 /* Avoid releasing a completely null buffer; bman_release() requires
1569 * at least one buffer.
1577 static int dpaa_bp_seed(struct dpaa_bp *dpaa_bp)
1581 /* Give each CPU an allotment of "config_count" buffers */
1582 for_each_possible_cpu(i) {
1583 int *count_ptr = per_cpu_ptr(dpaa_bp->percpu_count, i);
1586 /* Although we access another CPU's counters here
1587 * we do it at boot time so it is safe
1589 for (j = 0; j < dpaa_bp->config_count; j += 8)
1590 *count_ptr += dpaa_bp_add_8_bufs(dpaa_bp);
1595 /* Add buffers/(pages) for Rx processing whenever bpool count falls below
1598 static int dpaa_eth_refill_bpool(struct dpaa_bp *dpaa_bp, int *countptr)
1600 int count = *countptr;
1603 if (unlikely(count < FSL_DPAA_ETH_REFILL_THRESHOLD)) {
1605 new_bufs = dpaa_bp_add_8_bufs(dpaa_bp);
1606 if (unlikely(!new_bufs)) {
1607 /* Avoid looping forever if we've temporarily
1608 * run out of memory. We'll try again at the
1614 } while (count < FSL_DPAA_ETH_MAX_BUF_COUNT);
1617 if (unlikely(count < FSL_DPAA_ETH_MAX_BUF_COUNT))
1624 static int dpaa_eth_refill_bpools(struct dpaa_priv *priv)
1626 struct dpaa_bp *dpaa_bp;
1629 dpaa_bp = priv->dpaa_bp;
1632 countptr = this_cpu_ptr(dpaa_bp->percpu_count);
1634 return dpaa_eth_refill_bpool(dpaa_bp, countptr);
1637 /* Cleanup function for outgoing frame descriptors that were built on Tx path,
1638 * either contiguous frames or scatter/gather ones.
1639 * Skb freeing is not handled here.
1641 * This function may be called on error paths in the Tx function, so guard
1642 * against cases when not all fd relevant fields were filled in. To avoid
1643 * reading the invalid transmission timestamp for the error paths set ts to
1646 * Return the skb backpointer, since for S/G frames the buffer containing it
1649 * No skb backpointer is set when transmitting XDP frames. Cleanup the buffer
1650 * and return NULL in this case.
1652 static struct sk_buff *dpaa_cleanup_tx_fd(const struct dpaa_priv *priv,
1653 const struct qm_fd *fd, bool ts)
1655 const enum dma_data_direction dma_dir = DMA_TO_DEVICE;
1656 struct device *dev = priv->net_dev->dev.parent;
1657 struct skb_shared_hwtstamps shhwtstamps;
1658 dma_addr_t addr = qm_fd_addr(fd);
1659 void *vaddr = phys_to_virt(addr);
1660 const struct qm_sg_entry *sgt;
1661 struct dpaa_eth_swbp *swbp;
1662 struct sk_buff *skb;
1666 if (unlikely(qm_fd_get_format(fd) == qm_fd_sg)) {
1667 dma_unmap_page(priv->tx_dma_dev, addr,
1668 qm_fd_get_offset(fd) + DPAA_SGT_SIZE,
1671 /* The sgt buffer has been allocated with netdev_alloc_frag(),
1674 sgt = vaddr + qm_fd_get_offset(fd);
1676 /* sgt[0] is from lowmem, was dma_map_single()-ed */
1677 dma_unmap_single(priv->tx_dma_dev, qm_sg_addr(&sgt[0]),
1678 qm_sg_entry_get_len(&sgt[0]), dma_dir);
1680 /* remaining pages were mapped with skb_frag_dma_map() */
1681 for (i = 1; (i < DPAA_SGT_MAX_ENTRIES) &&
1682 !qm_sg_entry_is_final(&sgt[i - 1]); i++) {
1683 WARN_ON(qm_sg_entry_is_ext(&sgt[i]));
1685 dma_unmap_page(priv->tx_dma_dev, qm_sg_addr(&sgt[i]),
1686 qm_sg_entry_get_len(&sgt[i]), dma_dir);
1689 dma_unmap_single(priv->tx_dma_dev, addr,
1690 qm_fd_get_offset(fd) + qm_fd_get_length(fd),
1694 swbp = (struct dpaa_eth_swbp *)vaddr;
1697 /* No skb backpointer is set when running XDP. An xdp_frame
1698 * backpointer is saved instead.
1701 xdp_return_frame(swbp->xdpf);
1705 /* DMA unmapping is required before accessing the HW provided info */
1706 if (ts && priv->tx_tstamp &&
1707 skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {
1708 memset(&shhwtstamps, 0, sizeof(shhwtstamps));
1710 if (!fman_port_get_tstamp(priv->mac_dev->port[TX], vaddr,
1712 shhwtstamps.hwtstamp = ns_to_ktime(ns);
1713 skb_tstamp_tx(skb, &shhwtstamps);
1715 dev_warn(dev, "fman_port_get_tstamp failed!\n");
1719 if (qm_fd_get_format(fd) == qm_fd_sg)
1720 /* Free the page that we allocated on Tx for the SGT */
1721 free_pages((unsigned long)vaddr, 0);
1726 static u8 rx_csum_offload(const struct dpaa_priv *priv, const struct qm_fd *fd)
1728 /* The parser has run and performed L4 checksum validation.
1729 * We know there were no parser errors (and implicitly no
1730 * L4 csum error), otherwise we wouldn't be here.
1732 if ((priv->net_dev->features & NETIF_F_RXCSUM) &&
1733 (be32_to_cpu(fd->status) & FM_FD_STAT_L4CV))
1734 return CHECKSUM_UNNECESSARY;
1736 /* We're here because either the parser didn't run or the L4 checksum
1737 * was not verified. This may include the case of a UDP frame with
1738 * checksum zero or an L4 proto other than TCP/UDP
1740 return CHECKSUM_NONE;
1743 #define PTR_IS_ALIGNED(x, a) (IS_ALIGNED((unsigned long)(x), (a)))
1745 /* Build a linear skb around the received buffer.
1746 * We are guaranteed there is enough room at the end of the data buffer to
1747 * accommodate the shared info area of the skb.
1749 static struct sk_buff *contig_fd_to_skb(const struct dpaa_priv *priv,
1750 const struct qm_fd *fd)
1752 ssize_t fd_off = qm_fd_get_offset(fd);
1753 dma_addr_t addr = qm_fd_addr(fd);
1754 struct dpaa_bp *dpaa_bp;
1755 struct sk_buff *skb;
1758 vaddr = phys_to_virt(addr);
1759 WARN_ON(!IS_ALIGNED((unsigned long)vaddr, SMP_CACHE_BYTES));
1761 dpaa_bp = dpaa_bpid2pool(fd->bpid);
1765 skb = build_skb(vaddr, dpaa_bp->size +
1766 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)));
1767 if (WARN_ONCE(!skb, "Build skb failure on Rx\n"))
1769 skb_reserve(skb, fd_off);
1770 skb_put(skb, qm_fd_get_length(fd));
1772 skb->ip_summed = rx_csum_offload(priv, fd);
1777 free_pages((unsigned long)vaddr, 0);
1781 /* Build an skb with the data of the first S/G entry in the linear portion and
1782 * the rest of the frame as skb fragments.
1784 * The page fragment holding the S/G Table is recycled here.
1786 static struct sk_buff *sg_fd_to_skb(const struct dpaa_priv *priv,
1787 const struct qm_fd *fd)
1789 ssize_t fd_off = qm_fd_get_offset(fd);
1790 dma_addr_t addr = qm_fd_addr(fd);
1791 const struct qm_sg_entry *sgt;
1792 struct page *page, *head_page;
1793 struct dpaa_bp *dpaa_bp;
1794 void *vaddr, *sg_vaddr;
1795 int frag_off, frag_len;
1796 struct sk_buff *skb;
1803 vaddr = phys_to_virt(addr);
1804 WARN_ON(!IS_ALIGNED((unsigned long)vaddr, SMP_CACHE_BYTES));
1806 /* Iterate through the SGT entries and add data buffers to the skb */
1807 sgt = vaddr + fd_off;
1809 for (i = 0; i < DPAA_SGT_MAX_ENTRIES; i++) {
1810 /* Extension bit is not supported */
1811 WARN_ON(qm_sg_entry_is_ext(&sgt[i]));
1813 sg_addr = qm_sg_addr(&sgt[i]);
1814 sg_vaddr = phys_to_virt(sg_addr);
1815 WARN_ON(!PTR_IS_ALIGNED(sg_vaddr, SMP_CACHE_BYTES));
1817 dma_unmap_page(priv->rx_dma_dev, sg_addr,
1818 DPAA_BP_RAW_SIZE, DMA_FROM_DEVICE);
1820 /* We may use multiple Rx pools */
1821 dpaa_bp = dpaa_bpid2pool(sgt[i].bpid);
1826 sz = dpaa_bp->size +
1827 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
1828 skb = build_skb(sg_vaddr, sz);
1832 skb->ip_summed = rx_csum_offload(priv, fd);
1834 /* Make sure forwarded skbs will have enough space
1835 * on Tx, if extra headers are added.
1837 WARN_ON(fd_off != priv->rx_headroom);
1838 skb_reserve(skb, fd_off);
1839 skb_put(skb, qm_sg_entry_get_len(&sgt[i]));
1841 /* Not the first S/G entry; all data from buffer will
1842 * be added in an skb fragment; fragment index is offset
1843 * by one since first S/G entry was incorporated in the
1844 * linear part of the skb.
1846 * Caution: 'page' may be a tail page.
1848 page = virt_to_page(sg_vaddr);
1849 head_page = virt_to_head_page(sg_vaddr);
1851 /* Compute offset in (possibly tail) page */
1852 page_offset = ((unsigned long)sg_vaddr &
1854 (page_address(page) - page_address(head_page));
1855 /* page_offset only refers to the beginning of sgt[i];
1856 * but the buffer itself may have an internal offset.
1858 frag_off = qm_sg_entry_get_off(&sgt[i]) + page_offset;
1859 frag_len = qm_sg_entry_get_len(&sgt[i]);
1860 /* skb_add_rx_frag() does no checking on the page; if
1861 * we pass it a tail page, we'll end up with
1862 * bad page accounting and eventually with segafults.
1864 skb_add_rx_frag(skb, i - 1, head_page, frag_off,
1865 frag_len, dpaa_bp->size);
1868 /* Update the pool count for the current {cpu x bpool} */
1869 count_ptr = this_cpu_ptr(dpaa_bp->percpu_count);
1872 if (qm_sg_entry_is_final(&sgt[i]))
1875 WARN_ONCE(i == DPAA_SGT_MAX_ENTRIES, "No final bit on SGT\n");
1877 /* free the SG table buffer */
1878 free_pages((unsigned long)vaddr, 0);
1883 /* free all the SG entries */
1884 for (j = 0; j < DPAA_SGT_MAX_ENTRIES ; j++) {
1885 sg_addr = qm_sg_addr(&sgt[j]);
1886 sg_vaddr = phys_to_virt(sg_addr);
1887 /* all pages 0..i were unmaped */
1889 dma_unmap_page(priv->rx_dma_dev, qm_sg_addr(&sgt[j]),
1890 DPAA_BP_RAW_SIZE, DMA_FROM_DEVICE);
1891 free_pages((unsigned long)sg_vaddr, 0);
1892 /* counters 0..i-1 were decremented */
1894 dpaa_bp = dpaa_bpid2pool(sgt[j].bpid);
1896 count_ptr = this_cpu_ptr(dpaa_bp->percpu_count);
1901 if (qm_sg_entry_is_final(&sgt[j]))
1904 /* free the SGT fragment */
1905 free_pages((unsigned long)vaddr, 0);
1910 static int skb_to_contig_fd(struct dpaa_priv *priv,
1911 struct sk_buff *skb, struct qm_fd *fd,
1914 struct net_device *net_dev = priv->net_dev;
1915 enum dma_data_direction dma_dir;
1916 struct dpaa_eth_swbp *swbp;
1917 unsigned char *buff_start;
1921 /* We are guaranteed to have at least tx_headroom bytes
1922 * available, so just use that for offset.
1924 fd->bpid = FSL_DPAA_BPID_INV;
1925 buff_start = skb->data - priv->tx_headroom;
1926 dma_dir = DMA_TO_DEVICE;
1928 swbp = (struct dpaa_eth_swbp *)buff_start;
1931 /* Enable L3/L4 hardware checksum computation.
1933 * We must do this before dma_map_single(DMA_TO_DEVICE), because we may
1934 * need to write into the skb.
1936 err = dpaa_enable_tx_csum(priv, skb, fd,
1937 buff_start + DPAA_TX_PRIV_DATA_SIZE);
1938 if (unlikely(err < 0)) {
1939 if (net_ratelimit())
1940 netif_err(priv, tx_err, net_dev, "HW csum error: %d\n",
1945 /* Fill in the rest of the FD fields */
1946 qm_fd_set_contig(fd, priv->tx_headroom, skb->len);
1947 fd->cmd |= cpu_to_be32(FM_FD_CMD_FCO);
1949 /* Map the entire buffer size that may be seen by FMan, but no more */
1950 addr = dma_map_single(priv->tx_dma_dev, buff_start,
1951 priv->tx_headroom + skb->len, dma_dir);
1952 if (unlikely(dma_mapping_error(priv->tx_dma_dev, addr))) {
1953 if (net_ratelimit())
1954 netif_err(priv, tx_err, net_dev, "dma_map_single() failed\n");
1957 qm_fd_addr_set64(fd, addr);
1962 static int skb_to_sg_fd(struct dpaa_priv *priv,
1963 struct sk_buff *skb, struct qm_fd *fd)
1965 const enum dma_data_direction dma_dir = DMA_TO_DEVICE;
1966 const int nr_frags = skb_shinfo(skb)->nr_frags;
1967 struct net_device *net_dev = priv->net_dev;
1968 struct dpaa_eth_swbp *swbp;
1969 struct qm_sg_entry *sgt;
1977 /* get a page to store the SGTable */
1978 p = dev_alloc_pages(0);
1980 netdev_err(net_dev, "dev_alloc_pages() failed\n");
1983 buff_start = page_address(p);
1985 /* Enable L3/L4 hardware checksum computation.
1987 * We must do this before dma_map_single(DMA_TO_DEVICE), because we may
1988 * need to write into the skb.
1990 err = dpaa_enable_tx_csum(priv, skb, fd,
1991 buff_start + DPAA_TX_PRIV_DATA_SIZE);
1992 if (unlikely(err < 0)) {
1993 if (net_ratelimit())
1994 netif_err(priv, tx_err, net_dev, "HW csum error: %d\n",
1999 /* SGT[0] is used by the linear part */
2000 sgt = (struct qm_sg_entry *)(buff_start + priv->tx_headroom);
2001 frag_len = skb_headlen(skb);
2002 qm_sg_entry_set_len(&sgt[0], frag_len);
2003 sgt[0].bpid = FSL_DPAA_BPID_INV;
2005 addr = dma_map_single(priv->tx_dma_dev, skb->data,
2006 skb_headlen(skb), dma_dir);
2007 if (unlikely(dma_mapping_error(priv->tx_dma_dev, addr))) {
2008 netdev_err(priv->net_dev, "DMA mapping failed\n");
2010 goto sg0_map_failed;
2012 qm_sg_entry_set64(&sgt[0], addr);
2014 /* populate the rest of SGT entries */
2015 for (i = 0; i < nr_frags; i++) {
2016 frag = &skb_shinfo(skb)->frags[i];
2017 frag_len = skb_frag_size(frag);
2018 WARN_ON(!skb_frag_page(frag));
2019 addr = skb_frag_dma_map(priv->tx_dma_dev, frag, 0,
2021 if (unlikely(dma_mapping_error(priv->tx_dma_dev, addr))) {
2022 netdev_err(priv->net_dev, "DMA mapping failed\n");
2027 qm_sg_entry_set_len(&sgt[i + 1], frag_len);
2028 sgt[i + 1].bpid = FSL_DPAA_BPID_INV;
2029 sgt[i + 1].offset = 0;
2031 /* keep the offset in the address */
2032 qm_sg_entry_set64(&sgt[i + 1], addr);
2035 /* Set the final bit in the last used entry of the SGT */
2036 qm_sg_entry_set_f(&sgt[nr_frags], frag_len);
2038 /* set fd offset to priv->tx_headroom */
2039 qm_fd_set_sg(fd, priv->tx_headroom, skb->len);
2041 /* DMA map the SGT page */
2042 swbp = (struct dpaa_eth_swbp *)buff_start;
2045 addr = dma_map_page(priv->tx_dma_dev, p, 0,
2046 priv->tx_headroom + DPAA_SGT_SIZE, dma_dir);
2047 if (unlikely(dma_mapping_error(priv->tx_dma_dev, addr))) {
2048 netdev_err(priv->net_dev, "DMA mapping failed\n");
2050 goto sgt_map_failed;
2053 fd->bpid = FSL_DPAA_BPID_INV;
2054 fd->cmd |= cpu_to_be32(FM_FD_CMD_FCO);
2055 qm_fd_addr_set64(fd, addr);
2061 for (j = 0; j < i; j++)
2062 dma_unmap_page(priv->tx_dma_dev, qm_sg_addr(&sgt[j]),
2063 qm_sg_entry_get_len(&sgt[j]), dma_dir);
2066 free_pages((unsigned long)buff_start, 0);
2071 static inline int dpaa_xmit(struct dpaa_priv *priv,
2072 struct rtnl_link_stats64 *percpu_stats,
2076 struct qman_fq *egress_fq;
2079 egress_fq = priv->egress_fqs[queue];
2080 if (fd->bpid == FSL_DPAA_BPID_INV)
2081 fd->cmd |= cpu_to_be32(qman_fq_fqid(priv->conf_fqs[queue]));
2083 /* Trace this Tx fd */
2084 trace_dpaa_tx_fd(priv->net_dev, egress_fq, fd);
2086 for (i = 0; i < DPAA_ENQUEUE_RETRIES; i++) {
2087 err = qman_enqueue(egress_fq, fd);
2092 if (unlikely(err < 0)) {
2093 percpu_stats->tx_fifo_errors++;
2097 percpu_stats->tx_packets++;
2098 percpu_stats->tx_bytes += qm_fd_get_length(fd);
2103 #ifdef CONFIG_DPAA_ERRATUM_A050385
2104 static int dpaa_a050385_wa_skb(struct net_device *net_dev, struct sk_buff **s)
2106 struct dpaa_priv *priv = netdev_priv(net_dev);
2107 struct sk_buff *new_skb, *skb = *s;
2108 unsigned char *start, i;
2110 /* check linear buffer alignment */
2111 if (!PTR_IS_ALIGNED(skb->data, DPAA_A050385_ALIGN))
2114 /* linear buffers just need to have an aligned start */
2115 if (!skb_is_nonlinear(skb))
2118 /* linear data size for nonlinear skbs needs to be aligned */
2119 if (!IS_ALIGNED(skb_headlen(skb), DPAA_A050385_ALIGN))
2122 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2123 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2125 /* all fragments need to have aligned start addresses */
2126 if (!IS_ALIGNED(skb_frag_off(frag), DPAA_A050385_ALIGN))
2129 /* all but last fragment need to have aligned sizes */
2130 if (!IS_ALIGNED(skb_frag_size(frag), DPAA_A050385_ALIGN) &&
2131 (i < skb_shinfo(skb)->nr_frags - 1))
2138 /* copy all the skb content into a new linear buffer */
2139 new_skb = netdev_alloc_skb(net_dev, skb->len + DPAA_A050385_ALIGN - 1 +
2144 /* NET_SKB_PAD bytes already reserved, adding up to tx_headroom */
2145 skb_reserve(new_skb, priv->tx_headroom - NET_SKB_PAD);
2147 /* Workaround for DPAA_A050385 requires data start to be aligned */
2148 start = PTR_ALIGN(new_skb->data, DPAA_A050385_ALIGN);
2149 if (start - new_skb->data)
2150 skb_reserve(new_skb, start - new_skb->data);
2152 skb_put(new_skb, skb->len);
2153 skb_copy_bits(skb, 0, new_skb->data, skb->len);
2154 skb_copy_header(new_skb, skb);
2155 new_skb->dev = skb->dev;
2157 /* Copy relevant timestamp info from the old skb to the new */
2158 if (priv->tx_tstamp) {
2159 skb_shinfo(new_skb)->tx_flags = skb_shinfo(skb)->tx_flags;
2160 skb_shinfo(new_skb)->hwtstamps = skb_shinfo(skb)->hwtstamps;
2161 skb_shinfo(new_skb)->tskey = skb_shinfo(skb)->tskey;
2163 skb_set_owner_w(new_skb, skb->sk);
2166 /* We move the headroom when we align it so we have to reset the
2167 * network and transport header offsets relative to the new data
2168 * pointer. The checksum offload relies on these offsets.
2170 skb_set_network_header(new_skb, skb_network_offset(skb));
2171 skb_set_transport_header(new_skb, skb_transport_offset(skb));
2179 static int dpaa_a050385_wa_xdpf(struct dpaa_priv *priv,
2180 struct xdp_frame **init_xdpf)
2182 struct xdp_frame *new_xdpf, *xdpf = *init_xdpf;
2183 void *new_buff, *aligned_data;
2188 /* Check the data alignment and make sure the headroom is large
2189 * enough to store the xdpf backpointer. Use an aligned headroom
2192 * Due to alignment constraints, we give XDP access to the full 256
2193 * byte frame headroom. If the XDP program uses all of it, copy the
2194 * data to a new buffer and make room for storing the backpointer.
2196 if (PTR_IS_ALIGNED(xdpf->data, DPAA_FD_DATA_ALIGNMENT) &&
2197 xdpf->headroom >= priv->tx_headroom) {
2198 xdpf->headroom = priv->tx_headroom;
2202 /* Try to move the data inside the buffer just enough to align it and
2203 * store the xdpf backpointer. If the available headroom isn't large
2204 * enough, resort to allocating a new buffer and copying the data.
2206 aligned_data = PTR_ALIGN_DOWN(xdpf->data, DPAA_FD_DATA_ALIGNMENT);
2207 data_shift = xdpf->data - aligned_data;
2209 /* The XDP frame's headroom needs to be large enough to accommodate
2210 * shifting the data as well as storing the xdpf backpointer.
2212 if (xdpf->headroom >= data_shift + priv->tx_headroom) {
2213 memmove(aligned_data, xdpf->data, xdpf->len);
2214 xdpf->data = aligned_data;
2215 xdpf->headroom = priv->tx_headroom;
2219 /* The new xdp_frame is stored in the new buffer. Reserve enough space
2220 * in the headroom for storing it along with the driver's private
2221 * info. The headroom needs to be aligned to DPAA_FD_DATA_ALIGNMENT to
2222 * guarantee the data's alignment in the buffer.
2224 headroom = ALIGN(sizeof(*new_xdpf) + priv->tx_headroom,
2225 DPAA_FD_DATA_ALIGNMENT);
2227 /* Assure the extended headroom and data don't overflow the buffer,
2228 * while maintaining the mandatory tailroom.
2230 if (headroom + xdpf->len > DPAA_BP_RAW_SIZE -
2231 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
2234 p = dev_alloc_pages(0);
2238 /* Copy the data to the new buffer at a properly aligned offset */
2239 new_buff = page_address(p);
2240 memcpy(new_buff + headroom, xdpf->data, xdpf->len);
2242 /* Create an XDP frame around the new buffer in a similar fashion
2243 * to xdp_convert_buff_to_frame.
2245 new_xdpf = new_buff;
2246 new_xdpf->data = new_buff + headroom;
2247 new_xdpf->len = xdpf->len;
2248 new_xdpf->headroom = priv->tx_headroom;
2249 new_xdpf->frame_sz = DPAA_BP_RAW_SIZE;
2250 new_xdpf->mem.type = MEM_TYPE_PAGE_ORDER0;
2252 /* Release the initial buffer */
2253 xdp_return_frame_rx_napi(xdpf);
2255 *init_xdpf = new_xdpf;
2261 dpaa_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
2263 const int queue_mapping = skb_get_queue_mapping(skb);
2264 bool nonlinear = skb_is_nonlinear(skb);
2265 struct rtnl_link_stats64 *percpu_stats;
2266 struct dpaa_percpu_priv *percpu_priv;
2267 struct netdev_queue *txq;
2268 struct dpaa_priv *priv;
2273 priv = netdev_priv(net_dev);
2274 percpu_priv = this_cpu_ptr(priv->percpu_priv);
2275 percpu_stats = &percpu_priv->stats;
2277 qm_fd_clear_fd(&fd);
2280 /* We're going to store the skb backpointer at the beginning
2281 * of the data buffer, so we need a privately owned skb
2283 * We've made sure skb is not shared in dev->priv_flags,
2284 * we need to verify the skb head is not cloned
2286 if (skb_cow_head(skb, priv->tx_headroom))
2289 WARN_ON(skb_is_nonlinear(skb));
2292 /* MAX_SKB_FRAGS is equal or larger than our dpaa_SGT_MAX_ENTRIES;
2293 * make sure we don't feed FMan with more fragments than it supports.
2295 if (unlikely(nonlinear &&
2296 (skb_shinfo(skb)->nr_frags >= DPAA_SGT_MAX_ENTRIES))) {
2297 /* If the egress skb contains more fragments than we support
2298 * we have no choice but to linearize it ourselves.
2300 if (__skb_linearize(skb))
2303 nonlinear = skb_is_nonlinear(skb);
2306 #ifdef CONFIG_DPAA_ERRATUM_A050385
2307 if (unlikely(fman_has_errata_a050385())) {
2308 if (dpaa_a050385_wa_skb(net_dev, &skb))
2310 nonlinear = skb_is_nonlinear(skb);
2315 /* Just create a S/G fd based on the skb */
2316 err = skb_to_sg_fd(priv, skb, &fd);
2317 percpu_priv->tx_frag_skbuffs++;
2319 /* Create a contig FD from this skb */
2320 err = skb_to_contig_fd(priv, skb, &fd, &offset);
2322 if (unlikely(err < 0))
2323 goto skb_to_fd_failed;
2325 txq = netdev_get_tx_queue(net_dev, queue_mapping);
2327 /* LLTX requires to do our own update of trans_start */
2328 txq->trans_start = jiffies;
2330 if (priv->tx_tstamp && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {
2331 fd.cmd |= cpu_to_be32(FM_FD_CMD_UPD);
2332 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
2335 if (likely(dpaa_xmit(priv, percpu_stats, queue_mapping, &fd) == 0))
2336 return NETDEV_TX_OK;
2338 dpaa_cleanup_tx_fd(priv, &fd, false);
2341 percpu_stats->tx_errors++;
2343 return NETDEV_TX_OK;
2346 static void dpaa_rx_error(struct net_device *net_dev,
2347 const struct dpaa_priv *priv,
2348 struct dpaa_percpu_priv *percpu_priv,
2349 const struct qm_fd *fd,
2352 if (net_ratelimit())
2353 netif_err(priv, hw, net_dev, "Err FD status = 0x%08x\n",
2354 be32_to_cpu(fd->status) & FM_FD_STAT_RX_ERRORS);
2356 percpu_priv->stats.rx_errors++;
2358 if (be32_to_cpu(fd->status) & FM_FD_ERR_DMA)
2359 percpu_priv->rx_errors.dme++;
2360 if (be32_to_cpu(fd->status) & FM_FD_ERR_PHYSICAL)
2361 percpu_priv->rx_errors.fpe++;
2362 if (be32_to_cpu(fd->status) & FM_FD_ERR_SIZE)
2363 percpu_priv->rx_errors.fse++;
2364 if (be32_to_cpu(fd->status) & FM_FD_ERR_PRS_HDR_ERR)
2365 percpu_priv->rx_errors.phe++;
2367 dpaa_fd_release(net_dev, fd);
2370 static void dpaa_tx_error(struct net_device *net_dev,
2371 const struct dpaa_priv *priv,
2372 struct dpaa_percpu_priv *percpu_priv,
2373 const struct qm_fd *fd,
2376 struct sk_buff *skb;
2378 if (net_ratelimit())
2379 netif_warn(priv, hw, net_dev, "FD status = 0x%08x\n",
2380 be32_to_cpu(fd->status) & FM_FD_STAT_TX_ERRORS);
2382 percpu_priv->stats.tx_errors++;
2384 skb = dpaa_cleanup_tx_fd(priv, fd, false);
2388 static int dpaa_eth_poll(struct napi_struct *napi, int budget)
2390 struct dpaa_napi_portal *np =
2391 container_of(napi, struct dpaa_napi_portal, napi);
2396 cleaned = qman_p_poll_dqrr(np->p, budget);
2398 if (cleaned < budget) {
2399 napi_complete_done(napi, cleaned);
2400 qman_p_irqsource_add(np->p, QM_PIRQ_DQRI);
2401 } else if (np->down) {
2402 qman_p_irqsource_add(np->p, QM_PIRQ_DQRI);
2405 if (np->xdp_act & XDP_REDIRECT)
2411 static void dpaa_tx_conf(struct net_device *net_dev,
2412 const struct dpaa_priv *priv,
2413 struct dpaa_percpu_priv *percpu_priv,
2414 const struct qm_fd *fd,
2417 struct sk_buff *skb;
2419 if (unlikely(be32_to_cpu(fd->status) & FM_FD_STAT_TX_ERRORS)) {
2420 if (net_ratelimit())
2421 netif_warn(priv, hw, net_dev, "FD status = 0x%08x\n",
2422 be32_to_cpu(fd->status) &
2423 FM_FD_STAT_TX_ERRORS);
2425 percpu_priv->stats.tx_errors++;
2428 percpu_priv->tx_confirm++;
2430 skb = dpaa_cleanup_tx_fd(priv, fd, true);
2435 static inline int dpaa_eth_napi_schedule(struct dpaa_percpu_priv *percpu_priv,
2436 struct qman_portal *portal, bool sched_napi)
2439 /* Disable QMan IRQ and invoke NAPI */
2440 qman_p_irqsource_remove(portal, QM_PIRQ_DQRI);
2442 percpu_priv->np.p = portal;
2443 napi_schedule(&percpu_priv->np.napi);
2444 percpu_priv->in_interrupt++;
2450 static enum qman_cb_dqrr_result rx_error_dqrr(struct qman_portal *portal,
2452 const struct qm_dqrr_entry *dq,
2455 struct dpaa_fq *dpaa_fq = container_of(fq, struct dpaa_fq, fq_base);
2456 struct dpaa_percpu_priv *percpu_priv;
2457 struct net_device *net_dev;
2458 struct dpaa_bp *dpaa_bp;
2459 struct dpaa_priv *priv;
2461 net_dev = dpaa_fq->net_dev;
2462 priv = netdev_priv(net_dev);
2463 dpaa_bp = dpaa_bpid2pool(dq->fd.bpid);
2465 return qman_cb_dqrr_consume;
2467 percpu_priv = this_cpu_ptr(priv->percpu_priv);
2469 if (dpaa_eth_napi_schedule(percpu_priv, portal, sched_napi))
2470 return qman_cb_dqrr_stop;
2472 dpaa_eth_refill_bpools(priv);
2473 dpaa_rx_error(net_dev, priv, percpu_priv, &dq->fd, fq->fqid);
2475 return qman_cb_dqrr_consume;
2478 static int dpaa_xdp_xmit_frame(struct net_device *net_dev,
2479 struct xdp_frame *xdpf)
2481 struct dpaa_priv *priv = netdev_priv(net_dev);
2482 struct rtnl_link_stats64 *percpu_stats;
2483 struct dpaa_percpu_priv *percpu_priv;
2484 struct dpaa_eth_swbp *swbp;
2485 struct netdev_queue *txq;
2491 percpu_priv = this_cpu_ptr(priv->percpu_priv);
2492 percpu_stats = &percpu_priv->stats;
2494 #ifdef CONFIG_DPAA_ERRATUM_A050385
2495 if (unlikely(fman_has_errata_a050385())) {
2496 if (dpaa_a050385_wa_xdpf(priv, &xdpf)) {
2503 if (xdpf->headroom < DPAA_TX_PRIV_DATA_SIZE) {
2508 buff_start = xdpf->data - xdpf->headroom;
2510 /* Leave empty the skb backpointer at the start of the buffer.
2511 * Save the XDP frame for easy cleanup on confirmation.
2513 swbp = (struct dpaa_eth_swbp *)buff_start;
2517 qm_fd_clear_fd(&fd);
2518 fd.bpid = FSL_DPAA_BPID_INV;
2519 fd.cmd |= cpu_to_be32(FM_FD_CMD_FCO);
2520 qm_fd_set_contig(&fd, xdpf->headroom, xdpf->len);
2522 addr = dma_map_single(priv->tx_dma_dev, buff_start,
2523 xdpf->headroom + xdpf->len,
2525 if (unlikely(dma_mapping_error(priv->tx_dma_dev, addr))) {
2530 qm_fd_addr_set64(&fd, addr);
2532 /* Bump the trans_start */
2533 txq = netdev_get_tx_queue(net_dev, smp_processor_id());
2534 txq->trans_start = jiffies;
2536 err = dpaa_xmit(priv, percpu_stats, smp_processor_id(), &fd);
2538 dma_unmap_single(priv->tx_dma_dev, addr,
2539 qm_fd_get_offset(&fd) + qm_fd_get_length(&fd),
2547 percpu_stats->tx_errors++;
2551 static u32 dpaa_run_xdp(struct dpaa_priv *priv, struct qm_fd *fd, void *vaddr,
2552 struct dpaa_fq *dpaa_fq, unsigned int *xdp_meta_len)
2554 ssize_t fd_off = qm_fd_get_offset(fd);
2555 struct bpf_prog *xdp_prog;
2556 struct xdp_frame *xdpf;
2557 struct xdp_buff xdp;
2563 xdp_prog = READ_ONCE(priv->xdp_prog);
2569 xdp_init_buff(&xdp, DPAA_BP_RAW_SIZE - DPAA_TX_PRIV_DATA_SIZE,
2571 xdp_prepare_buff(&xdp, vaddr + fd_off - XDP_PACKET_HEADROOM,
2572 XDP_PACKET_HEADROOM, qm_fd_get_length(fd), true);
2574 /* We reserve a fixed headroom of 256 bytes under the erratum and we
2575 * offer it all to XDP programs to use. If no room is left for the
2576 * xdpf backpointer on TX, we will need to copy the data.
2577 * Disable metadata support since data realignments might be required
2578 * and the information can be lost.
2580 #ifdef CONFIG_DPAA_ERRATUM_A050385
2581 if (unlikely(fman_has_errata_a050385())) {
2582 xdp_set_data_meta_invalid(&xdp);
2583 xdp.data_hard_start = vaddr;
2584 xdp.frame_sz = DPAA_BP_RAW_SIZE;
2588 xdp_act = bpf_prog_run_xdp(xdp_prog, &xdp);
2590 /* Update the length and the offset of the FD */
2591 qm_fd_set_contig(fd, xdp.data - vaddr, xdp.data_end - xdp.data);
2595 #ifdef CONFIG_DPAA_ERRATUM_A050385
2596 *xdp_meta_len = xdp_data_meta_unsupported(&xdp) ? 0 :
2597 xdp.data - xdp.data_meta;
2599 *xdp_meta_len = xdp.data - xdp.data_meta;
2603 /* We can access the full headroom when sending the frame
2606 xdp.data_hard_start = vaddr;
2607 xdp.frame_sz = DPAA_BP_RAW_SIZE;
2608 xdpf = xdp_convert_buff_to_frame(&xdp);
2609 if (unlikely(!xdpf)) {
2610 free_pages((unsigned long)vaddr, 0);
2614 if (dpaa_xdp_xmit_frame(priv->net_dev, xdpf))
2615 xdp_return_frame_rx_napi(xdpf);
2619 /* Allow redirect to use the full headroom */
2620 xdp.data_hard_start = vaddr;
2621 xdp.frame_sz = DPAA_BP_RAW_SIZE;
2623 err = xdp_do_redirect(priv->net_dev, &xdp, xdp_prog);
2625 trace_xdp_exception(priv->net_dev, xdp_prog, xdp_act);
2626 free_pages((unsigned long)vaddr, 0);
2630 bpf_warn_invalid_xdp_action(xdp_act);
2633 trace_xdp_exception(priv->net_dev, xdp_prog, xdp_act);
2636 /* Free the buffer */
2637 free_pages((unsigned long)vaddr, 0);
2646 static enum qman_cb_dqrr_result rx_default_dqrr(struct qman_portal *portal,
2648 const struct qm_dqrr_entry *dq,
2651 bool ts_valid = false, hash_valid = false;
2652 struct skb_shared_hwtstamps *shhwtstamps;
2653 unsigned int skb_len, xdp_meta_len = 0;
2654 struct rtnl_link_stats64 *percpu_stats;
2655 struct dpaa_percpu_priv *percpu_priv;
2656 const struct qm_fd *fd = &dq->fd;
2657 dma_addr_t addr = qm_fd_addr(fd);
2658 struct dpaa_napi_portal *np;
2659 enum qm_fd_format fd_format;
2660 struct net_device *net_dev;
2661 u32 fd_status, hash_offset;
2662 struct qm_sg_entry *sgt;
2663 struct dpaa_bp *dpaa_bp;
2664 struct dpaa_fq *dpaa_fq;
2665 struct dpaa_priv *priv;
2666 struct sk_buff *skb;
2673 np = container_of(&portal, struct dpaa_napi_portal, p);
2674 dpaa_fq = container_of(fq, struct dpaa_fq, fq_base);
2675 fd_status = be32_to_cpu(fd->status);
2676 fd_format = qm_fd_get_format(fd);
2677 net_dev = dpaa_fq->net_dev;
2678 priv = netdev_priv(net_dev);
2679 dpaa_bp = dpaa_bpid2pool(dq->fd.bpid);
2681 return qman_cb_dqrr_consume;
2683 /* Trace the Rx fd */
2684 trace_dpaa_rx_fd(net_dev, fq, &dq->fd);
2686 percpu_priv = this_cpu_ptr(priv->percpu_priv);
2687 percpu_stats = &percpu_priv->stats;
2689 if (unlikely(dpaa_eth_napi_schedule(percpu_priv, portal, sched_napi)))
2690 return qman_cb_dqrr_stop;
2692 /* Make sure we didn't run out of buffers */
2693 if (unlikely(dpaa_eth_refill_bpools(priv))) {
2694 /* Unable to refill the buffer pool due to insufficient
2695 * system memory. Just release the frame back into the pool,
2696 * otherwise we'll soon end up with an empty buffer pool.
2698 dpaa_fd_release(net_dev, &dq->fd);
2699 return qman_cb_dqrr_consume;
2702 if (unlikely(fd_status & FM_FD_STAT_RX_ERRORS) != 0) {
2703 if (net_ratelimit())
2704 netif_warn(priv, hw, net_dev, "FD status = 0x%08x\n",
2705 fd_status & FM_FD_STAT_RX_ERRORS);
2707 percpu_stats->rx_errors++;
2708 dpaa_fd_release(net_dev, fd);
2709 return qman_cb_dqrr_consume;
2712 dma_unmap_page(dpaa_bp->priv->rx_dma_dev, addr, DPAA_BP_RAW_SIZE,
2715 /* prefetch the first 64 bytes of the frame or the SGT start */
2716 vaddr = phys_to_virt(addr);
2717 prefetch(vaddr + qm_fd_get_offset(fd));
2719 /* The only FD types that we may receive are contig and S/G */
2720 WARN_ON((fd_format != qm_fd_contig) && (fd_format != qm_fd_sg));
2722 /* Account for either the contig buffer or the SGT buffer (depending on
2723 * which case we were in) having been removed from the pool.
2725 count_ptr = this_cpu_ptr(dpaa_bp->percpu_count);
2728 /* Extract the timestamp stored in the headroom before running XDP */
2729 if (priv->rx_tstamp) {
2730 if (!fman_port_get_tstamp(priv->mac_dev->port[RX], vaddr, &ns))
2733 WARN_ONCE(1, "fman_port_get_tstamp failed!\n");
2736 /* Extract the hash stored in the headroom before running XDP */
2737 if (net_dev->features & NETIF_F_RXHASH && priv->keygen_in_use &&
2738 !fman_port_get_hash_result_offset(priv->mac_dev->port[RX],
2740 hash = be32_to_cpu(*(u32 *)(vaddr + hash_offset));
2744 if (likely(fd_format == qm_fd_contig)) {
2745 xdp_act = dpaa_run_xdp(priv, (struct qm_fd *)fd, vaddr,
2746 dpaa_fq, &xdp_meta_len);
2747 np->xdp_act |= xdp_act;
2748 if (xdp_act != XDP_PASS) {
2749 percpu_stats->rx_packets++;
2750 percpu_stats->rx_bytes += qm_fd_get_length(fd);
2751 return qman_cb_dqrr_consume;
2753 skb = contig_fd_to_skb(priv, fd);
2755 /* XDP doesn't support S/G frames. Return the fragments to the
2756 * buffer pool and release the SGT.
2758 if (READ_ONCE(priv->xdp_prog)) {
2759 WARN_ONCE(1, "S/G frames not supported under XDP\n");
2760 sgt = vaddr + qm_fd_get_offset(fd);
2761 dpaa_release_sgt_members(sgt);
2762 free_pages((unsigned long)vaddr, 0);
2763 return qman_cb_dqrr_consume;
2765 skb = sg_fd_to_skb(priv, fd);
2768 return qman_cb_dqrr_consume;
2771 skb_metadata_set(skb, xdp_meta_len);
2773 /* Set the previously extracted timestamp */
2775 shhwtstamps = skb_hwtstamps(skb);
2776 memset(shhwtstamps, 0, sizeof(*shhwtstamps));
2777 shhwtstamps->hwtstamp = ns_to_ktime(ns);
2780 skb->protocol = eth_type_trans(skb, net_dev);
2782 /* Set the previously extracted hash */
2784 enum pkt_hash_types type;
2786 /* if L4 exists, it was used in the hash generation */
2787 type = be32_to_cpu(fd->status) & FM_FD_STAT_L4CV ?
2788 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3;
2789 skb_set_hash(skb, hash, type);
2794 if (unlikely(netif_receive_skb(skb) == NET_RX_DROP)) {
2795 percpu_stats->rx_dropped++;
2796 return qman_cb_dqrr_consume;
2799 percpu_stats->rx_packets++;
2800 percpu_stats->rx_bytes += skb_len;
2802 return qman_cb_dqrr_consume;
2805 static enum qman_cb_dqrr_result conf_error_dqrr(struct qman_portal *portal,
2807 const struct qm_dqrr_entry *dq,
2810 struct dpaa_percpu_priv *percpu_priv;
2811 struct net_device *net_dev;
2812 struct dpaa_priv *priv;
2814 net_dev = ((struct dpaa_fq *)fq)->net_dev;
2815 priv = netdev_priv(net_dev);
2817 percpu_priv = this_cpu_ptr(priv->percpu_priv);
2819 if (dpaa_eth_napi_schedule(percpu_priv, portal, sched_napi))
2820 return qman_cb_dqrr_stop;
2822 dpaa_tx_error(net_dev, priv, percpu_priv, &dq->fd, fq->fqid);
2824 return qman_cb_dqrr_consume;
2827 static enum qman_cb_dqrr_result conf_dflt_dqrr(struct qman_portal *portal,
2829 const struct qm_dqrr_entry *dq,
2832 struct dpaa_percpu_priv *percpu_priv;
2833 struct net_device *net_dev;
2834 struct dpaa_priv *priv;
2836 net_dev = ((struct dpaa_fq *)fq)->net_dev;
2837 priv = netdev_priv(net_dev);
2840 trace_dpaa_tx_conf_fd(net_dev, fq, &dq->fd);
2842 percpu_priv = this_cpu_ptr(priv->percpu_priv);
2844 if (dpaa_eth_napi_schedule(percpu_priv, portal, sched_napi))
2845 return qman_cb_dqrr_stop;
2847 dpaa_tx_conf(net_dev, priv, percpu_priv, &dq->fd, fq->fqid);
2849 return qman_cb_dqrr_consume;
2852 static void egress_ern(struct qman_portal *portal,
2854 const union qm_mr_entry *msg)
2856 const struct qm_fd *fd = &msg->ern.fd;
2857 struct dpaa_percpu_priv *percpu_priv;
2858 const struct dpaa_priv *priv;
2859 struct net_device *net_dev;
2860 struct sk_buff *skb;
2862 net_dev = ((struct dpaa_fq *)fq)->net_dev;
2863 priv = netdev_priv(net_dev);
2864 percpu_priv = this_cpu_ptr(priv->percpu_priv);
2866 percpu_priv->stats.tx_dropped++;
2867 percpu_priv->stats.tx_fifo_errors++;
2868 count_ern(percpu_priv, msg);
2870 skb = dpaa_cleanup_tx_fd(priv, fd, false);
2871 dev_kfree_skb_any(skb);
2874 static const struct dpaa_fq_cbs dpaa_fq_cbs = {
2875 .rx_defq = { .cb = { .dqrr = rx_default_dqrr } },
2876 .tx_defq = { .cb = { .dqrr = conf_dflt_dqrr } },
2877 .rx_errq = { .cb = { .dqrr = rx_error_dqrr } },
2878 .tx_errq = { .cb = { .dqrr = conf_error_dqrr } },
2879 .egress_ern = { .cb = { .ern = egress_ern } }
2882 static void dpaa_eth_napi_enable(struct dpaa_priv *priv)
2884 struct dpaa_percpu_priv *percpu_priv;
2887 for_each_online_cpu(i) {
2888 percpu_priv = per_cpu_ptr(priv->percpu_priv, i);
2890 percpu_priv->np.down = false;
2891 napi_enable(&percpu_priv->np.napi);
2895 static void dpaa_eth_napi_disable(struct dpaa_priv *priv)
2897 struct dpaa_percpu_priv *percpu_priv;
2900 for_each_online_cpu(i) {
2901 percpu_priv = per_cpu_ptr(priv->percpu_priv, i);
2903 percpu_priv->np.down = true;
2904 napi_disable(&percpu_priv->np.napi);
2908 static void dpaa_adjust_link(struct net_device *net_dev)
2910 struct mac_device *mac_dev;
2911 struct dpaa_priv *priv;
2913 priv = netdev_priv(net_dev);
2914 mac_dev = priv->mac_dev;
2915 mac_dev->adjust_link(mac_dev);
2918 /* The Aquantia PHYs are capable of performing rate adaptation */
2919 #define PHY_VEND_AQUANTIA 0x03a1b400
2921 static int dpaa_phy_init(struct net_device *net_dev)
2923 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
2924 struct mac_device *mac_dev;
2925 struct phy_device *phy_dev;
2926 struct dpaa_priv *priv;
2928 priv = netdev_priv(net_dev);
2929 mac_dev = priv->mac_dev;
2931 phy_dev = of_phy_connect(net_dev, mac_dev->phy_node,
2932 &dpaa_adjust_link, 0,
2935 netif_err(priv, ifup, net_dev, "init_phy() failed\n");
2939 /* Unless the PHY is capable of rate adaptation */
2940 if (mac_dev->phy_if != PHY_INTERFACE_MODE_XGMII ||
2941 ((phy_dev->drv->phy_id & GENMASK(31, 10)) != PHY_VEND_AQUANTIA)) {
2942 /* remove any features not supported by the controller */
2943 ethtool_convert_legacy_u32_to_link_mode(mask,
2944 mac_dev->if_support);
2945 linkmode_and(phy_dev->supported, phy_dev->supported, mask);
2948 phy_support_asym_pause(phy_dev);
2950 mac_dev->phy_dev = phy_dev;
2951 net_dev->phydev = phy_dev;
2956 static int dpaa_open(struct net_device *net_dev)
2958 struct mac_device *mac_dev;
2959 struct dpaa_priv *priv;
2962 priv = netdev_priv(net_dev);
2963 mac_dev = priv->mac_dev;
2964 dpaa_eth_napi_enable(priv);
2966 err = dpaa_phy_init(net_dev);
2968 goto phy_init_failed;
2970 for (i = 0; i < ARRAY_SIZE(mac_dev->port); i++) {
2971 err = fman_port_enable(mac_dev->port[i]);
2973 goto mac_start_failed;
2976 err = priv->mac_dev->start(mac_dev);
2978 netif_err(priv, ifup, net_dev, "mac_dev->start() = %d\n", err);
2979 goto mac_start_failed;
2982 netif_tx_start_all_queues(net_dev);
2987 for (i = 0; i < ARRAY_SIZE(mac_dev->port); i++)
2988 fman_port_disable(mac_dev->port[i]);
2991 dpaa_eth_napi_disable(priv);
2996 static int dpaa_eth_stop(struct net_device *net_dev)
2998 struct dpaa_priv *priv;
3001 err = dpaa_stop(net_dev);
3003 priv = netdev_priv(net_dev);
3004 dpaa_eth_napi_disable(priv);
3009 static bool xdp_validate_mtu(struct dpaa_priv *priv, int mtu)
3011 int max_contig_data = priv->dpaa_bp->size - priv->rx_headroom;
3013 /* We do not support S/G fragments when XDP is enabled.
3014 * Limit the MTU in relation to the buffer size.
3016 if (mtu + VLAN_ETH_HLEN + ETH_FCS_LEN > max_contig_data) {
3017 dev_warn(priv->net_dev->dev.parent,
3018 "The maximum MTU for XDP is %d\n",
3019 max_contig_data - VLAN_ETH_HLEN - ETH_FCS_LEN);
3026 static int dpaa_change_mtu(struct net_device *net_dev, int new_mtu)
3028 struct dpaa_priv *priv = netdev_priv(net_dev);
3030 if (priv->xdp_prog && !xdp_validate_mtu(priv, new_mtu))
3033 net_dev->mtu = new_mtu;
3037 static int dpaa_setup_xdp(struct net_device *net_dev, struct netdev_bpf *bpf)
3039 struct dpaa_priv *priv = netdev_priv(net_dev);
3040 struct bpf_prog *old_prog;
3044 /* S/G fragments are not supported in XDP-mode */
3045 if (bpf->prog && !xdp_validate_mtu(priv, net_dev->mtu)) {
3046 NL_SET_ERR_MSG_MOD(bpf->extack, "MTU too large for XDP");
3050 up = netif_running(net_dev);
3053 dpaa_eth_stop(net_dev);
3055 old_prog = xchg(&priv->xdp_prog, bpf->prog);
3057 bpf_prog_put(old_prog);
3060 err = dpaa_open(net_dev);
3062 NL_SET_ERR_MSG_MOD(bpf->extack, "dpaa_open() failed");
3070 static int dpaa_xdp(struct net_device *net_dev, struct netdev_bpf *xdp)
3072 switch (xdp->command) {
3073 case XDP_SETUP_PROG:
3074 return dpaa_setup_xdp(net_dev, xdp);
3080 static int dpaa_xdp_xmit(struct net_device *net_dev, int n,
3081 struct xdp_frame **frames, u32 flags)
3083 struct xdp_frame *xdpf;
3084 int i, err, drops = 0;
3086 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
3089 if (!netif_running(net_dev))
3092 for (i = 0; i < n; i++) {
3094 err = dpaa_xdp_xmit_frame(net_dev, xdpf);
3096 xdp_return_frame_rx_napi(xdpf);
3104 static int dpaa_ts_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3106 struct dpaa_priv *priv = netdev_priv(dev);
3107 struct hwtstamp_config config;
3109 if (copy_from_user(&config, rq->ifr_data, sizeof(config)))
3112 switch (config.tx_type) {
3113 case HWTSTAMP_TX_OFF:
3114 /* Couldn't disable rx/tx timestamping separately.
3117 priv->tx_tstamp = false;
3119 case HWTSTAMP_TX_ON:
3120 priv->mac_dev->set_tstamp(priv->mac_dev->fman_mac, true);
3121 priv->tx_tstamp = true;
3127 if (config.rx_filter == HWTSTAMP_FILTER_NONE) {
3128 /* Couldn't disable rx/tx timestamping separately.
3131 priv->rx_tstamp = false;
3133 priv->mac_dev->set_tstamp(priv->mac_dev->fman_mac, true);
3134 priv->rx_tstamp = true;
3135 /* TS is set for all frame types, not only those requested */
3136 config.rx_filter = HWTSTAMP_FILTER_ALL;
3139 return copy_to_user(rq->ifr_data, &config, sizeof(config)) ?
3143 static int dpaa_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
3147 if (cmd == SIOCGMIIREG) {
3148 if (net_dev->phydev)
3149 return phy_mii_ioctl(net_dev->phydev, rq, cmd);
3152 if (cmd == SIOCSHWTSTAMP)
3153 return dpaa_ts_ioctl(net_dev, rq, cmd);
3158 static const struct net_device_ops dpaa_ops = {
3159 .ndo_open = dpaa_open,
3160 .ndo_start_xmit = dpaa_start_xmit,
3161 .ndo_stop = dpaa_eth_stop,
3162 .ndo_tx_timeout = dpaa_tx_timeout,
3163 .ndo_get_stats64 = dpaa_get_stats64,
3164 .ndo_change_carrier = fixed_phy_change_carrier,
3165 .ndo_set_mac_address = dpaa_set_mac_address,
3166 .ndo_validate_addr = eth_validate_addr,
3167 .ndo_set_rx_mode = dpaa_set_rx_mode,
3168 .ndo_do_ioctl = dpaa_ioctl,
3169 .ndo_setup_tc = dpaa_setup_tc,
3170 .ndo_change_mtu = dpaa_change_mtu,
3171 .ndo_bpf = dpaa_xdp,
3172 .ndo_xdp_xmit = dpaa_xdp_xmit,
3175 static int dpaa_napi_add(struct net_device *net_dev)
3177 struct dpaa_priv *priv = netdev_priv(net_dev);
3178 struct dpaa_percpu_priv *percpu_priv;
3181 for_each_possible_cpu(cpu) {
3182 percpu_priv = per_cpu_ptr(priv->percpu_priv, cpu);
3184 netif_napi_add(net_dev, &percpu_priv->np.napi,
3185 dpaa_eth_poll, NAPI_POLL_WEIGHT);
3191 static void dpaa_napi_del(struct net_device *net_dev)
3193 struct dpaa_priv *priv = netdev_priv(net_dev);
3194 struct dpaa_percpu_priv *percpu_priv;
3197 for_each_possible_cpu(cpu) {
3198 percpu_priv = per_cpu_ptr(priv->percpu_priv, cpu);
3200 netif_napi_del(&percpu_priv->np.napi);
3204 static inline void dpaa_bp_free_pf(const struct dpaa_bp *bp,
3205 struct bm_buffer *bmb)
3207 dma_addr_t addr = bm_buf_addr(bmb);
3209 dma_unmap_page(bp->priv->rx_dma_dev, addr, DPAA_BP_RAW_SIZE,
3212 skb_free_frag(phys_to_virt(addr));
3215 /* Alloc the dpaa_bp struct and configure default values */
3216 static struct dpaa_bp *dpaa_bp_alloc(struct device *dev)
3218 struct dpaa_bp *dpaa_bp;
3220 dpaa_bp = devm_kzalloc(dev, sizeof(*dpaa_bp), GFP_KERNEL);
3222 return ERR_PTR(-ENOMEM);
3224 dpaa_bp->bpid = FSL_DPAA_BPID_INV;
3225 dpaa_bp->percpu_count = devm_alloc_percpu(dev, *dpaa_bp->percpu_count);
3226 if (!dpaa_bp->percpu_count)
3227 return ERR_PTR(-ENOMEM);
3229 dpaa_bp->config_count = FSL_DPAA_ETH_MAX_BUF_COUNT;
3231 dpaa_bp->seed_cb = dpaa_bp_seed;
3232 dpaa_bp->free_buf_cb = dpaa_bp_free_pf;
3237 /* Place all ingress FQs (Rx Default, Rx Error) in a dedicated CGR.
3238 * We won't be sending congestion notifications to FMan; for now, we just use
3239 * this CGR to generate enqueue rejections to FMan in order to drop the frames
3240 * before they reach our ingress queues and eat up memory.
3242 static int dpaa_ingress_cgr_init(struct dpaa_priv *priv)
3244 struct qm_mcc_initcgr initcgr;
3248 err = qman_alloc_cgrid(&priv->ingress_cgr.cgrid);
3250 if (netif_msg_drv(priv))
3251 pr_err("Error %d allocating CGR ID\n", err);
3255 /* Enable CS TD, but disable Congestion State Change Notifications. */
3256 memset(&initcgr, 0, sizeof(initcgr));
3257 initcgr.we_mask = cpu_to_be16(QM_CGR_WE_CS_THRES);
3258 initcgr.cgr.cscn_en = QM_CGR_EN;
3259 cs_th = DPAA_INGRESS_CS_THRESHOLD;
3260 qm_cgr_cs_thres_set64(&initcgr.cgr.cs_thres, cs_th, 1);
3262 initcgr.we_mask |= cpu_to_be16(QM_CGR_WE_CSTD_EN);
3263 initcgr.cgr.cstd_en = QM_CGR_EN;
3265 /* This CGR will be associated with the SWP affined to the current CPU.
3266 * However, we'll place all our ingress FQs in it.
3268 err = qman_create_cgr(&priv->ingress_cgr, QMAN_CGR_FLAG_USE_INIT,
3271 if (netif_msg_drv(priv))
3272 pr_err("Error %d creating ingress CGR with ID %d\n",
3273 err, priv->ingress_cgr.cgrid);
3274 qman_release_cgrid(priv->ingress_cgr.cgrid);
3277 if (netif_msg_drv(priv))
3278 pr_debug("Created ingress CGR %d for netdev with hwaddr %pM\n",
3279 priv->ingress_cgr.cgrid, priv->mac_dev->addr);
3281 priv->use_ingress_cgr = true;
3287 static u16 dpaa_get_headroom(struct dpaa_buffer_layout *bl,
3288 enum port_type port)
3292 /* The frame headroom must accommodate:
3293 * - the driver private data area
3294 * - parse results, hash results, timestamp if selected
3295 * If either hash results or time stamp are selected, both will
3296 * be copied to/from the frame headroom, as TS is located between PR and
3297 * HR in the IC and IC copy size has a granularity of 16bytes
3298 * (see description of FMBM_RICP and FMBM_TICP registers in DPAARM)
3300 * Also make sure the headroom is a multiple of data_align bytes
3302 headroom = (u16)(bl[port].priv_data_size + DPAA_HWA_SIZE);
3305 #ifdef CONFIG_DPAA_ERRATUM_A050385
3306 if (unlikely(fman_has_errata_a050385()))
3307 headroom = XDP_PACKET_HEADROOM;
3310 return ALIGN(headroom, DPAA_FD_RX_DATA_ALIGNMENT);
3312 return ALIGN(headroom, DPAA_FD_DATA_ALIGNMENT);
3316 static int dpaa_eth_probe(struct platform_device *pdev)
3318 struct net_device *net_dev = NULL;
3319 struct dpaa_bp *dpaa_bp = NULL;
3320 struct dpaa_fq *dpaa_fq, *tmp;
3321 struct dpaa_priv *priv = NULL;
3322 struct fm_port_fqs port_fqs;
3323 struct mac_device *mac_dev;
3324 int err = 0, channel;
3329 err = bman_is_probed();
3331 return -EPROBE_DEFER;
3333 dev_err(dev, "failing probe due to bman probe error\n");
3336 err = qman_is_probed();
3338 return -EPROBE_DEFER;
3340 dev_err(dev, "failing probe due to qman probe error\n");
3343 err = bman_portals_probed();
3345 return -EPROBE_DEFER;
3348 "failing probe due to bman portals probe error\n");
3351 err = qman_portals_probed();
3353 return -EPROBE_DEFER;
3356 "failing probe due to qman portals probe error\n");
3360 /* Allocate this early, so we can store relevant information in
3363 net_dev = alloc_etherdev_mq(sizeof(*priv), DPAA_ETH_TXQ_NUM);
3365 dev_err(dev, "alloc_etherdev_mq() failed\n");
3369 /* Do this here, so we can be verbose early */
3370 SET_NETDEV_DEV(net_dev, dev->parent);
3371 dev_set_drvdata(dev, net_dev);
3373 priv = netdev_priv(net_dev);
3374 priv->net_dev = net_dev;
3376 priv->msg_enable = netif_msg_init(debug, DPAA_MSG_DEFAULT);
3378 mac_dev = dpaa_mac_dev_get(pdev);
3379 if (IS_ERR(mac_dev)) {
3380 netdev_err(net_dev, "dpaa_mac_dev_get() failed\n");
3381 err = PTR_ERR(mac_dev);
3385 /* Devices used for DMA mapping */
3386 priv->rx_dma_dev = fman_port_get_device(mac_dev->port[RX]);
3387 priv->tx_dma_dev = fman_port_get_device(mac_dev->port[TX]);
3388 err = dma_coerce_mask_and_coherent(priv->rx_dma_dev, DMA_BIT_MASK(40));
3390 err = dma_coerce_mask_and_coherent(priv->tx_dma_dev,
3393 netdev_err(net_dev, "dma_coerce_mask_and_coherent() failed\n");
3397 /* If fsl_fm_max_frm is set to a higher value than the all-common 1500,
3398 * we choose conservatively and let the user explicitly set a higher
3399 * MTU via ifconfig. Otherwise, the user may end up with different MTUs
3401 * If on the other hand fsl_fm_max_frm has been chosen below 1500,
3402 * start with the maximum allowed.
3404 net_dev->mtu = min(dpaa_get_max_mtu(), ETH_DATA_LEN);
3406 netdev_dbg(net_dev, "Setting initial MTU on net device: %d\n",
3409 priv->buf_layout[RX].priv_data_size = DPAA_RX_PRIV_DATA_SIZE; /* Rx */
3410 priv->buf_layout[TX].priv_data_size = DPAA_TX_PRIV_DATA_SIZE; /* Tx */
3413 dpaa_bp = dpaa_bp_alloc(dev);
3414 if (IS_ERR(dpaa_bp)) {
3415 err = PTR_ERR(dpaa_bp);
3418 /* the raw size of the buffers used for reception */
3419 dpaa_bp->raw_size = DPAA_BP_RAW_SIZE;
3420 /* avoid runtime computations by keeping the usable size here */
3421 dpaa_bp->size = dpaa_bp_size(dpaa_bp->raw_size);
3422 dpaa_bp->priv = priv;
3424 err = dpaa_bp_alloc_pool(dpaa_bp);
3427 priv->dpaa_bp = dpaa_bp;
3429 INIT_LIST_HEAD(&priv->dpaa_fq_list);
3431 memset(&port_fqs, 0, sizeof(port_fqs));
3433 err = dpaa_alloc_all_fqs(dev, &priv->dpaa_fq_list, &port_fqs);
3435 dev_err(dev, "dpaa_alloc_all_fqs() failed\n");
3439 priv->mac_dev = mac_dev;
3441 channel = dpaa_get_channel();
3443 dev_err(dev, "dpaa_get_channel() failed\n");
3448 priv->channel = (u16)channel;
3450 /* Walk the CPUs with affine portals
3451 * and add this pool channel to each's dequeue mask.
3453 dpaa_eth_add_channel(priv->channel, &pdev->dev);
3455 dpaa_fq_setup(priv, &dpaa_fq_cbs, priv->mac_dev->port[TX]);
3457 /* Create a congestion group for this netdev, with
3458 * dynamically-allocated CGR ID.
3459 * Must be executed after probing the MAC, but before
3460 * assigning the egress FQs to the CGRs.
3462 err = dpaa_eth_cgr_init(priv);
3464 dev_err(dev, "Error initializing CGR\n");
3468 err = dpaa_ingress_cgr_init(priv);
3470 dev_err(dev, "Error initializing ingress CGR\n");
3471 goto delete_egress_cgr;
3474 /* Add the FQs to the interface, and make them active */
3475 list_for_each_entry_safe(dpaa_fq, tmp, &priv->dpaa_fq_list, list) {
3476 err = dpaa_fq_init(dpaa_fq, false);
3481 priv->tx_headroom = dpaa_get_headroom(priv->buf_layout, TX);
3482 priv->rx_headroom = dpaa_get_headroom(priv->buf_layout, RX);
3484 /* All real interfaces need their ports initialized */
3485 err = dpaa_eth_init_ports(mac_dev, dpaa_bp, &port_fqs,
3486 &priv->buf_layout[0], dev);
3490 /* Rx traffic distribution based on keygen hashing defaults to on */
3491 priv->keygen_in_use = true;
3493 priv->percpu_priv = devm_alloc_percpu(dev, *priv->percpu_priv);
3494 if (!priv->percpu_priv) {
3495 dev_err(dev, "devm_alloc_percpu() failed\n");
3501 netif_set_real_num_tx_queues(net_dev, priv->num_tc * DPAA_TC_TXQ_NUM);
3503 /* Initialize NAPI */
3504 err = dpaa_napi_add(net_dev);
3506 goto delete_dpaa_napi;
3508 err = dpaa_netdev_init(net_dev, &dpaa_ops, tx_timeout);
3510 goto delete_dpaa_napi;
3512 dpaa_eth_sysfs_init(&net_dev->dev);
3514 netif_info(priv, probe, net_dev, "Probed interface %s\n",
3520 dpaa_napi_del(net_dev);
3522 dpaa_fq_free(dev, &priv->dpaa_fq_list);
3523 qman_delete_cgr_safe(&priv->ingress_cgr);
3524 qman_release_cgrid(priv->ingress_cgr.cgrid);
3526 qman_delete_cgr_safe(&priv->cgr_data.cgr);
3527 qman_release_cgrid(priv->cgr_data.cgr.cgrid);
3529 dpaa_bps_free(priv);
3531 dev_set_drvdata(dev, NULL);
3532 free_netdev(net_dev);
3537 static int dpaa_remove(struct platform_device *pdev)
3539 struct net_device *net_dev;
3540 struct dpaa_priv *priv;
3545 net_dev = dev_get_drvdata(dev);
3547 priv = netdev_priv(net_dev);
3549 dpaa_eth_sysfs_remove(dev);
3551 dev_set_drvdata(dev, NULL);
3552 unregister_netdev(net_dev);
3554 err = dpaa_fq_free(dev, &priv->dpaa_fq_list);
3556 qman_delete_cgr_safe(&priv->ingress_cgr);
3557 qman_release_cgrid(priv->ingress_cgr.cgrid);
3558 qman_delete_cgr_safe(&priv->cgr_data.cgr);
3559 qman_release_cgrid(priv->cgr_data.cgr.cgrid);
3561 dpaa_napi_del(net_dev);
3563 dpaa_bps_free(priv);
3565 free_netdev(net_dev);
3570 static const struct platform_device_id dpaa_devtype[] = {
3572 .name = "dpaa-ethernet",
3577 MODULE_DEVICE_TABLE(platform, dpaa_devtype);
3579 static struct platform_driver dpaa_driver = {
3581 .name = KBUILD_MODNAME,
3583 .id_table = dpaa_devtype,
3584 .probe = dpaa_eth_probe,
3585 .remove = dpaa_remove
3588 static int __init dpaa_load(void)
3592 pr_debug("FSL DPAA Ethernet driver\n");
3594 /* initialize dpaa_eth mirror values */
3595 dpaa_rx_extra_headroom = fman_get_rx_extra_headroom();
3596 dpaa_max_frm = fman_get_max_frm();
3598 err = platform_driver_register(&dpaa_driver);
3600 pr_err("Error, platform_driver_register() = %d\n", err);
3604 module_init(dpaa_load);
3606 static void __exit dpaa_unload(void)
3608 platform_driver_unregister(&dpaa_driver);
3610 /* Only one channel is used and needs to be released after all
3611 * interfaces are removed
3613 dpaa_release_channel();
3615 module_exit(dpaa_unload);
3617 MODULE_LICENSE("Dual BSD/GPL");
3618 MODULE_DESCRIPTION("FSL DPAA Ethernet driver");