[CIFS] CIFS should honour umask
[sfrench/cifs-2.6.git] / drivers / net / e1000 / e1000_main.c
1 /*******************************************************************************
2
3   Intel PRO/1000 Linux driver
4   Copyright(c) 1999 - 2006 Intel Corporation.
5
6   This program is free software; you can redistribute it and/or modify it
7   under the terms and conditions of the GNU General Public License,
8   version 2, as published by the Free Software Foundation.
9
10   This program is distributed in the hope it will be useful, but WITHOUT
11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13   more details.
14
15   You should have received a copy of the GNU General Public License along with
16   this program; if not, write to the Free Software Foundation, Inc.,
17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19   The full GNU General Public License is included in this distribution in
20   the file called "COPYING".
21
22   Contact Information:
23   Linux NICS <linux.nics@intel.com>
24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30 #include <net/ip6_checksum.h>
31
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
35 #define DRIVERNAPI
36 #else
37 #define DRIVERNAPI "-NAPI"
38 #endif
39 #define DRV_VERSION "7.3.20-k2"DRIVERNAPI
40 char e1000_driver_version[] = DRV_VERSION;
41 static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
42
43 /* e1000_pci_tbl - PCI Device ID Table
44  *
45  * Last entry must be all 0s
46  *
47  * Macro expands to...
48  *   {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49  */
50 static struct pci_device_id e1000_pci_tbl[] = {
51         INTEL_E1000_ETHERNET_DEVICE(0x1000),
52         INTEL_E1000_ETHERNET_DEVICE(0x1001),
53         INTEL_E1000_ETHERNET_DEVICE(0x1004),
54         INTEL_E1000_ETHERNET_DEVICE(0x1008),
55         INTEL_E1000_ETHERNET_DEVICE(0x1009),
56         INTEL_E1000_ETHERNET_DEVICE(0x100C),
57         INTEL_E1000_ETHERNET_DEVICE(0x100D),
58         INTEL_E1000_ETHERNET_DEVICE(0x100E),
59         INTEL_E1000_ETHERNET_DEVICE(0x100F),
60         INTEL_E1000_ETHERNET_DEVICE(0x1010),
61         INTEL_E1000_ETHERNET_DEVICE(0x1011),
62         INTEL_E1000_ETHERNET_DEVICE(0x1012),
63         INTEL_E1000_ETHERNET_DEVICE(0x1013),
64         INTEL_E1000_ETHERNET_DEVICE(0x1014),
65         INTEL_E1000_ETHERNET_DEVICE(0x1015),
66         INTEL_E1000_ETHERNET_DEVICE(0x1016),
67         INTEL_E1000_ETHERNET_DEVICE(0x1017),
68         INTEL_E1000_ETHERNET_DEVICE(0x1018),
69         INTEL_E1000_ETHERNET_DEVICE(0x1019),
70         INTEL_E1000_ETHERNET_DEVICE(0x101A),
71         INTEL_E1000_ETHERNET_DEVICE(0x101D),
72         INTEL_E1000_ETHERNET_DEVICE(0x101E),
73         INTEL_E1000_ETHERNET_DEVICE(0x1026),
74         INTEL_E1000_ETHERNET_DEVICE(0x1027),
75         INTEL_E1000_ETHERNET_DEVICE(0x1028),
76         INTEL_E1000_ETHERNET_DEVICE(0x1049),
77         INTEL_E1000_ETHERNET_DEVICE(0x104A),
78         INTEL_E1000_ETHERNET_DEVICE(0x104B),
79         INTEL_E1000_ETHERNET_DEVICE(0x104C),
80         INTEL_E1000_ETHERNET_DEVICE(0x104D),
81         INTEL_E1000_ETHERNET_DEVICE(0x105E),
82         INTEL_E1000_ETHERNET_DEVICE(0x105F),
83         INTEL_E1000_ETHERNET_DEVICE(0x1060),
84         INTEL_E1000_ETHERNET_DEVICE(0x1075),
85         INTEL_E1000_ETHERNET_DEVICE(0x1076),
86         INTEL_E1000_ETHERNET_DEVICE(0x1077),
87         INTEL_E1000_ETHERNET_DEVICE(0x1078),
88         INTEL_E1000_ETHERNET_DEVICE(0x1079),
89         INTEL_E1000_ETHERNET_DEVICE(0x107A),
90         INTEL_E1000_ETHERNET_DEVICE(0x107B),
91         INTEL_E1000_ETHERNET_DEVICE(0x107C),
92         INTEL_E1000_ETHERNET_DEVICE(0x107D),
93         INTEL_E1000_ETHERNET_DEVICE(0x107E),
94         INTEL_E1000_ETHERNET_DEVICE(0x107F),
95         INTEL_E1000_ETHERNET_DEVICE(0x108A),
96         INTEL_E1000_ETHERNET_DEVICE(0x108B),
97         INTEL_E1000_ETHERNET_DEVICE(0x108C),
98         INTEL_E1000_ETHERNET_DEVICE(0x1096),
99         INTEL_E1000_ETHERNET_DEVICE(0x1098),
100         INTEL_E1000_ETHERNET_DEVICE(0x1099),
101         INTEL_E1000_ETHERNET_DEVICE(0x109A),
102         INTEL_E1000_ETHERNET_DEVICE(0x10A4),
103         INTEL_E1000_ETHERNET_DEVICE(0x10B5),
104         INTEL_E1000_ETHERNET_DEVICE(0x10B9),
105         INTEL_E1000_ETHERNET_DEVICE(0x10BA),
106         INTEL_E1000_ETHERNET_DEVICE(0x10BB),
107         INTEL_E1000_ETHERNET_DEVICE(0x10BC),
108         INTEL_E1000_ETHERNET_DEVICE(0x10C4),
109         INTEL_E1000_ETHERNET_DEVICE(0x10C5),
110         /* required last entry */
111         {0,}
112 };
113
114 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
115
116 int e1000_up(struct e1000_adapter *adapter);
117 void e1000_down(struct e1000_adapter *adapter);
118 void e1000_reinit_locked(struct e1000_adapter *adapter);
119 void e1000_reset(struct e1000_adapter *adapter);
120 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
121 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
122 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
123 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
124 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
125 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
126                              struct e1000_tx_ring *txdr);
127 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
128                              struct e1000_rx_ring *rxdr);
129 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
130                              struct e1000_tx_ring *tx_ring);
131 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
132                              struct e1000_rx_ring *rx_ring);
133 void e1000_update_stats(struct e1000_adapter *adapter);
134
135 static int e1000_init_module(void);
136 static void e1000_exit_module(void);
137 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
138 static void __devexit e1000_remove(struct pci_dev *pdev);
139 static int e1000_alloc_queues(struct e1000_adapter *adapter);
140 static int e1000_sw_init(struct e1000_adapter *adapter);
141 static int e1000_open(struct net_device *netdev);
142 static int e1000_close(struct net_device *netdev);
143 static void e1000_configure_tx(struct e1000_adapter *adapter);
144 static void e1000_configure_rx(struct e1000_adapter *adapter);
145 static void e1000_setup_rctl(struct e1000_adapter *adapter);
146 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
147 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
148 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
149                                 struct e1000_tx_ring *tx_ring);
150 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
151                                 struct e1000_rx_ring *rx_ring);
152 static void e1000_set_multi(struct net_device *netdev);
153 static void e1000_update_phy_info(unsigned long data);
154 static void e1000_watchdog(unsigned long data);
155 static void e1000_82547_tx_fifo_stall(unsigned long data);
156 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
157 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
158 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
159 static int e1000_set_mac(struct net_device *netdev, void *p);
160 static irqreturn_t e1000_intr(int irq, void *data);
161 static irqreturn_t e1000_intr_msi(int irq, void *data);
162 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
163                                     struct e1000_tx_ring *tx_ring);
164 #ifdef CONFIG_E1000_NAPI
165 static int e1000_clean(struct net_device *poll_dev, int *budget);
166 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
167                                     struct e1000_rx_ring *rx_ring,
168                                     int *work_done, int work_to_do);
169 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
170                                        struct e1000_rx_ring *rx_ring,
171                                        int *work_done, int work_to_do);
172 #else
173 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
174                                     struct e1000_rx_ring *rx_ring);
175 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
176                                        struct e1000_rx_ring *rx_ring);
177 #endif
178 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
179                                    struct e1000_rx_ring *rx_ring,
180                                    int cleaned_count);
181 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
182                                       struct e1000_rx_ring *rx_ring,
183                                       int cleaned_count);
184 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
185 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
186                            int cmd);
187 void e1000_set_ethtool_ops(struct net_device *netdev);
188 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
189 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
190 static void e1000_tx_timeout(struct net_device *dev);
191 static void e1000_reset_task(struct work_struct *work);
192 static void e1000_smartspeed(struct e1000_adapter *adapter);
193 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
194                                        struct sk_buff *skb);
195
196 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
197 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
198 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
199 static void e1000_restore_vlan(struct e1000_adapter *adapter);
200
201 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
202 #ifdef CONFIG_PM
203 static int e1000_resume(struct pci_dev *pdev);
204 #endif
205 static void e1000_shutdown(struct pci_dev *pdev);
206
207 #ifdef CONFIG_NET_POLL_CONTROLLER
208 /* for netdump / net console */
209 static void e1000_netpoll (struct net_device *netdev);
210 #endif
211
212 extern void e1000_check_options(struct e1000_adapter *adapter);
213
214 #define COPYBREAK_DEFAULT 256
215 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
216 module_param(copybreak, uint, 0644);
217 MODULE_PARM_DESC(copybreak,
218         "Maximum size of packet that is copied to a new buffer on receive");
219
220 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
221                      pci_channel_state_t state);
222 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
223 static void e1000_io_resume(struct pci_dev *pdev);
224
225 static struct pci_error_handlers e1000_err_handler = {
226         .error_detected = e1000_io_error_detected,
227         .slot_reset = e1000_io_slot_reset,
228         .resume = e1000_io_resume,
229 };
230
231 static struct pci_driver e1000_driver = {
232         .name     = e1000_driver_name,
233         .id_table = e1000_pci_tbl,
234         .probe    = e1000_probe,
235         .remove   = __devexit_p(e1000_remove),
236 #ifdef CONFIG_PM
237         /* Power Managment Hooks */
238         .suspend  = e1000_suspend,
239         .resume   = e1000_resume,
240 #endif
241         .shutdown = e1000_shutdown,
242         .err_handler = &e1000_err_handler
243 };
244
245 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
246 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
247 MODULE_LICENSE("GPL");
248 MODULE_VERSION(DRV_VERSION);
249
250 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
251 module_param(debug, int, 0);
252 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
253
254 /**
255  * e1000_init_module - Driver Registration Routine
256  *
257  * e1000_init_module is the first routine called when the driver is
258  * loaded. All it does is register with the PCI subsystem.
259  **/
260
261 static int __init
262 e1000_init_module(void)
263 {
264         int ret;
265         printk(KERN_INFO "%s - version %s\n",
266                e1000_driver_string, e1000_driver_version);
267
268         printk(KERN_INFO "%s\n", e1000_copyright);
269
270         ret = pci_register_driver(&e1000_driver);
271         if (copybreak != COPYBREAK_DEFAULT) {
272                 if (copybreak == 0)
273                         printk(KERN_INFO "e1000: copybreak disabled\n");
274                 else
275                         printk(KERN_INFO "e1000: copybreak enabled for "
276                                "packets <= %u bytes\n", copybreak);
277         }
278         return ret;
279 }
280
281 module_init(e1000_init_module);
282
283 /**
284  * e1000_exit_module - Driver Exit Cleanup Routine
285  *
286  * e1000_exit_module is called just before the driver is removed
287  * from memory.
288  **/
289
290 static void __exit
291 e1000_exit_module(void)
292 {
293         pci_unregister_driver(&e1000_driver);
294 }
295
296 module_exit(e1000_exit_module);
297
298 static int e1000_request_irq(struct e1000_adapter *adapter)
299 {
300         struct net_device *netdev = adapter->netdev;
301         void (*handler) = &e1000_intr;
302         int irq_flags = IRQF_SHARED;
303         int err;
304
305         if (adapter->hw.mac_type >= e1000_82571) {
306                 adapter->have_msi = !pci_enable_msi(adapter->pdev);
307                 if (adapter->have_msi) {
308                         handler = &e1000_intr_msi;
309                         irq_flags = 0;
310                 }
311         }
312
313         err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
314                           netdev);
315         if (err) {
316                 if (adapter->have_msi)
317                         pci_disable_msi(adapter->pdev);
318                 DPRINTK(PROBE, ERR,
319                         "Unable to allocate interrupt Error: %d\n", err);
320         }
321
322         return err;
323 }
324
325 static void e1000_free_irq(struct e1000_adapter *adapter)
326 {
327         struct net_device *netdev = adapter->netdev;
328
329         free_irq(adapter->pdev->irq, netdev);
330
331         if (adapter->have_msi)
332                 pci_disable_msi(adapter->pdev);
333 }
334
335 /**
336  * e1000_irq_disable - Mask off interrupt generation on the NIC
337  * @adapter: board private structure
338  **/
339
340 static void
341 e1000_irq_disable(struct e1000_adapter *adapter)
342 {
343         atomic_inc(&adapter->irq_sem);
344         E1000_WRITE_REG(&adapter->hw, IMC, ~0);
345         E1000_WRITE_FLUSH(&adapter->hw);
346         synchronize_irq(adapter->pdev->irq);
347 }
348
349 /**
350  * e1000_irq_enable - Enable default interrupt generation settings
351  * @adapter: board private structure
352  **/
353
354 static void
355 e1000_irq_enable(struct e1000_adapter *adapter)
356 {
357         if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
358                 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
359                 E1000_WRITE_FLUSH(&adapter->hw);
360         }
361 }
362
363 static void
364 e1000_update_mng_vlan(struct e1000_adapter *adapter)
365 {
366         struct net_device *netdev = adapter->netdev;
367         uint16_t vid = adapter->hw.mng_cookie.vlan_id;
368         uint16_t old_vid = adapter->mng_vlan_id;
369         if (adapter->vlgrp) {
370                 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
371                         if (adapter->hw.mng_cookie.status &
372                                 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
373                                 e1000_vlan_rx_add_vid(netdev, vid);
374                                 adapter->mng_vlan_id = vid;
375                         } else
376                                 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
377
378                         if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
379                                         (vid != old_vid) &&
380                             !vlan_group_get_device(adapter->vlgrp, old_vid))
381                                 e1000_vlan_rx_kill_vid(netdev, old_vid);
382                 } else
383                         adapter->mng_vlan_id = vid;
384         }
385 }
386
387 /**
388  * e1000_release_hw_control - release control of the h/w to f/w
389  * @adapter: address of board private structure
390  *
391  * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
392  * For ASF and Pass Through versions of f/w this means that the
393  * driver is no longer loaded. For AMT version (only with 82573) i
394  * of the f/w this means that the network i/f is closed.
395  *
396  **/
397
398 static void
399 e1000_release_hw_control(struct e1000_adapter *adapter)
400 {
401         uint32_t ctrl_ext;
402         uint32_t swsm;
403
404         /* Let firmware taken over control of h/w */
405         switch (adapter->hw.mac_type) {
406         case e1000_82573:
407                 swsm = E1000_READ_REG(&adapter->hw, SWSM);
408                 E1000_WRITE_REG(&adapter->hw, SWSM,
409                                 swsm & ~E1000_SWSM_DRV_LOAD);
410                 break;
411         case e1000_82571:
412         case e1000_82572:
413         case e1000_80003es2lan:
414         case e1000_ich8lan:
415                 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
416                 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
417                                 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
418                 break;
419         default:
420                 break;
421         }
422 }
423
424 /**
425  * e1000_get_hw_control - get control of the h/w from f/w
426  * @adapter: address of board private structure
427  *
428  * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
429  * For ASF and Pass Through versions of f/w this means that
430  * the driver is loaded. For AMT version (only with 82573)
431  * of the f/w this means that the network i/f is open.
432  *
433  **/
434
435 static void
436 e1000_get_hw_control(struct e1000_adapter *adapter)
437 {
438         uint32_t ctrl_ext;
439         uint32_t swsm;
440
441         /* Let firmware know the driver has taken over */
442         switch (adapter->hw.mac_type) {
443         case e1000_82573:
444                 swsm = E1000_READ_REG(&adapter->hw, SWSM);
445                 E1000_WRITE_REG(&adapter->hw, SWSM,
446                                 swsm | E1000_SWSM_DRV_LOAD);
447                 break;
448         case e1000_82571:
449         case e1000_82572:
450         case e1000_80003es2lan:
451         case e1000_ich8lan:
452                 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
453                 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
454                                 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
455                 break;
456         default:
457                 break;
458         }
459 }
460
461 static void
462 e1000_init_manageability(struct e1000_adapter *adapter)
463 {
464         if (adapter->en_mng_pt) {
465                 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
466
467                 /* disable hardware interception of ARP */
468                 manc &= ~(E1000_MANC_ARP_EN);
469
470                 /* enable receiving management packets to the host */
471                 /* this will probably generate destination unreachable messages
472                  * from the host OS, but the packets will be handled on SMBUS */
473                 if (adapter->hw.has_manc2h) {
474                         uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
475
476                         manc |= E1000_MANC_EN_MNG2HOST;
477 #define E1000_MNG2HOST_PORT_623 (1 << 5)
478 #define E1000_MNG2HOST_PORT_664 (1 << 6)
479                         manc2h |= E1000_MNG2HOST_PORT_623;
480                         manc2h |= E1000_MNG2HOST_PORT_664;
481                         E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
482                 }
483
484                 E1000_WRITE_REG(&adapter->hw, MANC, manc);
485         }
486 }
487
488 static void
489 e1000_release_manageability(struct e1000_adapter *adapter)
490 {
491         if (adapter->en_mng_pt) {
492                 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
493
494                 /* re-enable hardware interception of ARP */
495                 manc |= E1000_MANC_ARP_EN;
496
497                 if (adapter->hw.has_manc2h)
498                         manc &= ~E1000_MANC_EN_MNG2HOST;
499
500                 /* don't explicitly have to mess with MANC2H since
501                  * MANC has an enable disable that gates MANC2H */
502
503                 E1000_WRITE_REG(&adapter->hw, MANC, manc);
504         }
505 }
506
507 /**
508  * e1000_configure - configure the hardware for RX and TX
509  * @adapter = private board structure
510  **/
511 static void e1000_configure(struct e1000_adapter *adapter)
512 {
513         struct net_device *netdev = adapter->netdev;
514         int i;
515
516         e1000_set_multi(netdev);
517
518         e1000_restore_vlan(adapter);
519         e1000_init_manageability(adapter);
520
521         e1000_configure_tx(adapter);
522         e1000_setup_rctl(adapter);
523         e1000_configure_rx(adapter);
524         /* call E1000_DESC_UNUSED which always leaves
525          * at least 1 descriptor unused to make sure
526          * next_to_use != next_to_clean */
527         for (i = 0; i < adapter->num_rx_queues; i++) {
528                 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
529                 adapter->alloc_rx_buf(adapter, ring,
530                                       E1000_DESC_UNUSED(ring));
531         }
532
533         adapter->tx_queue_len = netdev->tx_queue_len;
534 }
535
536 int e1000_up(struct e1000_adapter *adapter)
537 {
538         /* hardware has been reset, we need to reload some things */
539         e1000_configure(adapter);
540
541         clear_bit(__E1000_DOWN, &adapter->flags);
542
543 #ifdef CONFIG_E1000_NAPI
544         netif_poll_enable(adapter->netdev);
545 #endif
546         e1000_irq_enable(adapter);
547
548         /* fire a link change interrupt to start the watchdog */
549         E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
550         return 0;
551 }
552
553 /**
554  * e1000_power_up_phy - restore link in case the phy was powered down
555  * @adapter: address of board private structure
556  *
557  * The phy may be powered down to save power and turn off link when the
558  * driver is unloaded and wake on lan is not enabled (among others)
559  * *** this routine MUST be followed by a call to e1000_reset ***
560  *
561  **/
562
563 void e1000_power_up_phy(struct e1000_adapter *adapter)
564 {
565         uint16_t mii_reg = 0;
566
567         /* Just clear the power down bit to wake the phy back up */
568         if (adapter->hw.media_type == e1000_media_type_copper) {
569                 /* according to the manual, the phy will retain its
570                  * settings across a power-down/up cycle */
571                 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
572                 mii_reg &= ~MII_CR_POWER_DOWN;
573                 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
574         }
575 }
576
577 static void e1000_power_down_phy(struct e1000_adapter *adapter)
578 {
579         /* Power down the PHY so no link is implied when interface is down *
580          * The PHY cannot be powered down if any of the following is TRUE *
581          * (a) WoL is enabled
582          * (b) AMT is active
583          * (c) SoL/IDER session is active */
584         if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
585            adapter->hw.media_type == e1000_media_type_copper) {
586                 uint16_t mii_reg = 0;
587
588                 switch (adapter->hw.mac_type) {
589                 case e1000_82540:
590                 case e1000_82545:
591                 case e1000_82545_rev_3:
592                 case e1000_82546:
593                 case e1000_82546_rev_3:
594                 case e1000_82541:
595                 case e1000_82541_rev_2:
596                 case e1000_82547:
597                 case e1000_82547_rev_2:
598                         if (E1000_READ_REG(&adapter->hw, MANC) &
599                             E1000_MANC_SMBUS_EN)
600                                 goto out;
601                         break;
602                 case e1000_82571:
603                 case e1000_82572:
604                 case e1000_82573:
605                 case e1000_80003es2lan:
606                 case e1000_ich8lan:
607                         if (e1000_check_mng_mode(&adapter->hw) ||
608                             e1000_check_phy_reset_block(&adapter->hw))
609                                 goto out;
610                         break;
611                 default:
612                         goto out;
613                 }
614                 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
615                 mii_reg |= MII_CR_POWER_DOWN;
616                 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
617                 mdelay(1);
618         }
619 out:
620         return;
621 }
622
623 void
624 e1000_down(struct e1000_adapter *adapter)
625 {
626         struct net_device *netdev = adapter->netdev;
627
628         /* signal that we're down so the interrupt handler does not
629          * reschedule our watchdog timer */
630         set_bit(__E1000_DOWN, &adapter->flags);
631
632 #ifdef CONFIG_E1000_NAPI
633         netif_poll_disable(netdev);
634 #endif
635         e1000_irq_disable(adapter);
636
637         del_timer_sync(&adapter->tx_fifo_stall_timer);
638         del_timer_sync(&adapter->watchdog_timer);
639         del_timer_sync(&adapter->phy_info_timer);
640
641         netdev->tx_queue_len = adapter->tx_queue_len;
642         adapter->link_speed = 0;
643         adapter->link_duplex = 0;
644         netif_carrier_off(netdev);
645         netif_stop_queue(netdev);
646
647         e1000_reset(adapter);
648         e1000_clean_all_tx_rings(adapter);
649         e1000_clean_all_rx_rings(adapter);
650 }
651
652 void
653 e1000_reinit_locked(struct e1000_adapter *adapter)
654 {
655         WARN_ON(in_interrupt());
656         while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
657                 msleep(1);
658         e1000_down(adapter);
659         e1000_up(adapter);
660         clear_bit(__E1000_RESETTING, &adapter->flags);
661 }
662
663 void
664 e1000_reset(struct e1000_adapter *adapter)
665 {
666         uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
667         uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
668         boolean_t legacy_pba_adjust = FALSE;
669
670         /* Repartition Pba for greater than 9k mtu
671          * To take effect CTRL.RST is required.
672          */
673
674         switch (adapter->hw.mac_type) {
675         case e1000_82542_rev2_0:
676         case e1000_82542_rev2_1:
677         case e1000_82543:
678         case e1000_82544:
679         case e1000_82540:
680         case e1000_82541:
681         case e1000_82541_rev_2:
682                 legacy_pba_adjust = TRUE;
683                 pba = E1000_PBA_48K;
684                 break;
685         case e1000_82545:
686         case e1000_82545_rev_3:
687         case e1000_82546:
688         case e1000_82546_rev_3:
689                 pba = E1000_PBA_48K;
690                 break;
691         case e1000_82547:
692         case e1000_82547_rev_2:
693                 legacy_pba_adjust = TRUE;
694                 pba = E1000_PBA_30K;
695                 break;
696         case e1000_82571:
697         case e1000_82572:
698         case e1000_80003es2lan:
699                 pba = E1000_PBA_38K;
700                 break;
701         case e1000_82573:
702                 pba = E1000_PBA_20K;
703                 break;
704         case e1000_ich8lan:
705                 pba = E1000_PBA_8K;
706         case e1000_undefined:
707         case e1000_num_macs:
708                 break;
709         }
710
711         if (legacy_pba_adjust == TRUE) {
712                 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
713                         pba -= 8; /* allocate more FIFO for Tx */
714
715                 if (adapter->hw.mac_type == e1000_82547) {
716                         adapter->tx_fifo_head = 0;
717                         adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
718                         adapter->tx_fifo_size =
719                                 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
720                         atomic_set(&adapter->tx_fifo_stall, 0);
721                 }
722         } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
723                 /* adjust PBA for jumbo frames */
724                 E1000_WRITE_REG(&adapter->hw, PBA, pba);
725
726                 /* To maintain wire speed transmits, the Tx FIFO should be
727                  * large enough to accomodate two full transmit packets,
728                  * rounded up to the next 1KB and expressed in KB.  Likewise,
729                  * the Rx FIFO should be large enough to accomodate at least
730                  * one full receive packet and is similarly rounded up and
731                  * expressed in KB. */
732                 pba = E1000_READ_REG(&adapter->hw, PBA);
733                 /* upper 16 bits has Tx packet buffer allocation size in KB */
734                 tx_space = pba >> 16;
735                 /* lower 16 bits has Rx packet buffer allocation size in KB */
736                 pba &= 0xffff;
737                 /* don't include ethernet FCS because hardware appends/strips */
738                 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
739                                VLAN_TAG_SIZE;
740                 min_tx_space = min_rx_space;
741                 min_tx_space *= 2;
742                 min_tx_space = ALIGN(min_tx_space, 1024);
743                 min_tx_space >>= 10;
744                 min_rx_space = ALIGN(min_rx_space, 1024);
745                 min_rx_space >>= 10;
746
747                 /* If current Tx allocation is less than the min Tx FIFO size,
748                  * and the min Tx FIFO size is less than the current Rx FIFO
749                  * allocation, take space away from current Rx allocation */
750                 if (tx_space < min_tx_space &&
751                     ((min_tx_space - tx_space) < pba)) {
752                         pba = pba - (min_tx_space - tx_space);
753
754                         /* PCI/PCIx hardware has PBA alignment constraints */
755                         switch (adapter->hw.mac_type) {
756                         case e1000_82545 ... e1000_82546_rev_3:
757                                 pba &= ~(E1000_PBA_8K - 1);
758                                 break;
759                         default:
760                                 break;
761                         }
762
763                         /* if short on rx space, rx wins and must trump tx
764                          * adjustment or use Early Receive if available */
765                         if (pba < min_rx_space) {
766                                 switch (adapter->hw.mac_type) {
767                                 case e1000_82573:
768                                         /* ERT enabled in e1000_configure_rx */
769                                         break;
770                                 default:
771                                         pba = min_rx_space;
772                                         break;
773                                 }
774                         }
775                 }
776         }
777
778         E1000_WRITE_REG(&adapter->hw, PBA, pba);
779
780         /* flow control settings */
781         /* Set the FC high water mark to 90% of the FIFO size.
782          * Required to clear last 3 LSB */
783         fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
784         /* We can't use 90% on small FIFOs because the remainder
785          * would be less than 1 full frame.  In this case, we size
786          * it to allow at least a full frame above the high water
787          *  mark. */
788         if (pba < E1000_PBA_16K)
789                 fc_high_water_mark = (pba * 1024) - 1600;
790
791         adapter->hw.fc_high_water = fc_high_water_mark;
792         adapter->hw.fc_low_water = fc_high_water_mark - 8;
793         if (adapter->hw.mac_type == e1000_80003es2lan)
794                 adapter->hw.fc_pause_time = 0xFFFF;
795         else
796                 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
797         adapter->hw.fc_send_xon = 1;
798         adapter->hw.fc = adapter->hw.original_fc;
799
800         /* Allow time for pending master requests to run */
801         e1000_reset_hw(&adapter->hw);
802         if (adapter->hw.mac_type >= e1000_82544)
803                 E1000_WRITE_REG(&adapter->hw, WUC, 0);
804
805         if (e1000_init_hw(&adapter->hw))
806                 DPRINTK(PROBE, ERR, "Hardware Error\n");
807         e1000_update_mng_vlan(adapter);
808
809         /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
810         if (adapter->hw.mac_type >= e1000_82544 &&
811             adapter->hw.mac_type <= e1000_82547_rev_2 &&
812             adapter->hw.autoneg == 1 &&
813             adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
814                 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
815                 /* clear phy power management bit if we are in gig only mode,
816                  * which if enabled will attempt negotiation to 100Mb, which
817                  * can cause a loss of link at power off or driver unload */
818                 ctrl &= ~E1000_CTRL_SWDPIN3;
819                 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
820         }
821
822         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
823         E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
824
825         e1000_reset_adaptive(&adapter->hw);
826         e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
827
828         if (!adapter->smart_power_down &&
829             (adapter->hw.mac_type == e1000_82571 ||
830              adapter->hw.mac_type == e1000_82572)) {
831                 uint16_t phy_data = 0;
832                 /* speed up time to link by disabling smart power down, ignore
833                  * the return value of this function because there is nothing
834                  * different we would do if it failed */
835                 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
836                                    &phy_data);
837                 phy_data &= ~IGP02E1000_PM_SPD;
838                 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
839                                     phy_data);
840         }
841
842         e1000_release_manageability(adapter);
843 }
844
845 /**
846  * e1000_probe - Device Initialization Routine
847  * @pdev: PCI device information struct
848  * @ent: entry in e1000_pci_tbl
849  *
850  * Returns 0 on success, negative on failure
851  *
852  * e1000_probe initializes an adapter identified by a pci_dev structure.
853  * The OS initialization, configuring of the adapter private structure,
854  * and a hardware reset occur.
855  **/
856
857 static int __devinit
858 e1000_probe(struct pci_dev *pdev,
859             const struct pci_device_id *ent)
860 {
861         struct net_device *netdev;
862         struct e1000_adapter *adapter;
863         unsigned long mmio_start, mmio_len;
864         unsigned long flash_start, flash_len;
865
866         static int cards_found = 0;
867         static int global_quad_port_a = 0; /* global ksp3 port a indication */
868         int i, err, pci_using_dac;
869         uint16_t eeprom_data = 0;
870         uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
871         if ((err = pci_enable_device(pdev)))
872                 return err;
873
874         if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
875             !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
876                 pci_using_dac = 1;
877         } else {
878                 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
879                     (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
880                         E1000_ERR("No usable DMA configuration, aborting\n");
881                         goto err_dma;
882                 }
883                 pci_using_dac = 0;
884         }
885
886         if ((err = pci_request_regions(pdev, e1000_driver_name)))
887                 goto err_pci_reg;
888
889         pci_set_master(pdev);
890
891         err = -ENOMEM;
892         netdev = alloc_etherdev(sizeof(struct e1000_adapter));
893         if (!netdev)
894                 goto err_alloc_etherdev;
895
896         SET_MODULE_OWNER(netdev);
897         SET_NETDEV_DEV(netdev, &pdev->dev);
898
899         pci_set_drvdata(pdev, netdev);
900         adapter = netdev_priv(netdev);
901         adapter->netdev = netdev;
902         adapter->pdev = pdev;
903         adapter->hw.back = adapter;
904         adapter->msg_enable = (1 << debug) - 1;
905
906         mmio_start = pci_resource_start(pdev, BAR_0);
907         mmio_len = pci_resource_len(pdev, BAR_0);
908
909         err = -EIO;
910         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
911         if (!adapter->hw.hw_addr)
912                 goto err_ioremap;
913
914         for (i = BAR_1; i <= BAR_5; i++) {
915                 if (pci_resource_len(pdev, i) == 0)
916                         continue;
917                 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
918                         adapter->hw.io_base = pci_resource_start(pdev, i);
919                         break;
920                 }
921         }
922
923         netdev->open = &e1000_open;
924         netdev->stop = &e1000_close;
925         netdev->hard_start_xmit = &e1000_xmit_frame;
926         netdev->get_stats = &e1000_get_stats;
927         netdev->set_multicast_list = &e1000_set_multi;
928         netdev->set_mac_address = &e1000_set_mac;
929         netdev->change_mtu = &e1000_change_mtu;
930         netdev->do_ioctl = &e1000_ioctl;
931         e1000_set_ethtool_ops(netdev);
932         netdev->tx_timeout = &e1000_tx_timeout;
933         netdev->watchdog_timeo = 5 * HZ;
934 #ifdef CONFIG_E1000_NAPI
935         netdev->poll = &e1000_clean;
936         netdev->weight = 64;
937 #endif
938         netdev->vlan_rx_register = e1000_vlan_rx_register;
939         netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
940         netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
941 #ifdef CONFIG_NET_POLL_CONTROLLER
942         netdev->poll_controller = e1000_netpoll;
943 #endif
944         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
945
946         netdev->mem_start = mmio_start;
947         netdev->mem_end = mmio_start + mmio_len;
948         netdev->base_addr = adapter->hw.io_base;
949
950         adapter->bd_number = cards_found;
951
952         /* setup the private structure */
953
954         if ((err = e1000_sw_init(adapter)))
955                 goto err_sw_init;
956
957         err = -EIO;
958         /* Flash BAR mapping must happen after e1000_sw_init
959          * because it depends on mac_type */
960         if ((adapter->hw.mac_type == e1000_ich8lan) &&
961            (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
962                 flash_start = pci_resource_start(pdev, 1);
963                 flash_len = pci_resource_len(pdev, 1);
964                 adapter->hw.flash_address = ioremap(flash_start, flash_len);
965                 if (!adapter->hw.flash_address)
966                         goto err_flashmap;
967         }
968
969         if (e1000_check_phy_reset_block(&adapter->hw))
970                 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
971
972         if (adapter->hw.mac_type >= e1000_82543) {
973                 netdev->features = NETIF_F_SG |
974                                    NETIF_F_HW_CSUM |
975                                    NETIF_F_HW_VLAN_TX |
976                                    NETIF_F_HW_VLAN_RX |
977                                    NETIF_F_HW_VLAN_FILTER;
978                 if (adapter->hw.mac_type == e1000_ich8lan)
979                         netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
980         }
981
982         if ((adapter->hw.mac_type >= e1000_82544) &&
983            (adapter->hw.mac_type != e1000_82547))
984                 netdev->features |= NETIF_F_TSO;
985
986         if (adapter->hw.mac_type > e1000_82547_rev_2)
987                 netdev->features |= NETIF_F_TSO6;
988         if (pci_using_dac)
989                 netdev->features |= NETIF_F_HIGHDMA;
990
991         netdev->features |= NETIF_F_LLTX;
992
993         adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
994
995         /* initialize eeprom parameters */
996
997         if (e1000_init_eeprom_params(&adapter->hw)) {
998                 E1000_ERR("EEPROM initialization failed\n");
999                 goto err_eeprom;
1000         }
1001
1002         /* before reading the EEPROM, reset the controller to
1003          * put the device in a known good starting state */
1004
1005         e1000_reset_hw(&adapter->hw);
1006
1007         /* make sure the EEPROM is good */
1008
1009         if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1010                 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1011                 goto err_eeprom;
1012         }
1013
1014         /* copy the MAC address out of the EEPROM */
1015
1016         if (e1000_read_mac_addr(&adapter->hw))
1017                 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1018         memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1019         memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1020
1021         if (!is_valid_ether_addr(netdev->perm_addr)) {
1022                 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1023                 goto err_eeprom;
1024         }
1025
1026         e1000_get_bus_info(&adapter->hw);
1027
1028         init_timer(&adapter->tx_fifo_stall_timer);
1029         adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1030         adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1031
1032         init_timer(&adapter->watchdog_timer);
1033         adapter->watchdog_timer.function = &e1000_watchdog;
1034         adapter->watchdog_timer.data = (unsigned long) adapter;
1035
1036         init_timer(&adapter->phy_info_timer);
1037         adapter->phy_info_timer.function = &e1000_update_phy_info;
1038         adapter->phy_info_timer.data = (unsigned long) adapter;
1039
1040         INIT_WORK(&adapter->reset_task, e1000_reset_task);
1041
1042         e1000_check_options(adapter);
1043
1044         /* Initial Wake on LAN setting
1045          * If APM wake is enabled in the EEPROM,
1046          * enable the ACPI Magic Packet filter
1047          */
1048
1049         switch (adapter->hw.mac_type) {
1050         case e1000_82542_rev2_0:
1051         case e1000_82542_rev2_1:
1052         case e1000_82543:
1053                 break;
1054         case e1000_82544:
1055                 e1000_read_eeprom(&adapter->hw,
1056                         EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1057                 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1058                 break;
1059         case e1000_ich8lan:
1060                 e1000_read_eeprom(&adapter->hw,
1061                         EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1062                 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1063                 break;
1064         case e1000_82546:
1065         case e1000_82546_rev_3:
1066         case e1000_82571:
1067         case e1000_80003es2lan:
1068                 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1069                         e1000_read_eeprom(&adapter->hw,
1070                                 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1071                         break;
1072                 }
1073                 /* Fall Through */
1074         default:
1075                 e1000_read_eeprom(&adapter->hw,
1076                         EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1077                 break;
1078         }
1079         if (eeprom_data & eeprom_apme_mask)
1080                 adapter->eeprom_wol |= E1000_WUFC_MAG;
1081
1082         /* now that we have the eeprom settings, apply the special cases
1083          * where the eeprom may be wrong or the board simply won't support
1084          * wake on lan on a particular port */
1085         switch (pdev->device) {
1086         case E1000_DEV_ID_82546GB_PCIE:
1087                 adapter->eeprom_wol = 0;
1088                 break;
1089         case E1000_DEV_ID_82546EB_FIBER:
1090         case E1000_DEV_ID_82546GB_FIBER:
1091         case E1000_DEV_ID_82571EB_FIBER:
1092                 /* Wake events only supported on port A for dual fiber
1093                  * regardless of eeprom setting */
1094                 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1095                         adapter->eeprom_wol = 0;
1096                 break;
1097         case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1098         case E1000_DEV_ID_82571EB_QUAD_COPPER:
1099         case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1100                 /* if quad port adapter, disable WoL on all but port A */
1101                 if (global_quad_port_a != 0)
1102                         adapter->eeprom_wol = 0;
1103                 else
1104                         adapter->quad_port_a = 1;
1105                 /* Reset for multiple quad port adapters */
1106                 if (++global_quad_port_a == 4)
1107                         global_quad_port_a = 0;
1108                 break;
1109         }
1110
1111         /* initialize the wol settings based on the eeprom settings */
1112         adapter->wol = adapter->eeprom_wol;
1113
1114         /* print bus type/speed/width info */
1115         {
1116         struct e1000_hw *hw = &adapter->hw;
1117         DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1118                 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1119                  (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1120                 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1121                  (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1122                  (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1123                  (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1124                  (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1125                 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1126                  (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1127                  (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1128                  "32-bit"));
1129         }
1130
1131         for (i = 0; i < 6; i++)
1132                 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1133
1134         /* reset the hardware with the new settings */
1135         e1000_reset(adapter);
1136
1137         /* If the controller is 82573 and f/w is AMT, do not set
1138          * DRV_LOAD until the interface is up.  For all other cases,
1139          * let the f/w know that the h/w is now under the control
1140          * of the driver. */
1141         if (adapter->hw.mac_type != e1000_82573 ||
1142             !e1000_check_mng_mode(&adapter->hw))
1143                 e1000_get_hw_control(adapter);
1144
1145         strcpy(netdev->name, "eth%d");
1146         if ((err = register_netdev(netdev)))
1147                 goto err_register;
1148
1149         /* tell the stack to leave us alone until e1000_open() is called */
1150         netif_carrier_off(netdev);
1151         netif_stop_queue(netdev);
1152
1153         DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1154
1155         cards_found++;
1156         return 0;
1157
1158 err_register:
1159         e1000_release_hw_control(adapter);
1160 err_eeprom:
1161         if (!e1000_check_phy_reset_block(&adapter->hw))
1162                 e1000_phy_hw_reset(&adapter->hw);
1163
1164         if (adapter->hw.flash_address)
1165                 iounmap(adapter->hw.flash_address);
1166 err_flashmap:
1167 #ifdef CONFIG_E1000_NAPI
1168         for (i = 0; i < adapter->num_rx_queues; i++)
1169                 dev_put(&adapter->polling_netdev[i]);
1170 #endif
1171
1172         kfree(adapter->tx_ring);
1173         kfree(adapter->rx_ring);
1174 #ifdef CONFIG_E1000_NAPI
1175         kfree(adapter->polling_netdev);
1176 #endif
1177 err_sw_init:
1178         iounmap(adapter->hw.hw_addr);
1179 err_ioremap:
1180         free_netdev(netdev);
1181 err_alloc_etherdev:
1182         pci_release_regions(pdev);
1183 err_pci_reg:
1184 err_dma:
1185         pci_disable_device(pdev);
1186         return err;
1187 }
1188
1189 /**
1190  * e1000_remove - Device Removal Routine
1191  * @pdev: PCI device information struct
1192  *
1193  * e1000_remove is called by the PCI subsystem to alert the driver
1194  * that it should release a PCI device.  The could be caused by a
1195  * Hot-Plug event, or because the driver is going to be removed from
1196  * memory.
1197  **/
1198
1199 static void __devexit
1200 e1000_remove(struct pci_dev *pdev)
1201 {
1202         struct net_device *netdev = pci_get_drvdata(pdev);
1203         struct e1000_adapter *adapter = netdev_priv(netdev);
1204 #ifdef CONFIG_E1000_NAPI
1205         int i;
1206 #endif
1207
1208         cancel_work_sync(&adapter->reset_task);
1209
1210         e1000_release_manageability(adapter);
1211
1212         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
1213          * would have already happened in close and is redundant. */
1214         e1000_release_hw_control(adapter);
1215
1216         unregister_netdev(netdev);
1217 #ifdef CONFIG_E1000_NAPI
1218         for (i = 0; i < adapter->num_rx_queues; i++)
1219                 dev_put(&adapter->polling_netdev[i]);
1220 #endif
1221
1222         if (!e1000_check_phy_reset_block(&adapter->hw))
1223                 e1000_phy_hw_reset(&adapter->hw);
1224
1225         kfree(adapter->tx_ring);
1226         kfree(adapter->rx_ring);
1227 #ifdef CONFIG_E1000_NAPI
1228         kfree(adapter->polling_netdev);
1229 #endif
1230
1231         iounmap(adapter->hw.hw_addr);
1232         if (adapter->hw.flash_address)
1233                 iounmap(adapter->hw.flash_address);
1234         pci_release_regions(pdev);
1235
1236         free_netdev(netdev);
1237
1238         pci_disable_device(pdev);
1239 }
1240
1241 /**
1242  * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1243  * @adapter: board private structure to initialize
1244  *
1245  * e1000_sw_init initializes the Adapter private data structure.
1246  * Fields are initialized based on PCI device information and
1247  * OS network device settings (MTU size).
1248  **/
1249
1250 static int __devinit
1251 e1000_sw_init(struct e1000_adapter *adapter)
1252 {
1253         struct e1000_hw *hw = &adapter->hw;
1254         struct net_device *netdev = adapter->netdev;
1255         struct pci_dev *pdev = adapter->pdev;
1256 #ifdef CONFIG_E1000_NAPI
1257         int i;
1258 #endif
1259
1260         /* PCI config space info */
1261
1262         hw->vendor_id = pdev->vendor;
1263         hw->device_id = pdev->device;
1264         hw->subsystem_vendor_id = pdev->subsystem_vendor;
1265         hw->subsystem_id = pdev->subsystem_device;
1266
1267         pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1268
1269         pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1270
1271         adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1272         adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1273         hw->max_frame_size = netdev->mtu +
1274                              ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1275         hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1276
1277         /* identify the MAC */
1278
1279         if (e1000_set_mac_type(hw)) {
1280                 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1281                 return -EIO;
1282         }
1283
1284         switch (hw->mac_type) {
1285         default:
1286                 break;
1287         case e1000_82541:
1288         case e1000_82547:
1289         case e1000_82541_rev_2:
1290         case e1000_82547_rev_2:
1291                 hw->phy_init_script = 1;
1292                 break;
1293         }
1294
1295         e1000_set_media_type(hw);
1296
1297         hw->wait_autoneg_complete = FALSE;
1298         hw->tbi_compatibility_en = TRUE;
1299         hw->adaptive_ifs = TRUE;
1300
1301         /* Copper options */
1302
1303         if (hw->media_type == e1000_media_type_copper) {
1304                 hw->mdix = AUTO_ALL_MODES;
1305                 hw->disable_polarity_correction = FALSE;
1306                 hw->master_slave = E1000_MASTER_SLAVE;
1307         }
1308
1309         adapter->num_tx_queues = 1;
1310         adapter->num_rx_queues = 1;
1311
1312         if (e1000_alloc_queues(adapter)) {
1313                 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1314                 return -ENOMEM;
1315         }
1316
1317 #ifdef CONFIG_E1000_NAPI
1318         for (i = 0; i < adapter->num_rx_queues; i++) {
1319                 adapter->polling_netdev[i].priv = adapter;
1320                 adapter->polling_netdev[i].poll = &e1000_clean;
1321                 adapter->polling_netdev[i].weight = 64;
1322                 dev_hold(&adapter->polling_netdev[i]);
1323                 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1324         }
1325         spin_lock_init(&adapter->tx_queue_lock);
1326 #endif
1327
1328         atomic_set(&adapter->irq_sem, 1);
1329         spin_lock_init(&adapter->stats_lock);
1330
1331         set_bit(__E1000_DOWN, &adapter->flags);
1332
1333         return 0;
1334 }
1335
1336 /**
1337  * e1000_alloc_queues - Allocate memory for all rings
1338  * @adapter: board private structure to initialize
1339  *
1340  * We allocate one ring per queue at run-time since we don't know the
1341  * number of queues at compile-time.  The polling_netdev array is
1342  * intended for Multiqueue, but should work fine with a single queue.
1343  **/
1344
1345 static int __devinit
1346 e1000_alloc_queues(struct e1000_adapter *adapter)
1347 {
1348         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1349                                    sizeof(struct e1000_tx_ring), GFP_KERNEL);
1350         if (!adapter->tx_ring)
1351                 return -ENOMEM;
1352
1353         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1354                                    sizeof(struct e1000_rx_ring), GFP_KERNEL);
1355         if (!adapter->rx_ring) {
1356                 kfree(adapter->tx_ring);
1357                 return -ENOMEM;
1358         }
1359
1360 #ifdef CONFIG_E1000_NAPI
1361         adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1362                                           sizeof(struct net_device),
1363                                           GFP_KERNEL);
1364         if (!adapter->polling_netdev) {
1365                 kfree(adapter->tx_ring);
1366                 kfree(adapter->rx_ring);
1367                 return -ENOMEM;
1368         }
1369 #endif
1370
1371         return E1000_SUCCESS;
1372 }
1373
1374 /**
1375  * e1000_open - Called when a network interface is made active
1376  * @netdev: network interface device structure
1377  *
1378  * Returns 0 on success, negative value on failure
1379  *
1380  * The open entry point is called when a network interface is made
1381  * active by the system (IFF_UP).  At this point all resources needed
1382  * for transmit and receive operations are allocated, the interrupt
1383  * handler is registered with the OS, the watchdog timer is started,
1384  * and the stack is notified that the interface is ready.
1385  **/
1386
1387 static int
1388 e1000_open(struct net_device *netdev)
1389 {
1390         struct e1000_adapter *adapter = netdev_priv(netdev);
1391         int err;
1392
1393         /* disallow open during test */
1394         if (test_bit(__E1000_TESTING, &adapter->flags))
1395                 return -EBUSY;
1396
1397         /* allocate transmit descriptors */
1398         err = e1000_setup_all_tx_resources(adapter);
1399         if (err)
1400                 goto err_setup_tx;
1401
1402         /* allocate receive descriptors */
1403         err = e1000_setup_all_rx_resources(adapter);
1404         if (err)
1405                 goto err_setup_rx;
1406
1407         e1000_power_up_phy(adapter);
1408
1409         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1410         if ((adapter->hw.mng_cookie.status &
1411                           E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1412                 e1000_update_mng_vlan(adapter);
1413         }
1414
1415         /* If AMT is enabled, let the firmware know that the network
1416          * interface is now open */
1417         if (adapter->hw.mac_type == e1000_82573 &&
1418             e1000_check_mng_mode(&adapter->hw))
1419                 e1000_get_hw_control(adapter);
1420
1421         /* before we allocate an interrupt, we must be ready to handle it.
1422          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1423          * as soon as we call pci_request_irq, so we have to setup our
1424          * clean_rx handler before we do so.  */
1425         e1000_configure(adapter);
1426
1427         err = e1000_request_irq(adapter);
1428         if (err)
1429                 goto err_req_irq;
1430
1431         /* From here on the code is the same as e1000_up() */
1432         clear_bit(__E1000_DOWN, &adapter->flags);
1433
1434         e1000_irq_enable(adapter);
1435
1436         /* fire a link status change interrupt to start the watchdog */
1437         E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1438
1439         return E1000_SUCCESS;
1440
1441 err_req_irq:
1442         e1000_release_hw_control(adapter);
1443         e1000_power_down_phy(adapter);
1444         e1000_free_all_rx_resources(adapter);
1445 err_setup_rx:
1446         e1000_free_all_tx_resources(adapter);
1447 err_setup_tx:
1448         e1000_reset(adapter);
1449
1450         return err;
1451 }
1452
1453 /**
1454  * e1000_close - Disables a network interface
1455  * @netdev: network interface device structure
1456  *
1457  * Returns 0, this is not allowed to fail
1458  *
1459  * The close entry point is called when an interface is de-activated
1460  * by the OS.  The hardware is still under the drivers control, but
1461  * needs to be disabled.  A global MAC reset is issued to stop the
1462  * hardware, and all transmit and receive resources are freed.
1463  **/
1464
1465 static int
1466 e1000_close(struct net_device *netdev)
1467 {
1468         struct e1000_adapter *adapter = netdev_priv(netdev);
1469
1470         WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1471         e1000_down(adapter);
1472         e1000_power_down_phy(adapter);
1473         e1000_free_irq(adapter);
1474
1475         e1000_free_all_tx_resources(adapter);
1476         e1000_free_all_rx_resources(adapter);
1477
1478         /* kill manageability vlan ID if supported, but not if a vlan with
1479          * the same ID is registered on the host OS (let 8021q kill it) */
1480         if ((adapter->hw.mng_cookie.status &
1481                           E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1482              !(adapter->vlgrp &&
1483                vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
1484                 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1485         }
1486
1487         /* If AMT is enabled, let the firmware know that the network
1488          * interface is now closed */
1489         if (adapter->hw.mac_type == e1000_82573 &&
1490             e1000_check_mng_mode(&adapter->hw))
1491                 e1000_release_hw_control(adapter);
1492
1493         return 0;
1494 }
1495
1496 /**
1497  * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1498  * @adapter: address of board private structure
1499  * @start: address of beginning of memory
1500  * @len: length of memory
1501  **/
1502 static boolean_t
1503 e1000_check_64k_bound(struct e1000_adapter *adapter,
1504                       void *start, unsigned long len)
1505 {
1506         unsigned long begin = (unsigned long) start;
1507         unsigned long end = begin + len;
1508
1509         /* First rev 82545 and 82546 need to not allow any memory
1510          * write location to cross 64k boundary due to errata 23 */
1511         if (adapter->hw.mac_type == e1000_82545 ||
1512             adapter->hw.mac_type == e1000_82546) {
1513                 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1514         }
1515
1516         return TRUE;
1517 }
1518
1519 /**
1520  * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1521  * @adapter: board private structure
1522  * @txdr:    tx descriptor ring (for a specific queue) to setup
1523  *
1524  * Return 0 on success, negative on failure
1525  **/
1526
1527 static int
1528 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1529                          struct e1000_tx_ring *txdr)
1530 {
1531         struct pci_dev *pdev = adapter->pdev;
1532         int size;
1533
1534         size = sizeof(struct e1000_buffer) * txdr->count;
1535         txdr->buffer_info = vmalloc(size);
1536         if (!txdr->buffer_info) {
1537                 DPRINTK(PROBE, ERR,
1538                 "Unable to allocate memory for the transmit descriptor ring\n");
1539                 return -ENOMEM;
1540         }
1541         memset(txdr->buffer_info, 0, size);
1542
1543         /* round up to nearest 4K */
1544
1545         txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1546         txdr->size = ALIGN(txdr->size, 4096);
1547
1548         txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1549         if (!txdr->desc) {
1550 setup_tx_desc_die:
1551                 vfree(txdr->buffer_info);
1552                 DPRINTK(PROBE, ERR,
1553                 "Unable to allocate memory for the transmit descriptor ring\n");
1554                 return -ENOMEM;
1555         }
1556
1557         /* Fix for errata 23, can't cross 64kB boundary */
1558         if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1559                 void *olddesc = txdr->desc;
1560                 dma_addr_t olddma = txdr->dma;
1561                 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1562                                      "at %p\n", txdr->size, txdr->desc);
1563                 /* Try again, without freeing the previous */
1564                 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1565                 /* Failed allocation, critical failure */
1566                 if (!txdr->desc) {
1567                         pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1568                         goto setup_tx_desc_die;
1569                 }
1570
1571                 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1572                         /* give up */
1573                         pci_free_consistent(pdev, txdr->size, txdr->desc,
1574                                             txdr->dma);
1575                         pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1576                         DPRINTK(PROBE, ERR,
1577                                 "Unable to allocate aligned memory "
1578                                 "for the transmit descriptor ring\n");
1579                         vfree(txdr->buffer_info);
1580                         return -ENOMEM;
1581                 } else {
1582                         /* Free old allocation, new allocation was successful */
1583                         pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1584                 }
1585         }
1586         memset(txdr->desc, 0, txdr->size);
1587
1588         txdr->next_to_use = 0;
1589         txdr->next_to_clean = 0;
1590         spin_lock_init(&txdr->tx_lock);
1591
1592         return 0;
1593 }
1594
1595 /**
1596  * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1597  *                                (Descriptors) for all queues
1598  * @adapter: board private structure
1599  *
1600  * Return 0 on success, negative on failure
1601  **/
1602
1603 int
1604 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1605 {
1606         int i, err = 0;
1607
1608         for (i = 0; i < adapter->num_tx_queues; i++) {
1609                 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1610                 if (err) {
1611                         DPRINTK(PROBE, ERR,
1612                                 "Allocation for Tx Queue %u failed\n", i);
1613                         for (i-- ; i >= 0; i--)
1614                                 e1000_free_tx_resources(adapter,
1615                                                         &adapter->tx_ring[i]);
1616                         break;
1617                 }
1618         }
1619
1620         return err;
1621 }
1622
1623 /**
1624  * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1625  * @adapter: board private structure
1626  *
1627  * Configure the Tx unit of the MAC after a reset.
1628  **/
1629
1630 static void
1631 e1000_configure_tx(struct e1000_adapter *adapter)
1632 {
1633         uint64_t tdba;
1634         struct e1000_hw *hw = &adapter->hw;
1635         uint32_t tdlen, tctl, tipg, tarc;
1636         uint32_t ipgr1, ipgr2;
1637
1638         /* Setup the HW Tx Head and Tail descriptor pointers */
1639
1640         switch (adapter->num_tx_queues) {
1641         case 1:
1642         default:
1643                 tdba = adapter->tx_ring[0].dma;
1644                 tdlen = adapter->tx_ring[0].count *
1645                         sizeof(struct e1000_tx_desc);
1646                 E1000_WRITE_REG(hw, TDLEN, tdlen);
1647                 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1648                 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1649                 E1000_WRITE_REG(hw, TDT, 0);
1650                 E1000_WRITE_REG(hw, TDH, 0);
1651                 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1652                 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1653                 break;
1654         }
1655
1656         /* Set the default values for the Tx Inter Packet Gap timer */
1657         if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1658             (hw->media_type == e1000_media_type_fiber ||
1659              hw->media_type == e1000_media_type_internal_serdes))
1660                 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1661         else
1662                 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1663
1664         switch (hw->mac_type) {
1665         case e1000_82542_rev2_0:
1666         case e1000_82542_rev2_1:
1667                 tipg = DEFAULT_82542_TIPG_IPGT;
1668                 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1669                 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1670                 break;
1671         case e1000_80003es2lan:
1672                 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1673                 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1674                 break;
1675         default:
1676                 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1677                 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1678                 break;
1679         }
1680         tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1681         tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1682         E1000_WRITE_REG(hw, TIPG, tipg);
1683
1684         /* Set the Tx Interrupt Delay register */
1685
1686         E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1687         if (hw->mac_type >= e1000_82540)
1688                 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1689
1690         /* Program the Transmit Control Register */
1691
1692         tctl = E1000_READ_REG(hw, TCTL);
1693         tctl &= ~E1000_TCTL_CT;
1694         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1695                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1696
1697         if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1698                 tarc = E1000_READ_REG(hw, TARC0);
1699                 /* set the speed mode bit, we'll clear it if we're not at
1700                  * gigabit link later */
1701                 tarc |= (1 << 21);
1702                 E1000_WRITE_REG(hw, TARC0, tarc);
1703         } else if (hw->mac_type == e1000_80003es2lan) {
1704                 tarc = E1000_READ_REG(hw, TARC0);
1705                 tarc |= 1;
1706                 E1000_WRITE_REG(hw, TARC0, tarc);
1707                 tarc = E1000_READ_REG(hw, TARC1);
1708                 tarc |= 1;
1709                 E1000_WRITE_REG(hw, TARC1, tarc);
1710         }
1711
1712         e1000_config_collision_dist(hw);
1713
1714         /* Setup Transmit Descriptor Settings for eop descriptor */
1715         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1716
1717         /* only set IDE if we are delaying interrupts using the timers */
1718         if (adapter->tx_int_delay)
1719                 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1720
1721         if (hw->mac_type < e1000_82543)
1722                 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1723         else
1724                 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1725
1726         /* Cache if we're 82544 running in PCI-X because we'll
1727          * need this to apply a workaround later in the send path. */
1728         if (hw->mac_type == e1000_82544 &&
1729             hw->bus_type == e1000_bus_type_pcix)
1730                 adapter->pcix_82544 = 1;
1731
1732         E1000_WRITE_REG(hw, TCTL, tctl);
1733
1734 }
1735
1736 /**
1737  * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1738  * @adapter: board private structure
1739  * @rxdr:    rx descriptor ring (for a specific queue) to setup
1740  *
1741  * Returns 0 on success, negative on failure
1742  **/
1743
1744 static int
1745 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1746                          struct e1000_rx_ring *rxdr)
1747 {
1748         struct pci_dev *pdev = adapter->pdev;
1749         int size, desc_len;
1750
1751         size = sizeof(struct e1000_buffer) * rxdr->count;
1752         rxdr->buffer_info = vmalloc(size);
1753         if (!rxdr->buffer_info) {
1754                 DPRINTK(PROBE, ERR,
1755                 "Unable to allocate memory for the receive descriptor ring\n");
1756                 return -ENOMEM;
1757         }
1758         memset(rxdr->buffer_info, 0, size);
1759
1760         rxdr->ps_page = kcalloc(rxdr->count, sizeof(struct e1000_ps_page),
1761                                 GFP_KERNEL);
1762         if (!rxdr->ps_page) {
1763                 vfree(rxdr->buffer_info);
1764                 DPRINTK(PROBE, ERR,
1765                 "Unable to allocate memory for the receive descriptor ring\n");
1766                 return -ENOMEM;
1767         }
1768
1769         rxdr->ps_page_dma = kcalloc(rxdr->count,
1770                                     sizeof(struct e1000_ps_page_dma),
1771                                     GFP_KERNEL);
1772         if (!rxdr->ps_page_dma) {
1773                 vfree(rxdr->buffer_info);
1774                 kfree(rxdr->ps_page);
1775                 DPRINTK(PROBE, ERR,
1776                 "Unable to allocate memory for the receive descriptor ring\n");
1777                 return -ENOMEM;
1778         }
1779
1780         if (adapter->hw.mac_type <= e1000_82547_rev_2)
1781                 desc_len = sizeof(struct e1000_rx_desc);
1782         else
1783                 desc_len = sizeof(union e1000_rx_desc_packet_split);
1784
1785         /* Round up to nearest 4K */
1786
1787         rxdr->size = rxdr->count * desc_len;
1788         rxdr->size = ALIGN(rxdr->size, 4096);
1789
1790         rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1791
1792         if (!rxdr->desc) {
1793                 DPRINTK(PROBE, ERR,
1794                 "Unable to allocate memory for the receive descriptor ring\n");
1795 setup_rx_desc_die:
1796                 vfree(rxdr->buffer_info);
1797                 kfree(rxdr->ps_page);
1798                 kfree(rxdr->ps_page_dma);
1799                 return -ENOMEM;
1800         }
1801
1802         /* Fix for errata 23, can't cross 64kB boundary */
1803         if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1804                 void *olddesc = rxdr->desc;
1805                 dma_addr_t olddma = rxdr->dma;
1806                 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1807                                      "at %p\n", rxdr->size, rxdr->desc);
1808                 /* Try again, without freeing the previous */
1809                 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1810                 /* Failed allocation, critical failure */
1811                 if (!rxdr->desc) {
1812                         pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1813                         DPRINTK(PROBE, ERR,
1814                                 "Unable to allocate memory "
1815                                 "for the receive descriptor ring\n");
1816                         goto setup_rx_desc_die;
1817                 }
1818
1819                 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1820                         /* give up */
1821                         pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1822                                             rxdr->dma);
1823                         pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1824                         DPRINTK(PROBE, ERR,
1825                                 "Unable to allocate aligned memory "
1826                                 "for the receive descriptor ring\n");
1827                         goto setup_rx_desc_die;
1828                 } else {
1829                         /* Free old allocation, new allocation was successful */
1830                         pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1831                 }
1832         }
1833         memset(rxdr->desc, 0, rxdr->size);
1834
1835         rxdr->next_to_clean = 0;
1836         rxdr->next_to_use = 0;
1837
1838         return 0;
1839 }
1840
1841 /**
1842  * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1843  *                                (Descriptors) for all queues
1844  * @adapter: board private structure
1845  *
1846  * Return 0 on success, negative on failure
1847  **/
1848
1849 int
1850 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1851 {
1852         int i, err = 0;
1853
1854         for (i = 0; i < adapter->num_rx_queues; i++) {
1855                 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1856                 if (err) {
1857                         DPRINTK(PROBE, ERR,
1858                                 "Allocation for Rx Queue %u failed\n", i);
1859                         for (i-- ; i >= 0; i--)
1860                                 e1000_free_rx_resources(adapter,
1861                                                         &adapter->rx_ring[i]);
1862                         break;
1863                 }
1864         }
1865
1866         return err;
1867 }
1868
1869 /**
1870  * e1000_setup_rctl - configure the receive control registers
1871  * @adapter: Board private structure
1872  **/
1873 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1874                         (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1875 static void
1876 e1000_setup_rctl(struct e1000_adapter *adapter)
1877 {
1878         uint32_t rctl, rfctl;
1879         uint32_t psrctl = 0;
1880 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1881         uint32_t pages = 0;
1882 #endif
1883
1884         rctl = E1000_READ_REG(&adapter->hw, RCTL);
1885
1886         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1887
1888         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1889                 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1890                 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1891
1892         if (adapter->hw.tbi_compatibility_on == 1)
1893                 rctl |= E1000_RCTL_SBP;
1894         else
1895                 rctl &= ~E1000_RCTL_SBP;
1896
1897         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1898                 rctl &= ~E1000_RCTL_LPE;
1899         else
1900                 rctl |= E1000_RCTL_LPE;
1901
1902         /* Setup buffer sizes */
1903         rctl &= ~E1000_RCTL_SZ_4096;
1904         rctl |= E1000_RCTL_BSEX;
1905         switch (adapter->rx_buffer_len) {
1906                 case E1000_RXBUFFER_256:
1907                         rctl |= E1000_RCTL_SZ_256;
1908                         rctl &= ~E1000_RCTL_BSEX;
1909                         break;
1910                 case E1000_RXBUFFER_512:
1911                         rctl |= E1000_RCTL_SZ_512;
1912                         rctl &= ~E1000_RCTL_BSEX;
1913                         break;
1914                 case E1000_RXBUFFER_1024:
1915                         rctl |= E1000_RCTL_SZ_1024;
1916                         rctl &= ~E1000_RCTL_BSEX;
1917                         break;
1918                 case E1000_RXBUFFER_2048:
1919                 default:
1920                         rctl |= E1000_RCTL_SZ_2048;
1921                         rctl &= ~E1000_RCTL_BSEX;
1922                         break;
1923                 case E1000_RXBUFFER_4096:
1924                         rctl |= E1000_RCTL_SZ_4096;
1925                         break;
1926                 case E1000_RXBUFFER_8192:
1927                         rctl |= E1000_RCTL_SZ_8192;
1928                         break;
1929                 case E1000_RXBUFFER_16384:
1930                         rctl |= E1000_RCTL_SZ_16384;
1931                         break;
1932         }
1933
1934 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1935         /* 82571 and greater support packet-split where the protocol
1936          * header is placed in skb->data and the packet data is
1937          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1938          * In the case of a non-split, skb->data is linearly filled,
1939          * followed by the page buffers.  Therefore, skb->data is
1940          * sized to hold the largest protocol header.
1941          */
1942         /* allocations using alloc_page take too long for regular MTU
1943          * so only enable packet split for jumbo frames */
1944         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1945         if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1946             PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
1947                 adapter->rx_ps_pages = pages;
1948         else
1949                 adapter->rx_ps_pages = 0;
1950 #endif
1951         if (adapter->rx_ps_pages) {
1952                 /* Configure extra packet-split registers */
1953                 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1954                 rfctl |= E1000_RFCTL_EXTEN;
1955                 /* disable packet split support for IPv6 extension headers,
1956                  * because some malformed IPv6 headers can hang the RX */
1957                 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1958                           E1000_RFCTL_NEW_IPV6_EXT_DIS);
1959
1960                 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1961
1962                 rctl |= E1000_RCTL_DTYP_PS;
1963
1964                 psrctl |= adapter->rx_ps_bsize0 >>
1965                         E1000_PSRCTL_BSIZE0_SHIFT;
1966
1967                 switch (adapter->rx_ps_pages) {
1968                 case 3:
1969                         psrctl |= PAGE_SIZE <<
1970                                 E1000_PSRCTL_BSIZE3_SHIFT;
1971                 case 2:
1972                         psrctl |= PAGE_SIZE <<
1973                                 E1000_PSRCTL_BSIZE2_SHIFT;
1974                 case 1:
1975                         psrctl |= PAGE_SIZE >>
1976                                 E1000_PSRCTL_BSIZE1_SHIFT;
1977                         break;
1978                 }
1979
1980                 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1981         }
1982
1983         E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1984 }
1985
1986 /**
1987  * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1988  * @adapter: board private structure
1989  *
1990  * Configure the Rx unit of the MAC after a reset.
1991  **/
1992
1993 static void
1994 e1000_configure_rx(struct e1000_adapter *adapter)
1995 {
1996         uint64_t rdba;
1997         struct e1000_hw *hw = &adapter->hw;
1998         uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1999
2000         if (adapter->rx_ps_pages) {
2001                 /* this is a 32 byte descriptor */
2002                 rdlen = adapter->rx_ring[0].count *
2003                         sizeof(union e1000_rx_desc_packet_split);
2004                 adapter->clean_rx = e1000_clean_rx_irq_ps;
2005                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2006         } else {
2007                 rdlen = adapter->rx_ring[0].count *
2008                         sizeof(struct e1000_rx_desc);
2009                 adapter->clean_rx = e1000_clean_rx_irq;
2010                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2011         }
2012
2013         /* disable receives while setting up the descriptors */
2014         rctl = E1000_READ_REG(hw, RCTL);
2015         E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
2016
2017         /* set the Receive Delay Timer Register */
2018         E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
2019
2020         if (hw->mac_type >= e1000_82540) {
2021                 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
2022                 if (adapter->itr_setting != 0)
2023                         E1000_WRITE_REG(hw, ITR,
2024                                 1000000000 / (adapter->itr * 256));
2025         }
2026
2027         if (hw->mac_type >= e1000_82571) {
2028                 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
2029                 /* Reset delay timers after every interrupt */
2030                 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2031 #ifdef CONFIG_E1000_NAPI
2032                 /* Auto-Mask interrupts upon ICR access */
2033                 ctrl_ext |= E1000_CTRL_EXT_IAME;
2034                 E1000_WRITE_REG(hw, IAM, 0xffffffff);
2035 #endif
2036                 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2037                 E1000_WRITE_FLUSH(hw);
2038         }
2039
2040         /* Setup the HW Rx Head and Tail Descriptor Pointers and
2041          * the Base and Length of the Rx Descriptor Ring */
2042         switch (adapter->num_rx_queues) {
2043         case 1:
2044         default:
2045                 rdba = adapter->rx_ring[0].dma;
2046                 E1000_WRITE_REG(hw, RDLEN, rdlen);
2047                 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2048                 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
2049                 E1000_WRITE_REG(hw, RDT, 0);
2050                 E1000_WRITE_REG(hw, RDH, 0);
2051                 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2052                 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
2053                 break;
2054         }
2055
2056         /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2057         if (hw->mac_type >= e1000_82543) {
2058                 rxcsum = E1000_READ_REG(hw, RXCSUM);
2059                 if (adapter->rx_csum == TRUE) {
2060                         rxcsum |= E1000_RXCSUM_TUOFL;
2061
2062                         /* Enable 82571 IPv4 payload checksum for UDP fragments
2063                          * Must be used in conjunction with packet-split. */
2064                         if ((hw->mac_type >= e1000_82571) &&
2065                             (adapter->rx_ps_pages)) {
2066                                 rxcsum |= E1000_RXCSUM_IPPCSE;
2067                         }
2068                 } else {
2069                         rxcsum &= ~E1000_RXCSUM_TUOFL;
2070                         /* don't need to clear IPPCSE as it defaults to 0 */
2071                 }
2072                 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
2073         }
2074
2075         /* enable early receives on 82573, only takes effect if using > 2048
2076          * byte total frame size.  for example only for jumbo frames */
2077 #define E1000_ERT_2048 0x100
2078         if (hw->mac_type == e1000_82573)
2079                 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2080
2081         /* Enable Receives */
2082         E1000_WRITE_REG(hw, RCTL, rctl);
2083 }
2084
2085 /**
2086  * e1000_free_tx_resources - Free Tx Resources per Queue
2087  * @adapter: board private structure
2088  * @tx_ring: Tx descriptor ring for a specific queue
2089  *
2090  * Free all transmit software resources
2091  **/
2092
2093 static void
2094 e1000_free_tx_resources(struct e1000_adapter *adapter,
2095                         struct e1000_tx_ring *tx_ring)
2096 {
2097         struct pci_dev *pdev = adapter->pdev;
2098
2099         e1000_clean_tx_ring(adapter, tx_ring);
2100
2101         vfree(tx_ring->buffer_info);
2102         tx_ring->buffer_info = NULL;
2103
2104         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2105
2106         tx_ring->desc = NULL;
2107 }
2108
2109 /**
2110  * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2111  * @adapter: board private structure
2112  *
2113  * Free all transmit software resources
2114  **/
2115
2116 void
2117 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2118 {
2119         int i;
2120
2121         for (i = 0; i < adapter->num_tx_queues; i++)
2122                 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2123 }
2124
2125 static void
2126 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2127                         struct e1000_buffer *buffer_info)
2128 {
2129         if (buffer_info->dma) {
2130                 pci_unmap_page(adapter->pdev,
2131                                 buffer_info->dma,
2132                                 buffer_info->length,
2133                                 PCI_DMA_TODEVICE);
2134                 buffer_info->dma = 0;
2135         }
2136         if (buffer_info->skb) {
2137                 dev_kfree_skb_any(buffer_info->skb);
2138                 buffer_info->skb = NULL;
2139         }
2140         /* buffer_info must be completely set up in the transmit path */
2141 }
2142
2143 /**
2144  * e1000_clean_tx_ring - Free Tx Buffers
2145  * @adapter: board private structure
2146  * @tx_ring: ring to be cleaned
2147  **/
2148
2149 static void
2150 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2151                     struct e1000_tx_ring *tx_ring)
2152 {
2153         struct e1000_buffer *buffer_info;
2154         unsigned long size;
2155         unsigned int i;
2156
2157         /* Free all the Tx ring sk_buffs */
2158
2159         for (i = 0; i < tx_ring->count; i++) {
2160                 buffer_info = &tx_ring->buffer_info[i];
2161                 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2162         }
2163
2164         size = sizeof(struct e1000_buffer) * tx_ring->count;
2165         memset(tx_ring->buffer_info, 0, size);
2166
2167         /* Zero out the descriptor ring */
2168
2169         memset(tx_ring->desc, 0, tx_ring->size);
2170
2171         tx_ring->next_to_use = 0;
2172         tx_ring->next_to_clean = 0;
2173         tx_ring->last_tx_tso = 0;
2174
2175         writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2176         writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2177 }
2178
2179 /**
2180  * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2181  * @adapter: board private structure
2182  **/
2183
2184 static void
2185 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2186 {
2187         int i;
2188
2189         for (i = 0; i < adapter->num_tx_queues; i++)
2190                 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2191 }
2192
2193 /**
2194  * e1000_free_rx_resources - Free Rx Resources
2195  * @adapter: board private structure
2196  * @rx_ring: ring to clean the resources from
2197  *
2198  * Free all receive software resources
2199  **/
2200
2201 static void
2202 e1000_free_rx_resources(struct e1000_adapter *adapter,
2203                         struct e1000_rx_ring *rx_ring)
2204 {
2205         struct pci_dev *pdev = adapter->pdev;
2206
2207         e1000_clean_rx_ring(adapter, rx_ring);
2208
2209         vfree(rx_ring->buffer_info);
2210         rx_ring->buffer_info = NULL;
2211         kfree(rx_ring->ps_page);
2212         rx_ring->ps_page = NULL;
2213         kfree(rx_ring->ps_page_dma);
2214         rx_ring->ps_page_dma = NULL;
2215
2216         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2217
2218         rx_ring->desc = NULL;
2219 }
2220
2221 /**
2222  * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2223  * @adapter: board private structure
2224  *
2225  * Free all receive software resources
2226  **/
2227
2228 void
2229 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2230 {
2231         int i;
2232
2233         for (i = 0; i < adapter->num_rx_queues; i++)
2234                 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2235 }
2236
2237 /**
2238  * e1000_clean_rx_ring - Free Rx Buffers per Queue
2239  * @adapter: board private structure
2240  * @rx_ring: ring to free buffers from
2241  **/
2242
2243 static void
2244 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2245                     struct e1000_rx_ring *rx_ring)
2246 {
2247         struct e1000_buffer *buffer_info;
2248         struct e1000_ps_page *ps_page;
2249         struct e1000_ps_page_dma *ps_page_dma;
2250         struct pci_dev *pdev = adapter->pdev;
2251         unsigned long size;
2252         unsigned int i, j;
2253
2254         /* Free all the Rx ring sk_buffs */
2255         for (i = 0; i < rx_ring->count; i++) {
2256                 buffer_info = &rx_ring->buffer_info[i];
2257                 if (buffer_info->skb) {
2258                         pci_unmap_single(pdev,
2259                                          buffer_info->dma,
2260                                          buffer_info->length,
2261                                          PCI_DMA_FROMDEVICE);
2262
2263                         dev_kfree_skb(buffer_info->skb);
2264                         buffer_info->skb = NULL;
2265                 }
2266                 ps_page = &rx_ring->ps_page[i];
2267                 ps_page_dma = &rx_ring->ps_page_dma[i];
2268                 for (j = 0; j < adapter->rx_ps_pages; j++) {
2269                         if (!ps_page->ps_page[j]) break;
2270                         pci_unmap_page(pdev,
2271                                        ps_page_dma->ps_page_dma[j],
2272                                        PAGE_SIZE, PCI_DMA_FROMDEVICE);
2273                         ps_page_dma->ps_page_dma[j] = 0;
2274                         put_page(ps_page->ps_page[j]);
2275                         ps_page->ps_page[j] = NULL;
2276                 }
2277         }
2278
2279         size = sizeof(struct e1000_buffer) * rx_ring->count;
2280         memset(rx_ring->buffer_info, 0, size);
2281         size = sizeof(struct e1000_ps_page) * rx_ring->count;
2282         memset(rx_ring->ps_page, 0, size);
2283         size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2284         memset(rx_ring->ps_page_dma, 0, size);
2285
2286         /* Zero out the descriptor ring */
2287
2288         memset(rx_ring->desc, 0, rx_ring->size);
2289
2290         rx_ring->next_to_clean = 0;
2291         rx_ring->next_to_use = 0;
2292
2293         writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2294         writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2295 }
2296
2297 /**
2298  * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2299  * @adapter: board private structure
2300  **/
2301
2302 static void
2303 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2304 {
2305         int i;
2306
2307         for (i = 0; i < adapter->num_rx_queues; i++)
2308                 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2309 }
2310
2311 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2312  * and memory write and invalidate disabled for certain operations
2313  */
2314 static void
2315 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2316 {
2317         struct net_device *netdev = adapter->netdev;
2318         uint32_t rctl;
2319
2320         e1000_pci_clear_mwi(&adapter->hw);
2321
2322         rctl = E1000_READ_REG(&adapter->hw, RCTL);
2323         rctl |= E1000_RCTL_RST;
2324         E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2325         E1000_WRITE_FLUSH(&adapter->hw);
2326         mdelay(5);
2327
2328         if (netif_running(netdev))
2329                 e1000_clean_all_rx_rings(adapter);
2330 }
2331
2332 static void
2333 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2334 {
2335         struct net_device *netdev = adapter->netdev;
2336         uint32_t rctl;
2337
2338         rctl = E1000_READ_REG(&adapter->hw, RCTL);
2339         rctl &= ~E1000_RCTL_RST;
2340         E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2341         E1000_WRITE_FLUSH(&adapter->hw);
2342         mdelay(5);
2343
2344         if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2345                 e1000_pci_set_mwi(&adapter->hw);
2346
2347         if (netif_running(netdev)) {
2348                 /* No need to loop, because 82542 supports only 1 queue */
2349                 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2350                 e1000_configure_rx(adapter);
2351                 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2352         }
2353 }
2354
2355 /**
2356  * e1000_set_mac - Change the Ethernet Address of the NIC
2357  * @netdev: network interface device structure
2358  * @p: pointer to an address structure
2359  *
2360  * Returns 0 on success, negative on failure
2361  **/
2362
2363 static int
2364 e1000_set_mac(struct net_device *netdev, void *p)
2365 {
2366         struct e1000_adapter *adapter = netdev_priv(netdev);
2367         struct sockaddr *addr = p;
2368
2369         if (!is_valid_ether_addr(addr->sa_data))
2370                 return -EADDRNOTAVAIL;
2371
2372         /* 82542 2.0 needs to be in reset to write receive address registers */
2373
2374         if (adapter->hw.mac_type == e1000_82542_rev2_0)
2375                 e1000_enter_82542_rst(adapter);
2376
2377         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2378         memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2379
2380         e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2381
2382         /* With 82571 controllers, LAA may be overwritten (with the default)
2383          * due to controller reset from the other port. */
2384         if (adapter->hw.mac_type == e1000_82571) {
2385                 /* activate the work around */
2386                 adapter->hw.laa_is_present = 1;
2387
2388                 /* Hold a copy of the LAA in RAR[14] This is done so that
2389                  * between the time RAR[0] gets clobbered  and the time it
2390                  * gets fixed (in e1000_watchdog), the actual LAA is in one
2391                  * of the RARs and no incoming packets directed to this port
2392                  * are dropped. Eventaully the LAA will be in RAR[0] and
2393                  * RAR[14] */
2394                 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2395                                         E1000_RAR_ENTRIES - 1);
2396         }
2397
2398         if (adapter->hw.mac_type == e1000_82542_rev2_0)
2399                 e1000_leave_82542_rst(adapter);
2400
2401         return 0;
2402 }
2403
2404 /**
2405  * e1000_set_multi - Multicast and Promiscuous mode set
2406  * @netdev: network interface device structure
2407  *
2408  * The set_multi entry point is called whenever the multicast address
2409  * list or the network interface flags are updated.  This routine is
2410  * responsible for configuring the hardware for proper multicast,
2411  * promiscuous mode, and all-multi behavior.
2412  **/
2413
2414 static void
2415 e1000_set_multi(struct net_device *netdev)
2416 {
2417         struct e1000_adapter *adapter = netdev_priv(netdev);
2418         struct e1000_hw *hw = &adapter->hw;
2419         struct dev_mc_list *mc_ptr;
2420         uint32_t rctl;
2421         uint32_t hash_value;
2422         int i, rar_entries = E1000_RAR_ENTRIES;
2423         int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2424                                 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2425                                 E1000_NUM_MTA_REGISTERS;
2426
2427         if (adapter->hw.mac_type == e1000_ich8lan)
2428                 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2429
2430         /* reserve RAR[14] for LAA over-write work-around */
2431         if (adapter->hw.mac_type == e1000_82571)
2432                 rar_entries--;
2433
2434         /* Check for Promiscuous and All Multicast modes */
2435
2436         rctl = E1000_READ_REG(hw, RCTL);
2437
2438         if (netdev->flags & IFF_PROMISC) {
2439                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2440         } else if (netdev->flags & IFF_ALLMULTI) {
2441                 rctl |= E1000_RCTL_MPE;
2442                 rctl &= ~E1000_RCTL_UPE;
2443         } else {
2444                 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2445         }
2446
2447         E1000_WRITE_REG(hw, RCTL, rctl);
2448
2449         /* 82542 2.0 needs to be in reset to write receive address registers */
2450
2451         if (hw->mac_type == e1000_82542_rev2_0)
2452                 e1000_enter_82542_rst(adapter);
2453
2454         /* load the first 14 multicast address into the exact filters 1-14
2455          * RAR 0 is used for the station MAC adddress
2456          * if there are not 14 addresses, go ahead and clear the filters
2457          * -- with 82571 controllers only 0-13 entries are filled here
2458          */
2459         mc_ptr = netdev->mc_list;
2460
2461         for (i = 1; i < rar_entries; i++) {
2462                 if (mc_ptr) {
2463                         e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2464                         mc_ptr = mc_ptr->next;
2465                 } else {
2466                         E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2467                         E1000_WRITE_FLUSH(hw);
2468                         E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2469                         E1000_WRITE_FLUSH(hw);
2470                 }
2471         }
2472
2473         /* clear the old settings from the multicast hash table */
2474
2475         for (i = 0; i < mta_reg_count; i++) {
2476                 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2477                 E1000_WRITE_FLUSH(hw);
2478         }
2479
2480         /* load any remaining addresses into the hash table */
2481
2482         for (; mc_ptr; mc_ptr = mc_ptr->next) {
2483                 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2484                 e1000_mta_set(hw, hash_value);
2485         }
2486
2487         if (hw->mac_type == e1000_82542_rev2_0)
2488                 e1000_leave_82542_rst(adapter);
2489 }
2490
2491 /* Need to wait a few seconds after link up to get diagnostic information from
2492  * the phy */
2493
2494 static void
2495 e1000_update_phy_info(unsigned long data)
2496 {
2497         struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2498         e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2499 }
2500
2501 /**
2502  * e1000_82547_tx_fifo_stall - Timer Call-back
2503  * @data: pointer to adapter cast into an unsigned long
2504  **/
2505
2506 static void
2507 e1000_82547_tx_fifo_stall(unsigned long data)
2508 {
2509         struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2510         struct net_device *netdev = adapter->netdev;
2511         uint32_t tctl;
2512
2513         if (atomic_read(&adapter->tx_fifo_stall)) {
2514                 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2515                     E1000_READ_REG(&adapter->hw, TDH)) &&
2516                    (E1000_READ_REG(&adapter->hw, TDFT) ==
2517                     E1000_READ_REG(&adapter->hw, TDFH)) &&
2518                    (E1000_READ_REG(&adapter->hw, TDFTS) ==
2519                     E1000_READ_REG(&adapter->hw, TDFHS))) {
2520                         tctl = E1000_READ_REG(&adapter->hw, TCTL);
2521                         E1000_WRITE_REG(&adapter->hw, TCTL,
2522                                         tctl & ~E1000_TCTL_EN);
2523                         E1000_WRITE_REG(&adapter->hw, TDFT,
2524                                         adapter->tx_head_addr);
2525                         E1000_WRITE_REG(&adapter->hw, TDFH,
2526                                         adapter->tx_head_addr);
2527                         E1000_WRITE_REG(&adapter->hw, TDFTS,
2528                                         adapter->tx_head_addr);
2529                         E1000_WRITE_REG(&adapter->hw, TDFHS,
2530                                         adapter->tx_head_addr);
2531                         E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2532                         E1000_WRITE_FLUSH(&adapter->hw);
2533
2534                         adapter->tx_fifo_head = 0;
2535                         atomic_set(&adapter->tx_fifo_stall, 0);
2536                         netif_wake_queue(netdev);
2537                 } else {
2538                         mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2539                 }
2540         }
2541 }
2542
2543 /**
2544  * e1000_watchdog - Timer Call-back
2545  * @data: pointer to adapter cast into an unsigned long
2546  **/
2547 static void
2548 e1000_watchdog(unsigned long data)
2549 {
2550         struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2551         struct net_device *netdev = adapter->netdev;
2552         struct e1000_tx_ring *txdr = adapter->tx_ring;
2553         uint32_t link, tctl;
2554         int32_t ret_val;
2555
2556         ret_val = e1000_check_for_link(&adapter->hw);
2557         if ((ret_val == E1000_ERR_PHY) &&
2558             (adapter->hw.phy_type == e1000_phy_igp_3) &&
2559             (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2560                 /* See e1000_kumeran_lock_loss_workaround() */
2561                 DPRINTK(LINK, INFO,
2562                         "Gigabit has been disabled, downgrading speed\n");
2563         }
2564
2565         if (adapter->hw.mac_type == e1000_82573) {
2566                 e1000_enable_tx_pkt_filtering(&adapter->hw);
2567                 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2568                         e1000_update_mng_vlan(adapter);
2569         }
2570
2571         if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2572            !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2573                 link = !adapter->hw.serdes_link_down;
2574         else
2575                 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2576
2577         if (link) {
2578                 if (!netif_carrier_ok(netdev)) {
2579                         uint32_t ctrl;
2580                         boolean_t txb2b = 1;
2581                         e1000_get_speed_and_duplex(&adapter->hw,
2582                                                    &adapter->link_speed,
2583                                                    &adapter->link_duplex);
2584
2585                         ctrl = E1000_READ_REG(&adapter->hw, CTRL);
2586                         DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2587                                 "Flow Control: %s\n",
2588                                 adapter->link_speed,
2589                                 adapter->link_duplex == FULL_DUPLEX ?
2590                                 "Full Duplex" : "Half Duplex",
2591                                 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2592                                 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2593                                 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2594                                 E1000_CTRL_TFCE) ? "TX" : "None" )));
2595
2596                         /* tweak tx_queue_len according to speed/duplex
2597                          * and adjust the timeout factor */
2598                         netdev->tx_queue_len = adapter->tx_queue_len;
2599                         adapter->tx_timeout_factor = 1;
2600                         switch (adapter->link_speed) {
2601                         case SPEED_10:
2602                                 txb2b = 0;
2603                                 netdev->tx_queue_len = 10;
2604                                 adapter->tx_timeout_factor = 8;
2605                                 break;
2606                         case SPEED_100:
2607                                 txb2b = 0;
2608                                 netdev->tx_queue_len = 100;
2609                                 /* maybe add some timeout factor ? */
2610                                 break;
2611                         }
2612
2613                         if ((adapter->hw.mac_type == e1000_82571 ||
2614                              adapter->hw.mac_type == e1000_82572) &&
2615                             txb2b == 0) {
2616                                 uint32_t tarc0;
2617                                 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2618                                 tarc0 &= ~(1 << 21);
2619                                 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2620                         }
2621
2622                         /* disable TSO for pcie and 10/100 speeds, to avoid
2623                          * some hardware issues */
2624                         if (!adapter->tso_force &&
2625                             adapter->hw.bus_type == e1000_bus_type_pci_express){
2626                                 switch (adapter->link_speed) {
2627                                 case SPEED_10:
2628                                 case SPEED_100:
2629                                         DPRINTK(PROBE,INFO,
2630                                         "10/100 speed: disabling TSO\n");
2631                                         netdev->features &= ~NETIF_F_TSO;
2632                                         netdev->features &= ~NETIF_F_TSO6;
2633                                         break;
2634                                 case SPEED_1000:
2635                                         netdev->features |= NETIF_F_TSO;
2636                                         netdev->features |= NETIF_F_TSO6;
2637                                         break;
2638                                 default:
2639                                         /* oops */
2640                                         break;
2641                                 }
2642                         }
2643
2644                         /* enable transmits in the hardware, need to do this
2645                          * after setting TARC0 */
2646                         tctl = E1000_READ_REG(&adapter->hw, TCTL);
2647                         tctl |= E1000_TCTL_EN;
2648                         E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2649
2650                         netif_carrier_on(netdev);
2651                         netif_wake_queue(netdev);
2652                         mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2653                         adapter->smartspeed = 0;
2654                 } else {
2655                         /* make sure the receive unit is started */
2656                         if (adapter->hw.rx_needs_kicking) {
2657                                 struct e1000_hw *hw = &adapter->hw;
2658                                 uint32_t rctl = E1000_READ_REG(hw, RCTL);
2659                                 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2660                         }
2661                 }
2662         } else {
2663                 if (netif_carrier_ok(netdev)) {
2664                         adapter->link_speed = 0;
2665                         adapter->link_duplex = 0;
2666                         DPRINTK(LINK, INFO, "NIC Link is Down\n");
2667                         netif_carrier_off(netdev);
2668                         netif_stop_queue(netdev);
2669                         mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2670
2671                         /* 80003ES2LAN workaround--
2672                          * For packet buffer work-around on link down event;
2673                          * disable receives in the ISR and
2674                          * reset device here in the watchdog
2675                          */
2676                         if (adapter->hw.mac_type == e1000_80003es2lan)
2677                                 /* reset device */
2678                                 schedule_work(&adapter->reset_task);
2679                 }
2680
2681                 e1000_smartspeed(adapter);
2682         }
2683
2684         e1000_update_stats(adapter);
2685
2686         adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2687         adapter->tpt_old = adapter->stats.tpt;
2688         adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2689         adapter->colc_old = adapter->stats.colc;
2690
2691         adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2692         adapter->gorcl_old = adapter->stats.gorcl;
2693         adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2694         adapter->gotcl_old = adapter->stats.gotcl;
2695
2696         e1000_update_adaptive(&adapter->hw);
2697
2698         if (!netif_carrier_ok(netdev)) {
2699                 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2700                         /* We've lost link, so the controller stops DMA,
2701                          * but we've got queued Tx work that's never going
2702                          * to get done, so reset controller to flush Tx.
2703                          * (Do the reset outside of interrupt context). */
2704                         adapter->tx_timeout_count++;
2705                         schedule_work(&adapter->reset_task);
2706                 }
2707         }
2708
2709         /* Cause software interrupt to ensure rx ring is cleaned */
2710         E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2711
2712         /* Force detection of hung controller every watchdog period */
2713         adapter->detect_tx_hung = TRUE;
2714
2715         /* With 82571 controllers, LAA may be overwritten due to controller
2716          * reset from the other port. Set the appropriate LAA in RAR[0] */
2717         if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2718                 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2719
2720         /* Reset the timer */
2721         mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
2722 }
2723
2724 enum latency_range {
2725         lowest_latency = 0,
2726         low_latency = 1,
2727         bulk_latency = 2,
2728         latency_invalid = 255
2729 };
2730
2731 /**
2732  * e1000_update_itr - update the dynamic ITR value based on statistics
2733  *      Stores a new ITR value based on packets and byte
2734  *      counts during the last interrupt.  The advantage of per interrupt
2735  *      computation is faster updates and more accurate ITR for the current
2736  *      traffic pattern.  Constants in this function were computed
2737  *      based on theoretical maximum wire speed and thresholds were set based
2738  *      on testing data as well as attempting to minimize response time
2739  *      while increasing bulk throughput.
2740  *      this functionality is controlled by the InterruptThrottleRate module
2741  *      parameter (see e1000_param.c)
2742  * @adapter: pointer to adapter
2743  * @itr_setting: current adapter->itr
2744  * @packets: the number of packets during this measurement interval
2745  * @bytes: the number of bytes during this measurement interval
2746  **/
2747 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2748                                    uint16_t itr_setting,
2749                                    int packets,
2750                                    int bytes)
2751 {
2752         unsigned int retval = itr_setting;
2753         struct e1000_hw *hw = &adapter->hw;
2754
2755         if (unlikely(hw->mac_type < e1000_82540))
2756                 goto update_itr_done;
2757
2758         if (packets == 0)
2759                 goto update_itr_done;
2760
2761         switch (itr_setting) {
2762         case lowest_latency:
2763                 /* jumbo frames get bulk treatment*/
2764                 if (bytes/packets > 8000)
2765                         retval = bulk_latency;
2766                 else if ((packets < 5) && (bytes > 512))
2767                         retval = low_latency;
2768                 break;
2769         case low_latency:  /* 50 usec aka 20000 ints/s */
2770                 if (bytes > 10000) {
2771                         /* jumbo frames need bulk latency setting */
2772                         if (bytes/packets > 8000)
2773                                 retval = bulk_latency;
2774                         else if ((packets < 10) || ((bytes/packets) > 1200))
2775                                 retval = bulk_latency;
2776                         else if ((packets > 35))
2777                                 retval = lowest_latency;
2778                 } else if (bytes/packets > 2000)
2779                         retval = bulk_latency;
2780                 else if (packets <= 2 && bytes < 512)
2781                         retval = lowest_latency;
2782                 break;
2783         case bulk_latency: /* 250 usec aka 4000 ints/s */
2784                 if (bytes > 25000) {
2785                         if (packets > 35)
2786                                 retval = low_latency;
2787                 } else if (bytes < 6000) {
2788                         retval = low_latency;
2789                 }
2790                 break;
2791         }
2792
2793 update_itr_done:
2794         return retval;
2795 }
2796
2797 static void e1000_set_itr(struct e1000_adapter *adapter)
2798 {
2799         struct e1000_hw *hw = &adapter->hw;
2800         uint16_t current_itr;
2801         uint32_t new_itr = adapter->itr;
2802
2803         if (unlikely(hw->mac_type < e1000_82540))
2804                 return;
2805
2806         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2807         if (unlikely(adapter->link_speed != SPEED_1000)) {
2808                 current_itr = 0;
2809                 new_itr = 4000;
2810                 goto set_itr_now;
2811         }
2812
2813         adapter->tx_itr = e1000_update_itr(adapter,
2814                                     adapter->tx_itr,
2815                                     adapter->total_tx_packets,
2816                                     adapter->total_tx_bytes);
2817         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2818         if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2819                 adapter->tx_itr = low_latency;
2820
2821         adapter->rx_itr = e1000_update_itr(adapter,
2822                                     adapter->rx_itr,
2823                                     adapter->total_rx_packets,
2824                                     adapter->total_rx_bytes);
2825         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2826         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2827                 adapter->rx_itr = low_latency;
2828
2829         current_itr = max(adapter->rx_itr, adapter->tx_itr);
2830
2831         switch (current_itr) {
2832         /* counts and packets in update_itr are dependent on these numbers */
2833         case lowest_latency:
2834                 new_itr = 70000;
2835                 break;
2836         case low_latency:
2837                 new_itr = 20000; /* aka hwitr = ~200 */
2838                 break;
2839         case bulk_latency:
2840                 new_itr = 4000;
2841                 break;
2842         default:
2843                 break;
2844         }
2845
2846 set_itr_now:
2847         if (new_itr != adapter->itr) {
2848                 /* this attempts to bias the interrupt rate towards Bulk
2849                  * by adding intermediate steps when interrupt rate is
2850                  * increasing */
2851                 new_itr = new_itr > adapter->itr ?
2852                              min(adapter->itr + (new_itr >> 2), new_itr) :
2853                              new_itr;
2854                 adapter->itr = new_itr;
2855                 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2856         }
2857
2858         return;
2859 }
2860
2861 #define E1000_TX_FLAGS_CSUM             0x00000001
2862 #define E1000_TX_FLAGS_VLAN             0x00000002
2863 #define E1000_TX_FLAGS_TSO              0x00000004
2864 #define E1000_TX_FLAGS_IPV4             0x00000008
2865 #define E1000_TX_FLAGS_VLAN_MASK        0xffff0000
2866 #define E1000_TX_FLAGS_VLAN_SHIFT       16
2867
2868 static int
2869 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2870           struct sk_buff *skb)
2871 {
2872         struct e1000_context_desc *context_desc;
2873         struct e1000_buffer *buffer_info;
2874         unsigned int i;
2875         uint32_t cmd_length = 0;
2876         uint16_t ipcse = 0, tucse, mss;
2877         uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2878         int err;
2879
2880         if (skb_is_gso(skb)) {
2881                 if (skb_header_cloned(skb)) {
2882                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2883                         if (err)
2884                                 return err;
2885                 }
2886
2887                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2888                 mss = skb_shinfo(skb)->gso_size;
2889                 if (skb->protocol == htons(ETH_P_IP)) {
2890                         struct iphdr *iph = ip_hdr(skb);
2891                         iph->tot_len = 0;
2892                         iph->check = 0;
2893                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2894                                                                  iph->daddr, 0,
2895                                                                  IPPROTO_TCP,
2896                                                                  0);
2897                         cmd_length = E1000_TXD_CMD_IP;
2898                         ipcse = skb_transport_offset(skb) - 1;
2899                 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2900                         ipv6_hdr(skb)->payload_len = 0;
2901                         tcp_hdr(skb)->check =
2902                                 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2903                                                  &ipv6_hdr(skb)->daddr,
2904                                                  0, IPPROTO_TCP, 0);
2905                         ipcse = 0;
2906                 }
2907                 ipcss = skb_network_offset(skb);
2908                 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
2909                 tucss = skb_transport_offset(skb);
2910                 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
2911                 tucse = 0;
2912
2913                 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2914                                E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2915
2916                 i = tx_ring->next_to_use;
2917                 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2918                 buffer_info = &tx_ring->buffer_info[i];
2919
2920                 context_desc->lower_setup.ip_fields.ipcss  = ipcss;
2921                 context_desc->lower_setup.ip_fields.ipcso  = ipcso;
2922                 context_desc->lower_setup.ip_fields.ipcse  = cpu_to_le16(ipcse);
2923                 context_desc->upper_setup.tcp_fields.tucss = tucss;
2924                 context_desc->upper_setup.tcp_fields.tucso = tucso;
2925                 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2926                 context_desc->tcp_seg_setup.fields.mss     = cpu_to_le16(mss);
2927                 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2928                 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2929
2930                 buffer_info->time_stamp = jiffies;
2931                 buffer_info->next_to_watch = i;
2932
2933                 if (++i == tx_ring->count) i = 0;
2934                 tx_ring->next_to_use = i;
2935
2936                 return TRUE;
2937         }
2938         return FALSE;
2939 }
2940
2941 static boolean_t
2942 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2943               struct sk_buff *skb)
2944 {
2945         struct e1000_context_desc *context_desc;
2946         struct e1000_buffer *buffer_info;
2947         unsigned int i;
2948         uint8_t css;
2949
2950         if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2951                 css = skb_transport_offset(skb);
2952
2953                 i = tx_ring->next_to_use;
2954                 buffer_info = &tx_ring->buffer_info[i];
2955                 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2956
2957                 context_desc->lower_setup.ip_config = 0;
2958                 context_desc->upper_setup.tcp_fields.tucss = css;
2959                 context_desc->upper_setup.tcp_fields.tucso =
2960                         css + skb->csum_offset;
2961                 context_desc->upper_setup.tcp_fields.tucse = 0;
2962                 context_desc->tcp_seg_setup.data = 0;
2963                 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2964
2965                 buffer_info->time_stamp = jiffies;
2966                 buffer_info->next_to_watch = i;
2967
2968                 if (unlikely(++i == tx_ring->count)) i = 0;
2969                 tx_ring->next_to_use = i;
2970
2971                 return TRUE;
2972         }
2973
2974         return FALSE;
2975 }
2976
2977 #define E1000_MAX_TXD_PWR       12
2978 #define E1000_MAX_DATA_PER_TXD  (1<<E1000_MAX_TXD_PWR)
2979
2980 static int
2981 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2982              struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2983              unsigned int nr_frags, unsigned int mss)
2984 {
2985         struct e1000_buffer *buffer_info;
2986         unsigned int len = skb->len;
2987         unsigned int offset = 0, size, count = 0, i;
2988         unsigned int f;
2989         len -= skb->data_len;
2990
2991         i = tx_ring->next_to_use;
2992
2993         while (len) {
2994                 buffer_info = &tx_ring->buffer_info[i];
2995                 size = min(len, max_per_txd);
2996                 /* Workaround for Controller erratum --
2997                  * descriptor for non-tso packet in a linear SKB that follows a
2998                  * tso gets written back prematurely before the data is fully
2999                  * DMA'd to the controller */
3000                 if (!skb->data_len && tx_ring->last_tx_tso &&
3001                     !skb_is_gso(skb)) {
3002                         tx_ring->last_tx_tso = 0;
3003                         size -= 4;
3004                 }
3005
3006                 /* Workaround for premature desc write-backs
3007                  * in TSO mode.  Append 4-byte sentinel desc */
3008                 if (unlikely(mss && !nr_frags && size == len && size > 8))
3009                         size -= 4;
3010                 /* work-around for errata 10 and it applies
3011                  * to all controllers in PCI-X mode
3012                  * The fix is to make sure that the first descriptor of a
3013                  * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3014                  */
3015                 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3016                                 (size > 2015) && count == 0))
3017                         size = 2015;
3018
3019                 /* Workaround for potential 82544 hang in PCI-X.  Avoid
3020                  * terminating buffers within evenly-aligned dwords. */
3021                 if (unlikely(adapter->pcix_82544 &&
3022                    !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3023                    size > 4))
3024                         size -= 4;
3025
3026                 buffer_info->length = size;
3027                 buffer_info->dma =
3028                         pci_map_single(adapter->pdev,
3029                                 skb->data + offset,
3030                                 size,
3031                                 PCI_DMA_TODEVICE);
3032                 buffer_info->time_stamp = jiffies;
3033                 buffer_info->next_to_watch = i;
3034
3035                 len -= size;
3036                 offset += size;
3037                 count++;
3038                 if (unlikely(++i == tx_ring->count)) i = 0;
3039         }
3040
3041         for (f = 0; f < nr_frags; f++) {
3042                 struct skb_frag_struct *frag;
3043
3044                 frag = &skb_shinfo(skb)->frags[f];
3045                 len = frag->size;
3046                 offset = frag->page_offset;
3047
3048                 while (len) {
3049                         buffer_info = &tx_ring->buffer_info[i];
3050                         size = min(len, max_per_txd);
3051                         /* Workaround for premature desc write-backs
3052                          * in TSO mode.  Append 4-byte sentinel desc */
3053                         if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
3054                                 size -= 4;
3055                         /* Workaround for potential 82544 hang in PCI-X.
3056                          * Avoid terminating buffers within evenly-aligned
3057                          * dwords. */
3058                         if (unlikely(adapter->pcix_82544 &&
3059                            !((unsigned long)(frag->page+offset+size-1) & 4) &&
3060                            size > 4))
3061                                 size -= 4;
3062
3063                         buffer_info->length = size;
3064                         buffer_info->dma =
3065                                 pci_map_page(adapter->pdev,
3066                                         frag->page,
3067                                         offset,
3068                                         size,
3069                                         PCI_DMA_TODEVICE);
3070                         buffer_info->time_stamp = jiffies;
3071                         buffer_info->next_to_watch = i;
3072
3073                         len -= size;
3074                         offset += size;
3075                         count++;
3076                         if (unlikely(++i == tx_ring->count)) i = 0;
3077                 }
3078         }
3079
3080         i = (i == 0) ? tx_ring->count - 1 : i - 1;
3081         tx_ring->buffer_info[i].skb = skb;
3082         tx_ring->buffer_info[first].next_to_watch = i;
3083
3084         return count;
3085 }
3086
3087 static void
3088 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3089                int tx_flags, int count)
3090 {
3091         struct e1000_tx_desc *tx_desc = NULL;
3092         struct e1000_buffer *buffer_info;
3093         uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3094         unsigned int i;
3095
3096         if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3097                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3098                              E1000_TXD_CMD_TSE;
3099                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3100
3101                 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3102                         txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3103         }
3104
3105         if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3106                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3107                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3108         }
3109
3110         if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3111                 txd_lower |= E1000_TXD_CMD_VLE;
3112                 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3113         }
3114
3115         i = tx_ring->next_to_use;
3116
3117         while (count--) {
3118                 buffer_info = &tx_ring->buffer_info[i];
3119                 tx_desc = E1000_TX_DESC(*tx_ring, i);
3120                 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3121                 tx_desc->lower.data =
3122                         cpu_to_le32(txd_lower | buffer_info->length);
3123                 tx_desc->upper.data = cpu_to_le32(txd_upper);
3124                 if (unlikely(++i == tx_ring->count)) i = 0;
3125         }
3126
3127         tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3128
3129         /* Force memory writes to complete before letting h/w
3130          * know there are new descriptors to fetch.  (Only
3131          * applicable for weak-ordered memory model archs,
3132          * such as IA-64). */
3133         wmb();
3134
3135         tx_ring->next_to_use = i;
3136         writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3137         /* we need this if more than one processor can write to our tail
3138          * at a time, it syncronizes IO on IA64/Altix systems */
3139         mmiowb();
3140 }
3141
3142 /**
3143  * 82547 workaround to avoid controller hang in half-duplex environment.
3144  * The workaround is to avoid queuing a large packet that would span
3145  * the internal Tx FIFO ring boundary by notifying the stack to resend
3146  * the packet at a later time.  This gives the Tx FIFO an opportunity to
3147  * flush all packets.  When that occurs, we reset the Tx FIFO pointers
3148  * to the beginning of the Tx FIFO.
3149  **/
3150
3151 #define E1000_FIFO_HDR                  0x10
3152 #define E1000_82547_PAD_LEN             0x3E0
3153
3154 static int
3155 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3156 {
3157         uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3158         uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3159
3160         skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
3161
3162         if (adapter->link_duplex != HALF_DUPLEX)
3163                 goto no_fifo_stall_required;
3164
3165         if (atomic_read(&adapter->tx_fifo_stall))
3166                 return 1;
3167
3168         if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3169                 atomic_set(&adapter->tx_fifo_stall, 1);
3170                 return 1;
3171         }
3172
3173 no_fifo_stall_required:
3174         adapter->tx_fifo_head += skb_fifo_len;
3175         if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3176                 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3177         return 0;
3178 }
3179
3180 #define MINIMUM_DHCP_PACKET_SIZE 282
3181 static int
3182 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3183 {
3184         struct e1000_hw *hw =  &adapter->hw;
3185         uint16_t length, offset;
3186         if (vlan_tx_tag_present(skb)) {
3187                 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3188                         ( adapter->hw.mng_cookie.status &
3189                           E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3190                         return 0;
3191         }
3192         if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3193                 struct ethhdr *eth = (struct ethhdr *) skb->data;
3194                 if ((htons(ETH_P_IP) == eth->h_proto)) {
3195                         const struct iphdr *ip =
3196                                 (struct iphdr *)((uint8_t *)skb->data+14);
3197                         if (IPPROTO_UDP == ip->protocol) {
3198                                 struct udphdr *udp =
3199                                         (struct udphdr *)((uint8_t *)ip +
3200                                                 (ip->ihl << 2));
3201                                 if (ntohs(udp->dest) == 67) {
3202                                         offset = (uint8_t *)udp + 8 - skb->data;
3203                                         length = skb->len - offset;
3204
3205                                         return e1000_mng_write_dhcp_info(hw,
3206                                                         (uint8_t *)udp + 8,
3207                                                         length);
3208                                 }
3209                         }
3210                 }
3211         }
3212         return 0;
3213 }
3214
3215 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3216 {
3217         struct e1000_adapter *adapter = netdev_priv(netdev);
3218         struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3219
3220         netif_stop_queue(netdev);
3221         /* Herbert's original patch had:
3222          *  smp_mb__after_netif_stop_queue();
3223          * but since that doesn't exist yet, just open code it. */
3224         smp_mb();
3225
3226         /* We need to check again in a case another CPU has just
3227          * made room available. */
3228         if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3229                 return -EBUSY;
3230
3231         /* A reprieve! */
3232         netif_start_queue(netdev);
3233         ++adapter->restart_queue;
3234         return 0;
3235 }
3236
3237 static int e1000_maybe_stop_tx(struct net_device *netdev,
3238                                struct e1000_tx_ring *tx_ring, int size)
3239 {
3240         if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3241                 return 0;
3242         return __e1000_maybe_stop_tx(netdev, size);
3243 }
3244
3245 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3246 static int
3247 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3248 {
3249         struct e1000_adapter *adapter = netdev_priv(netdev);
3250         struct e1000_tx_ring *tx_ring;
3251         unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3252         unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3253         unsigned int tx_flags = 0;
3254         unsigned int len = skb->len;
3255         unsigned long flags;
3256         unsigned int nr_frags = 0;
3257         unsigned int mss = 0;
3258         int count = 0;
3259         int tso;
3260         unsigned int f;
3261         len -= skb->data_len;
3262
3263         /* This goes back to the question of how to logically map a tx queue
3264          * to a flow.  Right now, performance is impacted slightly negatively
3265          * if using multiple tx queues.  If the stack breaks away from a
3266          * single qdisc implementation, we can look at this again. */
3267         tx_ring = adapter->tx_ring;
3268
3269         if (unlikely(skb->len <= 0)) {
3270                 dev_kfree_skb_any(skb);
3271                 return NETDEV_TX_OK;
3272         }
3273
3274         /* 82571 and newer doesn't need the workaround that limited descriptor
3275          * length to 4kB */
3276         if (adapter->hw.mac_type >= e1000_82571)
3277                 max_per_txd = 8192;
3278
3279         mss = skb_shinfo(skb)->gso_size;
3280         /* The controller does a simple calculation to
3281          * make sure there is enough room in the FIFO before
3282          * initiating the DMA for each buffer.  The calc is:
3283          * 4 = ceil(buffer len/mss).  To make sure we don't
3284          * overrun the FIFO, adjust the max buffer len if mss
3285          * drops. */
3286         if (mss) {
3287                 uint8_t hdr_len;
3288                 max_per_txd = min(mss << 2, max_per_txd);
3289                 max_txd_pwr = fls(max_per_txd) - 1;
3290
3291                 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3292                 * points to just header, pull a few bytes of payload from
3293                 * frags into skb->data */
3294                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3295                 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3296                         switch (adapter->hw.mac_type) {
3297                                 unsigned int pull_size;
3298                         case e1000_82544:
3299                                 /* Make sure we have room to chop off 4 bytes,
3300                                  * and that the end alignment will work out to
3301                                  * this hardware's requirements
3302                                  * NOTE: this is a TSO only workaround
3303                                  * if end byte alignment not correct move us
3304                                  * into the next dword */
3305                                 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
3306                                         break;
3307                                 /* fall through */
3308                         case e1000_82571:
3309                         case e1000_82572:
3310                         case e1000_82573:
3311                         case e1000_ich8lan:
3312                                 pull_size = min((unsigned int)4, skb->data_len);
3313                                 if (!__pskb_pull_tail(skb, pull_size)) {
3314                                         DPRINTK(DRV, ERR,
3315                                                 "__pskb_pull_tail failed.\n");
3316                                         dev_kfree_skb_any(skb);
3317                                         return NETDEV_TX_OK;
3318                                 }
3319                                 len = skb->len - skb->data_len;
3320                                 break;
3321                         default:
3322                                 /* do nothing */
3323                                 break;
3324                         }
3325                 }
3326         }
3327
3328         /* reserve a descriptor for the offload context */
3329         if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3330                 count++;
3331         count++;
3332
3333         /* Controller Erratum workaround */
3334         if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3335                 count++;
3336
3337         count += TXD_USE_COUNT(len, max_txd_pwr);
3338
3339         if (adapter->pcix_82544)
3340                 count++;
3341
3342         /* work-around for errata 10 and it applies to all controllers
3343          * in PCI-X mode, so add one more descriptor to the count
3344          */
3345         if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3346                         (len > 2015)))
3347                 count++;
3348
3349         nr_frags = skb_shinfo(skb)->nr_frags;
3350         for (f = 0; f < nr_frags; f++)
3351                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3352                                        max_txd_pwr);
3353         if (adapter->pcix_82544)
3354                 count += nr_frags;
3355
3356
3357         if (adapter->hw.tx_pkt_filtering &&
3358             (adapter->hw.mac_type == e1000_82573))
3359                 e1000_transfer_dhcp_info(adapter, skb);
3360
3361         if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
3362                 /* Collision - tell upper layer to requeue */
3363                 return NETDEV_TX_LOCKED;
3364
3365         /* need: count + 2 desc gap to keep tail from touching
3366          * head, otherwise try next time */
3367         if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3368                 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3369                 return NETDEV_TX_BUSY;
3370         }
3371
3372         if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3373                 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3374                         netif_stop_queue(netdev);
3375                         mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3376                         spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3377                         return NETDEV_TX_BUSY;
3378                 }
3379         }
3380
3381         if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3382                 tx_flags |= E1000_TX_FLAGS_VLAN;
3383                 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3384         }
3385
3386         first = tx_ring->next_to_use;
3387
3388         tso = e1000_tso(adapter, tx_ring, skb);
3389         if (tso < 0) {
3390                 dev_kfree_skb_any(skb);
3391                 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3392                 return NETDEV_TX_OK;
3393         }
3394
3395         if (likely(tso)) {
3396                 tx_ring->last_tx_tso = 1;
3397                 tx_flags |= E1000_TX_FLAGS_TSO;
3398         } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3399                 tx_flags |= E1000_TX_FLAGS_CSUM;
3400
3401         /* Old method was to assume IPv4 packet by default if TSO was enabled.
3402          * 82571 hardware supports TSO capabilities for IPv6 as well...
3403          * no longer assume, we must. */
3404         if (likely(skb->protocol == htons(ETH_P_IP)))
3405                 tx_flags |= E1000_TX_FLAGS_IPV4;
3406
3407         e1000_tx_queue(adapter, tx_ring, tx_flags,
3408                        e1000_tx_map(adapter, tx_ring, skb, first,
3409                                     max_per_txd, nr_frags, mss));
3410
3411         netdev->trans_start = jiffies;
3412
3413         /* Make sure there is space in the ring for the next send. */
3414         e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3415
3416         spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3417         return NETDEV_TX_OK;
3418 }
3419
3420 /**
3421  * e1000_tx_timeout - Respond to a Tx Hang
3422  * @netdev: network interface device structure
3423  **/
3424
3425 static void
3426 e1000_tx_timeout(struct net_device *netdev)
3427 {
3428         struct e1000_adapter *adapter = netdev_priv(netdev);
3429
3430         /* Do the reset outside of interrupt context */
3431         adapter->tx_timeout_count++;
3432         schedule_work(&adapter->reset_task);
3433 }
3434
3435 static void
3436 e1000_reset_task(struct work_struct *work)
3437 {
3438         struct e1000_adapter *adapter =
3439                 container_of(work, struct e1000_adapter, reset_task);
3440
3441         e1000_reinit_locked(adapter);
3442 }
3443
3444 /**
3445  * e1000_get_stats - Get System Network Statistics
3446  * @netdev: network interface device structure
3447  *
3448  * Returns the address of the device statistics structure.
3449  * The statistics are actually updated from the timer callback.
3450  **/
3451
3452 static struct net_device_stats *
3453 e1000_get_stats(struct net_device *netdev)
3454 {
3455         struct e1000_adapter *adapter = netdev_priv(netdev);
3456
3457         /* only return the current stats */
3458         return &adapter->net_stats;
3459 }
3460
3461 /**
3462  * e1000_change_mtu - Change the Maximum Transfer Unit
3463  * @netdev: network interface device structure
3464  * @new_mtu: new value for maximum frame size
3465  *
3466  * Returns 0 on success, negative on failure
3467  **/
3468
3469 static int
3470 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3471 {
3472         struct e1000_adapter *adapter = netdev_priv(netdev);
3473         int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3474         uint16_t eeprom_data = 0;
3475
3476         if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3477             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3478                 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3479                 return -EINVAL;
3480         }
3481
3482         /* Adapter-specific max frame size limits. */
3483         switch (adapter->hw.mac_type) {
3484         case e1000_undefined ... e1000_82542_rev2_1:
3485         case e1000_ich8lan:
3486                 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3487                         DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3488                         return -EINVAL;
3489                 }
3490                 break;
3491         case e1000_82573:
3492                 /* Jumbo Frames not supported if:
3493                  * - this is not an 82573L device
3494                  * - ASPM is enabled in any way (0x1A bits 3:2) */
3495                 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3496                                   &eeprom_data);
3497                 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3498                     (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3499                         if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3500                                 DPRINTK(PROBE, ERR,
3501                                         "Jumbo Frames not supported.\n");
3502                                 return -EINVAL;
3503                         }
3504                         break;
3505                 }
3506                 /* ERT will be enabled later to enable wire speed receives */
3507
3508                 /* fall through to get support */
3509         case e1000_82571:
3510         case e1000_82572:
3511         case e1000_80003es2lan:
3512 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3513                 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3514                         DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3515                         return -EINVAL;
3516                 }
3517                 break;
3518         default:
3519                 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3520                 break;
3521         }
3522
3523         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3524          * means we reserve 2 more, this pushes us to allocate from the next
3525          * larger slab size
3526          * i.e. RXBUFFER_2048 --> size-4096 slab */
3527
3528         if (max_frame <= E1000_RXBUFFER_256)
3529                 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3530         else if (max_frame <= E1000_RXBUFFER_512)
3531                 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3532         else if (max_frame <= E1000_RXBUFFER_1024)
3533                 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3534         else if (max_frame <= E1000_RXBUFFER_2048)
3535                 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3536         else if (max_frame <= E1000_RXBUFFER_4096)
3537                 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3538         else if (max_frame <= E1000_RXBUFFER_8192)
3539                 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3540         else if (max_frame <= E1000_RXBUFFER_16384)
3541                 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3542
3543         /* adjust allocation if LPE protects us, and we aren't using SBP */
3544         if (!adapter->hw.tbi_compatibility_on &&
3545             ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3546              (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3547                 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3548
3549         netdev->mtu = new_mtu;
3550         adapter->hw.max_frame_size = max_frame;
3551
3552         if (netif_running(netdev))
3553                 e1000_reinit_locked(adapter);
3554
3555         return 0;
3556 }
3557
3558 /**
3559  * e1000_update_stats - Update the board statistics counters
3560  * @adapter: board private structure
3561  **/
3562
3563 void
3564 e1000_update_stats(struct e1000_adapter *adapter)
3565 {
3566         struct e1000_hw *hw = &adapter->hw;
3567         struct pci_dev *pdev = adapter->pdev;
3568         unsigned long flags;
3569         uint16_t phy_tmp;
3570
3571 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3572
3573         /*
3574          * Prevent stats update while adapter is being reset, or if the pci
3575          * connection is down.
3576          */
3577         if (adapter->link_speed == 0)
3578                 return;
3579         if (pci_channel_offline(pdev))
3580                 return;
3581
3582         spin_lock_irqsave(&adapter->stats_lock, flags);
3583
3584         /* these counters are modified from e1000_adjust_tbi_stats,
3585          * called from the interrupt context, so they must only
3586          * be written while holding adapter->stats_lock
3587          */
3588
3589         adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3590         adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3591         adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3592         adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3593         adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3594         adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3595         adapter->stats.roc += E1000_READ_REG(hw, ROC);
3596
3597         if (adapter->hw.mac_type != e1000_ich8lan) {
3598                 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3599                 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3600                 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3601                 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3602                 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3603                 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3604         }
3605
3606         adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3607         adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3608         adapter->stats.scc += E1000_READ_REG(hw, SCC);
3609         adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3610         adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3611         adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3612         adapter->stats.dc += E1000_READ_REG(hw, DC);
3613         adapter->stats.sec += E1000_READ_REG(hw, SEC);
3614         adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3615         adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3616         adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3617         adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3618         adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3619         adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3620         adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3621         adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3622         adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3623         adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3624         adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3625         adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3626         adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3627         adapter->stats.torl += E1000_READ_REG(hw, TORL);
3628         adapter->stats.torh += E1000_READ_REG(hw, TORH);
3629         adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3630         adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3631         adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3632
3633         if (adapter->hw.mac_type != e1000_ich8lan) {
3634                 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3635                 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3636                 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3637                 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3638                 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3639                 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3640         }
3641
3642         adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3643         adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3644
3645         /* used for adaptive IFS */
3646
3647         hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3648         adapter->stats.tpt += hw->tx_packet_delta;
3649         hw->collision_delta = E1000_READ_REG(hw, COLC);
3650         adapter->stats.colc += hw->collision_delta;
3651
3652         if (hw->mac_type >= e1000_82543) {
3653                 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3654                 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3655                 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3656                 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3657                 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3658                 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3659         }
3660         if (hw->mac_type > e1000_82547_rev_2) {
3661                 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3662                 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3663
3664                 if (adapter->hw.mac_type != e1000_ich8lan) {
3665                         adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3666                         adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3667                         adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3668                         adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3669                         adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3670                         adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3671                         adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3672                 }
3673         }
3674
3675         /* Fill out the OS statistics structure */
3676         adapter->net_stats.rx_packets = adapter->stats.gprc;
3677         adapter->net_stats.tx_packets = adapter->stats.gptc;
3678         adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3679         adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3680         adapter->net_stats.multicast = adapter->stats.mprc;
3681         adapter->net_stats.collisions = adapter->stats.colc;
3682
3683         /* Rx Errors */
3684
3685         /* RLEC on some newer hardware can be incorrect so build
3686         * our own version based on RUC and ROC */
3687         adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3688                 adapter->stats.crcerrs + adapter->stats.algnerrc +
3689                 adapter->stats.ruc + adapter->stats.roc +
3690                 adapter->stats.cexterr;
3691         adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3692         adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3693         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3694         adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3695         adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3696
3697         /* Tx Errors */
3698         adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3699         adapter->net_stats.tx_errors = adapter->stats.txerrc;
3700         adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3701         adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3702         adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3703         if (adapter->hw.bad_tx_carr_stats_fd &&
3704             adapter->link_duplex == FULL_DUPLEX) {
3705                 adapter->net_stats.tx_carrier_errors = 0;
3706                 adapter->stats.tncrs = 0;
3707         }
3708
3709         /* Tx Dropped needs to be maintained elsewhere */
3710
3711         /* Phy Stats */
3712         if (hw->media_type == e1000_media_type_copper) {
3713                 if ((adapter->link_speed == SPEED_1000) &&
3714                    (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3715                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3716                         adapter->phy_stats.idle_errors += phy_tmp;
3717                 }
3718
3719                 if ((hw->mac_type <= e1000_82546) &&
3720                    (hw->phy_type == e1000_phy_m88) &&
3721                    !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3722                         adapter->phy_stats.receive_errors += phy_tmp;
3723         }
3724
3725         /* Management Stats */
3726         if (adapter->hw.has_smbus) {
3727                 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3728                 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3729                 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3730         }
3731
3732         spin_unlock_irqrestore(&adapter->stats_lock, flags);
3733 }
3734
3735 /**
3736  * e1000_intr_msi - Interrupt Handler
3737  * @irq: interrupt number
3738  * @data: pointer to a network interface device structure
3739  **/
3740
3741 static irqreturn_t
3742 e1000_intr_msi(int irq, void *data)
3743 {
3744         struct net_device *netdev = data;
3745         struct e1000_adapter *adapter = netdev_priv(netdev);
3746         struct e1000_hw *hw = &adapter->hw;
3747 #ifndef CONFIG_E1000_NAPI
3748         int i;
3749 #endif
3750         uint32_t icr = E1000_READ_REG(hw, ICR);
3751
3752 #ifdef CONFIG_E1000_NAPI
3753         /* read ICR disables interrupts using IAM, so keep up with our
3754          * enable/disable accounting */
3755         atomic_inc(&adapter->irq_sem);
3756 #endif
3757         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3758                 hw->get_link_status = 1;
3759                 /* 80003ES2LAN workaround-- For packet buffer work-around on
3760                  * link down event; disable receives here in the ISR and reset
3761                  * adapter in watchdog */
3762                 if (netif_carrier_ok(netdev) &&
3763                     (adapter->hw.mac_type == e1000_80003es2lan)) {
3764                         /* disable receives */
3765                         uint32_t rctl = E1000_READ_REG(hw, RCTL);
3766                         E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3767                 }
3768                 /* guard against interrupt when we're going down */
3769                 if (!test_bit(__E1000_DOWN, &adapter->flags))
3770                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3771         }
3772
3773 #ifdef CONFIG_E1000_NAPI
3774         if (likely(netif_rx_schedule_prep(netdev))) {
3775                 adapter->total_tx_bytes = 0;
3776                 adapter->total_tx_packets = 0;
3777                 adapter->total_rx_bytes = 0;
3778                 adapter->total_rx_packets = 0;
3779                 __netif_rx_schedule(netdev);
3780         } else
3781                 e1000_irq_enable(adapter);
3782 #else
3783         adapter->total_tx_bytes = 0;
3784         adapter->total_rx_bytes = 0;
3785         adapter->total_tx_packets = 0;
3786         adapter->total_rx_packets = 0;
3787
3788         for (i = 0; i < E1000_MAX_INTR; i++)
3789                 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3790                    !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3791                         break;
3792
3793         if (likely(adapter->itr_setting & 3))
3794                 e1000_set_itr(adapter);
3795 #endif
3796
3797         return IRQ_HANDLED;
3798 }
3799
3800 /**
3801  * e1000_intr - Interrupt Handler
3802  * @irq: interrupt number
3803  * @data: pointer to a network interface device structure
3804  **/
3805
3806 static irqreturn_t
3807 e1000_intr(int irq, void *data)
3808 {
3809         struct net_device *netdev = data;
3810         struct e1000_adapter *adapter = netdev_priv(netdev);
3811         struct e1000_hw *hw = &adapter->hw;
3812         uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3813 #ifndef CONFIG_E1000_NAPI
3814         int i;
3815 #endif
3816         if (unlikely(!icr))
3817                 return IRQ_NONE;  /* Not our interrupt */
3818
3819 #ifdef CONFIG_E1000_NAPI
3820         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3821          * not set, then the adapter didn't send an interrupt */
3822         if (unlikely(hw->mac_type >= e1000_82571 &&
3823                      !(icr & E1000_ICR_INT_ASSERTED)))
3824                 return IRQ_NONE;
3825
3826         /* Interrupt Auto-Mask...upon reading ICR,
3827          * interrupts are masked.  No need for the
3828          * IMC write, but it does mean we should
3829          * account for it ASAP. */
3830         if (likely(hw->mac_type >= e1000_82571))
3831                 atomic_inc(&adapter->irq_sem);
3832 #endif
3833
3834         if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3835                 hw->get_link_status = 1;
3836                 /* 80003ES2LAN workaround--
3837                  * For packet buffer work-around on link down event;
3838                  * disable receives here in the ISR and
3839                  * reset adapter in watchdog
3840                  */
3841                 if (netif_carrier_ok(netdev) &&
3842                     (adapter->hw.mac_type == e1000_80003es2lan)) {
3843                         /* disable receives */
3844                         rctl = E1000_READ_REG(hw, RCTL);
3845                         E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3846                 }
3847                 /* guard against interrupt when we're going down */
3848                 if (!test_bit(__E1000_DOWN, &adapter->flags))
3849                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3850         }
3851
3852 #ifdef CONFIG_E1000_NAPI
3853         if (unlikely(hw->mac_type < e1000_82571)) {
3854                 /* disable interrupts, without the synchronize_irq bit */
3855                 atomic_inc(&adapter->irq_sem);
3856                 E1000_WRITE_REG(hw, IMC, ~0);
3857                 E1000_WRITE_FLUSH(hw);
3858         }
3859         if (likely(netif_rx_schedule_prep(netdev))) {
3860                 adapter->total_tx_bytes = 0;
3861                 adapter->total_tx_packets = 0;
3862                 adapter->total_rx_bytes = 0;
3863                 adapter->total_rx_packets = 0;
3864                 __netif_rx_schedule(netdev);
3865         } else
3866                 /* this really should not happen! if it does it is basically a
3867                  * bug, but not a hard error, so enable ints and continue */
3868                 e1000_irq_enable(adapter);
3869 #else
3870         /* Writing IMC and IMS is needed for 82547.
3871          * Due to Hub Link bus being occupied, an interrupt
3872          * de-assertion message is not able to be sent.
3873          * When an interrupt assertion message is generated later,
3874          * two messages are re-ordered and sent out.
3875          * That causes APIC to think 82547 is in de-assertion
3876          * state, while 82547 is in assertion state, resulting
3877          * in dead lock. Writing IMC forces 82547 into
3878          * de-assertion state.
3879          */
3880         if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3881                 atomic_inc(&adapter->irq_sem);
3882                 E1000_WRITE_REG(hw, IMC, ~0);
3883         }
3884
3885         adapter->total_tx_bytes = 0;
3886         adapter->total_rx_bytes = 0;
3887         adapter->total_tx_packets = 0;
3888         adapter->total_rx_packets = 0;
3889
3890         for (i = 0; i < E1000_MAX_INTR; i++)
3891                 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3892                    !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3893                         break;
3894
3895         if (likely(adapter->itr_setting & 3))
3896                 e1000_set_itr(adapter);
3897
3898         if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3899                 e1000_irq_enable(adapter);
3900
3901 #endif
3902         return IRQ_HANDLED;
3903 }
3904
3905 #ifdef CONFIG_E1000_NAPI
3906 /**
3907  * e1000_clean - NAPI Rx polling callback
3908  * @adapter: board private structure
3909  **/
3910
3911 static int
3912 e1000_clean(struct net_device *poll_dev, int *budget)
3913 {
3914         struct e1000_adapter *adapter;
3915         int work_to_do = min(*budget, poll_dev->quota);
3916         int tx_cleaned = 0, work_done = 0;
3917
3918         /* Must NOT use netdev_priv macro here. */
3919         adapter = poll_dev->priv;
3920
3921         /* Keep link state information with original netdev */
3922         if (!netif_carrier_ok(poll_dev))
3923                 goto quit_polling;
3924
3925         /* e1000_clean is called per-cpu.  This lock protects
3926          * tx_ring[0] from being cleaned by multiple cpus
3927          * simultaneously.  A failure obtaining the lock means
3928          * tx_ring[0] is currently being cleaned anyway. */
3929         if (spin_trylock(&adapter->tx_queue_lock)) {
3930                 tx_cleaned = e1000_clean_tx_irq(adapter,
3931                                                 &adapter->tx_ring[0]);
3932                 spin_unlock(&adapter->tx_queue_lock);
3933         }
3934
3935         adapter->clean_rx(adapter, &adapter->rx_ring[0],
3936                           &work_done, work_to_do);
3937
3938         *budget -= work_done;
3939         poll_dev->quota -= work_done;
3940
3941         /* If no Tx and not enough Rx work done, exit the polling mode */
3942         if ((!tx_cleaned && (work_done == 0)) ||
3943            !netif_running(poll_dev)) {
3944 quit_polling:
3945                 if (likely(adapter->itr_setting & 3))
3946                         e1000_set_itr(adapter);
3947                 netif_rx_complete(poll_dev);
3948                 e1000_irq_enable(adapter);
3949                 return 0;
3950         }
3951
3952         return 1;
3953 }
3954
3955 #endif
3956 /**
3957  * e1000_clean_tx_irq - Reclaim resources after transmit completes
3958  * @adapter: board private structure
3959  **/
3960
3961 static boolean_t
3962 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3963                    struct e1000_tx_ring *tx_ring)
3964 {
3965         struct net_device *netdev = adapter->netdev;
3966         struct e1000_tx_desc *tx_desc, *eop_desc;
3967         struct e1000_buffer *buffer_info;
3968         unsigned int i, eop;
3969 #ifdef CONFIG_E1000_NAPI
3970         unsigned int count = 0;
3971 #endif
3972         boolean_t cleaned = FALSE;
3973         unsigned int total_tx_bytes=0, total_tx_packets=0;
3974
3975         i = tx_ring->next_to_clean;
3976         eop = tx_ring->buffer_info[i].next_to_watch;
3977         eop_desc = E1000_TX_DESC(*tx_ring, eop);
3978
3979         while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3980                 for (cleaned = FALSE; !cleaned; ) {
3981                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3982                         buffer_info = &tx_ring->buffer_info[i];
3983                         cleaned = (i == eop);
3984
3985                         if (cleaned) {
3986                                 struct sk_buff *skb = buffer_info->skb;
3987                                 unsigned int segs, bytecount;
3988                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
3989                                 /* multiply data chunks by size of headers */
3990                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
3991                                             skb->len;
3992                                 total_tx_packets += segs;
3993                                 total_tx_bytes += bytecount;
3994                         }
3995                         e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3996                         tx_desc->upper.data = 0;
3997
3998                         if (unlikely(++i == tx_ring->count)) i = 0;
3999                 }
4000
4001                 eop = tx_ring->buffer_info[i].next_to_watch;
4002                 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4003 #ifdef CONFIG_E1000_NAPI
4004 #define E1000_TX_WEIGHT 64
4005                 /* weight of a sort for tx, to avoid endless transmit cleanup */
4006                 if (count++ == E1000_TX_WEIGHT) break;
4007 #endif
4008         }
4009
4010         tx_ring->next_to_clean = i;
4011
4012 #define TX_WAKE_THRESHOLD 32
4013         if (unlikely(cleaned && netif_carrier_ok(netdev) &&
4014                      E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
4015                 /* Make sure that anybody stopping the queue after this
4016                  * sees the new next_to_clean.
4017                  */
4018                 smp_mb();
4019                 if (netif_queue_stopped(netdev)) {
4020                         netif_wake_queue(netdev);
4021                         ++adapter->restart_queue;
4022                 }
4023         }
4024
4025         if (adapter->detect_tx_hung) {
4026                 /* Detect a transmit hang in hardware, this serializes the
4027                  * check with the clearing of time_stamp and movement of i */
4028                 adapter->detect_tx_hung = FALSE;
4029                 if (tx_ring->buffer_info[eop].dma &&
4030                     time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
4031                                (adapter->tx_timeout_factor * HZ))
4032                     && !(E1000_READ_REG(&adapter->hw, STATUS) &
4033                          E1000_STATUS_TXOFF)) {
4034
4035                         /* detected Tx unit hang */
4036                         DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
4037                                         "  Tx Queue             <%lu>\n"
4038                                         "  TDH                  <%x>\n"
4039                                         "  TDT                  <%x>\n"
4040                                         "  next_to_use          <%x>\n"
4041                                         "  next_to_clean        <%x>\n"
4042                                         "buffer_info[next_to_clean]\n"
4043                                         "  time_stamp           <%lx>\n"
4044                                         "  next_to_watch        <%x>\n"
4045                                         "  jiffies              <%lx>\n"
4046                                         "  next_to_watch.status <%x>\n",
4047                                 (unsigned long)((tx_ring - adapter->tx_ring) /
4048                                         sizeof(struct e1000_tx_ring)),
4049                                 readl(adapter->hw.hw_addr + tx_ring->tdh),
4050                                 readl(adapter->hw.hw_addr + tx_ring->tdt),
4051                                 tx_ring->next_to_use,
4052                                 tx_ring->next_to_clean,
4053                                 tx_ring->buffer_info[eop].time_stamp,
4054                                 eop,
4055                                 jiffies,
4056                                 eop_desc->upper.fields.status);
4057                         netif_stop_queue(netdev);
4058                 }
4059         }
4060         adapter->total_tx_bytes += total_tx_bytes;
4061         adapter->total_tx_packets += total_tx_packets;
4062         return cleaned;
4063 }
4064
4065 /**
4066  * e1000_rx_checksum - Receive Checksum Offload for 82543
4067  * @adapter:     board private structure
4068  * @status_err:  receive descriptor status and error fields
4069  * @csum:        receive descriptor csum field
4070  * @sk_buff:     socket buffer with received data
4071  **/
4072
4073 static void
4074 e1000_rx_checksum(struct e1000_adapter *adapter,
4075                   uint32_t status_err, uint32_t csum,
4076                   struct sk_buff *skb)
4077 {
4078         uint16_t status = (uint16_t)status_err;
4079         uint8_t errors = (uint8_t)(status_err >> 24);
4080         skb->ip_summed = CHECKSUM_NONE;
4081
4082         /* 82543 or newer only */
4083         if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
4084         /* Ignore Checksum bit is set */
4085         if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
4086         /* TCP/UDP checksum error bit is set */
4087         if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
4088                 /* let the stack verify checksum errors */
4089                 adapter->hw_csum_err++;
4090                 return;
4091         }
4092         /* TCP/UDP Checksum has not been calculated */
4093         if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4094                 if (!(status & E1000_RXD_STAT_TCPCS))
4095                         return;
4096         } else {
4097                 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
4098                         return;
4099         }
4100         /* It must be a TCP or UDP packet with a valid checksum */
4101         if (likely(status & E1000_RXD_STAT_TCPCS)) {
4102                 /* TCP checksum is good */
4103                 skb->ip_summed = CHECKSUM_UNNECESSARY;
4104         } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4105                 /* IP fragment with UDP payload */
4106                 /* Hardware complements the payload checksum, so we undo it
4107                  * and then put the value in host order for further stack use.
4108                  */
4109                 csum = ntohl(csum ^ 0xFFFF);
4110                 skb->csum = csum;
4111                 skb->ip_summed = CHECKSUM_COMPLETE;
4112         }
4113         adapter->hw_csum_good++;
4114 }
4115
4116 /**
4117  * e1000_clean_rx_irq - Send received data up the network stack; legacy
4118  * @adapter: board private structure
4119  **/
4120
4121 static boolean_t
4122 #ifdef CONFIG_E1000_NAPI
4123 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4124                    struct e1000_rx_ring *rx_ring,
4125                    int *work_done, int work_to_do)
4126 #else
4127 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4128                    struct e1000_rx_ring *rx_ring)
4129 #endif
4130 {
4131         struct net_device *netdev = adapter->netdev;
4132         struct pci_dev *pdev = adapter->pdev;
4133         struct e1000_rx_desc *rx_desc, *next_rxd;
4134         struct e1000_buffer *buffer_info, *next_buffer;
4135         unsigned long flags;
4136         uint32_t length;
4137         uint8_t last_byte;
4138         unsigned int i;
4139         int cleaned_count = 0;
4140         boolean_t cleaned = FALSE;
4141         unsigned int total_rx_bytes=0, total_rx_packets=0;
4142
4143         i = rx_ring->next_to_clean;
4144         rx_desc = E1000_RX_DESC(*rx_ring, i);
4145         buffer_info = &rx_ring->buffer_info[i];
4146
4147         while (rx_desc->status & E1000_RXD_STAT_DD) {
4148                 struct sk_buff *skb;
4149                 u8 status;
4150
4151 #ifdef CONFIG_E1000_NAPI
4152                 if (*work_done >= work_to_do)
4153                         break;
4154                 (*work_done)++;
4155 #endif
4156                 status = rx_desc->status;
4157                 skb = buffer_info->skb;
4158                 buffer_info->skb = NULL;
4159
4160                 prefetch(skb->data - NET_IP_ALIGN);
4161
4162                 if (++i == rx_ring->count) i = 0;
4163                 next_rxd = E1000_RX_DESC(*rx_ring, i);
4164                 prefetch(next_rxd);
4165
4166                 next_buffer = &rx_ring->buffer_info[i];
4167
4168                 cleaned = TRUE;
4169                 cleaned_count++;
4170                 pci_unmap_single(pdev,
4171                                  buffer_info->dma,
4172                                  buffer_info->length,
4173                                  PCI_DMA_FROMDEVICE);
4174
4175                 length = le16_to_cpu(rx_desc->length);
4176
4177                 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4178                         /* All receives must fit into a single buffer */
4179                         E1000_DBG("%s: Receive packet consumed multiple"
4180                                   " buffers\n", netdev->name);
4181                         /* recycle */
4182                         buffer_info->skb = skb;
4183                         goto next_desc;
4184                 }
4185
4186                 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4187                         last_byte = *(skb->data + length - 1);
4188                         if (TBI_ACCEPT(&adapter->hw, status,
4189                                       rx_desc->errors, length, last_byte)) {
4190                                 spin_lock_irqsave(&adapter->stats_lock, flags);
4191                                 e1000_tbi_adjust_stats(&adapter->hw,
4192                                                        &adapter->stats,
4193                                                        length, skb->data);
4194                                 spin_unlock_irqrestore(&adapter->stats_lock,
4195                                                        flags);
4196                                 length--;
4197                         } else {
4198                                 /* recycle */
4199                                 buffer_info->skb = skb;
4200                                 goto next_desc;
4201                         }
4202                 }
4203
4204                 /* adjust length to remove Ethernet CRC, this must be
4205                  * done after the TBI_ACCEPT workaround above */
4206                 length -= 4;
4207
4208                 /* probably a little skewed due to removing CRC */
4209                 total_rx_bytes += length;
4210                 total_rx_packets++;
4211
4212                 /* code added for copybreak, this should improve
4213                  * performance for small packets with large amounts
4214                  * of reassembly being done in the stack */
4215                 if (length < copybreak) {
4216                         struct sk_buff *new_skb =
4217                             netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4218                         if (new_skb) {
4219                                 skb_reserve(new_skb, NET_IP_ALIGN);
4220                                 skb_copy_to_linear_data_offset(new_skb,
4221                                                                -NET_IP_ALIGN,
4222                                                                (skb->data -
4223                                                                 NET_IP_ALIGN),
4224                                                                (length +
4225                                                                 NET_IP_ALIGN));
4226                                 /* save the skb in buffer_info as good */
4227                                 buffer_info->skb = skb;
4228                                 skb = new_skb;
4229                         }
4230                         /* else just continue with the old one */
4231                 }
4232                 /* end copybreak code */
4233                 skb_put(skb, length);
4234
4235                 /* Receive Checksum Offload */
4236                 e1000_rx_checksum(adapter,
4237                                   (uint32_t)(status) |
4238                                   ((uint32_t)(rx_desc->errors) << 24),
4239                                   le16_to_cpu(rx_desc->csum), skb);
4240
4241                 skb->protocol = eth_type_trans(skb, netdev);
4242 #ifdef CONFIG_E1000_NAPI
4243                 if (unlikely(adapter->vlgrp &&
4244                             (status & E1000_RXD_STAT_VP))) {
4245                         vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4246                                                  le16_to_cpu(rx_desc->special) &
4247                                                  E1000_RXD_SPC_VLAN_MASK);
4248                 } else {
4249                         netif_receive_skb(skb);
4250                 }
4251 #else /* CONFIG_E1000_NAPI */
4252                 if (unlikely(adapter->vlgrp &&
4253                             (status & E1000_RXD_STAT_VP))) {
4254                         vlan_hwaccel_rx(skb, adapter->vlgrp,
4255                                         le16_to_cpu(rx_desc->special) &
4256                                         E1000_RXD_SPC_VLAN_MASK);
4257                 } else {
4258                         netif_rx(skb);
4259                 }
4260 #endif /* CONFIG_E1000_NAPI */
4261                 netdev->last_rx = jiffies;
4262
4263 next_desc:
4264                 rx_desc->status = 0;
4265
4266                 /* return some buffers to hardware, one at a time is too slow */
4267                 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4268                         adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4269                         cleaned_count = 0;
4270                 }
4271
4272                 /* use prefetched values */
4273                 rx_desc = next_rxd;
4274                 buffer_info = next_buffer;
4275         }
4276         rx_ring->next_to_clean = i;
4277
4278         cleaned_count = E1000_DESC_UNUSED(rx_ring);
4279         if (cleaned_count)
4280                 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4281
4282         adapter->total_rx_packets += total_rx_packets;
4283         adapter->total_rx_bytes += total_rx_bytes;
4284         return cleaned;
4285 }
4286
4287 /**
4288  * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4289  * @adapter: board private structure
4290  **/
4291
4292 static boolean_t
4293 #ifdef CONFIG_E1000_NAPI
4294 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4295                       struct e1000_rx_ring *rx_ring,
4296                       int *work_done, int work_to_do)
4297 #else
4298 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4299                       struct e1000_rx_ring *rx_ring)
4300 #endif
4301 {
4302         union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4303         struct net_device *netdev = adapter->netdev;
4304         struct pci_dev *pdev = adapter->pdev;
4305         struct e1000_buffer *buffer_info, *next_buffer;
4306         struct e1000_ps_page *ps_page;
4307         struct e1000_ps_page_dma *ps_page_dma;
4308         struct sk_buff *skb;
4309         unsigned int i, j;
4310         uint32_t length, staterr;
4311         int cleaned_count = 0;
4312         boolean_t cleaned = FALSE;
4313         unsigned int total_rx_bytes=0, total_rx_packets=0;
4314
4315         i = rx_ring->next_to_clean;
4316         rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4317         staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4318         buffer_info = &rx_ring->buffer_info[i];
4319
4320         while (staterr & E1000_RXD_STAT_DD) {
4321                 ps_page = &rx_ring->ps_page[i];
4322                 ps_page_dma = &rx_ring->ps_page_dma[i];
4323 #ifdef CONFIG_E1000_NAPI
4324                 if (unlikely(*work_done >= work_to_do))
4325                         break;
4326                 (*work_done)++;
4327 #endif
4328                 skb = buffer_info->skb;
4329
4330                 /* in the packet split case this is header only */
4331                 prefetch(skb->data - NET_IP_ALIGN);
4332
4333                 if (++i == rx_ring->count) i = 0;
4334                 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4335                 prefetch(next_rxd);
4336
4337                 next_buffer = &rx_ring->buffer_info[i];
4338
4339                 cleaned = TRUE;
4340                 cleaned_count++;
4341                 pci_unmap_single(pdev, buffer_info->dma,
4342                                  buffer_info->length,
4343                                  PCI_DMA_FROMDEVICE);
4344
4345                 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4346                         E1000_DBG("%s: Packet Split buffers didn't pick up"
4347                                   " the full packet\n", netdev->name);
4348                         dev_kfree_skb_irq(skb);
4349                         goto next_desc;
4350                 }
4351
4352                 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4353                         dev_kfree_skb_irq(skb);
4354                         goto next_desc;
4355                 }
4356
4357                 length = le16_to_cpu(rx_desc->wb.middle.length0);
4358
4359                 if (unlikely(!length)) {
4360                         E1000_DBG("%s: Last part of the packet spanning"
4361                                   " multiple descriptors\n", netdev->name);
4362                         dev_kfree_skb_irq(skb);
4363                         goto next_desc;
4364                 }
4365
4366                 /* Good Receive */
4367                 skb_put(skb, length);
4368
4369                 {
4370                 /* this looks ugly, but it seems compiler issues make it
4371                    more efficient than reusing j */
4372                 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4373
4374                 /* page alloc/put takes too long and effects small packet
4375                  * throughput, so unsplit small packets and save the alloc/put*/
4376                 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
4377                         u8 *vaddr;
4378                         /* there is no documentation about how to call
4379                          * kmap_atomic, so we can't hold the mapping
4380                          * very long */
4381                         pci_dma_sync_single_for_cpu(pdev,
4382                                 ps_page_dma->ps_page_dma[0],
4383                                 PAGE_SIZE,
4384                                 PCI_DMA_FROMDEVICE);
4385                         vaddr = kmap_atomic(ps_page->ps_page[0],
4386                                             KM_SKB_DATA_SOFTIRQ);
4387                         memcpy(skb_tail_pointer(skb), vaddr, l1);
4388                         kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4389                         pci_dma_sync_single_for_device(pdev,
4390                                 ps_page_dma->ps_page_dma[0],
4391                                 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4392                         /* remove the CRC */
4393                         l1 -= 4;
4394                         skb_put(skb, l1);
4395                         goto copydone;
4396                 } /* if */
4397                 }
4398
4399                 for (j = 0; j < adapter->rx_ps_pages; j++) {
4400                         if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4401                                 break;
4402                         pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4403                                         PAGE_SIZE, PCI_DMA_FROMDEVICE);
4404                         ps_page_dma->ps_page_dma[j] = 0;
4405                         skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4406                                            length);
4407                         ps_page->ps_page[j] = NULL;
4408                         skb->len += length;
4409                         skb->data_len += length;
4410                         skb->truesize += length;
4411                 }
4412
4413                 /* strip the ethernet crc, problem is we're using pages now so
4414                  * this whole operation can get a little cpu intensive */
4415                 pskb_trim(skb, skb->len - 4);
4416
4417 copydone:
4418                 total_rx_bytes += skb->len;
4419                 total_rx_packets++;
4420
4421                 e1000_rx_checksum(adapter, staterr,
4422                                   le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4423                 skb->protocol = eth_type_trans(skb, netdev);
4424
4425                 if (likely(rx_desc->wb.upper.header_status &
4426                            cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4427                         adapter->rx_hdr_split++;
4428 #ifdef CONFIG_E1000_NAPI
4429                 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4430                         vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4431                                 le16_to_cpu(rx_desc->wb.middle.vlan) &
4432                                 E1000_RXD_SPC_VLAN_MASK);
4433                 } else {
4434                         netif_receive_skb(skb);
4435                 }
4436 #else /* CONFIG_E1000_NAPI */
4437                 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4438                         vlan_hwaccel_rx(skb, adapter->vlgrp,
4439                                 le16_to_cpu(rx_desc->wb.middle.vlan) &
4440                                 E1000_RXD_SPC_VLAN_MASK);
4441                 } else {
4442                         netif_rx(skb);
4443                 }
4444 #endif /* CONFIG_E1000_NAPI */
4445                 netdev->last_rx = jiffies;
4446
4447 next_desc:
4448                 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4449                 buffer_info->skb = NULL;
4450
4451                 /* return some buffers to hardware, one at a time is too slow */
4452                 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4453                         adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4454                         cleaned_count = 0;
4455                 }
4456
4457                 /* use prefetched values */
4458                 rx_desc = next_rxd;
4459                 buffer_info = next_buffer;
4460
4461                 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4462         }
4463         rx_ring->next_to_clean = i;
4464
4465         cleaned_count = E1000_DESC_UNUSED(rx_ring);
4466         if (cleaned_count)
4467                 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4468
4469         adapter->total_rx_packets += total_rx_packets;
4470         adapter->total_rx_bytes += total_rx_bytes;
4471         return cleaned;
4472 }
4473
4474 /**
4475  * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4476  * @adapter: address of board private structure
4477  **/
4478
4479 static void
4480 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4481                        struct e1000_rx_ring *rx_ring,
4482                        int cleaned_count)
4483 {
4484         struct net_device *netdev = adapter->netdev;
4485         struct pci_dev *pdev = adapter->pdev;
4486         struct e1000_rx_desc *rx_desc;
4487         struct e1000_buffer *buffer_info;
4488         struct sk_buff *skb;
4489         unsigned int i;
4490         unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4491
4492         i = rx_ring->next_to_use;
4493         buffer_info = &rx_ring->buffer_info[i];
4494
4495         while (cleaned_count--) {
4496                 skb = buffer_info->skb;
4497                 if (skb) {
4498                         skb_trim(skb, 0);
4499                         goto map_skb;
4500                 }
4501
4502                 skb = netdev_alloc_skb(netdev, bufsz);
4503                 if (unlikely(!skb)) {
4504                         /* Better luck next round */
4505                         adapter->alloc_rx_buff_failed++;
4506                         break;
4507                 }
4508
4509                 /* Fix for errata 23, can't cross 64kB boundary */
4510                 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4511                         struct sk_buff *oldskb = skb;
4512                         DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4513                                              "at %p\n", bufsz, skb->data);
4514                         /* Try again, without freeing the previous */
4515                         skb = netdev_alloc_skb(netdev, bufsz);
4516                         /* Failed allocation, critical failure */
4517                         if (!skb) {
4518                                 dev_kfree_skb(oldskb);
4519                                 break;
4520                         }
4521
4522                         if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4523                                 /* give up */
4524                                 dev_kfree_skb(skb);
4525                                 dev_kfree_skb(oldskb);
4526                                 break; /* while !buffer_info->skb */
4527                         }
4528
4529                         /* Use new allocation */
4530                         dev_kfree_skb(oldskb);
4531                 }
4532                 /* Make buffer alignment 2 beyond a 16 byte boundary
4533                  * this will result in a 16 byte aligned IP header after
4534                  * the 14 byte MAC header is removed
4535                  */
4536                 skb_reserve(skb, NET_IP_ALIGN);
4537
4538                 buffer_info->skb = skb;
4539                 buffer_info->length = adapter->rx_buffer_len;
4540 map_skb:
4541                 buffer_info->dma = pci_map_single(pdev,
4542                                                   skb->data,
4543                                                   adapter->rx_buffer_len,
4544                                                   PCI_DMA_FROMDEVICE);
4545
4546                 /* Fix for errata 23, can't cross 64kB boundary */
4547                 if (!e1000_check_64k_bound(adapter,
4548                                         (void *)(unsigned long)buffer_info->dma,
4549                                         adapter->rx_buffer_len)) {
4550                         DPRINTK(RX_ERR, ERR,
4551                                 "dma align check failed: %u bytes at %p\n",
4552                                 adapter->rx_buffer_len,
4553                                 (void *)(unsigned long)buffer_info->dma);
4554                         dev_kfree_skb(skb);
4555                         buffer_info->skb = NULL;
4556
4557                         pci_unmap_single(pdev, buffer_info->dma,
4558                                          adapter->rx_buffer_len,
4559                                          PCI_DMA_FROMDEVICE);
4560
4561                         break; /* while !buffer_info->skb */
4562                 }
4563                 rx_desc = E1000_RX_DESC(*rx_ring, i);
4564                 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4565
4566                 if (unlikely(++i == rx_ring->count))
4567                         i = 0;
4568                 buffer_info = &rx_ring->buffer_info[i];
4569         }
4570
4571         if (likely(rx_ring->next_to_use != i)) {
4572                 rx_ring->next_to_use = i;
4573                 if (unlikely(i-- == 0))
4574                         i = (rx_ring->count - 1);
4575
4576                 /* Force memory writes to complete before letting h/w
4577                  * know there are new descriptors to fetch.  (Only
4578                  * applicable for weak-ordered memory model archs,
4579                  * such as IA-64). */
4580                 wmb();
4581                 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4582         }
4583 }
4584
4585 /**
4586  * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4587  * @adapter: address of board private structure
4588  **/
4589
4590 static void
4591 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4592                           struct e1000_rx_ring *rx_ring,
4593                           int cleaned_count)
4594 {
4595         struct net_device *netdev = adapter->netdev;
4596         struct pci_dev *pdev = adapter->pdev;
4597         union e1000_rx_desc_packet_split *rx_desc;
4598         struct e1000_buffer *buffer_info;
4599         struct e1000_ps_page *ps_page;
4600         struct e1000_ps_page_dma *ps_page_dma;
4601         struct sk_buff *skb;
4602         unsigned int i, j;
4603
4604         i = rx_ring->next_to_use;
4605         buffer_info = &rx_ring->buffer_info[i];
4606         ps_page = &rx_ring->ps_page[i];
4607         ps_page_dma = &rx_ring->ps_page_dma[i];
4608
4609         while (cleaned_count--) {
4610                 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4611
4612                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4613                         if (j < adapter->rx_ps_pages) {
4614                                 if (likely(!ps_page->ps_page[j])) {
4615                                         ps_page->ps_page[j] =
4616                                                 alloc_page(GFP_ATOMIC);
4617                                         if (unlikely(!ps_page->ps_page[j])) {
4618                                                 adapter->alloc_rx_buff_failed++;
4619                                                 goto no_buffers;
4620                                         }
4621                                         ps_page_dma->ps_page_dma[j] =
4622                                                 pci_map_page(pdev,
4623                                                             ps_page->ps_page[j],
4624                                                             0, PAGE_SIZE,
4625                                                             PCI_DMA_FROMDEVICE);
4626                                 }
4627                                 /* Refresh the desc even if buffer_addrs didn't
4628                                  * change because each write-back erases
4629                                  * this info.
4630                                  */
4631                                 rx_desc->read.buffer_addr[j+1] =
4632                                      cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4633                         } else
4634                                 rx_desc->read.buffer_addr[j+1] = ~0;
4635                 }
4636
4637                 skb = netdev_alloc_skb(netdev,
4638                                        adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4639
4640                 if (unlikely(!skb)) {
4641                         adapter->alloc_rx_buff_failed++;
4642                         break;
4643                 }
4644
4645                 /* Make buffer alignment 2 beyond a 16 byte boundary
4646                  * this will result in a 16 byte aligned IP header after
4647                  * the 14 byte MAC header is removed
4648                  */
4649                 skb_reserve(skb, NET_IP_ALIGN);
4650
4651                 buffer_info->skb = skb;
4652                 buffer_info->length = adapter->rx_ps_bsize0;
4653                 buffer_info->dma = pci_map_single(pdev, skb->data,
4654                                                   adapter->rx_ps_bsize0,
4655                                                   PCI_DMA_FROMDEVICE);
4656
4657                 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4658
4659                 if (unlikely(++i == rx_ring->count)) i = 0;
4660                 buffer_info = &rx_ring->buffer_info[i];
4661                 ps_page = &rx_ring->ps_page[i];
4662                 ps_page_dma = &rx_ring->ps_page_dma[i];
4663         }
4664
4665 no_buffers:
4666         if (likely(rx_ring->next_to_use != i)) {
4667                 rx_ring->next_to_use = i;
4668                 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4669
4670                 /* Force memory writes to complete before letting h/w
4671                  * know there are new descriptors to fetch.  (Only
4672                  * applicable for weak-ordered memory model archs,
4673                  * such as IA-64). */
4674                 wmb();
4675                 /* Hardware increments by 16 bytes, but packet split
4676                  * descriptors are 32 bytes...so we increment tail
4677                  * twice as much.
4678                  */
4679                 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4680         }
4681 }
4682
4683 /**
4684  * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4685  * @adapter:
4686  **/
4687
4688 static void
4689 e1000_smartspeed(struct e1000_adapter *adapter)
4690 {
4691         uint16_t phy_status;
4692         uint16_t phy_ctrl;
4693
4694         if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4695            !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4696                 return;
4697
4698         if (adapter->smartspeed == 0) {
4699                 /* If Master/Slave config fault is asserted twice,
4700                  * we assume back-to-back */
4701                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4702                 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4703                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4704                 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4705                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4706                 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4707                         phy_ctrl &= ~CR_1000T_MS_ENABLE;
4708                         e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4709                                             phy_ctrl);
4710                         adapter->smartspeed++;
4711                         if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4712                            !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4713                                                &phy_ctrl)) {
4714                                 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4715                                              MII_CR_RESTART_AUTO_NEG);
4716                                 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4717                                                     phy_ctrl);
4718                         }
4719                 }
4720                 return;
4721         } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4722                 /* If still no link, perhaps using 2/3 pair cable */
4723                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4724                 phy_ctrl |= CR_1000T_MS_ENABLE;
4725                 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4726                 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4727                    !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4728                         phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4729                                      MII_CR_RESTART_AUTO_NEG);
4730                         e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4731                 }
4732         }
4733         /* Restart process after E1000_SMARTSPEED_MAX iterations */
4734         if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4735                 adapter->smartspeed = 0;
4736 }
4737
4738 /**
4739  * e1000_ioctl -
4740  * @netdev:
4741  * @ifreq:
4742  * @cmd:
4743  **/
4744
4745 static int
4746 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4747 {
4748         switch (cmd) {
4749         case SIOCGMIIPHY:
4750         case SIOCGMIIREG:
4751         case SIOCSMIIREG:
4752                 return e1000_mii_ioctl(netdev, ifr, cmd);
4753         default:
4754                 return -EOPNOTSUPP;
4755         }
4756 }
4757
4758 /**
4759  * e1000_mii_ioctl -
4760  * @netdev:
4761  * @ifreq:
4762  * @cmd:
4763  **/
4764
4765 static int
4766 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4767 {
4768         struct e1000_adapter *adapter = netdev_priv(netdev);
4769         struct mii_ioctl_data *data = if_mii(ifr);
4770         int retval;
4771         uint16_t mii_reg;
4772         uint16_t spddplx;
4773         unsigned long flags;
4774
4775         if (adapter->hw.media_type != e1000_media_type_copper)
4776                 return -EOPNOTSUPP;
4777
4778         switch (cmd) {
4779         case SIOCGMIIPHY:
4780                 data->phy_id = adapter->hw.phy_addr;
4781                 break;
4782         case SIOCGMIIREG:
4783                 if (!capable(CAP_NET_ADMIN))
4784                         return -EPERM;
4785                 spin_lock_irqsave(&adapter->stats_lock, flags);
4786                 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4787                                    &data->val_out)) {
4788                         spin_unlock_irqrestore(&adapter->stats_lock, flags);
4789                         return -EIO;
4790                 }
4791                 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4792                 break;
4793         case SIOCSMIIREG:
4794                 if (!capable(CAP_NET_ADMIN))
4795                         return -EPERM;
4796                 if (data->reg_num & ~(0x1F))
4797                         return -EFAULT;
4798                 mii_reg = data->val_in;
4799                 spin_lock_irqsave(&adapter->stats_lock, flags);
4800                 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4801                                         mii_reg)) {
4802                         spin_unlock_irqrestore(&adapter->stats_lock, flags);
4803                         return -EIO;
4804                 }
4805                 if (adapter->hw.media_type == e1000_media_type_copper) {
4806                         switch (data->reg_num) {
4807                         case PHY_CTRL:
4808                                 if (mii_reg & MII_CR_POWER_DOWN)
4809                                         break;
4810                                 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4811                                         adapter->hw.autoneg = 1;
4812                                         adapter->hw.autoneg_advertised = 0x2F;
4813                                 } else {
4814                                         if (mii_reg & 0x40)
4815                                                 spddplx = SPEED_1000;
4816                                         else if (mii_reg & 0x2000)
4817                                                 spddplx = SPEED_100;
4818                                         else
4819                                                 spddplx = SPEED_10;
4820                                         spddplx += (mii_reg & 0x100)
4821                                                    ? DUPLEX_FULL :
4822                                                    DUPLEX_HALF;
4823                                         retval = e1000_set_spd_dplx(adapter,
4824                                                                     spddplx);
4825                                         if (retval) {
4826                                                 spin_unlock_irqrestore(
4827                                                         &adapter->stats_lock,
4828                                                         flags);
4829                                                 return retval;
4830                                         }
4831                                 }
4832                                 if (netif_running(adapter->netdev))
4833                                         e1000_reinit_locked(adapter);
4834                                 else
4835                                         e1000_reset(adapter);
4836                                 break;
4837                         case M88E1000_PHY_SPEC_CTRL:
4838                         case M88E1000_EXT_PHY_SPEC_CTRL:
4839                                 if (e1000_phy_reset(&adapter->hw)) {
4840                                         spin_unlock_irqrestore(
4841                                                 &adapter->stats_lock, flags);
4842                                         return -EIO;
4843                                 }
4844                                 break;
4845                         }
4846                 } else {
4847                         switch (data->reg_num) {
4848                         case PHY_CTRL:
4849                                 if (mii_reg & MII_CR_POWER_DOWN)
4850                                         break;
4851                                 if (netif_running(adapter->netdev))
4852                                         e1000_reinit_locked(adapter);
4853                                 else
4854                                         e1000_reset(adapter);
4855                                 break;
4856                         }
4857                 }
4858                 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4859                 break;
4860         default:
4861                 return -EOPNOTSUPP;
4862         }
4863         return E1000_SUCCESS;
4864 }
4865
4866 void
4867 e1000_pci_set_mwi(struct e1000_hw *hw)
4868 {
4869         struct e1000_adapter *adapter = hw->back;
4870         int ret_val = pci_set_mwi(adapter->pdev);
4871
4872         if (ret_val)
4873                 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4874 }
4875
4876 void
4877 e1000_pci_clear_mwi(struct e1000_hw *hw)
4878 {
4879         struct e1000_adapter *adapter = hw->back;
4880
4881         pci_clear_mwi(adapter->pdev);
4882 }
4883
4884 void
4885 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4886 {
4887         struct e1000_adapter *adapter = hw->back;
4888
4889         pci_read_config_word(adapter->pdev, reg, value);
4890 }
4891
4892 void
4893 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4894 {
4895         struct e1000_adapter *adapter = hw->back;
4896
4897         pci_write_config_word(adapter->pdev, reg, *value);
4898 }
4899
4900 int32_t
4901 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4902 {
4903     struct e1000_adapter *adapter = hw->back;
4904     uint16_t cap_offset;
4905
4906     cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4907     if (!cap_offset)
4908         return -E1000_ERR_CONFIG;
4909
4910     pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4911
4912     return E1000_SUCCESS;
4913 }
4914
4915 void
4916 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4917 {
4918         outl(value, port);
4919 }
4920
4921 static void
4922 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4923 {
4924         struct e1000_adapter *adapter = netdev_priv(netdev);
4925         uint32_t ctrl, rctl;
4926
4927         e1000_irq_disable(adapter);
4928         adapter->vlgrp = grp;
4929
4930         if (grp) {
4931                 /* enable VLAN tag insert/strip */
4932                 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4933                 ctrl |= E1000_CTRL_VME;
4934                 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4935
4936                 if (adapter->hw.mac_type != e1000_ich8lan) {
4937                         /* enable VLAN receive filtering */
4938                         rctl = E1000_READ_REG(&adapter->hw, RCTL);
4939                         rctl |= E1000_RCTL_VFE;
4940                         rctl &= ~E1000_RCTL_CFIEN;
4941                         E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4942                         e1000_update_mng_vlan(adapter);
4943                 }
4944         } else {
4945                 /* disable VLAN tag insert/strip */
4946                 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4947                 ctrl &= ~E1000_CTRL_VME;
4948                 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4949
4950                 if (adapter->hw.mac_type != e1000_ich8lan) {
4951                         /* disable VLAN filtering */
4952                         rctl = E1000_READ_REG(&adapter->hw, RCTL);
4953                         rctl &= ~E1000_RCTL_VFE;
4954                         E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4955                         if (adapter->mng_vlan_id !=
4956                             (uint16_t)E1000_MNG_VLAN_NONE) {
4957                                 e1000_vlan_rx_kill_vid(netdev,
4958                                                        adapter->mng_vlan_id);
4959                                 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4960                         }
4961                 }
4962         }
4963
4964         e1000_irq_enable(adapter);
4965 }
4966
4967 static void
4968 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4969 {
4970         struct e1000_adapter *adapter = netdev_priv(netdev);
4971         uint32_t vfta, index;
4972
4973         if ((adapter->hw.mng_cookie.status &
4974              E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4975             (vid == adapter->mng_vlan_id))
4976                 return;
4977         /* add VID to filter table */
4978         index = (vid >> 5) & 0x7F;
4979         vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4980         vfta |= (1 << (vid & 0x1F));
4981         e1000_write_vfta(&adapter->hw, index, vfta);
4982 }
4983
4984 static void
4985 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4986 {
4987         struct e1000_adapter *adapter = netdev_priv(netdev);
4988         uint32_t vfta, index;
4989
4990         e1000_irq_disable(adapter);
4991         vlan_group_set_device(adapter->vlgrp, vid, NULL);
4992         e1000_irq_enable(adapter);
4993
4994         if ((adapter->hw.mng_cookie.status &
4995              E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4996             (vid == adapter->mng_vlan_id)) {
4997                 /* release control to f/w */
4998                 e1000_release_hw_control(adapter);
4999                 return;
5000         }
5001
5002         /* remove VID from filter table */
5003         index = (vid >> 5) & 0x7F;
5004         vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5005         vfta &= ~(1 << (vid & 0x1F));
5006         e1000_write_vfta(&adapter->hw, index, vfta);
5007 }
5008
5009 static void
5010 e1000_restore_vlan(struct e1000_adapter *adapter)
5011 {
5012         e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5013
5014         if (adapter->vlgrp) {
5015                 uint16_t vid;
5016                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5017                         if (!vlan_group_get_device(adapter->vlgrp, vid))
5018                                 continue;
5019                         e1000_vlan_rx_add_vid(adapter->netdev, vid);
5020                 }
5021         }
5022 }
5023
5024 int
5025 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
5026 {
5027         adapter->hw.autoneg = 0;
5028
5029         /* Fiber NICs only allow 1000 gbps Full duplex */
5030         if ((adapter->hw.media_type == e1000_media_type_fiber) &&
5031                 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5032                 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5033                 return -EINVAL;
5034         }
5035
5036         switch (spddplx) {
5037         case SPEED_10 + DUPLEX_HALF:
5038                 adapter->hw.forced_speed_duplex = e1000_10_half;
5039                 break;
5040         case SPEED_10 + DUPLEX_FULL:
5041                 adapter->hw.forced_speed_duplex = e1000_10_full;
5042                 break;
5043         case SPEED_100 + DUPLEX_HALF:
5044                 adapter->hw.forced_speed_duplex = e1000_100_half;
5045                 break;
5046         case SPEED_100 + DUPLEX_FULL:
5047                 adapter->hw.forced_speed_duplex = e1000_100_full;
5048                 break;
5049         case SPEED_1000 + DUPLEX_FULL:
5050                 adapter->hw.autoneg = 1;
5051                 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5052                 break;
5053         case SPEED_1000 + DUPLEX_HALF: /* not supported */
5054         default:
5055                 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5056                 return -EINVAL;
5057         }
5058         return 0;
5059 }
5060
5061 static int
5062 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5063 {
5064         struct net_device *netdev = pci_get_drvdata(pdev);
5065         struct e1000_adapter *adapter = netdev_priv(netdev);
5066         uint32_t ctrl, ctrl_ext, rctl, status;
5067         uint32_t wufc = adapter->wol;
5068 #ifdef CONFIG_PM
5069         int retval = 0;
5070 #endif
5071
5072         netif_device_detach(netdev);
5073
5074         if (netif_running(netdev)) {
5075                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
5076                 e1000_down(adapter);
5077         }
5078
5079 #ifdef CONFIG_PM
5080         retval = pci_save_state(pdev);
5081         if (retval)
5082                 return retval;
5083 #endif
5084
5085         status = E1000_READ_REG(&adapter->hw, STATUS);
5086         if (status & E1000_STATUS_LU)
5087                 wufc &= ~E1000_WUFC_LNKC;
5088
5089         if (wufc) {
5090                 e1000_setup_rctl(adapter);
5091                 e1000_set_multi(netdev);
5092
5093                 /* turn on all-multi mode if wake on multicast is enabled */
5094                 if (wufc & E1000_WUFC_MC) {
5095                         rctl = E1000_READ_REG(&adapter->hw, RCTL);
5096                         rctl |= E1000_RCTL_MPE;
5097                         E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5098                 }
5099
5100                 if (adapter->hw.mac_type >= e1000_82540) {
5101                         ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5102                         /* advertise wake from D3Cold */
5103                         #define E1000_CTRL_ADVD3WUC 0x00100000
5104                         /* phy power management enable */
5105                         #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5106                         ctrl |= E1000_CTRL_ADVD3WUC |
5107                                 E1000_CTRL_EN_PHY_PWR_MGMT;
5108                         E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5109                 }
5110
5111                 if (adapter->hw.media_type == e1000_media_type_fiber ||
5112                    adapter->hw.media_type == e1000_media_type_internal_serdes) {
5113                         /* keep the laser running in D3 */
5114                         ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5115                         ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5116                         E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5117                 }
5118
5119                 /* Allow time for pending master requests to run */
5120                 e1000_disable_pciex_master(&adapter->hw);
5121
5122                 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5123                 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
5124                 pci_enable_wake(pdev, PCI_D3hot, 1);
5125                 pci_enable_wake(pdev, PCI_D3cold, 1);
5126         } else {
5127                 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5128                 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
5129                 pci_enable_wake(pdev, PCI_D3hot, 0);
5130                 pci_enable_wake(pdev, PCI_D3cold, 0);
5131         }
5132
5133         e1000_release_manageability(adapter);
5134
5135         /* make sure adapter isn't asleep if manageability is enabled */
5136         if (adapter->en_mng_pt) {
5137                 pci_enable_wake(pdev, PCI_D3hot, 1);
5138                 pci_enable_wake(pdev, PCI_D3cold, 1);
5139         }
5140
5141         if (adapter->hw.phy_type == e1000_phy_igp_3)
5142                 e1000_phy_powerdown_workaround(&adapter->hw);
5143
5144         if (netif_running(netdev))
5145                 e1000_free_irq(adapter);
5146
5147         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
5148          * would have already happened in close and is redundant. */
5149         e1000_release_hw_control(adapter);
5150
5151         pci_disable_device(pdev);
5152
5153         pci_set_power_state(pdev, pci_choose_state(pdev, state));
5154
5155         return 0;
5156 }
5157
5158 #ifdef CONFIG_PM
5159 static int
5160 e1000_resume(struct pci_dev *pdev)
5161 {
5162         struct net_device *netdev = pci_get_drvdata(pdev);
5163         struct e1000_adapter *adapter = netdev_priv(netdev);
5164         uint32_t err;
5165
5166         pci_set_power_state(pdev, PCI_D0);
5167         pci_restore_state(pdev);
5168         if ((err = pci_enable_device(pdev))) {
5169                 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5170                 return err;
5171         }
5172         pci_set_master(pdev);
5173
5174         pci_enable_wake(pdev, PCI_D3hot, 0);
5175         pci_enable_wake(pdev, PCI_D3cold, 0);
5176
5177         if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5178                 return err;
5179
5180         e1000_power_up_phy(adapter);
5181         e1000_reset(adapter);
5182         E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5183
5184         e1000_init_manageability(adapter);
5185
5186         if (netif_running(netdev))
5187                 e1000_up(adapter);
5188
5189         netif_device_attach(netdev);
5190
5191         /* If the controller is 82573 and f/w is AMT, do not set
5192          * DRV_LOAD until the interface is up.  For all other cases,
5193          * let the f/w know that the h/w is now under the control
5194          * of the driver. */
5195         if (adapter->hw.mac_type != e1000_82573 ||
5196             !e1000_check_mng_mode(&adapter->hw))
5197                 e1000_get_hw_control(adapter);
5198
5199         return 0;
5200 }
5201 #endif
5202
5203 static void e1000_shutdown(struct pci_dev *pdev)
5204 {
5205         e1000_suspend(pdev, PMSG_SUSPEND);
5206 }
5207
5208 #ifdef CONFIG_NET_POLL_CONTROLLER
5209 /*
5210  * Polling 'interrupt' - used by things like netconsole to send skbs
5211  * without having to re-enable interrupts. It's not called while
5212  * the interrupt routine is executing.
5213  */
5214 static void
5215 e1000_netpoll(struct net_device *netdev)
5216 {
5217         struct e1000_adapter *adapter = netdev_priv(netdev);
5218
5219         disable_irq(adapter->pdev->irq);
5220         e1000_intr(adapter->pdev->irq, netdev);
5221         e1000_clean_tx_irq(adapter, adapter->tx_ring);
5222 #ifndef CONFIG_E1000_NAPI
5223         adapter->clean_rx(adapter, adapter->rx_ring);
5224 #endif
5225         enable_irq(adapter->pdev->irq);
5226 }
5227 #endif
5228
5229 /**
5230  * e1000_io_error_detected - called when PCI error is detected
5231  * @pdev: Pointer to PCI device
5232  * @state: The current pci conneection state
5233  *
5234  * This function is called after a PCI bus error affecting
5235  * this device has been detected.
5236  */
5237 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5238 {
5239         struct net_device *netdev = pci_get_drvdata(pdev);
5240         struct e1000_adapter *adapter = netdev->priv;
5241
5242         netif_device_detach(netdev);
5243
5244         if (netif_running(netdev))
5245                 e1000_down(adapter);
5246         pci_disable_device(pdev);
5247
5248         /* Request a slot slot reset. */
5249         return PCI_ERS_RESULT_NEED_RESET;
5250 }
5251
5252 /**
5253  * e1000_io_slot_reset - called after the pci bus has been reset.
5254  * @pdev: Pointer to PCI device
5255  *
5256  * Restart the card from scratch, as if from a cold-boot. Implementation
5257  * resembles the first-half of the e1000_resume routine.
5258  */
5259 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5260 {
5261         struct net_device *netdev = pci_get_drvdata(pdev);
5262         struct e1000_adapter *adapter = netdev->priv;
5263
5264         if (pci_enable_device(pdev)) {
5265                 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5266                 return PCI_ERS_RESULT_DISCONNECT;
5267         }
5268         pci_set_master(pdev);
5269
5270         pci_enable_wake(pdev, PCI_D3hot, 0);
5271         pci_enable_wake(pdev, PCI_D3cold, 0);
5272
5273         e1000_reset(adapter);
5274         E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5275
5276         return PCI_ERS_RESULT_RECOVERED;
5277 }
5278
5279 /**
5280  * e1000_io_resume - called when traffic can start flowing again.
5281  * @pdev: Pointer to PCI device
5282  *
5283  * This callback is called when the error recovery driver tells us that
5284  * its OK to resume normal operation. Implementation resembles the
5285  * second-half of the e1000_resume routine.
5286  */
5287 static void e1000_io_resume(struct pci_dev *pdev)
5288 {
5289         struct net_device *netdev = pci_get_drvdata(pdev);
5290         struct e1000_adapter *adapter = netdev->priv;
5291
5292         e1000_init_manageability(adapter);
5293
5294         if (netif_running(netdev)) {
5295                 if (e1000_up(adapter)) {
5296                         printk("e1000: can't bring device back up after reset\n");
5297                         return;
5298                 }
5299         }
5300
5301         netif_device_attach(netdev);
5302
5303         /* If the controller is 82573 and f/w is AMT, do not set
5304          * DRV_LOAD until the interface is up.  For all other cases,
5305          * let the f/w know that the h/w is now under the control
5306          * of the driver. */
5307         if (adapter->hw.mac_type != e1000_82573 ||
5308             !e1000_check_mng_mode(&adapter->hw))
5309                 e1000_get_hw_control(adapter);
5310
5311 }
5312
5313 /* e1000_main.c */