drivers/mtd/onenand/onenand_base.c

   1 /*
   2  *  linux/drivers/mtd/onenand/onenand_base.c
   3  *
   4  *  Copyright (C) 2005-2007 Samsung Electronics
   5  *  Kyungmin Park <kyungmin.park@samsung.com>
   6  *
   7  *  Credits:
   8  *      Adrian Hunter <ext-adrian.hunter@nokia.com>:
   9  *      auto-placement support, read-while load support, various fixes
  10  *      Copyright (C) Nokia Corporation, 2007
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19 #include <linux/init.h>
  20 #include <linux/sched.h>
  21 #include <linux/delay.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/jiffies.h>
  24 #include <linux/mtd/mtd.h>
  25 #include <linux/mtd/onenand.h>
  26 #include <linux/mtd/partitions.h>
  27
  28 #include <asm/io.h>
  29
  30 /**
  31  * onenand_oob_64 - oob info for large (2KB) page
  32  */
  33 static struct nand_ecclayout onenand_oob_64 = {
  34         .eccbytes       = 20,
  35         .eccpos         = {
  36                 8, 9, 10, 11, 12,
  37                 24, 25, 26, 27, 28,
  38                 40, 41, 42, 43, 44,
  39                 56, 57, 58, 59, 60,
  40                 },
  41         .oobfree        = {
  42                 {2, 3}, {14, 2}, {18, 3}, {30, 2},
  43                 {34, 3}, {46, 2}, {50, 3}, {62, 2}
  44         }
  45 };
  46
  47 /**
  48  * onenand_oob_32 - oob info for middle (1KB) page
  49  */
  50 static struct nand_ecclayout onenand_oob_32 = {
  51         .eccbytes       = 10,
  52         .eccpos         = {
  53                 8, 9, 10, 11, 12,
  54                 24, 25, 26, 27, 28,
  55                 },
  56         .oobfree        = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  57 };
  58
  59 static const unsigned char ffchars[] = {
  60         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  61         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  62         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  63         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  64         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  65         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  66         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  67         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  68 };
  69
  70 /**
  71  * onenand_readw - [OneNAND Interface] Read OneNAND register
  72  * @param addr          address to read
  73  *
  74  * Read OneNAND register
  75  */
  76 static unsigned short onenand_readw(void __iomem *addr)
  77 {
  78         return readw(addr);
  79 }
  80
  81 /**
  82  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  83  * @param value         value to write
  84  * @param addr          address to write
  85  *
  86  * Write OneNAND register with value
  87  */
  88 static void onenand_writew(unsigned short value, void __iomem *addr)
  89 {
  90         writew(value, addr);
  91 }
  92
  93 /**
  94  * onenand_block_address - [DEFAULT] Get block address
  95  * @param this          onenand chip data structure
  96  * @param block         the block
  97  * @return              translated block address if DDP, otherwise same
  98  *
  99  * Setup Start Address 1 Register (F100h)
 100  */
 101 static int onenand_block_address(struct onenand_chip *this, int block)
 102 {
 103         /* Device Flash Core select, NAND Flash Block Address */
 104         if (block & this->density_mask)
 105                 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
 106
 107         return block;
 108 }
 109
 110 /**
 111  * onenand_bufferram_address - [DEFAULT] Get bufferram address
 112  * @param this          onenand chip data structure
 113  * @param block         the block
 114  * @return              set DBS value if DDP, otherwise 0
 115  *
 116  * Setup Start Address 2 Register (F101h) for DDP
 117  */
 118 static int onenand_bufferram_address(struct onenand_chip *this, int block)
 119 {
 120         /* Device BufferRAM Select */
 121         if (block & this->density_mask)
 122                 return ONENAND_DDP_CHIP1;
 123
 124         return ONENAND_DDP_CHIP0;
 125 }
 126
 127 /**
 128  * onenand_page_address - [DEFAULT] Get page address
 129  * @param page          the page address
 130  * @param sector        the sector address
 131  * @return              combined page and sector address
 132  *
 133  * Setup Start Address 8 Register (F107h)
 134  */
 135 static int onenand_page_address(int page, int sector)
 136 {
 137         /* Flash Page Address, Flash Sector Address */
 138         int fpa, fsa;
 139
 140         fpa = page & ONENAND_FPA_MASK;
 141         fsa = sector & ONENAND_FSA_MASK;
 142
 143         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
 144 }
 145
 146 /**
 147  * onenand_buffer_address - [DEFAULT] Get buffer address
 148  * @param dataram1      DataRAM index
 149  * @param sectors       the sector address
 150  * @param count         the number of sectors
 151  * @return              the start buffer value
 152  *
 153  * Setup Start Buffer Register (F200h)
 154  */
 155 static int onenand_buffer_address(int dataram1, int sectors, int count)
 156 {
 157         int bsa, bsc;
 158
 159         /* BufferRAM Sector Address */
 160         bsa = sectors & ONENAND_BSA_MASK;
 161
 162         if (dataram1)
 163                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
 164         else
 165                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
 166
 167         /* BufferRAM Sector Count */
 168         bsc = count & ONENAND_BSC_MASK;
 169
 170         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
 171 }
 172
 173 /**
 174  * onenand_get_density - [DEFAULT] Get OneNAND density
 175  * @param dev_id        OneNAND device ID
 176  *
 177  * Get OneNAND density from device ID
 178  */
 179 static inline int onenand_get_density(int dev_id)
 180 {
 181         int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
 182         return (density & ONENAND_DEVICE_DENSITY_MASK);
 183 }
 184
 185 /**
 186  * onenand_command - [DEFAULT] Send command to OneNAND device
 187  * @param mtd           MTD device structure
 188  * @param cmd           the command to be sent
 189  * @param addr          offset to read from or write to
 190  * @param len           number of bytes to read or write
 191  *
 192  * Send command to OneNAND device. This function is used for middle/large page
 193  * devices (1KB/2KB Bytes per page)
 194  */
 195 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
 196 {
 197         struct onenand_chip *this = mtd->priv;
 198         int value, block, page;
 199
 200         /* Address translation */
 201         switch (cmd) {
 202         case ONENAND_CMD_UNLOCK:
 203         case ONENAND_CMD_LOCK:
 204         case ONENAND_CMD_LOCK_TIGHT:
 205         case ONENAND_CMD_UNLOCK_ALL:
 206                 block = -1;
 207                 page = -1;
 208                 break;
 209
 210         case ONENAND_CMD_ERASE:
 211         case ONENAND_CMD_BUFFERRAM:
 212         case ONENAND_CMD_OTP_ACCESS:
 213                 block = (int) (addr >> this->erase_shift);
 214                 page = -1;
 215                 break;
 216
 217         default:
 218                 block = (int) (addr >> this->erase_shift);
 219                 page = (int) (addr >> this->page_shift);
 220
 221                 if (ONENAND_IS_2PLANE(this)) {
 222                         /* Make the even block number */
 223                         block &= ~1;
 224                         /* Is it the odd plane? */
 225                         if (addr & this->writesize)
 226                                 block++;
 227                         page >>= 1;
 228                 }
 229                 page &= this->page_mask;
 230                 break;
 231         }
 232
 233         /* NOTE: The setting order of the registers is very important! */
 234         if (cmd == ONENAND_CMD_BUFFERRAM) {
 235                 /* Select DataRAM for DDP */
 236                 value = onenand_bufferram_address(this, block);
 237                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 238
 239                 if (ONENAND_IS_2PLANE(this))
 240                         /* It is always BufferRAM0 */
 241                         ONENAND_SET_BUFFERRAM0(this);
 242                 else
 243                         /* Switch to the next data buffer */
 244                         ONENAND_SET_NEXT_BUFFERRAM(this);
 245
 246                 return 0;
 247         }
 248
 249         if (block != -1) {
 250                 /* Write 'DFS, FBA' of Flash */
 251                 value = onenand_block_address(this, block);
 252                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
 253
 254                 /* Select DataRAM for DDP */
 255                 value = onenand_bufferram_address(this, block);
 256                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 257         }
 258
 259         if (page != -1) {
 260                 /* Now we use page size operation */
 261                 int sectors = 4, count = 4;
 262                 int dataram;
 263
 264                 switch (cmd) {
 265                 case ONENAND_CMD_READ:
 266                 case ONENAND_CMD_READOOB:
 267                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
 268                         break;
 269
 270                 default:
 271                         if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
 272                                 cmd = ONENAND_CMD_2X_PROG;
 273                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
 274                         break;
 275                 }
 276
 277                 /* Write 'FPA, FSA' of Flash */
 278                 value = onenand_page_address(page, sectors);
 279                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
 280
 281                 /* Write 'BSA, BSC' of DataRAM */
 282                 value = onenand_buffer_address(dataram, sectors, count);
 283                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
 284         }
 285
 286         /* Interrupt clear */
 287         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
 288
 289         /* Write command */
 290         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
 291
 292         return 0;
 293 }
 294
 295 /**
 296  * onenand_wait - [DEFAULT] wait until the command is done
 297  * @param mtd           MTD device structure
 298  * @param state         state to select the max. timeout value
 299  *
 300  * Wait for command done. This applies to all OneNAND command
 301  * Read can take up to 30us, erase up to 2ms and program up to 350us
 302  * according to general OneNAND specs
 303  */
 304 static int onenand_wait(struct mtd_info *mtd, int state)
 305 {
 306         struct onenand_chip * this = mtd->priv;
 307         unsigned long timeout;
 308         unsigned int flags = ONENAND_INT_MASTER;
 309         unsigned int interrupt = 0;
 310         unsigned int ctrl;
 311
 312         /* The 20 msec is enough */
 313         timeout = jiffies + msecs_to_jiffies(20);
 314         while (time_before(jiffies, timeout)) {
 315                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 316
 317                 if (interrupt & flags)
 318                         break;
 319
 320                 if (state != FL_READING)
 321                         cond_resched();
 322         }
 323         /* To get correct interrupt status in timeout case */
 324         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 325
 326         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
 327
 328         if (ctrl & ONENAND_CTRL_ERROR) {
 329                 printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n", ctrl);
 330                 if (ctrl & ONENAND_CTRL_LOCK)
 331                         printk(KERN_ERR "onenand_wait: it's locked error.\n");
 332                 if (state == FL_READING) {
 333                         /*
 334                          * A power loss while writing can result in a page
 335                          * becoming unreadable.  When the device is mounted
 336                          * again, reading that page gives controller errors.
 337                          * Upper level software like JFFS2 treat -EIO as fatal,
 338                          * refusing to mount at all.  That means it is necessary
 339                          * to treat the error as an ECC error to allow recovery.
 340                          * Note that typically in this case, the eraseblock can
 341                          * still be erased and rewritten i.e. it has not become
 342                          * a bad block.
 343                          */
 344                         mtd->ecc_stats.failed++;
 345                         return -EBADMSG;
 346                 }
 347                 return -EIO;
 348         }
 349
 350         if (interrupt & ONENAND_INT_READ) {
 351                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
 352                 if (ecc) {
 353                         if (ecc & ONENAND_ECC_2BIT_ALL) {
 354                                 printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
 355                                 mtd->ecc_stats.failed++;
 356                                 return -EBADMSG;
 357                         } else if (ecc & ONENAND_ECC_1BIT_ALL) {
 358                                 printk(KERN_INFO "onenand_wait: correctable ECC error = 0x%04x\n", ecc);
 359                                 mtd->ecc_stats.corrected++;
 360                         }
 361                 }
 362         } else if (state == FL_READING) {
 363                 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
 364                 return -EIO;
 365         }
 366
 367         return 0;
 368 }
 369
 370 /*
 371  * onenand_interrupt - [DEFAULT] onenand interrupt handler
 372  * @param irq           onenand interrupt number
 373  * @param dev_id        interrupt data
 374  *
 375  * complete the work
 376  */
 377 static irqreturn_t onenand_interrupt(int irq, void *data)
 378 {
 379         struct onenand_chip *this = data;
 380
 381         /* To handle shared interrupt */
 382         if (!this->complete.done)
 383                 complete(&this->complete);
 384
 385         return IRQ_HANDLED;
 386 }
 387
 388 /*
 389  * onenand_interrupt_wait - [DEFAULT] wait until the command is done
 390  * @param mtd           MTD device structure
 391  * @param state         state to select the max. timeout value
 392  *
 393  * Wait for command done.
 394  */
 395 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
 396 {
 397         struct onenand_chip *this = mtd->priv;
 398
 399         wait_for_completion(&this->complete);
 400
 401         return onenand_wait(mtd, state);
 402 }
 403
 404 /*
 405  * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
 406  * @param mtd           MTD device structure
 407  * @param state         state to select the max. timeout value
 408  *
 409  * Try interrupt based wait (It is used one-time)
 410  */
 411 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
 412 {
 413         struct onenand_chip *this = mtd->priv;
 414         unsigned long remain, timeout;
 415
 416         /* We use interrupt wait first */
 417         this->wait = onenand_interrupt_wait;
 418
 419         timeout = msecs_to_jiffies(100);
 420         remain = wait_for_completion_timeout(&this->complete, timeout);
 421         if (!remain) {
 422                 printk(KERN_INFO "OneNAND: There's no interrupt. "
 423                                 "We use the normal wait\n");
 424
 425                 /* Release the irq */
 426                 free_irq(this->irq, this);
 427
 428                 this->wait = onenand_wait;
 429         }
 430
 431         return onenand_wait(mtd, state);
 432 }
 433
 434 /*
 435  * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
 436  * @param mtd           MTD device structure
 437  *
 438  * There's two method to wait onenand work
 439  * 1. polling - read interrupt status register
 440  * 2. interrupt - use the kernel interrupt method
 441  */
 442 static void onenand_setup_wait(struct mtd_info *mtd)
 443 {
 444         struct onenand_chip *this = mtd->priv;
 445         int syscfg;
 446
 447         init_completion(&this->complete);
 448
 449         if (this->irq <= 0) {
 450                 this->wait = onenand_wait;
 451                 return;
 452         }
 453
 454         if (request_irq(this->irq, &onenand_interrupt,
 455                                 IRQF_SHARED, "onenand", this)) {
 456                 /* If we can't get irq, use the normal wait */
 457                 this->wait = onenand_wait;
 458                 return;
 459         }
 460
 461         /* Enable interrupt */
 462         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
 463         syscfg |= ONENAND_SYS_CFG1_IOBE;
 464         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
 465
 466         this->wait = onenand_try_interrupt_wait;
 467 }
 468
 469 /**
 470  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
 471  * @param mtd           MTD data structure
 472  * @param area          BufferRAM area
 473  * @return              offset given area
 474  *
 475  * Return BufferRAM offset given area
 476  */
 477 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
 478 {
 479         struct onenand_chip *this = mtd->priv;
 480
 481         if (ONENAND_CURRENT_BUFFERRAM(this)) {
 482                 /* Note: the 'this->writesize' is a real page size */
 483                 if (area == ONENAND_DATARAM)
 484                         return this->writesize;
 485                 if (area == ONENAND_SPARERAM)
 486                         return mtd->oobsize;
 487         }
 488
 489         return 0;
 490 }
 491
 492 /**
 493  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
 494  * @param mtd           MTD data structure
 495  * @param area          BufferRAM area
 496  * @param buffer        the databuffer to put/get data
 497  * @param offset        offset to read from or write to
 498  * @param count         number of bytes to read/write
 499  *
 500  * Read the BufferRAM area
 501  */
 502 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
 503                 unsigned char *buffer, int offset, size_t count)
 504 {
 505         struct onenand_chip *this = mtd->priv;
 506         void __iomem *bufferram;
 507
 508         bufferram = this->base + area;
 509
 510         bufferram += onenand_bufferram_offset(mtd, area);
 511
 512         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 513                 unsigned short word;
 514
 515                 /* Align with word(16-bit) size */
 516                 count--;
 517
 518                 /* Read word and save byte */
 519                 word = this->read_word(bufferram + offset + count);
 520                 buffer[count] = (word & 0xff);
 521         }
 522
 523         memcpy(buffer, bufferram + offset, count);
 524
 525         return 0;
 526 }
 527
 528 /**
 529  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
 530  * @param mtd           MTD data structure
 531  * @param area          BufferRAM area
 532  * @param buffer        the databuffer to put/get data
 533  * @param offset        offset to read from or write to
 534  * @param count         number of bytes to read/write
 535  *
 536  * Read the BufferRAM area with Sync. Burst Mode
 537  */
 538 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
 539                 unsigned char *buffer, int offset, size_t count)
 540 {
 541         struct onenand_chip *this = mtd->priv;
 542         void __iomem *bufferram;
 543
 544         bufferram = this->base + area;
 545
 546         bufferram += onenand_bufferram_offset(mtd, area);
 547
 548         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
 549
 550         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 551                 unsigned short word;
 552
 553                 /* Align with word(16-bit) size */
 554                 count--;
 555
 556                 /* Read word and save byte */
 557                 word = this->read_word(bufferram + offset + count);
 558                 buffer[count] = (word & 0xff);
 559         }
 560
 561         memcpy(buffer, bufferram + offset, count);
 562
 563         this->mmcontrol(mtd, 0);
 564
 565         return 0;
 566 }
 567
 568 /**
 569  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
 570  * @param mtd           MTD data structure
 571  * @param area          BufferRAM area
 572  * @param buffer        the databuffer to put/get data
 573  * @param offset        offset to read from or write to
 574  * @param count         number of bytes to read/write
 575  *
 576  * Write the BufferRAM area
 577  */
 578 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
 579                 const unsigned char *buffer, int offset, size_t count)
 580 {
 581         struct onenand_chip *this = mtd->priv;
 582         void __iomem *bufferram;
 583
 584         bufferram = this->base + area;
 585
 586         bufferram += onenand_bufferram_offset(mtd, area);
 587
 588         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 589                 unsigned short word;
 590                 int byte_offset;
 591
 592                 /* Align with word(16-bit) size */
 593                 count--;
 594
 595                 /* Calculate byte access offset */
 596                 byte_offset = offset + count;
 597
 598                 /* Read word and save byte */
 599                 word = this->read_word(bufferram + byte_offset);
 600                 word = (word & ~0xff) | buffer[count];
 601                 this->write_word(word, bufferram + byte_offset);
 602         }
 603
 604         memcpy(bufferram + offset, buffer, count);
 605
 606         return 0;
 607 }
 608
 609 /**
 610  * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
 611  * @param mtd           MTD data structure
 612  * @param addr          address to check
 613  * @return              blockpage address
 614  *
 615  * Get blockpage address at 2x program mode
 616  */
 617 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
 618 {
 619         struct onenand_chip *this = mtd->priv;
 620         int blockpage, block, page;
 621
 622         /* Calculate the even block number */
 623         block = (int) (addr >> this->erase_shift) & ~1;
 624         /* Is it the odd plane? */
 625         if (addr & this->writesize)
 626                 block++;
 627         page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
 628         blockpage = (block << 7) | page;
 629
 630         return blockpage;
 631 }
 632
 633 /**
 634  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
 635  * @param mtd           MTD data structure
 636  * @param addr          address to check
 637  * @return              1 if there are valid data, otherwise 0
 638  *
 639  * Check bufferram if there is data we required
 640  */
 641 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
 642 {
 643         struct onenand_chip *this = mtd->priv;
 644         int blockpage, found = 0;
 645         unsigned int i;
 646
 647         if (ONENAND_IS_2PLANE(this))
 648                 blockpage = onenand_get_2x_blockpage(mtd, addr);
 649         else
 650                 blockpage = (int) (addr >> this->page_shift);
 651
 652         /* Is there valid data? */
 653         i = ONENAND_CURRENT_BUFFERRAM(this);
 654         if (this->bufferram[i].blockpage == blockpage)
 655                 found = 1;
 656         else {
 657                 /* Check another BufferRAM */
 658                 i = ONENAND_NEXT_BUFFERRAM(this);
 659                 if (this->bufferram[i].blockpage == blockpage) {
 660                         ONENAND_SET_NEXT_BUFFERRAM(this);
 661                         found = 1;
 662                 }
 663         }
 664
 665         if (found && ONENAND_IS_DDP(this)) {
 666                 /* Select DataRAM for DDP */
 667                 int block = (int) (addr >> this->erase_shift);
 668                 int value = onenand_bufferram_address(this, block);
 669                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 670         }
 671
 672         return found;
 673 }
 674
 675 /**
 676  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
 677  * @param mtd           MTD data structure
 678  * @param addr          address to update
 679  * @param valid         valid flag
 680  *
 681  * Update BufferRAM information
 682  */
 683 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
 684                 int valid)
 685 {
 686         struct onenand_chip *this = mtd->priv;
 687         int blockpage;
 688         unsigned int i;
 689
 690         if (ONENAND_IS_2PLANE(this))
 691                 blockpage = onenand_get_2x_blockpage(mtd, addr);
 692         else
 693                 blockpage = (int) (addr >> this->page_shift);
 694
 695         /* Invalidate another BufferRAM */
 696         i = ONENAND_NEXT_BUFFERRAM(this);
 697         if (this->bufferram[i].blockpage == blockpage)
 698                 this->bufferram[i].blockpage = -1;
 699
 700         /* Update BufferRAM */
 701         i = ONENAND_CURRENT_BUFFERRAM(this);
 702         if (valid)
 703                 this->bufferram[i].blockpage = blockpage;
 704         else
 705                 this->bufferram[i].blockpage = -1;
 706 }
 707
 708 /**
 709  * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
 710  * @param mtd           MTD data structure
 711  * @param addr          start address to invalidate
 712  * @param len           length to invalidate
 713  *
 714  * Invalidate BufferRAM information
 715  */
 716 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
 717                 unsigned int len)
 718 {
 719         struct onenand_chip *this = mtd->priv;
 720         int i;
 721         loff_t end_addr = addr + len;
 722
 723         /* Invalidate BufferRAM */
 724         for (i = 0; i < MAX_BUFFERRAM; i++) {
 725                 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
 726                 if (buf_addr >= addr && buf_addr < end_addr)
 727                         this->bufferram[i].blockpage = -1;
 728         }
 729 }
 730
 731 /**
 732  * onenand_get_device - [GENERIC] Get chip for selected access
 733  * @param mtd           MTD device structure
 734  * @param new_state     the state which is requested
 735  *
 736  * Get the device and lock it for exclusive access
 737  */
 738 static int onenand_get_device(struct mtd_info *mtd, int new_state)
 739 {
 740         struct onenand_chip *this = mtd->priv;
 741         DECLARE_WAITQUEUE(wait, current);
 742
 743         /*
 744          * Grab the lock and see if the device is available
 745          */
 746         while (1) {
 747                 spin_lock(&this->chip_lock);
 748                 if (this->state == FL_READY) {
 749                         this->state = new_state;
 750                         spin_unlock(&this->chip_lock);
 751                         break;
 752                 }
 753                 if (new_state == FL_PM_SUSPENDED) {
 754                         spin_unlock(&this->chip_lock);
 755                         return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
 756                 }
 757                 set_current_state(TASK_UNINTERRUPTIBLE);
 758                 add_wait_queue(&this->wq, &wait);
 759                 spin_unlock(&this->chip_lock);
 760                 schedule();
 761                 remove_wait_queue(&this->wq, &wait);
 762         }
 763
 764         return 0;
 765 }
 766
 767 /**
 768  * onenand_release_device - [GENERIC] release chip
 769  * @param mtd           MTD device structure
 770  *
 771  * Deselect, release chip lock and wake up anyone waiting on the device
 772  */
 773 static void onenand_release_device(struct mtd_info *mtd)
 774 {
 775         struct onenand_chip *this = mtd->priv;
 776
 777         /* Release the chip */
 778         spin_lock(&this->chip_lock);
 779         this->state = FL_READY;
 780         wake_up(&this->wq);
 781         spin_unlock(&this->chip_lock);
 782 }
 783
 784 /**
 785  * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
 786  * @param mtd           MTD device structure
 787  * @param buf           destination address
 788  * @param column        oob offset to read from
 789  * @param thislen       oob length to read
 790  */
 791 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
 792                                 int thislen)
 793 {
 794         struct onenand_chip *this = mtd->priv;
 795         struct nand_oobfree *free;
 796         int readcol = column;
 797         int readend = column + thislen;
 798         int lastgap = 0;
 799         unsigned int i;
 800         uint8_t *oob_buf = this->oob_buf;
 801
 802         free = this->ecclayout->oobfree;
 803         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
 804                 if (readcol >= lastgap)
 805                         readcol += free->offset - lastgap;
 806                 if (readend >= lastgap)
 807                         readend += free->offset - lastgap;
 808                 lastgap = free->offset + free->length;
 809         }
 810         this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
 811         free = this->ecclayout->oobfree;
 812         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
 813                 int free_end = free->offset + free->length;
 814                 if (free->offset < readend && free_end > readcol) {
 815                         int st = max_t(int,free->offset,readcol);
 816                         int ed = min_t(int,free_end,readend);
 817                         int n = ed - st;
 818                         memcpy(buf, oob_buf + st, n);
 819                         buf += n;
 820                 } else if (column == 0)
 821                         break;
 822         }
 823         return 0;
 824 }
 825
 826 /**
 827  * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
 828  * @param mtd           MTD device structure
 829  * @param from          offset to read from
 830  * @param ops:          oob operation description structure
 831  *
 832  * OneNAND read main and/or out-of-band data
 833  */
 834 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
 835                                 struct mtd_oob_ops *ops)
 836 {
 837         struct onenand_chip *this = mtd->priv;
 838         struct mtd_ecc_stats stats;
 839         size_t len = ops->len;
 840         size_t ooblen = ops->ooblen;
 841         u_char *buf = ops->datbuf;
 842         u_char *oobbuf = ops->oobbuf;
 843         int read = 0, column, thislen;
 844         int oobread = 0, oobcolumn, thisooblen, oobsize;
 845         int ret = 0, boundary = 0;
 846         int writesize = this->writesize;
 847
 848         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ops_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 849
 850         if (ops->mode == MTD_OOB_AUTO)
 851                 oobsize = this->ecclayout->oobavail;
 852         else
 853                 oobsize = mtd->oobsize;
 854
 855         oobcolumn = from & (mtd->oobsize - 1);
 856
 857         /* Do not allow reads past end of device */
 858         if ((from + len) > mtd->size) {
 859                 printk(KERN_ERR "onenand_read_ops_nolock: Attempt read beyond end of device\n");
 860                 ops->retlen = 0;
 861                 ops->oobretlen = 0;
 862                 return -EINVAL;
 863         }
 864
 865         stats = mtd->ecc_stats;
 866
 867         /* Read-while-load method */
 868
 869         /* Do first load to bufferRAM */
 870         if (read < len) {
 871                 if (!onenand_check_bufferram(mtd, from)) {
 872                         this->command(mtd, ONENAND_CMD_READ, from, writesize);
 873                         ret = this->wait(mtd, FL_READING);
 874                         onenand_update_bufferram(mtd, from, !ret);
 875                         if (ret == -EBADMSG)
 876                                 ret = 0;
 877                 }
 878         }
 879
 880         thislen = min_t(int, writesize, len - read);
 881         column = from & (writesize - 1);
 882         if (column + thislen > writesize)
 883                 thislen = writesize - column;
 884
 885         while (!ret) {
 886                 /* If there is more to load then start next load */
 887                 from += thislen;
 888                 if (read + thislen < len) {
 889                         this->command(mtd, ONENAND_CMD_READ, from, writesize);
 890                         /*
 891                          * Chip boundary handling in DDP
 892                          * Now we issued chip 1 read and pointed chip 1
 893                          * bufferam so we have to point chip 0 bufferam.
 894                          */
 895                         if (ONENAND_IS_DDP(this) &&
 896                             unlikely(from == (this->chipsize >> 1))) {
 897                                 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
 898                                 boundary = 1;
 899                         } else
 900                                 boundary = 0;
 901                         ONENAND_SET_PREV_BUFFERRAM(this);
 902                 }
 903                 /* While load is going, read from last bufferRAM */
 904                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
 905
 906                 /* Read oob area if needed */
 907                 if (oobbuf) {
 908                         thisooblen = oobsize - oobcolumn;
 909                         thisooblen = min_t(int, thisooblen, ooblen - oobread);
 910
 911                         if (ops->mode == MTD_OOB_AUTO)
 912                                 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
 913                         else
 914                                 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
 915                         oobread += thisooblen;
 916                         oobbuf += thisooblen;
 917                         oobcolumn = 0;
 918                 }
 919
 920                 /* See if we are done */
 921                 read += thislen;
 922                 if (read == len)
 923                         break;
 924                 /* Set up for next read from bufferRAM */
 925                 if (unlikely(boundary))
 926                         this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
 927                 ONENAND_SET_NEXT_BUFFERRAM(this);
 928                 buf += thislen;
 929                 thislen = min_t(int, writesize, len - read);
 930                 column = 0;
 931                 cond_resched();
 932                 /* Now wait for load */
 933                 ret = this->wait(mtd, FL_READING);
 934                 onenand_update_bufferram(mtd, from, !ret);
 935                 if (ret == -EBADMSG)
 936                         ret = 0;
 937         }
 938
 939         /*
 940          * Return success, if no ECC failures, else -EBADMSG
 941          * fs driver will take care of that, because
 942          * retlen == desired len and result == -EBADMSG
 943          */
 944         ops->retlen = read;
 945         ops->oobretlen = oobread;
 946
 947         if (ret)
 948                 return ret;
 949
 950         if (mtd->ecc_stats.failed - stats.failed)
 951                 return -EBADMSG;
 952
 953         return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
 954 }
 955
 956 /**
 957  * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
 958  * @param mtd           MTD device structure
 959  * @param from          offset to read from
 960  * @param ops:          oob operation description structure
 961  *
 962  * OneNAND read out-of-band data from the spare area
 963  */
 964 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
 965                         struct mtd_oob_ops *ops)
 966 {
 967         struct onenand_chip *this = mtd->priv;
 968         struct mtd_ecc_stats stats;
 969         int read = 0, thislen, column, oobsize;
 970         size_t len = ops->ooblen;
 971         mtd_oob_mode_t mode = ops->mode;
 972         u_char *buf = ops->oobbuf;
 973         int ret = 0;
 974
 975         from += ops->ooboffs;
 976
 977         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 978
 979         /* Initialize return length value */
 980         ops->oobretlen = 0;
 981
 982         if (mode == MTD_OOB_AUTO)
 983                 oobsize = this->ecclayout->oobavail;
 984         else
 985                 oobsize = mtd->oobsize;
 986
 987         column = from & (mtd->oobsize - 1);
 988
 989         if (unlikely(column >= oobsize)) {
 990                 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to start read outside oob\n");
 991                 return -EINVAL;
 992         }
 993
 994         /* Do not allow reads past end of device */
 995         if (unlikely(from >= mtd->size ||
 996                      column + len > ((mtd->size >> this->page_shift) -
 997                                      (from >> this->page_shift)) * oobsize)) {
 998                 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to read beyond end of device\n");
 999                 return -EINVAL;
1000         }
1001
1002         stats = mtd->ecc_stats;
1003
1004         while (read < len) {
1005                 cond_resched();
1006
1007                 thislen = oobsize - column;
1008                 thislen = min_t(int, thislen, len);
1009
1010                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1011
1012                 onenand_update_bufferram(mtd, from, 0);
1013
1014                 ret = this->wait(mtd, FL_READING);
1015                 if (ret && ret != -EBADMSG) {
1016                         printk(KERN_ERR "onenand_read_oob_nolock: read failed = 0x%x\n", ret);
1017                         break;
1018                 }
1019
1020                 if (mode == MTD_OOB_AUTO)
1021                         onenand_transfer_auto_oob(mtd, buf, column, thislen);
1022                 else
1023                         this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1024
1025                 read += thislen;
1026
1027                 if (read == len)
1028                         break;
1029
1030                 buf += thislen;
1031
1032                 /* Read more? */
1033                 if (read < len) {
1034                         /* Page size */
1035                         from += mtd->writesize;
1036                         column = 0;
1037                 }
1038         }
1039
1040         ops->oobretlen = read;
1041
1042         if (ret)
1043                 return ret;
1044
1045         if (mtd->ecc_stats.failed - stats.failed)
1046                 return -EBADMSG;
1047
1048         return 0;
1049 }
1050
1051 /**
1052  * onenand_read - [MTD Interface] Read data from flash
1053  * @param mtd           MTD device structure
1054  * @param from          offset to read from
1055  * @param len           number of bytes to read
1056  * @param retlen        pointer to variable to store the number of read bytes
1057  * @param buf           the databuffer to put data
1058  *
1059  * Read with ecc
1060 */
1061 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
1062         size_t *retlen, u_char *buf)
1063 {
1064         struct mtd_oob_ops ops = {
1065                 .len    = len,
1066                 .ooblen = 0,
1067                 .datbuf = buf,
1068                 .oobbuf = NULL,
1069         };
1070         int ret;
1071
1072         onenand_get_device(mtd, FL_READING);
1073         ret = onenand_read_ops_nolock(mtd, from, &ops);
1074         onenand_release_device(mtd);
1075
1076         *retlen = ops.retlen;
1077         return ret;
1078 }
1079
1080 /**
1081  * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
1082  * @param mtd:          MTD device structure
1083  * @param from:         offset to read from
1084  * @param ops:          oob operation description structure
1085
1086  * Read main and/or out-of-band
1087  */
1088 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1089                             struct mtd_oob_ops *ops)
1090 {
1091         int ret;
1092
1093         switch (ops->mode) {
1094         case MTD_OOB_PLACE:
1095         case MTD_OOB_AUTO:
1096                 break;
1097         case MTD_OOB_RAW:
1098                 /* Not implemented yet */
1099         default:
1100                 return -EINVAL;
1101         }
1102
1103         onenand_get_device(mtd, FL_READING);
1104         if (ops->datbuf)
1105                 ret = onenand_read_ops_nolock(mtd, from, ops);
1106         else
1107                 ret = onenand_read_oob_nolock(mtd, from, ops);
1108         onenand_release_device(mtd);
1109
1110         return ret;
1111 }
1112
1113 /**
1114  * onenand_bbt_wait - [DEFAULT] wait until the command is done
1115  * @param mtd           MTD device structure
1116  * @param state         state to select the max. timeout value
1117  *
1118  * Wait for command done.
1119  */
1120 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1121 {
1122         struct onenand_chip *this = mtd->priv;
1123         unsigned long timeout;
1124         unsigned int interrupt;
1125         unsigned int ctrl;
1126
1127         /* The 20 msec is enough */
1128         timeout = jiffies + msecs_to_jiffies(20);
1129         while (time_before(jiffies, timeout)) {
1130                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1131                 if (interrupt & ONENAND_INT_MASTER)
1132                         break;
1133         }
1134         /* To get correct interrupt status in timeout case */
1135         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1136         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1137
1138         /* Initial bad block case: 0x2400 or 0x0400 */
1139         if (ctrl & ONENAND_CTRL_ERROR) {
1140                 printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
1141                 return ONENAND_BBT_READ_ERROR;
1142         }
1143
1144         if (interrupt & ONENAND_INT_READ) {
1145                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
1146                 if (ecc & ONENAND_ECC_2BIT_ALL)
1147                         return ONENAND_BBT_READ_ERROR;
1148         } else {
1149                 printk(KERN_ERR "onenand_bbt_wait: read timeout!"
1150                         "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
1151                 return ONENAND_BBT_READ_FATAL_ERROR;
1152         }
1153
1154         return 0;
1155 }
1156
1157 /**
1158  * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1159  * @param mtd           MTD device structure
1160  * @param from          offset to read from
1161  * @param ops           oob operation description structure
1162  *
1163  * OneNAND read out-of-band data from the spare area for bbt scan
1164  */
1165 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1166                             struct mtd_oob_ops *ops)
1167 {
1168         struct onenand_chip *this = mtd->priv;
1169         int read = 0, thislen, column;
1170         int ret = 0;
1171         size_t len = ops->ooblen;
1172         u_char *buf = ops->oobbuf;
1173
1174         DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
1175
1176         /* Initialize return value */
1177         ops->oobretlen = 0;
1178
1179         /* Do not allow reads past end of device */
1180         if (unlikely((from + len) > mtd->size)) {
1181                 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
1182                 return ONENAND_BBT_READ_FATAL_ERROR;
1183         }
1184
1185         /* Grab the lock and see if the device is available */
1186         onenand_get_device(mtd, FL_READING);
1187
1188         column = from & (mtd->oobsize - 1);
1189
1190         while (read < len) {
1191                 cond_resched();
1192
1193                 thislen = mtd->oobsize - column;
1194                 thislen = min_t(int, thislen, len);
1195
1196                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1197
1198                 onenand_update_bufferram(mtd, from, 0);
1199
1200                 ret = onenand_bbt_wait(mtd, FL_READING);
1201                 if (ret)
1202                         break;
1203
1204                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1205                 read += thislen;
1206                 if (read == len)
1207                         break;
1208
1209                 buf += thislen;
1210
1211                 /* Read more? */
1212                 if (read < len) {
1213                         /* Update Page size */
1214                         from += this->writesize;
1215                         column = 0;
1216                 }
1217         }
1218
1219         /* Deselect and wake up anyone waiting on the device */
1220         onenand_release_device(mtd);
1221
1222         ops->oobretlen = read;
1223         return ret;
1224 }
1225
1226 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1227 /**
1228  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1229  * @param mtd           MTD device structure
1230  * @param buf           the databuffer to verify
1231  * @param to            offset to read from
1232  */
1233 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1234 {
1235         struct onenand_chip *this = mtd->priv;
1236         u_char *oob_buf = this->oob_buf;
1237         int status, i;
1238
1239         this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
1240         onenand_update_bufferram(mtd, to, 0);
1241         status = this->wait(mtd, FL_READING);
1242         if (status)
1243                 return status;
1244
1245         this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
1246         for (i = 0; i < mtd->oobsize; i++)
1247                 if (buf[i] != 0xFF && buf[i] != oob_buf[i])
1248                         return -EBADMSG;
1249
1250         return 0;
1251 }
1252
1253 /**
1254  * onenand_verify - [GENERIC] verify the chip contents after a write
1255  * @param mtd          MTD device structure
1256  * @param buf          the databuffer to verify
1257  * @param addr         offset to read from
1258  * @param len          number of bytes to read and compare
1259  */
1260 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1261 {
1262         struct onenand_chip *this = mtd->priv;
1263         void __iomem *dataram;
1264         int ret = 0;
1265         int thislen, column;
1266
1267         while (len != 0) {
1268                 thislen = min_t(int, this->writesize, len);
1269                 column = addr & (this->writesize - 1);
1270                 if (column + thislen > this->writesize)
1271                         thislen = this->writesize - column;
1272
1273                 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1274
1275                 onenand_update_bufferram(mtd, addr, 0);
1276
1277                 ret = this->wait(mtd, FL_READING);
1278                 if (ret)
1279                         return ret;
1280
1281                 onenand_update_bufferram(mtd, addr, 1);
1282
1283                 dataram = this->base + ONENAND_DATARAM;
1284                 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1285
1286                 if (memcmp(buf, dataram + column, thislen))
1287                         return -EBADMSG;
1288
1289                 len -= thislen;
1290                 buf += thislen;
1291                 addr += thislen;
1292         }
1293
1294         return 0;
1295 }
1296 #else
1297 #define onenand_verify(...)             (0)
1298 #define onenand_verify_oob(...)         (0)
1299 #endif
1300
1301 #define NOTALIGNED(x)   ((x & (this->subpagesize - 1)) != 0)
1302
1303 static void onenand_panic_wait(struct mtd_info *mtd)
1304 {
1305         struct onenand_chip *this = mtd->priv;
1306         unsigned int interrupt;
1307         int i;
1308
1309         for (i = 0; i < 2000; i++) {
1310                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1311                 if (interrupt & ONENAND_INT_MASTER)
1312                         break;
1313                 udelay(10);
1314         }
1315 }
1316
1317 /**
1318  * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context
1319  * @param mtd           MTD device structure
1320  * @param to            offset to write to
1321  * @param len           number of bytes to write
1322  * @param retlen        pointer to variable to store the number of written bytes
1323  * @param buf           the data to write
1324  *
1325  * Write with ECC
1326  */
1327 static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
1328                          size_t *retlen, const u_char *buf)
1329 {
1330         struct onenand_chip *this = mtd->priv;
1331         int column, subpage;
1332         int written = 0;
1333         int ret = 0;
1334
1335         if (this->state == FL_PM_SUSPENDED)
1336                 return -EBUSY;
1337
1338         /* Wait for any existing operation to clear */
1339         onenand_panic_wait(mtd);
1340
1341         DEBUG(MTD_DEBUG_LEVEL3, "onenand_panic_write: to = 0x%08x, len = %i\n",
1342               (unsigned int) to, (int) len);
1343
1344         /* Initialize retlen, in case of early exit */
1345         *retlen = 0;
1346
1347         /* Do not allow writes past end of device */
1348         if (unlikely((to + len) > mtd->size)) {
1349                 printk(KERN_ERR "onenand_panic_write: Attempt write to past end of device\n");
1350                 return -EINVAL;
1351         }
1352
1353         /* Reject writes, which are not page aligned */
1354         if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1355                 printk(KERN_ERR "onenand_panic_write: Attempt to write not page aligned data\n");
1356                 return -EINVAL;
1357         }
1358
1359         column = to & (mtd->writesize - 1);
1360
1361         /* Loop until all data write */
1362         while (written < len) {
1363                 int thislen = min_t(int, mtd->writesize - column, len - written);
1364                 u_char *wbuf = (u_char *) buf;
1365
1366                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1367
1368                 /* Partial page write */
1369                 subpage = thislen < mtd->writesize;
1370                 if (subpage) {
1371                         memset(this->page_buf, 0xff, mtd->writesize);
1372                         memcpy(this->page_buf + column, buf, thislen);
1373                         wbuf = this->page_buf;
1374                 }
1375
1376                 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1377                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1378
1379                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1380
1381                 onenand_panic_wait(mtd);
1382
1383                 /* In partial page write we don't update bufferram */
1384                 onenand_update_bufferram(mtd, to, !ret && !subpage);
1385                 if (ONENAND_IS_2PLANE(this)) {
1386                         ONENAND_SET_BUFFERRAM1(this);
1387                         onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1388                 }
1389
1390                 if (ret) {
1391                         printk(KERN_ERR "onenand_panic_write: write failed %d\n", ret);
1392                         break;
1393                 }
1394
1395                 written += thislen;
1396
1397                 if (written == len)
1398                         break;
1399
1400                 column = 0;
1401                 to += thislen;
1402                 buf += thislen;
1403         }
1404
1405         *retlen = written;
1406         return ret;
1407 }
1408
1409 /**
1410  * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1411  * @param mtd           MTD device structure
1412  * @param oob_buf       oob buffer
1413  * @param buf           source address
1414  * @param column        oob offset to write to
1415  * @param thislen       oob length to write
1416  */
1417 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1418                                   const u_char *buf, int column, int thislen)
1419 {
1420         struct onenand_chip *this = mtd->priv;
1421         struct nand_oobfree *free;
1422         int writecol = column;
1423         int writeend = column + thislen;
1424         int lastgap = 0;
1425         unsigned int i;
1426
1427         free = this->ecclayout->oobfree;
1428         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1429                 if (writecol >= lastgap)
1430                         writecol += free->offset - lastgap;
1431                 if (writeend >= lastgap)
1432                         writeend += free->offset - lastgap;
1433                 lastgap = free->offset + free->length;
1434         }
1435         free = this->ecclayout->oobfree;
1436         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1437                 int free_end = free->offset + free->length;
1438                 if (free->offset < writeend && free_end > writecol) {
1439                         int st = max_t(int,free->offset,writecol);
1440                         int ed = min_t(int,free_end,writeend);
1441                         int n = ed - st;
1442                         memcpy(oob_buf + st, buf, n);
1443                         buf += n;
1444                 } else if (column == 0)
1445                         break;
1446         }
1447         return 0;
1448 }
1449
1450 /**
1451  * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
1452  * @param mtd           MTD device structure
1453  * @param to            offset to write to
1454  * @param ops           oob operation description structure
1455  *
1456  * Write main and/or oob with ECC
1457  */
1458 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1459                                 struct mtd_oob_ops *ops)
1460 {
1461         struct onenand_chip *this = mtd->priv;
1462         int written = 0, column, thislen, subpage;
1463         int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1464         size_t len = ops->len;
1465         size_t ooblen = ops->ooblen;
1466         const u_char *buf = ops->datbuf;
1467         const u_char *oob = ops->oobbuf;
1468         u_char *oobbuf;
1469         int ret = 0;
1470
1471         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ops_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1472
1473         /* Initialize retlen, in case of early exit */
1474         ops->retlen = 0;
1475         ops->oobretlen = 0;
1476
1477         /* Do not allow writes past end of device */
1478         if (unlikely((to + len) > mtd->size)) {
1479                 printk(KERN_ERR "onenand_write_ops_nolock: Attempt write to past end of device\n");
1480                 return -EINVAL;
1481         }
1482
1483         /* Reject writes, which are not page aligned */
1484         if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1485                 printk(KERN_ERR "onenand_write_ops_nolock: Attempt to write not page aligned data\n");
1486                 return -EINVAL;
1487         }
1488
1489         if (ops->mode == MTD_OOB_AUTO)
1490                 oobsize = this->ecclayout->oobavail;
1491         else
1492                 oobsize = mtd->oobsize;
1493
1494         oobcolumn = to & (mtd->oobsize - 1);
1495
1496         column = to & (mtd->writesize - 1);
1497
1498         /* Loop until all data write */
1499         while (written < len) {
1500                 u_char *wbuf = (u_char *) buf;
1501
1502                 thislen = min_t(int, mtd->writesize - column, len - written);
1503                 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
1504
1505                 cond_resched();
1506
1507                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1508
1509                 /* Partial page write */
1510                 subpage = thislen < mtd->writesize;
1511                 if (subpage) {
1512                         memset(this->page_buf, 0xff, mtd->writesize);
1513                         memcpy(this->page_buf + column, buf, thislen);
1514                         wbuf = this->page_buf;
1515                 }
1516
1517                 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1518
1519                 if (oob) {
1520                         oobbuf = this->oob_buf;
1521
1522                         /* We send data to spare ram with oobsize
1523                          * to prevent byte access */
1524                         memset(oobbuf, 0xff, mtd->oobsize);
1525                         if (ops->mode == MTD_OOB_AUTO)
1526                                 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1527                         else
1528                                 memcpy(oobbuf + oobcolumn, oob, thisooblen);
1529
1530                         oobwritten += thisooblen;
1531                         oob += thisooblen;
1532                         oobcolumn = 0;
1533                 } else
1534                         oobbuf = (u_char *) ffchars;
1535
1536                 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1537
1538                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1539
1540                 ret = this->wait(mtd, FL_WRITING);
1541
1542                 /* In partial page write we don't update bufferram */
1543                 onenand_update_bufferram(mtd, to, !ret && !subpage);
1544                 if (ONENAND_IS_2PLANE(this)) {
1545                         ONENAND_SET_BUFFERRAM1(this);
1546                         onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1547                 }
1548
1549                 if (ret) {
1550                         printk(KERN_ERR "onenand_write_ops_nolock: write filaed %d\n", ret);
1551                         break;
1552                 }
1553
1554                 /* Only check verify write turn on */
1555                 ret = onenand_verify(mtd, buf, to, thislen);
1556                 if (ret) {
1557                         printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret);
1558                         break;
1559                 }
1560
1561                 written += thislen;
1562
1563                 if (written == len)
1564                         break;
1565
1566                 column = 0;
1567                 to += thislen;
1568                 buf += thislen;
1569         }
1570
1571         ops->retlen = written;
1572
1573         return ret;
1574 }
1575
1576
1577 /**
1578  * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band
1579  * @param mtd           MTD device structure
1580  * @param to            offset to write to
1581  * @param len           number of bytes to write
1582  * @param retlen        pointer to variable to store the number of written bytes
1583  * @param buf           the data to write
1584  * @param mode          operation mode
1585  *
1586  * OneNAND write out-of-band
1587  */
1588 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
1589                                     struct mtd_oob_ops *ops)
1590 {
1591         struct onenand_chip *this = mtd->priv;
1592         int column, ret = 0, oobsize;
1593         int written = 0;
1594         u_char *oobbuf;
1595         size_t len = ops->ooblen;
1596         const u_char *buf = ops->oobbuf;
1597         mtd_oob_mode_t mode = ops->mode;
1598
1599         to += ops->ooboffs;
1600
1601         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1602
1603         /* Initialize retlen, in case of early exit */
1604         ops->oobretlen = 0;
1605
1606         if (mode == MTD_OOB_AUTO)
1607                 oobsize = this->ecclayout->oobavail;
1608         else
1609                 oobsize = mtd->oobsize;
1610
1611         column = to & (mtd->oobsize - 1);
1612
1613         if (unlikely(column >= oobsize)) {
1614                 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to start write outside oob\n");
1615                 return -EINVAL;
1616         }
1617
1618         /* For compatibility with NAND: Do not allow write past end of page */
1619         if (unlikely(column + len > oobsize)) {
1620                 printk(KERN_ERR "onenand_write_oob_nolock: "
1621                       "Attempt to write past end of page\n");
1622                 return -EINVAL;
1623         }
1624
1625         /* Do not allow reads past end of device */
1626         if (unlikely(to >= mtd->size ||
1627                      column + len > ((mtd->size >> this->page_shift) -
1628                                      (to >> this->page_shift)) * oobsize)) {
1629                 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to write past end of device\n");
1630                 return -EINVAL;
1631         }
1632
1633         oobbuf = this->oob_buf;
1634
1635         /* Loop until all data write */
1636         while (written < len) {
1637                 int thislen = min_t(int, oobsize, len - written);
1638
1639                 cond_resched();
1640
1641                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1642
1643                 /* We send data to spare ram with oobsize
1644                  * to prevent byte access */
1645                 memset(oobbuf, 0xff, mtd->oobsize);
1646                 if (mode == MTD_OOB_AUTO)
1647                         onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
1648                 else
1649                         memcpy(oobbuf + column, buf, thislen);
1650                 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1651
1652                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1653
1654                 onenand_update_bufferram(mtd, to, 0);
1655                 if (ONENAND_IS_2PLANE(this)) {
1656                         ONENAND_SET_BUFFERRAM1(this);
1657                         onenand_update_bufferram(mtd, to + this->writesize, 0);
1658                 }
1659
1660                 ret = this->wait(mtd, FL_WRITING);
1661                 if (ret) {
1662                         printk(KERN_ERR "onenand_write_oob_nolock: write failed %d\n", ret);
1663                         break;
1664                 }
1665
1666                 ret = onenand_verify_oob(mtd, oobbuf, to);
1667                 if (ret) {
1668                         printk(KERN_ERR "onenand_write_oob_nolock: verify failed %d\n", ret);
1669                         break;
1670                 }
1671
1672                 written += thislen;
1673                 if (written == len)
1674                         break;
1675
1676                 to += mtd->writesize;
1677                 buf += thislen;
1678                 column = 0;
1679         }
1680
1681         ops->oobretlen = written;
1682
1683         return ret;
1684 }
1685
1686 /**
1687  * onenand_write - [MTD Interface] write buffer to FLASH
1688  * @param mtd           MTD device structure
1689  * @param to            offset to write to
1690  * @param len           number of bytes to write
1691  * @param retlen        pointer to variable to store the number of written bytes
1692  * @param buf           the data to write
1693  *
1694  * Write with ECC
1695  */
1696 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1697         size_t *retlen, const u_char *buf)
1698 {
1699         struct mtd_oob_ops ops = {
1700                 .len    = len,
1701                 .ooblen = 0,
1702                 .datbuf = (u_char *) buf,
1703                 .oobbuf = NULL,
1704         };
1705         int ret;
1706
1707         onenand_get_device(mtd, FL_WRITING);
1708         ret = onenand_write_ops_nolock(mtd, to, &ops);
1709         onenand_release_device(mtd);
1710
1711         *retlen = ops.retlen;
1712         return ret;
1713 }
1714
1715 /**
1716  * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1717  * @param mtd:          MTD device structure
1718  * @param to:           offset to write
1719  * @param ops:          oob operation description structure
1720  */
1721 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1722                              struct mtd_oob_ops *ops)
1723 {
1724         int ret;
1725
1726         switch (ops->mode) {
1727         case MTD_OOB_PLACE:
1728         case MTD_OOB_AUTO:
1729                 break;
1730         case MTD_OOB_RAW:
1731                 /* Not implemented yet */
1732         default:
1733                 return -EINVAL;
1734         }
1735
1736         onenand_get_device(mtd, FL_WRITING);
1737         if (ops->datbuf)
1738                 ret = onenand_write_ops_nolock(mtd, to, ops);
1739         else
1740                 ret = onenand_write_oob_nolock(mtd, to, ops);
1741         onenand_release_device(mtd);
1742
1743         return ret;
1744 }
1745
1746 /**
1747  * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
1748  * @param mtd           MTD device structure
1749  * @param ofs           offset from device start
1750  * @param allowbbt      1, if its allowed to access the bbt area
1751  *
1752  * Check, if the block is bad. Either by reading the bad block table or
1753  * calling of the scan function.
1754  */
1755 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
1756 {
1757         struct onenand_chip *this = mtd->priv;
1758         struct bbm_info *bbm = this->bbm;
1759
1760         /* Return info from the table */
1761         return bbm->isbad_bbt(mtd, ofs, allowbbt);
1762 }
1763
1764 /**
1765  * onenand_erase - [MTD Interface] erase block(s)
1766  * @param mtd           MTD device structure
1767  * @param instr         erase instruction
1768  *
1769  * Erase one ore more blocks
1770  */
1771 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1772 {
1773         struct onenand_chip *this = mtd->priv;
1774         unsigned int block_size;
1775         loff_t addr;
1776         int len;
1777         int ret = 0;
1778
1779         DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1780
1781         block_size = (1 << this->erase_shift);
1782
1783         /* Start address must align on block boundary */
1784         if (unlikely(instr->addr & (block_size - 1))) {
1785                 printk(KERN_ERR "onenand_erase: Unaligned address\n");
1786                 return -EINVAL;
1787         }
1788
1789         /* Length must align on block boundary */
1790         if (unlikely(instr->len & (block_size - 1))) {
1791                 printk(KERN_ERR "onenand_erase: Length not block aligned\n");
1792                 return -EINVAL;
1793         }
1794
1795         /* Do not allow erase past end of device */
1796         if (unlikely((instr->len + instr->addr) > mtd->size)) {
1797                 printk(KERN_ERR "onenand_erase: Erase past end of device\n");
1798                 return -EINVAL;
1799         }
1800
1801         instr->fail_addr = 0xffffffff;
1802
1803         /* Grab the lock and see if the device is available */
1804         onenand_get_device(mtd, FL_ERASING);
1805
1806         /* Loop throught the pages */
1807         len = instr->len;
1808         addr = instr->addr;
1809
1810         instr->state = MTD_ERASING;
1811
1812         while (len) {
1813                 cond_resched();
1814
1815                 /* Check if we have a bad block, we do not erase bad blocks */
1816                 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
1817                         printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1818                         instr->state = MTD_ERASE_FAILED;
1819                         goto erase_exit;
1820                 }
1821
1822                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1823
1824                 onenand_invalidate_bufferram(mtd, addr, block_size);
1825
1826                 ret = this->wait(mtd, FL_ERASING);
1827                 /* Check, if it is write protected */
1828                 if (ret) {
1829                         printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1830                         instr->state = MTD_ERASE_FAILED;
1831                         instr->fail_addr = addr;
1832                         goto erase_exit;
1833                 }
1834
1835                 len -= block_size;
1836                 addr += block_size;
1837         }
1838
1839         instr->state = MTD_ERASE_DONE;
1840
1841 erase_exit:
1842
1843         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1844
1845         /* Deselect and wake up anyone waiting on the device */
1846         onenand_release_device(mtd);
1847
1848         /* Do call back function */
1849         if (!ret)
1850                 mtd_erase_callback(instr);
1851
1852         return ret;
1853 }
1854
1855 /**
1856  * onenand_sync - [MTD Interface] sync
1857  * @param mtd           MTD device structure
1858  *
1859  * Sync is actually a wait for chip ready function
1860  */
1861 static void onenand_sync(struct mtd_info *mtd)
1862 {
1863         DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1864
1865         /* Grab the lock and see if the device is available */
1866         onenand_get_device(mtd, FL_SYNCING);
1867
1868         /* Release it and go back */
1869         onenand_release_device(mtd);
1870 }
1871
1872 /**
1873  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1874  * @param mtd           MTD device structure
1875  * @param ofs           offset relative to mtd start
1876  *
1877  * Check whether the block is bad
1878  */
1879 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1880 {
1881         int ret;
1882
1883         /* Check for invalid offset */
1884         if (ofs > mtd->size)
1885                 return -EINVAL;
1886
1887         onenand_get_device(mtd, FL_READING);
1888         ret = onenand_block_isbad_nolock(mtd, ofs, 0);
1889         onenand_release_device(mtd);
1890         return ret;
1891 }
1892
1893 /**
1894  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1895  * @param mtd           MTD device structure
1896  * @param ofs           offset from device start
1897  *
1898  * This is the default implementation, which can be overridden by
1899  * a hardware specific driver.
1900  */
1901 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1902 {
1903         struct onenand_chip *this = mtd->priv;
1904         struct bbm_info *bbm = this->bbm;
1905         u_char buf[2] = {0, 0};
1906         struct mtd_oob_ops ops = {
1907                 .mode = MTD_OOB_PLACE,
1908                 .ooblen = 2,
1909                 .oobbuf = buf,
1910                 .ooboffs = 0,
1911         };
1912         int block;
1913
1914         /* Get block number */
1915         block = ((int) ofs) >> bbm->bbt_erase_shift;
1916         if (bbm->bbt)
1917                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1918
1919         /* We write two bytes, so we dont have to mess with 16 bit access */
1920         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1921         return onenand_write_oob_nolock(mtd, ofs, &ops);
1922 }
1923
1924 /**
1925  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1926  * @param mtd           MTD device structure
1927  * @param ofs           offset relative to mtd start
1928  *
1929  * Mark the block as bad
1930  */
1931 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1932 {
1933         struct onenand_chip *this = mtd->priv;
1934         int ret;
1935
1936         ret = onenand_block_isbad(mtd, ofs);
1937         if (ret) {
1938                 /* If it was bad already, return success and do nothing */
1939                 if (ret > 0)
1940                         return 0;
1941                 return ret;
1942         }
1943
1944         onenand_get_device(mtd, FL_WRITING);
1945         ret = this->block_markbad(mtd, ofs);
1946         onenand_release_device(mtd);
1947         return ret;
1948 }
1949
1950 /**
1951  * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1952  * @param mtd           MTD device structure
1953  * @param ofs           offset relative to mtd start
1954  * @param len           number of bytes to lock or unlock
1955  * @param cmd           lock or unlock command
1956  *
1957  * Lock or unlock one or more blocks
1958  */
1959 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1960 {
1961         struct onenand_chip *this = mtd->priv;
1962         int start, end, block, value, status;
1963         int wp_status_mask;
1964
1965         start = ofs >> this->erase_shift;
1966         end = len >> this->erase_shift;
1967
1968         if (cmd == ONENAND_CMD_LOCK)
1969                 wp_status_mask = ONENAND_WP_LS;
1970         else
1971                 wp_status_mask = ONENAND_WP_US;
1972
1973         /* Continuous lock scheme */
1974         if (this->options & ONENAND_HAS_CONT_LOCK) {
1975                 /* Set start block address */
1976                 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1977                 /* Set end block address */
1978                 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1979                 /* Write lock command */
1980                 this->command(mtd, cmd, 0, 0);
1981
1982                 /* There's no return value */
1983                 this->wait(mtd, FL_LOCKING);
1984
1985                 /* Sanity check */
1986                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1987                     & ONENAND_CTRL_ONGO)
1988                         continue;
1989
1990                 /* Check lock status */
1991                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1992                 if (!(status & wp_status_mask))
1993                         printk(KERN_ERR "wp status = 0x%x\n", status);
1994
1995                 return 0;
1996         }
1997
1998         /* Block lock scheme */
1999         for (block = start; block < start + end; block++) {
2000                 /* Set block address */
2001                 value = onenand_block_address(this, block);
2002                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2003                 /* Select DataRAM for DDP */
2004                 value = onenand_bufferram_address(this, block);
2005                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2006                 /* Set start block address */
2007                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2008                 /* Write lock command */
2009                 this->command(mtd, cmd, 0, 0);
2010
2011                 /* There's no return value */
2012                 this->wait(mtd, FL_LOCKING);
2013
2014                 /* Sanity check */
2015                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2016                     & ONENAND_CTRL_ONGO)
2017                         continue;
2018
2019                 /* Check lock status */
2020                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2021                 if (!(status & wp_status_mask))
2022                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
2023         }
2024
2025         return 0;
2026 }
2027
2028 /**
2029  * onenand_lock - [MTD Interface] Lock block(s)
2030  * @param mtd           MTD device structure
2031  * @param ofs           offset relative to mtd start
2032  * @param len           number of bytes to unlock
2033  *
2034  * Lock one or more blocks
2035  */
2036 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
2037 {
2038         int ret;
2039
2040         onenand_get_device(mtd, FL_LOCKING);
2041         ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
2042         onenand_release_device(mtd);
2043         return ret;
2044 }
2045
2046 /**
2047  * onenand_unlock - [MTD Interface] Unlock block(s)
2048  * @param mtd           MTD device structure
2049  * @param ofs           offset relative to mtd start
2050  * @param len           number of bytes to unlock
2051  *
2052  * Unlock one or more blocks
2053  */
2054 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
2055 {
2056         int ret;
2057
2058         onenand_get_device(mtd, FL_LOCKING);
2059         ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2060         onenand_release_device(mtd);
2061         return ret;
2062 }
2063
2064 /**
2065  * onenand_check_lock_status - [OneNAND Interface] Check lock status
2066  * @param this          onenand chip data structure
2067  *
2068  * Check lock status
2069  */
2070 static int onenand_check_lock_status(struct onenand_chip *this)
2071 {
2072         unsigned int value, block, status;
2073         unsigned int end;
2074
2075         end = this->chipsize >> this->erase_shift;
2076         for (block = 0; block < end; block++) {
2077                 /* Set block address */
2078                 value = onenand_block_address(this, block);
2079                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2080                 /* Select DataRAM for DDP */
2081                 value = onenand_bufferram_address(this, block);
2082                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2083                 /* Set start block address */
2084                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2085
2086                 /* Check lock status */
2087                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2088                 if (!(status & ONENAND_WP_US)) {
2089                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
2090                         return 0;
2091                 }
2092         }
2093
2094         return 1;
2095 }
2096
2097 /**
2098  * onenand_unlock_all - [OneNAND Interface] unlock all blocks
2099  * @param mtd           MTD device structure
2100  *
2101  * Unlock all blocks
2102  */
2103 static void onenand_unlock_all(struct mtd_info *mtd)
2104 {
2105         struct onenand_chip *this = mtd->priv;
2106         loff_t ofs = 0;
2107         size_t len = this->chipsize;
2108
2109         if (this->options & ONENAND_HAS_UNLOCK_ALL) {
2110                 /* Set start block address */
2111                 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2112                 /* Write unlock command */
2113                 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
2114
2115                 /* There's no return value */
2116                 this->wait(mtd, FL_LOCKING);
2117
2118                 /* Sanity check */
2119                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2120                     & ONENAND_CTRL_ONGO)
2121                         continue;
2122
2123                 /* Check lock status */
2124                 if (onenand_check_lock_status(this))
2125                         return;
2126
2127                 /* Workaround for all block unlock in DDP */
2128                 if (ONENAND_IS_DDP(this)) {
2129                         /* All blocks on another chip */
2130                         ofs = this->chipsize >> 1;
2131                         len = this->chipsize >> 1;
2132                 }
2133         }
2134
2135         onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2136 }
2137
2138 #ifdef CONFIG_MTD_ONENAND_OTP
2139
2140 /* Interal OTP operation */
2141 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
2142                 size_t *retlen, u_char *buf);
2143
2144 /**
2145  * do_otp_read - [DEFAULT] Read OTP block area
2146  * @param mtd           MTD device structure
2147  * @param from          The offset to read
2148  * @param len           number of bytes to read
2149  * @param retlen        pointer to variable to store the number of readbytes
2150  * @param buf           the databuffer to put/get data
2151  *
2152  * Read OTP block area.
2153  */
2154 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
2155                 size_t *retlen, u_char *buf)
2156 {
2157         struct onenand_chip *this = mtd->priv;
2158         struct mtd_oob_ops ops = {
2159                 .len    = len,
2160                 .ooblen = 0,
2161                 .datbuf = buf,
2162                 .oobbuf = NULL,
2163         };
2164         int ret;
2165
2166         /* Enter OTP access mode */
2167         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2168         this->wait(mtd, FL_OTPING);
2169
2170         ret = onenand_read_ops_nolock(mtd, from, &ops);
2171
2172         /* Exit OTP access mode */
2173         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2174         this->wait(mtd, FL_RESETING);
2175
2176         return ret;
2177 }
2178
2179 /**
2180  * do_otp_write - [DEFAULT] Write OTP block area
2181  * @param mtd           MTD device structure
2182  * @param to            The offset to write
2183  * @param len           number of bytes to write
2184  * @param retlen        pointer to variable to store the number of write bytes
2185  * @param buf           the databuffer to put/get data
2186  *
2187  * Write OTP block area.
2188  */
2189 static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
2190                 size_t *retlen, u_char *buf)
2191 {
2192         struct onenand_chip *this = mtd->priv;
2193         unsigned char *pbuf = buf;
2194         int ret;
2195         struct mtd_oob_ops ops;
2196
2197         /* Force buffer page aligned */
2198         if (len < mtd->writesize) {
2199                 memcpy(this->page_buf, buf, len);
2200                 memset(this->page_buf + len, 0xff, mtd->writesize - len);
2201                 pbuf = this->page_buf;
2202                 len = mtd->writesize;
2203         }
2204
2205         /* Enter OTP access mode */
2206         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2207         this->wait(mtd, FL_OTPING);
2208
2209         ops.len = len;
2210         ops.ooblen = 0;
2211         ops.datbuf = pbuf;
2212         ops.oobbuf = NULL;
2213         ret = onenand_write_ops_nolock(mtd, to, &ops);
2214         *retlen = ops.retlen;
2215
2216         /* Exit OTP access mode */
2217         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2218         this->wait(mtd, FL_RESETING);
2219
2220         return ret;
2221 }
2222
2223 /**
2224  * do_otp_lock - [DEFAULT] Lock OTP block area
2225  * @param mtd           MTD device structure
2226  * @param from          The offset to lock
2227  * @param len           number of bytes to lock
2228  * @param retlen        pointer to variable to store the number of lock bytes
2229  * @param buf           the databuffer to put/get data
2230  *
2231  * Lock OTP block area.
2232  */
2233 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
2234                 size_t *retlen, u_char *buf)
2235 {
2236         struct onenand_chip *this = mtd->priv;
2237         struct mtd_oob_ops ops = {
2238                 .mode = MTD_OOB_PLACE,
2239                 .ooblen = len,
2240                 .oobbuf = buf,
2241                 .ooboffs = 0,
2242         };
2243         int ret;
2244
2245         /* Enter OTP access mode */
2246         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2247         this->wait(mtd, FL_OTPING);
2248
2249         ret = onenand_write_oob_nolock(mtd, from, &ops);
2250
2251         *retlen = ops.oobretlen;
2252
2253         /* Exit OTP access mode */
2254         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2255         this->wait(mtd, FL_RESETING);
2256
2257         return ret;
2258 }
2259
2260 /**
2261  * onenand_otp_walk - [DEFAULT] Handle OTP operation
2262  * @param mtd           MTD device structure
2263  * @param from          The offset to read/write
2264  * @param len           number of bytes to read/write
2265  * @param retlen        pointer to variable to store the number of read bytes
2266  * @param buf           the databuffer to put/get data
2267  * @param action        do given action
2268  * @param mode          specify user and factory
2269  *
2270  * Handle OTP operation.
2271  */
2272 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
2273                         size_t *retlen, u_char *buf,
2274                         otp_op_t action, int mode)
2275 {
2276         struct onenand_chip *this = mtd->priv;
2277         int otp_pages;
2278         int density;
2279         int ret = 0;
2280
2281         *retlen = 0;
2282
2283         density = onenand_get_density(this->device_id);
2284         if (density < ONENAND_DEVICE_DENSITY_512Mb)
2285                 otp_pages = 20;
2286         else
2287                 otp_pages = 10;
2288
2289         if (mode == MTD_OTP_FACTORY) {
2290                 from += mtd->writesize * otp_pages;
2291                 otp_pages = 64 - otp_pages;
2292         }
2293
2294         /* Check User/Factory boundary */
2295         if (((mtd->writesize * otp_pages) - (from + len)) < 0)
2296                 return 0;
2297
2298         onenand_get_device(mtd, FL_OTPING);
2299         while (len > 0 && otp_pages > 0) {
2300                 if (!action) {  /* OTP Info functions */
2301                         struct otp_info *otpinfo;
2302
2303                         len -= sizeof(struct otp_info);
2304                         if (len <= 0) {
2305                                 ret = -ENOSPC;
2306                                 break;
2307                         }
2308
2309                         otpinfo = (struct otp_info *) buf;
2310                         otpinfo->start = from;
2311                         otpinfo->length = mtd->writesize;
2312                         otpinfo->locked = 0;
2313
2314                         from += mtd->writesize;
2315                         buf += sizeof(struct otp_info);
2316                         *retlen += sizeof(struct otp_info);
2317                 } else {
2318                         size_t tmp_retlen;
2319                         int size = len;
2320
2321                         ret = action(mtd, from, len, &tmp_retlen, buf);
2322
2323                         buf += size;
2324                         len -= size;
2325                         *retlen += size;
2326
2327                         if (ret)
2328                                 break;
2329                 }
2330                 otp_pages--;
2331         }
2332         onenand_release_device(mtd);
2333
2334         return ret;
2335 }
2336
2337 /**
2338  * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
2339  * @param mtd           MTD device structure
2340  * @param buf           the databuffer to put/get data
2341  * @param len           number of bytes to read
2342  *
2343  * Read factory OTP info.
2344  */
2345 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
2346                         struct otp_info *buf, size_t len)
2347 {
2348         size_t retlen;
2349         int ret;
2350
2351         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
2352
2353         return ret ? : retlen;
2354 }
2355
2356 /**
2357  * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
2358  * @param mtd           MTD device structure
2359  * @param from          The offset to read
2360  * @param len           number of bytes to read
2361  * @param retlen        pointer to variable to store the number of read bytes
2362  * @param buf           the databuffer to put/get data
2363  *
2364  * Read factory OTP area.
2365  */
2366 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
2367                         size_t len, size_t *retlen, u_char *buf)
2368 {
2369         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
2370 }
2371
2372 /**
2373  * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
2374  * @param mtd           MTD device structure
2375  * @param buf           the databuffer to put/get data
2376  * @param len           number of bytes to read
2377  *
2378  * Read user OTP info.
2379  */
2380 static int onenand_get_user_prot_info(struct mtd_info *mtd,
2381                         struct otp_info *buf, size_t len)
2382 {
2383         size_t retlen;
2384         int ret;
2385
2386         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
2387
2388         return ret ? : retlen;
2389 }
2390
2391 /**
2392  * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
2393  * @param mtd           MTD device structure
2394  * @param from          The offset to read
2395  * @param len           number of bytes to read
2396  * @param retlen        pointer to variable to store the number of read bytes
2397  * @param buf           the databuffer to put/get data
2398  *
2399  * Read user OTP area.
2400  */
2401 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2402                         size_t len, size_t *retlen, u_char *buf)
2403 {
2404         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
2405 }
2406
2407 /**
2408  * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
2409  * @param mtd           MTD device structure
2410  * @param from          The offset to write
2411  * @param len           number of bytes to write
2412  * @param retlen        pointer to variable to store the number of write bytes
2413  * @param buf           the databuffer to put/get data
2414  *
2415  * Write user OTP area.
2416  */
2417 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2418                         size_t len, size_t *retlen, u_char *buf)
2419 {
2420         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
2421 }
2422
2423 /**
2424  * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
2425  * @param mtd           MTD device structure
2426  * @param from          The offset to lock
2427  * @param len           number of bytes to unlock
2428  *
2429  * Write lock mark on spare area in page 0 in OTP block
2430  */
2431 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2432                         size_t len)
2433 {
2434         struct onenand_chip *this = mtd->priv;
2435         u_char *oob_buf = this->oob_buf;
2436         size_t retlen;
2437         int ret;
2438
2439         memset(oob_buf, 0xff, mtd->oobsize);
2440         /*
2441          * Note: OTP lock operation
2442          *       OTP block : 0xXXFC
2443          *       1st block : 0xXXF3 (If chip support)
2444          *       Both      : 0xXXF0 (If chip support)
2445          */
2446         oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
2447
2448         /*
2449          * Write lock mark to 8th word of sector0 of page0 of the spare0.
2450          * We write 16 bytes spare area instead of 2 bytes.
2451          */
2452         from = 0;
2453         len = 16;
2454
2455         ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
2456
2457         return ret ? : retlen;
2458 }
2459 #endif  /* CONFIG_MTD_ONENAND_OTP */
2460
2461 /**
2462  * onenand_check_features - Check and set OneNAND features
2463  * @param mtd           MTD data structure
2464  *
2465  * Check and set OneNAND features
2466  * - lock scheme
2467  * - two plane
2468  */
2469 static void onenand_check_features(struct mtd_info *mtd)
2470 {
2471         struct onenand_chip *this = mtd->priv;
2472         unsigned int density, process;
2473
2474         /* Lock scheme depends on density and process */
2475         density = onenand_get_density(this->device_id);
2476         process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
2477
2478         /* Lock scheme */
2479         switch (density) {
2480         case ONENAND_DEVICE_DENSITY_4Gb:
2481                 this->options |= ONENAND_HAS_2PLANE;
2482
2483         case ONENAND_DEVICE_DENSITY_2Gb:
2484                 /* 2Gb DDP don't have 2 plane */
2485                 if (!ONENAND_IS_DDP(this))
2486                         this->options |= ONENAND_HAS_2PLANE;
2487                 this->options |= ONENAND_HAS_UNLOCK_ALL;
2488
2489         case ONENAND_DEVICE_DENSITY_1Gb:
2490                 /* A-Die has all block unlock */
2491                 if (process)
2492                         this->options |= ONENAND_HAS_UNLOCK_ALL;
2493                 break;
2494
2495         default:
2496                 /* Some OneNAND has continuous lock scheme */
2497                 if (!process)
2498                         this->options |= ONENAND_HAS_CONT_LOCK;
2499                 break;
2500         }
2501
2502         if (this->options & ONENAND_HAS_CONT_LOCK)
2503                 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
2504         if (this->options & ONENAND_HAS_UNLOCK_ALL)
2505                 printk(KERN_DEBUG "Chip support all block unlock\n");
2506         if (this->options & ONENAND_HAS_2PLANE)
2507                 printk(KERN_DEBUG "Chip has 2 plane\n");
2508 }
2509
2510 /**
2511  * onenand_print_device_info - Print device & version ID
2512  * @param device        device ID
2513  * @param version       version ID
2514  *
2515  * Print device & version ID
2516  */
2517 static void onenand_print_device_info(int device, int version)
2518 {
2519         int vcc, demuxed, ddp, density;
2520
2521         vcc = device & ONENAND_DEVICE_VCC_MASK;
2522         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
2523         ddp = device & ONENAND_DEVICE_IS_DDP;
2524         density = onenand_get_density(device);
2525         printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
2526                 demuxed ? "" : "Muxed ",
2527                 ddp ? "(DDP)" : "",
2528                 (16 << density),
2529                 vcc ? "2.65/3.3" : "1.8",
2530                 device);
2531         printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
2532 }
2533
2534 static const struct onenand_manufacturers onenand_manuf_ids[] = {
2535         {ONENAND_MFR_SAMSUNG, "Samsung"},
2536 };
2537
2538 /**
2539  * onenand_check_maf - Check manufacturer ID
2540  * @param manuf         manufacturer ID
2541  *
2542  * Check manufacturer ID
2543  */
2544 static int onenand_check_maf(int manuf)
2545 {
2546         int size = ARRAY_SIZE(onenand_manuf_ids);
2547         char *name;
2548         int i;
2549
2550         for (i = 0; i < size; i++)
2551                 if (manuf == onenand_manuf_ids[i].id)
2552                         break;
2553
2554         if (i < size)
2555                 name = onenand_manuf_ids[i].name;
2556         else
2557                 name = "Unknown";
2558
2559         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2560
2561         return (i == size);
2562 }
2563
2564 /**
2565  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2566  * @param mtd           MTD device structure
2567  *
2568  * OneNAND detection method:
2569  *   Compare the values from command with ones from register
2570  */
2571 static int onenand_probe(struct mtd_info *mtd)
2572 {
2573         struct onenand_chip *this = mtd->priv;
2574         int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
2575         int density;
2576         int syscfg;
2577
2578         /* Save system configuration 1 */
2579         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2580         /* Clear Sync. Burst Read mode to read BootRAM */
2581         this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
2582
2583         /* Send the command for reading device ID from BootRAM */
2584         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2585
2586         /* Read manufacturer and device IDs from BootRAM */
2587         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2588         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2589
2590         /* Reset OneNAND to read default register values */
2591         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2592         /* Wait reset */
2593         this->wait(mtd, FL_RESETING);
2594
2595         /* Restore system configuration 1 */
2596         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2597
2598         /* Check manufacturer ID */
2599         if (onenand_check_maf(bram_maf_id))
2600                 return -ENXIO;
2601
2602         /* Read manufacturer and device IDs from Register */
2603         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2604         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2605         ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2606
2607         /* Check OneNAND device */
2608         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2609                 return -ENXIO;
2610
2611         /* Flash device information */
2612         onenand_print_device_info(dev_id, ver_id);
2613         this->device_id = dev_id;
2614         this->version_id = ver_id;
2615
2616         density = onenand_get_density(dev_id);
2617         this->chipsize = (16 << density) << 20;
2618         /* Set density mask. it is used for DDP */
2619         if (ONENAND_IS_DDP(this))
2620                 this->density_mask = (1 << (density + 6));
2621         else
2622                 this->density_mask = 0;
2623
2624         /* OneNAND page size & block size */
2625         /* The data buffer size is equal to page size */
2626         mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2627         mtd->oobsize = mtd->writesize >> 5;
2628         /* Pages per a block are always 64 in OneNAND */
2629         mtd->erasesize = mtd->writesize << 6;
2630
2631         this->erase_shift = ffs(mtd->erasesize) - 1;
2632         this->page_shift = ffs(mtd->writesize) - 1;
2633         this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
2634         /* It's real page size */
2635         this->writesize = mtd->writesize;
2636
2637         /* REVIST: Multichip handling */
2638
2639         mtd->size = this->chipsize;
2640
2641         /* Check OneNAND features */
2642         onenand_check_features(mtd);
2643
2644         /*
2645          * We emulate the 4KiB page and 256KiB erase block size
2646          * But oobsize is still 64 bytes.
2647          * It is only valid if you turn on 2X program support,
2648          * Otherwise it will be ignored by compiler.
2649          */
2650         if (ONENAND_IS_2PLANE(this)) {
2651                 mtd->writesize <<= 1;
2652                 mtd->erasesize <<= 1;
2653         }
2654
2655         return 0;
2656 }
2657
2658 /**
2659  * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
2660  * @param mtd           MTD device structure
2661  */
2662 static int onenand_suspend(struct mtd_info *mtd)
2663 {
2664         return onenand_get_device(mtd, FL_PM_SUSPENDED);
2665 }
2666
2667 /**
2668  * onenand_resume - [MTD Interface] Resume the OneNAND flash
2669  * @param mtd           MTD device structure
2670  */
2671 static void onenand_resume(struct mtd_info *mtd)
2672 {
2673         struct onenand_chip *this = mtd->priv;
2674
2675         if (this->state == FL_PM_SUSPENDED)
2676                 onenand_release_device(mtd);
2677         else
2678                 printk(KERN_ERR "resume() called for the chip which is not"
2679                                 "in suspended state\n");
2680 }
2681
2682 /**
2683  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2684  * @param mtd           MTD device structure
2685  * @param maxchips      Number of chips to scan for
2686  *
2687  * This fills out all the not initialized function pointers
2688  * with the defaults.
2689  * The flash ID is read and the mtd/chip structures are
2690  * filled with the appropriate values.
2691  */
2692 int onenand_scan(struct mtd_info *mtd, int maxchips)
2693 {
2694         int i;
2695         struct onenand_chip *this = mtd->priv;
2696
2697         if (!this->read_word)
2698                 this->read_word = onenand_readw;
2699         if (!this->write_word)
2700                 this->write_word = onenand_writew;
2701
2702         if (!this->command)
2703                 this->command = onenand_command;
2704         if (!this->wait)
2705                 onenand_setup_wait(mtd);
2706
2707         if (!this->read_bufferram)
2708                 this->read_bufferram = onenand_read_bufferram;
2709         if (!this->write_bufferram)
2710                 this->write_bufferram = onenand_write_bufferram;
2711
2712         if (!this->block_markbad)
2713                 this->block_markbad = onenand_default_block_markbad;
2714         if (!this->scan_bbt)
2715                 this->scan_bbt = onenand_default_bbt;
2716
2717         if (onenand_probe(mtd))
2718                 return -ENXIO;
2719
2720         /* Set Sync. Burst Read after probing */
2721         if (this->mmcontrol) {
2722                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2723                 this->read_bufferram = onenand_sync_read_bufferram;
2724         }
2725
2726         /* Allocate buffers, if necessary */
2727         if (!this->page_buf) {
2728                 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
2729                 if (!this->page_buf) {
2730                         printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2731                         return -ENOMEM;
2732                 }
2733                 this->options |= ONENAND_PAGEBUF_ALLOC;
2734         }
2735         if (!this->oob_buf) {
2736                 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
2737                 if (!this->oob_buf) {
2738                         printk(KERN_ERR "onenand_scan(): Can't allocate oob_buf\n");
2739                         if (this->options & ONENAND_PAGEBUF_ALLOC) {
2740                                 this->options &= ~ONENAND_PAGEBUF_ALLOC;
2741                                 kfree(this->page_buf);
2742                         }
2743                         return -ENOMEM;
2744                 }
2745                 this->options |= ONENAND_OOBBUF_ALLOC;
2746         }
2747
2748         this->state = FL_READY;
2749         init_waitqueue_head(&this->wq);
2750         spin_lock_init(&this->chip_lock);
2751
2752         /*
2753          * Allow subpage writes up to oobsize.
2754          */
2755         switch (mtd->oobsize) {
2756         case 64:
2757                 this->ecclayout = &onenand_oob_64;
2758                 mtd->subpage_sft = 2;
2759                 break;
2760
2761         case 32:
2762                 this->ecclayout = &onenand_oob_32;
2763                 mtd->subpage_sft = 1;
2764                 break;
2765
2766         default:
2767                 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2768                         mtd->oobsize);
2769                 mtd->subpage_sft = 0;
2770                 /* To prevent kernel oops */
2771                 this->ecclayout = &onenand_oob_32;
2772                 break;
2773         }
2774
2775         this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2776
2777         /*
2778          * The number of bytes available for a client to place data into
2779          * the out of band area
2780          */
2781         this->ecclayout->oobavail = 0;
2782         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
2783             this->ecclayout->oobfree[i].length; i++)
2784                 this->ecclayout->oobavail +=
2785                         this->ecclayout->oobfree[i].length;
2786         mtd->oobavail = this->ecclayout->oobavail;
2787
2788         mtd->ecclayout = this->ecclayout;
2789
2790         /* Fill in remaining MTD driver data */
2791         mtd->type = MTD_NANDFLASH;
2792         mtd->flags = MTD_CAP_NANDFLASH;
2793         mtd->erase = onenand_erase;
2794         mtd->point = NULL;
2795         mtd->unpoint = NULL;
2796         mtd->read = onenand_read;
2797         mtd->write = onenand_write;
2798         mtd->read_oob = onenand_read_oob;
2799         mtd->write_oob = onenand_write_oob;
2800         mtd->panic_write = onenand_panic_write;
2801 #ifdef CONFIG_MTD_ONENAND_OTP
2802         mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2803         mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2804         mtd->get_user_prot_info = onenand_get_user_prot_info;
2805         mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2806         mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2807         mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2808 #endif
2809         mtd->sync = onenand_sync;
2810         mtd->lock = onenand_lock;
2811         mtd->unlock = onenand_unlock;
2812         mtd->suspend = onenand_suspend;
2813         mtd->resume = onenand_resume;
2814         mtd->block_isbad = onenand_block_isbad;
2815         mtd->block_markbad = onenand_block_markbad;
2816         mtd->owner = THIS_MODULE;
2817
2818         /* Unlock whole block */
2819         onenand_unlock_all(mtd);
2820
2821         return this->scan_bbt(mtd);
2822 }
2823
2824 /**
2825  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2826  * @param mtd           MTD device structure
2827  */
2828 void onenand_release(struct mtd_info *mtd)
2829 {
2830         struct onenand_chip *this = mtd->priv;
2831
2832 #ifdef CONFIG_MTD_PARTITIONS
2833         /* Deregister partitions */
2834         del_mtd_partitions (mtd);
2835 #endif
2836         /* Deregister the device */
2837         del_mtd_device (mtd);
2838
2839         /* Free bad block table memory, if allocated */
2840         if (this->bbm) {
2841                 struct bbm_info *bbm = this->bbm;
2842                 kfree(bbm->bbt);
2843                 kfree(this->bbm);
2844         }
2845         /* Buffers allocated by onenand_scan */
2846         if (this->options & ONENAND_PAGEBUF_ALLOC)
2847                 kfree(this->page_buf);
2848         if (this->options & ONENAND_OOBBUF_ALLOC)
2849                 kfree(this->oob_buf);
2850 }
2851
2852 EXPORT_SYMBOL_GPL(onenand_scan);
2853 EXPORT_SYMBOL_GPL(onenand_release);
2854
2855 MODULE_LICENSE("GPL");
2856 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2857 MODULE_DESCRIPTION("Generic OneNAND flash driver code");